A layout construction method and system of a quantum chip frequency regulation line
Patent Information
- Application Number
- CN202610704773.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-05-21
- Publication Date
- 2026-08-18
AI Technical Summary
[0003]尽管如此,现有量子芯片频率调控线的布图构建仍存在改进之处,首先,缺少针对超导量子干涉仪图形的专门结构识别机制,容易造成耦合段位置与实际磁通敏感区域之间的对应关系不够稳定,其次,频率调控线中的耦合段、引出段和主干段在功能作用、线宽要求和几何连续性方面存在差异,影响频率调控线布图结果的工艺适配性、磁通偏置稳定性和自动化构建质量
[0057]The beneficial effects of this invention are as follows: A local reference coordinate system is constructed by extracting the center coordinates of two Josephson junctions, and a magnetic flux coupling region is built based on the projection results. This achieves geometric matching between the coupling position of the frequency control line and the superconducting quantum interference device (SQI) pattern. By performing an expansion operation on the obstacle layout pattern, obtaining the deployable area, and constructing a connected path graph, a calculable expression of the routing path is achieved while meeting process avoidance requirements. The target path is obtained through path search and cost comparison, taking into account routing length, number of corners, and boundary margin, reducing the risk of the frequency control line approaching the forbidden area or generating too many bends. By dividing the target path into coupling segments, lead-out segments, and main segments, and performing equidistant widening, corner smoothing, and region merging, a frequency control line pattern that can be directly written into the quantum chip layout is formed. This improves the accuracy of the coupling position, process adaptability, geometric continuity, and automated construction quality of the frequency control line layout results.
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Figure CN122595960A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of layout construction technology, and in particular to a method, system, electronic device, and storage medium for constructing layouts of frequency control lines for quantum chips. Background Technology
[0002] With the development of electronic design automation (EDA) and computer-aided layout (CAD) technologies, quantum chip layout design is gradually evolving from manual drawing to a more standardized, parameterized, and semi-automated approach. By employing methods such as layout object recognition, geometric coordinate calculation, process rule constraints, and path construction, the consistency, repeatability, and design efficiency of frequency control line layouts can be improved. This is particularly relevant in scenarios with numerous layout patterns involving superconducting quantum interference devices, target leads, and surrounding obstacles. Constructing frequency control lines based on geometric structures and process constraints helps ensure a stable spatial relationship between the frequency control lines and the flux-sensitive region, and provides a standardized data foundation for subsequent layout verification, process inspection, and iterative chip design.
[0003] Nevertheless, there are still areas for improvement in the layout construction of existing quantum chip frequency control lines. First, the lack of a dedicated structure recognition mechanism for superconducting quantum interference device patterns can easily lead to unstable correspondence between the coupling segment positions and the actual flux-sensitive regions. Second, the coupling segments, lead-out segments, and main segments in the frequency control lines differ in terms of function, linewidth requirements, and geometric continuity, affecting the process adaptability, flux bias stability, and automated construction quality of the frequency control line layout results. Summary of the Invention
[0004] In view of the aforementioned existing problems, the present invention is proposed.
[0005] Therefore, the present invention provides a method, system, electronic device, and storage medium for constructing the layout of frequency control lines for quantum chips.
[0006] To at least partially solve the above-mentioned technical problems, the present invention provides the following technical solution:
[0007] In a first aspect, the present invention provides a method for constructing the layout of frequency control lines in a quantum chip, comprising,
[0008] Read the layout objects in the quantum chip layout, the layout objects including the superconducting quantum interference device pattern, the obstacle layout pattern and the target lead-out end pattern;
[0009] Extract the coordinates of the centers of two Josephson junctions from the superconducting quantum interference device image to construct a local reference coordinate system;
[0010] The superconducting quantum interference device pattern is projected based on a local reference coordinate system, and a magnetic flux coupling region is constructed according to a preset coupling distance and coupling length.
[0011] Perform an expansion operation on the obstacle map to obtain the deployable regions, and perform skeleton extraction on the deployable regions to construct a connected path graph.
[0012] In the connected path graph, starting from the anchor point outside the magnetic flux coupling zone and ending at the corresponding termination anchor point of the target lead-out end graph, path search and cost comparison are performed to obtain the target path.
[0013] The target path is divided into coupling segment, lead-out segment and main segment according to the positional relationship of the magnetic flux coupling zone;
[0014] The coupling segment, lead-out segment, and main segment are subjected to equidistant widening, corner smoothing, and region merging according to their corresponding line widths to obtain the frequency control line layout results.
[0015] As a preferred embodiment of the layout construction method for the frequency control line of the quantum chip described in this invention, the extraction of the center coordinates of the two Josephson junctions refers to locating the closed-loop contour of the superconducting quantum interference device pattern and the corresponding two Josephson junction patterns in the quantum chip layout, extracting the boundary vertex coordinates of the two Josephson junction patterns respectively, and performing geometric center calculation on the boundary vertex coordinates of the two Josephson junction patterns to obtain the center coordinates of the first Josephson junction and the center coordinates of the second Josephson junction.
[0016] As a preferred embodiment of the layout construction method for the quantum chip frequency control line described in this invention, the construction of the local reference coordinate system specifically includes:
[0017] The origin of the local reference coordinate system is the midpoint between the center coordinates of the first Josephson knot and the center coordinates of the second Josephson knot.
[0018] The direction from the center coordinates of the first Josephson knot to the center coordinates of the second Josephson knot is taken as the longitudinal axis of the local reference coordinate system;
[0019] The outer reference direction is determined by pointing the geometric center of the superconducting quantum interference device's graphic center to the geometric center of the target's lead-out end graphic center.
[0020] From the two candidate transverse axis directions perpendicular to the longitudinal axis direction, calculate the dot product between each candidate transverse axis direction and the outer judgment reference direction. The candidate transverse axis direction with the largest dot product value is taken as the positive transverse axis direction of the local reference coordinate system, thus forming the local reference coordinate system.
[0021] As a preferred embodiment of the layout construction method for the quantum chip frequency control line described in this invention, the construction of the magnetic flux coupling region specifically includes:
[0022] After transforming the coordinates of all boundary vertices of the superconducting quantum interference device pattern to the local reference coordinate system, the projection values of all boundary vertex coordinates in the horizontal axis direction and the vertical axis direction of the local reference coordinate system are calculated respectively. At the same time, the outer reference projection edge is identified based on the projection extreme value in the horizontal axis direction.
[0023] The lateral center position is obtained by offsetting the outer reference projection edge outward by a preset coupling distance along the lateral axis of the local reference coordinate system.
[0024] The median position of all projected values along the longitudinal axis of the local reference coordinate system is taken to obtain the longitudinal center. Based on the longitudinal center, the two longitudinal boundaries are obtained by extending half of the preset coupling length to both sides along the longitudinal axis of the local reference coordinate system.
[0025] The lateral boundary of the magnetic flux coupling zone is constructed along the lateral axis of the local reference coordinate system with the lateral center position as the reference, and the two longitudinal boundaries are enclosed with the lateral boundary to form the magnetic flux coupling zone.
[0026] In a preferred embodiment of the quantum chip frequency control line layout construction method of the present invention, the step of obtaining the layable region specifically includes:
[0027] Along the normal direction outside the boundary line of each obstacle pattern, offset outward according to the preset outward expansion parameters to obtain the outward expansion boundary corresponding to each obstacle pattern;
[0028] The outer boundaries are enclosed to form an outer expansion region, and a union operation is performed on all outer expansion regions to obtain the no-layout zone;
[0029] The area covered by the map between the outer anchor point of the magnetic flux coupling zone and the target lead-out end graphic termination anchor point is taken as the area to be deployed. The restricted area is subtracted from the area to be deployed to obtain the deployable area.
[0030] As a preferred embodiment of the layout construction method for the quantum chip frequency control line of the present invention, wherein: the construction of the connected path graph specifically includes:
[0031] The available area is discretely sampled according to a preset sampling step size to obtain a set of sampling points, and the shortest distance from each sampling point to the boundary of the available area is calculated.
[0032] Select the sampling point in the set of sampling points that reaches the local maximum at the shortest distance, and use it as the center sampling point;
[0033] Connect adjacent center sampling points according to the preset connection radius to obtain the initial skeleton line. Perform skeleton regularization on the initial skeleton line to obtain the continuous skeleton line.
[0034] Extract the bifurcation points from the continuous skeleton line as path nodes, take the continuous skeleton line segments between adjacent path nodes as path edges, establish the adjacency correspondence between path nodes and path edges, and obtain the connected path graph.
[0035] As a preferred embodiment of the layout construction method for the quantum chip frequency control line described in this invention, the step of obtaining the target path specifically includes:
[0036] In the connected path diagram, locate the path node with the smallest distance to the anchor point outside the magnetic flux coupling zone as the starting access node, and locate the path node with the smallest distance to the ending anchor point of the target lead-out end graphic as the ending access node.
[0037] Starting from the initial access node, traverse along the path edges segment by segment to the final access node, obtain all connected candidate paths, calculate the path cost of each connected candidate path, and take the connected candidate path with the minimum path cost as the target path.
[0038] As a preferred embodiment of the layout construction method for the quantum chip frequency control line described in this invention, the division into coupling segment, lead-out segment, and main segment specifically refers to:
[0039] Based on all path nodes of the target path and the path edges between adjacent path nodes, continuous path edges located inside the magnetic flux coupling zone and extending along the length direction of the magnetic flux coupling zone are taken as coupling segments.
[0040] The continuous path edge extending from the anchor point outside the magnetic flux coupling zone to the starting position of the common routing path is used as the lead-out segment;
[0041] The path edge located on the side of the lead-out segment away from the magnetic flux coupling zone and extending continuously to the target lead-out end graphic termination anchor point is taken as the main segment.
[0042] As a preferred embodiment of the quantum chip frequency control line layout construction method of the present invention, the step of obtaining the frequency control line layout result specifically includes:
[0043] Read the path edges and line widths corresponding to the coupling segment, lead-out segment, and main segment, and offset the corresponding line widths on both sides of the normal direction with the center line of each path edge as the reference to form the widened areas of the coupling segment, lead-out segment, and main segment.
[0044] At the inflection points connecting the coupling segment and the lead-out segment, and the lead-out segment and the main segment, an arc transition boundary tangent to the widening boundary on both sides is constructed based on the included angle of the adjacent path sides and the preset smooth radius.
[0045] Connect the arc transition boundary with the widened areas of the coupling section, the lead-out section, and the main section to form a continuous smooth corner area.
[0046] The widened regions of the coupling segment, the lead-out segment, the main segment, and the continuous corner smoothing region are processed by region merging and overlapping boundary elimination to obtain the frequency control line pattern. The frequency control line pattern is then written into the quantum chip layout to obtain the frequency control line layout result.
[0047] Secondly, the present invention provides a layout construction system for frequency control lines in a quantum chip, comprising,
[0048] The reading module reads layout objects from the quantum chip layout, including superconducting quantum interference device patterns, obstacle layout patterns, and target lead-out end patterns.
[0049] The module constructs a local reference coordinate system by extracting the center coordinates of two Josephson junctions from the superconducting quantum interference device image.
[0050] The projection module projects the superconducting quantum interference device pattern based on a local reference coordinate system and constructs a magnetic flux coupling region according to a preset coupling distance and coupling length.
[0051] The calculation module performs an expansion calculation on the obstacle layout graphic based on the expansion parameters in the process rule data to obtain the deployable area, and performs skeleton extraction on the deployable area to construct a connected path graph;
[0052] The path module, in the connected path graph, takes the anchor point outside the magnetic flux coupling zone as the starting point and the corresponding termination anchor point of the target lead-out end graph as the ending point, performs path search and cost comparison to obtain the target path.
[0053] The target path is divided into three modules based on the positional relationship of the magnetic flux coupling zone: coupling segment, lead-out segment, and main segment.
[0054] The merging module performs equidistant widening, corner smoothing, and region merging on the coupling segment, lead-out segment, and main segment according to their corresponding line widths to obtain the frequency control line layout results.
[0055] Thirdly, the present invention provides an electronic device including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps of the method in the first aspect.
[0056] Fourthly, the present invention provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the method in the first aspect.
[0057] The beneficial effects of this invention are as follows: A local reference coordinate system is constructed by extracting the center coordinates of two Josephson junctions, and a magnetic flux coupling region is built based on the projection results. This achieves geometric matching between the coupling position of the frequency control line and the superconducting quantum interference device (SQI) pattern. By performing an expansion operation on the obstacle layout pattern, obtaining the deployable area, and constructing a connected path graph, a calculable expression of the routing path is achieved while meeting process avoidance requirements. The target path is obtained through path search and cost comparison, taking into account routing length, number of corners, and boundary margin, reducing the risk of the frequency control line approaching the forbidden area or generating too many bends. By dividing the target path into coupling segments, lead-out segments, and main segments, and performing equidistant widening, corner smoothing, and region merging, a frequency control line pattern that can be directly written into the quantum chip layout is formed. This improves the accuracy of the coupling position, process adaptability, geometric continuity, and automated construction quality of the frequency control line layout results. Attached Figure Description
[0058] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the following description of the embodiments will be briefly introduced. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0059] Figure 1 A flowchart illustrating the method for constructing the layout of frequency control lines in a quantum chip according to an embodiment of the present invention.
[0060] Figure 2 This is a flowchart illustrating the construction of a local reference coordinate system in the layout construction method for quantum chip frequency control lines provided in this embodiment of the invention.
[0061] Figure 3 This is a flowchart illustrating the construction of the magnetic flux coupling region in the quantum chip frequency control line layout construction method provided in this embodiment of the invention.
[0062] Figure 4 This is a flowchart illustrating the method for obtaining a connected path graph in the layout construction method of a quantum chip frequency control line provided in an embodiment of the present invention. Detailed Implementation
[0063] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
[0064] Many specific details are set forth in the following description in order to provide a full understanding of the invention. However, the invention may also be practiced in other ways different from those described herein, and those skilled in the art can make similar extensions without departing from the spirit of the invention. Therefore, the invention is not limited to the specific embodiments disclosed below.
[0065] Secondly, the term "one embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The phrase "in one embodiment" appearing in different places in this specification does not necessarily refer to the same embodiment, nor is it a single or selective embodiment that is mutually exclusive with other embodiments.
[0066] Reference Figures 1-4 As one embodiment of the present invention, this embodiment provides a method for constructing the layout of frequency control lines in a quantum chip, comprising the following steps:
[0067] S1. Read the layout object in the quantum chip layout.
[0068] It should be noted that, in the quantum chip layout database, the layout layer containing the superconducting quantum interference device graphic, the layout layer containing the obstacle graphic, and the layout layer containing the target lead-out end graphic are sequentially retrieved according to the preset layout layer mapping relationship. The graphic identifier, boundary vertex coordinates, layer number information, and layout position relationship in the corresponding layout layers are extracted to obtain the superconducting quantum interference device graphic, obstacle layout graphic, and target lead-out end graphic, respectively.
[0069] Furthermore, the construction process of the quantum chip layout database is as follows: The quantum chip layout is drawn in a layout design tool, resulting in a layout file containing polygons, paths, text tags, layer numbers, layer instances, and coordinate information; the layout file is parsed, and the superconducting quantum interference device (SQI) graphic, obstacle layout graphic, and target lead-out end graphic are identified according to a preset layout layer mapping relationship, and the corresponding boundary vertex coordinates, graphic identifiers, belonging layers, levels, and connectivity relationships are extracted; the extracted graphic data is written into a structured storage table according to a unified field format to form the quantum chip layout database.
[0070] The preset layout layer mapping relationship is a pre-established correspondence between layout layer identifiers and object category identifiers. For example, a layout layer identifier with a layer number and data type number combination of L1 / D1 corresponds to a superconducting quantum interference device (SQU) graphic, a layout layer identifier with a combination of L2 / D2 corresponds to an obstacle layout graphic, and a layout layer identifier with a combination of L3 / D3 corresponds to a target lead-out graphic. Layout layer identifiers must include at least a layer number and a data type number, and object category identifiers must include at least a superconducting quantum interference device graphic, an obstacle layout graphic, and a target lead-out graphic.
[0071] S2. Extract the center coordinates of two Josephson junctions from the superconducting quantum interference device image to construct a local reference coordinate system.
[0072] It should be noted that the boundary vertex coordinates corresponding to the superconducting quantum interference device (SQI) pattern are extracted from the quantum chip layout, and then connected end to end in the order of the boundary vertex coordinates to form a closed boundary, thus obtaining the closed-loop contour of the SQI pattern. Two discontinuous connection positions are located on the closed-loop contour of the SQI pattern, and two Josephson junction patterns are extracted according to the local connection pattern ranges corresponding to the two discontinuous connection positions, thereby completing the location of the closed-loop contour of the SQI pattern and the corresponding two Josephson junction patterns.
[0073] The coordinates of all boundary vertices constituting the boundary contours of the two Josephson knots are read separately, and a vertex coordinate sequence is established sequentially according to the arrangement order of the boundary vertex coordinates on the boundary contours. For each Josephson knot, the geometric center is calculated: the average of all x-coordinates in the vertex coordinate sequence is taken to obtain the central x-coordinate, and the average of all y-coordinates in the vertex coordinate sequence is taken to obtain the central y-coordinate. The central x-coordinate and central y-coordinate are combined to form the geometric center coordinates of the corresponding Josephson knot. Based on the arrangement order of the two Josephson knots on the closed-loop contour of the superconducting quantum interference device (SQI), the geometric center coordinates of the Josephson knot read first are designated as the first Josephson knot center coordinates, and the geometric center coordinates of the Josephson knot read later are designated as the second Josephson knot center coordinates. The origin of the local reference coordinate system is set at the midpoint between the coordinates of the first and second Josephson junction centers. The direction from the first Josephson junction center to the second Josephson junction center is set as the longitudinal axis of the local reference coordinate system. Geometric center calculation is performed on the closed-loop contour of the superconducting quantum interference device (SQFID) pattern to obtain its geometric center. Geometric center calculation is also performed on all boundary vertex coordinates of the target lead-out end pattern to obtain its geometric center. The direction from the geometric center of the SQFID pattern to the geometric center of the target lead-out end pattern is set as the outer judgment reference direction. Two candidate transverse axis directions perpendicular to the longitudinal axis are constructed in the two-dimensional plane, and the dot product between each candidate transverse axis direction and the outer judgment reference direction is calculated. The candidate transverse axis direction with the largest dot product value is set as the positive transverse axis direction of the local reference coordinate system, and the opposite direction is set as the negative transverse axis direction, thus forming the local reference coordinate system.
[0074] S3. Project the superconducting quantum interference device pattern based on the local reference coordinate system, and construct the magnetic flux coupling region according to the preset coupling distance and coupling length.
[0075] S3.1. It should be noted that the coordinates of all boundary vertices of the superconducting quantum interference device (SQFID) pattern, as well as the origin, vertical axis direction, and horizontal axis direction of the local reference coordinate system, are read. The vertical axis direction is normalized (Euclidean norm normalized) to a unit direction vector, and the horizontal axis direction is normalized (Euclidean norm normalized) to a unit direction vector. For any boundary vertex coordinate in the SQFID pattern, the coordinate difference between the boundary vertex coordinate and the origin of the local reference coordinate system is calculated to obtain the boundary vertex translation vector. The boundary vertex translation vector is then multiplied by the horizontal axis unit direction vector to obtain the projection value of the boundary vertex coordinate in the horizontal axis direction of the local reference coordinate system. The boundary vertex translation vector is then multiplied by the vertical axis unit direction vector to obtain the projection value of the boundary vertex coordinate in the vertical axis direction of the local reference coordinate system. The same process is used to traverse all boundary vertex coordinates of the SQFID pattern to obtain the projection values of all boundary vertex coordinates in the horizontal axis direction and the vertical axis direction of the local reference coordinate system. Extreme value filtering is performed on the projection values of all boundary vertex coordinates in the positive direction of the horizontal axis of the local reference coordinate system. The set of boundary vertex coordinates corresponding to the maximum projection value is extracted and connected sequentially according to the connection order of the boundary vertex coordinates on the boundary contour of the superconducting quantum interference device pattern to obtain the boundary line segment on the side of the superconducting quantum interference device pattern facing the target lead-out end pattern. The boundary line segment located at the maximum projection position in the positive direction of the horizontal axis and continuously extending along the vertical axis direction is identified as the outer reference projection edge.
[0076] S3.2 It should be noted that the coordinates of all boundary vertices corresponding to the outer reference projection edge and the transverse axis direction of the local reference coordinate system are read; the outward extension direction of the outer reference projection edge in the transverse axis direction of the local reference coordinate system is taken as the offset direction; the projection values of all boundary vertices corresponding to the outer reference projection edge in the transverse axis direction of the local reference coordinate system are offset by a preset coupling distance along the side away from the superconducting quantum interference device pattern to obtain the offset transverse projection value; the center value position corresponding to the outer reference projection edge is taken for the offset transverse projection value, and the center value position is determined as the transverse center position; wherein, the transverse center position is used to characterize the center landing point position of the magnetic flux coupling action area after being offset outward by a preset coupling distance relative to the outer reference projection edge along the transverse axis direction of the local reference coordinate system.
[0077] Furthermore, the coupling distance is set to limit the offset position of the magnetic flux coupling region relative to the outer reference projection edge in the transverse axis direction of the local reference coordinate system. The coupling distance is pre-configured based on the magnetic coupling distance requirements between the magnetic flux bias line and the superconducting quantum interference device pattern in the superconducting quantum chip, the minimum line spacing requirements of the layout process, and the existing micrometer-level spacing range between the magnetic flux bias line and the superconducting quantum interference device. The coupling distance ranges from 0.1μm to 15μm, and is specifically set to 5μm.
[0078] S3.3 It should be noted that all projected values along the longitudinal axis of the local reference coordinate system are sorted according to their numerical values, and the projected value in the middle position is extracted as the longitudinal center. When the number of all projected values along the longitudinal axis of the local reference coordinate system is even, the average of the two middle projected values is taken as the longitudinal center. Using the longitudinal center as the reference position, half of the preset coupling length is intercepted on the positive side of the longitudinal axis of the local reference coordinate system to obtain the first longitudinal boundary, and half of the preset coupling length is intercepted on the negative side of the longitudinal axis of the local reference coordinate system to obtain the second longitudinal boundary. The first longitudinal boundary and the second longitudinal boundary together define the effective length range of the magnetic flux coupling action area along the longitudinal axis of the local reference coordinate system.
[0079] Read the lateral center position obtained in S3.2 and use it as the center reference of the magnetic flux coupling region along the lateral axis of the local reference coordinate system; read the line width of the coupling segment and the preset lateral positioning margin, and sum the line width of the coupling segment with twice the preset lateral positioning margin to obtain the width of the coupling region; with the lateral center position as the center, offset by half the width of the coupling region along the negative direction of the lateral axis of the local reference coordinate system to obtain the first lateral boundary close to the superconducting quantum interference device pattern, and offset by half the width of the coupling region along the positive direction of the lateral axis of the local reference coordinate system to obtain the second lateral boundary away from the superconducting quantum interference device pattern; find the intersection points between the first lateral boundary, the second lateral boundary and the two longitudinal boundaries respectively, and connect them end to end in the order of the intersection points to form a closed region, thus forming the magnetic flux coupling region.
[0080] After forming the magnetic flux coupling region, the second lateral boundary of the magnetic flux coupling region on the side away from the superconducting quantum interference device pattern is read, and the boundary vertex coordinates of the target lead-out pattern are read; the geometric center is calculated for all the boundary vertex coordinates of the target lead-out pattern to obtain the geometric center of the target lead-out pattern; the boundary point with the smallest distance from the geometric center of the target lead-out pattern is selected on the second lateral boundary, and the boundary point is used as the anchor point outside the magnetic flux coupling region.
[0081] Read all boundary line segments of the target lead-out end graphic and calculate the shortest distance from each boundary line segment to the anchor point outside the magnetic flux coupling zone. Take the boundary line segment corresponding to the shortest distance as the target connection boundary. Select the boundary point with the smallest distance to the anchor point outside the magnetic flux coupling zone on the target connection boundary and take the boundary point as the termination anchor point of the target lead-out end graphic.
[0082] Furthermore, the coupling length is used to define the length of the magnetic flux coupling region covering the effective magnetic flux sensitive range of the superconducting quantum interference device pattern along the longitudinal axis of the local reference coordinate system, so that the coupling segment covers the main magnetic flux coupling region between the center coordinates of the two Josephson junctions in the longitudinal direction; in one embodiment, the coupling length is 20 μm. The linewidth corresponding to the coupling segment is used to define the actual conductor width of the frequency control line within the magnetic flux coupling region, so that the widened coupling segment can form a conductor pattern that meets the layout manufacturing rules; in one embodiment, the linewidth corresponding to the coupling segment is 2 μm. The lateral positioning margin is used to compensate for the lateral positioning deviations generated during discrete sampling, skeleton extraction, path search, and equidistant widening, and to reserve boundary margins for subsequent corner smoothing and region merging; in one embodiment, the lateral positioning margin is 0.5 μm.
[0083] S4. Perform an expansion operation on the obstacle map to obtain the deployable area, and extract the skeleton of the deployable area to construct a connected path graph.
[0084] S4.1 It should be noted that the boundary vertex coordinates corresponding to each obstacle layout graphic are read, and the boundary line segments of each obstacle layout graphic are constructed sequentially according to the connection order of the boundary vertex coordinates; for each boundary line segment, the outward normal direction perpendicular to the boundary line segment and pointing to the outside of the obstacle layout graphic is calculated, and then, taking each sampling point or endpoint on the boundary line segment as a reference, the preset outward expansion parameter is offset outward along the corresponding outward normal direction to obtain an outward expansion line segment parallel to the original boundary line segment; between adjacent outward expansion line segments, a connecting arc boundary or intersection connecting boundary is constructed according to the included angle of adjacent boundary line segments, and all outward expansion line segments and connecting boundaries are connected end to end in sequence to form a closed outward expansion contour, and the closed outward expansion contour is used as the outward expansion boundary corresponding to each obstacle layout graphic.
[0085] Furthermore, the expansion parameters are set to transform each obstacle map graphic from its original geometric boundary into a safe boundary that can be used for subsequent routing avoidance; in one embodiment, the expansion parameters are taken as... .
[0086] S4.2. It should be noted that the boundary vertex coordinates of each outward expansion boundary are read separately, and the boundary vertex coordinates of each outward expansion boundary are connected end to end in the order of connection to form a closed contour. The plane range enclosed by each closed contour is taken as the outward expansion area corresponding to each outward expansion boundary. For all outward expansion areas, region overlap judgment and boundary intersection calculation are performed. Outward expansion areas with intersecting, tangent or inclusive relationships are re-divided into boundary segments according to the intersection point position, and reconnected along the outer contour to form a merged boundary. All merged boundaries are enclosed to form a continuous closed area. The boundary vertex coordinates corresponding to all continuous closed areas are read separately, and each continuous closed area is represented as a closed polygon formed by connecting the boundary vertex coordinates of adjacent boundaries end to end. For any two continuous closed areas, boundary intersection detection is performed sequentially, that is, the first boundary segment in the first continuous closed area and the second boundary segment in the second continuous closed area are read. The first line segment direction vector is constructed according to the endpoint coordinates of the first boundary segment, and the second line segment direction vector is constructed according to the endpoint coordinates of the second boundary segment. The intersection point coordinates of the first boundary segment and the second boundary segment are calculated according to the line segment parametric equation. When the cross product of the first line segment direction vector and the second line segment direction vector is calculated, the intersection point coordinates of the first boundary segment and the second boundary segment are calculated. When the intersection parameters are not zero and are all between 0 and 1, the intersection points corresponding to the line segment parametric equations are taken as the intersection point coordinates between intersecting boundary segments; when the cross product of the direction vector of the first line segment and the direction vector of the second line segment is zero, and the first boundary segment and the second boundary segment are on the same straight line, the coordinates of the overlapping endpoints are extracted according to the overlapping range of the endpoint projections, and the coordinates of the overlapping endpoints are taken as the boundary segmentation coordinates; when the first boundary segment and the second boundary segment only touch at the endpoints, the coordinates of the touching endpoints are taken as the intersection point coordinates; the continuous closed region boundary segments participating in the intersection detection are segmented according to the intersection point coordinates and the boundary segmentation coordinates to obtain a set of non-intersecting boundary sub-segments. For each boundary segment, select a judgment sampling point located outside the boundary segment and determine whether the judgment sampling point falls into other continuous closed regions. If the judgment sampling point falls into other continuous closed regions, delete the corresponding boundary segment. If the judgment sampling point does not fall into other continuous closed regions, retain the corresponding boundary segment. Reassemble all retained boundary segments according to the endpoint connection relationship to form one or more new closed outer contours. The area enclosed by the new closed outer contours is taken as the result of the region union operation. Combine all region union operation results and record them as the forbidden zone.
[0087] S4.3 It should be noted that the coordinate positions of the outer anchor point of the magnetic flux coupling zone and the target lead-out graphic termination anchor point in the quantum chip layout are read. The direction of the line connecting the outer anchor point of the magnetic flux coupling zone and the target lead-out graphic termination anchor point is used as the longitudinal reference direction of the area to be deployed, and the direction perpendicular to the line is used as the lateral reference direction of the area to be deployed. Based on the distance between the outer anchor point of the magnetic flux coupling zone and the target lead-out graphic termination anchor point, the starting clearance distance on the side where the outer anchor point of the magnetic flux coupling zone is located, and the termination clearance distance on the side where the target lead-out graphic termination anchor point is located, a closed boundary covering the routing area between the outer anchor point of the magnetic flux coupling zone and the target lead-out graphic termination anchor point is constructed, and the area enclosed inside the closed boundary is used as the area to be deployed. Intersection detection and boundary clipping are performed between the area to be deployed and the forbidden zone. The area overlapping with the forbidden zone in the area to be deployed is deducted from the area to be deployed, and the remaining connected area after deduction is retained.
[0088] Read the boundary vertex coordinates of each remaining connected region and reconstruct the closed boundary according to the connection order of the boundary vertex coordinates. Perform length detection and angle detection on adjacent boundary segments in the closed boundary segment by segment. Merge the boundary segments whose length is less than the preset short side threshold and whose angle with the preceding and following boundary segments is less than the preset collinear angle threshold to obtain merged boundary segments. Perform regularization processing on the protruding sharp corners, short burr boundaries and narrow notch boundaries in the closed boundary. Specifically, cut off and delete the protruding boundaries whose protruding length is less than the preset burr length threshold. Perform sealing processing on the narrow notch boundaries whose opening width is less than the sum of the main segment line width and the minimum line spacing according to the connection direction of the adjacent boundary segments on both sides. Perform intersection resegmentation and outer contour reconnection processing on the boundary segments with self-intersection to obtain regularized boundaries without short sides, burrs, self-intersections and continuous boundaries. Calculate the area and minimum passage width of each remaining connected region. Delete the remaining connected regions whose area is less than the preset minimum retention area or whose minimum passage width is less than the main segment line width. Retain the remaining remaining connected regions to obtain the deployable areas that can be used for subsequent path search.
[0089] Furthermore, the initial clearance distance is used to ensure that the area to be deployed covers the access area near the anchor point outside the magnetic flux coupling zone, and in one embodiment, it is 5 μm; the termination clearance distance is used to ensure that the area to be deployed covers the access area near the termination anchor point of the target lead-out end pattern, and in one embodiment, it is 5 μm.
[0090] The short side threshold is used to identify and merge redundant short sides formed after boundary clipping. In one embodiment, the short side threshold is 1 μm.
[0091] The collinearity angle threshold is used to determine whether adjacent boundary segments meet the approximate collinearity condition. In one embodiment, the collinearity angle threshold is 10°.
[0092] The burr length threshold is used to identify and remove local protruding burrs on the boundary of the deployable area. In one embodiment, the burr length threshold is 2 μm.
[0093] The minimum retention area is used to eliminate isolated small regions that are insufficient to support subsequent path search. In one embodiment, the minimum retention area is 36 μm².
[0094] S4.4 It should be noted that the outer boundary of the deployable area is used as the sampling coverage area. Regular sampling points are sequentially deployed along the horizontal and vertical directions according to the preset sampling step size, and regular sampling points falling inside the deployable area are retained to form a sampling point set. For each sampling point in the sampling point set, the Euclidean distance to each boundary line segment or boundary vertex on the boundary of the deployable area is calculated, and the minimum Euclidean distance is taken as the shortest distance from the corresponding sampling point to the boundary of the deployable area. Then, with each sampling point as the center, the shortest distance value of adjacent sampling points is extracted within the preset neighborhood. The shortest distance of the current sampling point is compared with the shortest distance of all adjacent sampling points within the preset neighborhood. When the shortest distance of the current sampling point is greater than or equal to the shortest distance of all adjacent sampling points within the preset neighborhood, the current sampling point is selected as the center sampling point, thereby extracting the center sampling point with the local maximum value of the shortest distance from the sampling point set.
[0095] Furthermore, the sampling step size is used to control the spacing density between adjacent sampling points when the discrete sampling of the deployable area is performed. In one embodiment, the sampling step size is 1 μm.
[0096] The neighborhood range is used to define the coverage area of adjacent sampling points participating in the comparison when determining local maxima. In one embodiment, the neighborhood range is a neighborhood range with a radius of 2μm centered on the current sampling point.
[0097] S4.5 It should be noted that the pairwise spacing between each central sampling point is calculated, and a connection relationship is established for central sampling points whose distance is less than or equal to the preset connection radius and whose entire connection line is located within the deployable area. The central sampling points with connection relationships are connected end to end in the order of the shortest connection line to obtain the initial skeleton line. The initial skeleton line is subjected to skeleton regularization processing, specifically: the redundant sawtooth boundaries in the initial skeleton line are refined, the suspended branches with a length less than the preset retention length are deleted, and the broken line segments with an endpoint spacing less than the preset supplementary connection distance and whose connection line is located within the deployable area are supplemented to obtain the continuous skeleton line.
[0098] Furthermore, the connection radius is used to determine whether the two central sampling points satisfy the skeleton adjacency relationship. In one embodiment, the connection radius is 2μm.
[0099] The retention length is used to determine whether the suspended branches in the initial skeleton line are valid passing branches that need to be retained; in one embodiment, the retention length is 3 μm.
[0100] The patching distance is set to determine whether the broken patching process needs to be performed between the separated endpoints in the initial skeleton line. In one embodiment, the patching distance is 2 μm.
[0101] S4.6 It should be noted that all skeleton intersections and skeleton end positions in the continuous skeleton line are traversed point by point, the number of adjacent skeleton segments corresponding to each position is counted, and the position with the number of adjacent skeleton segments equal to one is determined as the endpoint with a degree of one, and the position with the number of adjacent skeleton segments greater than two is determined as the bifurcation point with a degree of greater than two; the endpoint with a degree of one and the bifurcation point with a degree of greater than two are marked and summarized as path nodes.
[0102] Following the extension order of the continuous skeleton line, trace each path node segment by segment along the continuous skeleton line until reaching the next path node. Define a continuous skeleton line segment between two adjacent path nodes that no longer contains other path nodes as a path edge, and retain the coordinates of all skeleton sampling points within the path edge, the connection order between adjacent skeleton sampling points, and the path edge length. Record the starting path node, ending path node, path edge length, and the sequence of skeleton sampling points within each path edge. Perform endpoint matching on all path edges and all path nodes. When the coordinates of the starting or ending endpoint of a path edge coincide with the coordinates of a path node, establish an adjacency relationship between the corresponding path node and the path edge. Organize all path nodes, all path edges, the sequence of skeleton sampling points within each path edge, and the adjacency relationships between each path node and each path edge to obtain a connected path graph.
[0103] Furthermore, path nodes are used to represent topological endpoints and bifurcation points in continuous skeleton lines, and path edges are used to represent continuous skeleton line segments between adjacent path nodes. Geometric bends inside path edges are not used as the basis for path node segmentation, and directional changes inside path edges are statistically analyzed based on the sequence of skeleton sampling points inside the path edge during path cost calculation.
[0104] S5. In the connected path graph, starting from the anchor point outside the magnetic flux coupling zone and ending at the corresponding termination anchor point of the target exit graph, perform path search and cost comparison to obtain the target path.
[0105] Read the node coordinates of all path nodes in the connected path graph, the anchor coordinates of the anchor points outside the magnetic flux coupling zone, and the anchor coordinates of the target exit point graphic termination anchor point. Calculate the node spacing for each path node and the anchor coordinates of the anchor points outside the magnetic flux coupling zone, and perform minimum value filtering on all node spacings, identifying the path node with the smallest spacing as the starting access node. Calculate the node spacing for each path node and the anchor coordinates of the target exit point graphic termination anchor point, and perform minimum value filtering on all node spacings, identifying the path node with the smallest spacing as the termination access node. Record the node identifier, node coordinates, and corresponding adjacent path edges of the starting and termination access nodes in the connected path graph, completing the location of the starting and termination access nodes.
[0106] Starting from the initial access node, the system traces forward segment by segment along the path edges adjacent to the initial access node according to the adjacency correspondence between path nodes and path edges in the connected path graph. Upon reaching a new path node, it continues to extend towards the final access node along unrepeated path edges until the final access node is reached. Each sequence of nodes and path edges extending continuously from the initial access node to the final access node without repeating path edges is identified as a candidate connected path, thus obtaining all candidate connected paths. The path edge lengths of all included path edges are accumulated for each candidate connected path. The skeleton sampling point sequence within each path edge is read, and the local direction vectors between adjacent skeleton sampling points are calculated sequentially according to the connection order of the skeleton sampling point sequences. The angle change between adjacent local direction vectors is also calculated. When the value exceeds a preset turning threshold, the corresponding position is counted in the number of internal direction changes of the path edge. Simultaneously, the entry and exit direction vectors of adjacent path edges in the connected candidate paths are read at the connecting path nodes, and the angle change between the entry and exit direction vectors is calculated. When the angle change exceeds a preset turning threshold, the corresponding connecting path node is counted in the number of direction changes at the path edge connection. The number of internal direction changes of the path edge is summed with the number of direction changes at the path edge connection to obtain the number of direction changes of the connected candidate path. The reciprocal cumulative value of the boundary margin is calculated based on the boundary margin corresponding to each path edge. The weighted sum of the cumulative path edge length, the number of direction changes, and the reciprocal cumulative value of the boundary margin is obtained to obtain the path cost of the corresponding connected candidate path. The path costs of all connected candidate paths are sorted and compared, and the connected candidate path with the lowest path cost is selected as the target path.
[0107] Furthermore, in one embodiment, the weight corresponding to the cumulative value of the path edge length is set to 0.50, which is used to prioritize constrain the overall length of the target path and avoid the target path from being too long; the weight corresponding to the number of direction changes is set to 0.30, which is used to suppress too many turns in the target path and reduce the number of inflection points when the subsequent frequency control line is formed; the weight corresponding to the cumulative value of the reciprocal of the boundary margin is set to 0.20, which is used to constrain the degree of edge contact between the target path and the boundary of the deployable area and avoid the target path from being too close to the edge of the restricted area.
[0108] The preset turning threshold is used to determine whether the angle change between adjacent local direction vectors inside the path edge, or the angle change at the connection of adjacent path edges, reaches the level that needs to be counted as the number of direction changes. In one embodiment, the turning threshold is 25°, which is used to filter out small directional fluctuations caused by discrete sampling, skeleton regularization and boundary refinement, and retain effective turning points that can affect the straightness of the frequency control line layout result and the smoothness of the corners.
[0109] The method for obtaining the boundary margin corresponding to the path edge is as follows: For each sampling point on the path edge, calculate the Euclidean distance from each sampling point to each boundary line segment or each boundary vertex on the boundary of the deployable area, and select the minimum value from the Euclidean distances to obtain the minimum Euclidean distance of the sampling point on the path edge; perform minimum value filtering on the minimum Euclidean distances corresponding to all sampling points constituting the path edge to obtain the boundary margin corresponding to the path edge.
[0110] S6. Divide the target path into coupling segment, lead-out segment and main segment according to the positional relationship of the magnetic flux coupling zone.
[0111] Read the coordinates of all path nodes of the target path, the coordinate range of the path edges between adjacent path nodes, and the boundary coordinates of the magnetic flux coupling zone. Perform position inclusion determination and direction consistency determination on each path edge between adjacent path nodes. The position inclusion determination is used to determine whether all path edges between adjacent path nodes are located inside the magnetic flux coupling zone, and the direction consistency determination is used to determine whether the angle between the extension direction of the path edge between adjacent path nodes and the length direction of the magnetic flux coupling zone is less than a preset direction deviation threshold. According to the connection order of the target path, perform continuous merging processing on the path edges between adjacent path nodes that simultaneously satisfy the position inclusion determination and direction consistency determination. The set of continuous path edges that are connected end to end along the connection order of the target path and all satisfy the position inclusion determination and direction consistency determination is determined as the coupling segment.
[0112] Following the connection sequence of the target path, starting from the path position corresponding to the anchor point outside the magnetic flux coupling zone, subsequent path edges are read one by one along the target path, and the lengths of the read path edges are accumulated to obtain the cumulative length of the target path. When the cumulative length of the target path first reaches the preset lead-out segment length, linear interpolation is performed on the current path edge according to the cumulative length difference to obtain the starting position of the common routing path. When the cumulative length of the target path is equal to the preset lead-out segment length, the terminating path node of the current path edge is taken as the starting position of the common routing path. The continuous path edges extending from the anchor point outside the magnetic flux coupling zone to the starting position of the common routing path, as well as the path edge segment where the starting position of the common routing path is located, are taken as the lead-out segments.
[0113] Read the coordinates of all path nodes of the target path, the coordinate range of the path edges between adjacent path nodes, the coordinates corresponding to the starting position of the common routing path, and the coordinates of the target lead-out end graphic termination anchor point; take the adjacent path edge or path edge segment on the side of the common routing path starting position away from the magnetic flux coupling area as the starting path edge of the main segment; starting from the starting path edge of the main segment, trace along the subsequent path edges segment by segment according to the connection order of the target path, and determine whether the subsequent path edge maintains the connection with the beginning and end of the previous path edge and continues to extend towards the target lead-out end graphic termination anchor point; when the termination position of the subsequent path edge coincides with the target lead-out end graphic termination anchor point, or the termination path node of the subsequent path edge coincides with the path node corresponding to the target lead-out end graphic termination anchor point, stop tracing, and determine all path edges that start from the starting path edge of the main segment and extend continuously to the target lead-out end graphic termination anchor point as the main segment.
[0114] Furthermore, the lead-out length is used to define the transition trace length of the frequency control line after it leaves the anchor point outside the magnetic flux coupling region; in one embodiment, the lead-out length is 10 μm.
[0115] S7. Perform equidistant widening, corner smoothing and splicing and region merging on the coupling segment, lead-out segment and main segment according to the corresponding line width to obtain the frequency control line layout result.
[0116] S7.1 It should be noted that the coordinates of the path edges corresponding to the coupling segment and the corresponding line width of the coupling segment, the coordinates of the path edges corresponding to the lead-out segment and the corresponding line width of the lead-out segment, and the coordinates of the path edges corresponding to the trunk segment and the corresponding line width of the trunk segment should be read respectively. Each path edge in each segment should be processed sequentially according to the connection order of the path edges. Specifically, for any path edge, first calculate the tangential direction of the path edge based on the coordinates of the starting and ending points of the path edge, and then determine the normal directions on both sides of the path edge based on the direction perpendicular to the tangential direction; using the centerline of the path edge as a reference, along the normal directions on both sides... Offset by half the corresponding line width to obtain two parallel boundary lines on both sides of the path edge; connect the boundary endpoints at both ends of the same path edge in sequence to form the widened boundary segment of the corresponding path edge, and splice the widened boundary segments of adjacent path edges in the same segment end to end in the connection order to enclose a continuous closed region; wherein, the widened region of the coupling segment is enclosed by all the path edges corresponding to the coupling segment, the widened region of the leading segment is enclosed by all the path edges corresponding to the leading segment, and the widened region of the main segment is enclosed by all the path edges corresponding to the main segment.
[0117] S7.2. It should be noted that the coordinates of the connection inflection point between the coupling segment and the lead-out segment, the coordinates of the connection inflection point between the lead-out segment and the main segment, the coordinates of the path edges of the adjacent path edges on both sides of the connection inflection point, the widened area of the coupling segment, the widened area of the lead-out segment, the widened area of the main segment, and the preset smoothing radius should be read; the unit vector of the path edge extension direction should be calculated for the adjacent path edges on both sides of the connection inflection point, using the following formula:
[0118] ;
[0119] ;
[0120] in, This represents the unit vector representing the direction of extension of the path edge connecting the first path edge on one side of the inflection point. This represents the unit vector indicating the direction of extension of the path edge connecting the second path edge on the other side of the inflection point. Indicates the coordinates of the connecting inflection points. This represents the coordinates of the other endpoint in the first path edge that is adjacent to and outside the connecting inflection point. This represents the coordinates of the other endpoint in the second path edge that is adjacent to the connecting inflection point and located outside the connecting inflection point.
[0121] After obtaining the unit vectors of the path extension directions of the first path edge on one side of the inflection point and the second path edge on the other side of the inflection point, the angle between the adjacent path edges on both sides is calculated using the following formula:
[0122] );
[0123] in, This represents the angle between the adjacent path edges connecting the two sides of the inflection point. This represents the unit vector representing the direction of extension of the path edge connecting the first path edge on one side of the inflection point. This represents the unit vector indicating the direction of extension of the path edge connecting the second path edge on the other side of the inflection point. This indicates the coordinates of the connecting inflection point.
[0124] The unit vector bisector of the angle is calculated based on the angle between the adjacent path edges on both sides of the inflection point. The formula is:
[0125] ;
[0126] in, This represents the unit vector bisecting the angle. This represents the unit vector representing the direction of extension of the path edge connecting the first path edge on one side of the inflection point. This represents the unit vector of the path edge extension direction connecting the second path edge on the other side of the inflection point.
[0127] The distance from the center of the arc to the center of the connecting inflection point and the cut-off lengths at both ends are calculated based on the preset smooth radius. The formulas are as follows:
[0128] ;
[0129] ;
[0130] in, Indicates the distance between the centers of the circles. Indicates the cut-off length. Indicates the preset smooth radius. This represents the included angle between the adjacent path edges on both sides of the inflection point.
[0131] Connect the coordinates of the inflection points Using the bisector of the included angle as a reference, the distance from the center of the circle is intercepted by a unit vector along the bisector of the included angle to obtain the coordinates of the center of the arc. The formula is:
[0132] ;
[0133] in, Represents the coordinates of the center of the arc. Indicates the coordinates of the connecting inflection points. Indicates the distance between the centers of the circles. This represents the unit vector bisecting the angle.
[0134] Intercept the unit vectors extending along the path of the first path edge on one side of the inflection point and the path of the second path edge on the other side of the inflection point, respectively. The coordinates of the first and second splicing points are obtained using the following formulas:
[0135] ;
[0136] ;
[0137] in, Indicates the coordinates of the first splicing point. Indicates the coordinates of the second splicing point. Indicates the coordinates of the connecting inflection points. Indicates the cut-off length. This represents the unit vector representing the direction of extension of the path edge connecting the first path edge on one side of the inflection point. This represents the unit vector of the path edge extension direction connecting the second path edge on the other side of the inflection point.
[0138] Starting from the coordinates of the first splicing point, a first normal projection line is constructed along the direction perpendicular to the first path edge on one side of the connecting inflection point. The intersection of the first normal projection line and the widened boundary corresponding to the first path edge on one side of the connecting inflection point is determined as the first tangent point. Starting from the coordinates of the second splicing point, a second normal projection line is constructed along the direction perpendicular to the second path edge on the other side of the connecting inflection point. The intersection of the second normal projection line and the widened boundary corresponding to the second path edge on the other side of the connecting inflection point is determined as the second tangent point. The first tangent point is used as the coordinates of the arc's starting point, and the second tangent point is used as the coordinates of the arc's ending point. An arc transition boundary is constructed with the arc's center coordinates as the center, a preset smoothing radius as the radius, and the arc's starting and ending coordinates as the arc's endpoints.
[0139] Furthermore, the smooth radius is used to define the curvature of the arc transition boundary at the connection inflection point between the coupling segment and the lead-out segment, and between the lead-out segment and the main segment, thereby avoiding the formation of sharp-cornered boundaries at the connection inflection point, reducing the profile discontinuity caused by abrupt changes in the path edge direction, and ensuring that the arc transition boundary can be smoothly tangent to the widening boundaries on both sides; in one embodiment, the smooth radius is 3μm.
[0140] S7.3. It should be noted that the starting point coordinates and ending point coordinates of the arc transition boundary, as well as the corresponding boundary coordinates of the widened areas of the coupling segment, the lead-out segment, and the main segment, should be read. First, between the widened areas of the coupling segment and the lead-out segment, using the starting point coordinates and ending point coordinates of the arc as the boundary switching positions, the original boundary segments located inside the connecting inflection points in the widened areas of the coupling segment and the lead-out segment should be truncated. Then, the arc transition boundary should be embedded between the truncated boundaries of the widened areas of the coupling segment and the lead-out segment to form the widened areas of the coupling segment and the lead-out segment. The boundary is connected smoothly from beginning to end. Between the extended area of the leading section and the extended area of the main section, the boundary switching position is set using the coordinates of the starting point and ending point of the corresponding arc transition boundary. The original boundary segments located inside the connecting inflection point in the extended areas of the leading section and the main section are removed, and the corresponding arc transition boundary is embedded between the removed boundary of the extended area of the leading section and the boundary of the extended area of the main section. Finally, all the retained boundaries and all the arc transition boundaries are spliced together from beginning to end in the boundary connection order to form a continuous, smooth, and uninterrupted area with continuous boundaries and smooth corners.
[0141] S7.4. It should be noted that the boundary vertex coordinates corresponding to the widened regions of the coupling segment, the lead-out segment, the main segment, and the continuous rounded corners are read respectively, and these regions are uniformly represented as a set of closed regions. Boundary intersection detection is performed on any two closed regions in the set, the intersection point coordinates are calculated, and the original boundary segments are divided using the intersection point coordinates as the dividing position to obtain a set of non-intersecting boundary sub-segments. For each boundary sub-segment in the set, an inner / outer boundary assignment determination is performed, deleting the boundary sub-segments located in the overlapping parts inside the set of closed regions, and retaining the boundary sub-segments located on the outer contour of the set of closed regions to complete the overlapping boundary elimination process. All retained boundary sub-segments are sequentially spliced end-to-end according to the boundary endpoint connection relationship to form a continuous closed merged region, and this continuous closed merged region is used as the frequency control line graphic. The boundary vertex coordinates, graphic layer identifier, and connection position coordinates corresponding to the frequency control line graphic are written into the quantum chip layout to obtain the frequency control line layout result.
[0142] This embodiment also provides a layout construction system for quantum chip frequency control lines, including:
[0143] The reading module reads layout objects from the quantum chip layout, including superconducting quantum interference device patterns, obstacle layout patterns, and target lead-out end patterns.
[0144] The module constructs a local reference coordinate system by extracting the center coordinates of two Josephson junctions from the superconducting quantum interference device image.
[0145] The projection module projects the superconducting quantum interference device pattern based on a local reference coordinate system and constructs a magnetic flux coupling region according to a preset coupling distance and coupling length.
[0146] The calculation module performs an expansion calculation on the obstacle layout graphic based on the expansion parameters in the process rule data to obtain the deployable area, and performs skeleton extraction on the deployable area to construct a connected path graph;
[0147] The path module, in the connected path graph, takes the anchor point outside the magnetic flux coupling zone as the starting point and the corresponding termination anchor point of the target lead-out end graph as the ending point, performs path search and cost comparison to obtain the target path.
[0148] The target path is divided into three modules based on the positional relationship of the magnetic flux coupling zone: coupling segment, lead-out segment, and main segment.
[0149] The merging module performs equidistant widening, corner smoothing, and region merging on the coupling segment, lead-out segment, and main segment according to their corresponding line widths to obtain the frequency control line layout results.
[0150] In summary, this invention achieves geometric matching between the coupling position of the frequency control line and the superconducting quantum interference device (SQU) pattern by: extracting the center coordinates of two Josephson junctions to construct a local reference coordinate system and constructing a magnetic flux coupling region based on the projection results; performing outward expansion operations on the obstacle layout pattern to obtain the deployable area and construct a connected path graph, thus realizing a computable expression of the routing path while meeting process avoidance requirements; obtaining the target path through path search and cost comparison, taking into account routing length, number of corners, and boundary margin, reducing the risk of the frequency control line approaching the forbidden area or generating too many bends; and dividing the target path into coupling segments, lead-out segments, and main segments, and performing equidistant widening, corner smoothing, and region merging to form a frequency control line pattern that can be directly written into the quantum chip layout, thereby improving the accuracy of the coupling position, process adaptability, geometric continuity, and automated construction quality of the frequency control line layout results.
[0151] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.
[0152] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely preferred examples and are not intended to limit the invention. Various changes and modifications can be made to the invention without departing from its spirit and scope, and all such changes and modifications fall within the scope of the present invention as claimed. The scope of protection of the present invention is defined by the appended claims and their equivalents.
[0153] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.
[0154] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.
[0155] It is understood that the relevant features in the above methods and apparatus can be referenced interchangeably. Furthermore, the terms "first," "second," etc., in the above embodiments are used to distinguish between embodiments and do not represent the superiority or inferiority of any particular embodiment.
[0156] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.
[0157] The algorithms and displays provided herein are not inherently related to any particular computer, virtual system, or other device. Various general-purpose systems can also be used in conjunction with the teachings herein. The required structure for constructing such systems is apparent from the above description. Furthermore, this invention is not directed to any particular programming language. It should be understood that the contents of the invention described herein can be implemented using various programming languages, and the above description of specific languages is for the purpose of disclosing the best mode of implementation of the invention.
[0158] In addition, the memory may include non-permanent memory in computer-readable media, such as random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM, and the memory includes at least one memory chip.
[0159] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0160] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.
[0161] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.
[0162] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.
[0163] In a typical configuration, an electronic device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.
[0164] Memory may include non-persistent memory in computer-readable media, such as random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM. Memory is an example of computer-readable media.
[0165] Computer-readable media includes both permanent and non-permanent, removable and non-removable media that can store information using any method or technology. Information can be computer-readable instructions, data structures, program modules, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, magnetic magnetic disk storage or other magnetic storage devices, or any other non-transferable medium that can be used to store information accessible by electronic devices. As defined herein, computer-readable media does not include transient computer-readable media, such as modulated data signals and carrier waves.
[0166] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.
[0167] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0168] It should be noted that although the operations of the method of this application are described in a specific order in the accompanying drawings, this does not require or imply that these operations must be performed in that specific order, or that all the operations shown must be performed to achieve the desired result. On the contrary, the steps depicted in the flowchart can be performed in a different order. Additionally or alternatively, certain steps may be omitted, multiple steps may be combined into one step, and / or one step may be broken down into multiple steps.
[0169] It should be understood that when the terms "first," "second," "third," and "fourth," etc., are used in the claims, specification, and drawings of this application, they are used only to distinguish different objects and not to describe a specific order. The terms "comprising" and "including" as used in the specification and claims of this application indicate the presence of the described features, integrals, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or collections thereof.
[0170] It should also be understood that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the application. As used in this specification and claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used in this specification and claims refers to any combination and all possible combinations of one or more of the associated listed items, and includes such combinations.
[0171] Although the embodiments of this application are described above, the content is merely an example adopted for the purpose of facilitating understanding of this application and is not intended to limit the scope and application scenarios of this application. Any person skilled in the art described in this application may make any modifications and changes in the form and details of the implementation without departing from the spirit and scope disclosed in this application, but the scope of patent protection of this application shall still be determined by the scope defined in the appended claims.
Claims
1. A method for constructing the layout of frequency control lines in a quantum chip, characterized in that: include, Read the layout objects in the quantum chip layout, the layout objects including the superconducting quantum interference device pattern, the obstacle layout pattern and the target lead-out end pattern; Extract the coordinates of the centers of two Josephson junctions from the superconducting quantum interference device image to construct a local reference coordinate system; The superconducting quantum interference device pattern is projected based on a local reference coordinate system, and a magnetic flux coupling region is constructed according to a preset coupling distance and coupling length. Perform an expansion operation on the obstacle map to obtain the deployable regions, and perform skeleton extraction on the deployable regions to construct a connected path graph. In the connected path graph, starting from the anchor point outside the magnetic flux coupling zone and ending at the corresponding termination anchor point of the target lead-out end graph, path search and cost comparison are performed to obtain the target path. The target path is divided into coupling segment, lead-out segment and main segment according to the positional relationship of the magnetic flux coupling zone; The coupling segment, lead-out segment, and main segment are subjected to equidistant widening, corner smoothing, and region merging according to their corresponding line widths to obtain the frequency control line layout results.
2. The method for constructing the layout of frequency control lines in a quantum chip as described in claim 1, characterized in that: The extraction of the center coordinates of the two Josephson junctions refers to locating the closed-loop outline of the superconducting quantum interference device pattern and the corresponding two Josephson junction patterns in the quantum chip layout, extracting the boundary vertex coordinates of the two Josephson junction patterns respectively, and performing geometric center calculation on the boundary vertex coordinates of the two Josephson junction patterns to obtain the center coordinates of the first Josephson junction and the center coordinates of the second Josephson junction.
3. The method for constructing the layout of frequency control lines in a quantum chip as described in claim 2, characterized in that: The construction of the local reference coordinate system specifically involves: The origin of the local reference coordinate system is the midpoint between the center coordinates of the first Josephson knot and the center coordinates of the second Josephson knot. The direction from the center coordinates of the first Josephson knot to the center coordinates of the second Josephson knot is taken as the longitudinal axis of the local reference coordinate system; The outer reference direction is determined by pointing the geometric center of the superconducting quantum interference device's graphic center to the geometric center of the target's lead-out end graphic center. From the two candidate transverse axis directions perpendicular to the longitudinal axis direction, calculate the dot product between each candidate transverse axis direction and the outer judgment reference direction. The candidate transverse axis direction with the largest dot product value is taken as the positive transverse axis direction of the local reference coordinate system, thus forming the local reference coordinate system.
4. The method for constructing the layout of frequency control lines in a quantum chip as described in claim 3, characterized in that: The construction of the magnetic flux coupling region specifically involves: After transforming the coordinates of all boundary vertices of the superconducting quantum interference device pattern to the local reference coordinate system, the projection values of all boundary vertex coordinates in the horizontal axis direction and the vertical axis direction of the local reference coordinate system are calculated respectively. At the same time, the outer reference projection edge is identified based on the projection extreme value in the horizontal axis direction. The lateral center position is obtained by offsetting the outer reference projection edge outward by a preset coupling distance along the lateral axis of the local reference coordinate system. The median position of all projected values along the longitudinal axis of the local reference coordinate system is taken to obtain the longitudinal center. Based on the longitudinal center, the two longitudinal boundaries are obtained by extending half of the preset coupling length to both sides along the longitudinal axis of the local reference coordinate system. The lateral boundary of the magnetic flux coupling zone is constructed along the lateral axis of the local reference coordinate system with the lateral center position as the reference, and the two longitudinal boundaries are enclosed with the lateral boundary to form the magnetic flux coupling zone.
5. The method for constructing the layout of frequency control lines in a quantum chip as described in claim 4, characterized in that: The acquisition of the deployable area specifically refers to: Along the normal direction outside the boundary line of each obstacle pattern, offset outward according to the preset outward expansion parameters to obtain the outward expansion boundary corresponding to each obstacle pattern; The outer boundaries are enclosed to form an outer expansion region, and a union operation is performed on all outer expansion regions to obtain the no-layout zone; The area covered by the map between the outer anchor point of the magnetic flux coupling zone and the target lead-out end graphic termination anchor point is taken as the area to be deployed. The restricted area is subtracted from the area to be deployed to obtain the deployable area.
6. The method for constructing the layout of frequency control lines in a quantum chip as described in claim 5, characterized in that: The construction of the connected path graph specifically involves: The available area is discretely sampled according to a preset sampling step size to obtain a set of sampling points, and the shortest distance from each sampling point to the boundary of the available area is calculated. Select the sampling point in the set of sampling points that reaches the local maximum at the shortest distance, and use it as the center sampling point; Connect adjacent center sampling points according to the preset connection radius to obtain the initial skeleton line. Perform skeleton regularization on the initial skeleton line to obtain the continuous skeleton line. Extract the bifurcation points from the continuous skeleton line as path nodes, take the continuous skeleton line segments between adjacent path nodes as path edges, establish the adjacency correspondence between path nodes and path edges, and obtain the connected path graph.
7. The method for constructing the layout of frequency control lines in a quantum chip as described in claim 6, characterized in that: The acquisition of the target path specifically involves: In the connected path diagram, locate the path node with the smallest distance to the anchor point outside the magnetic flux coupling zone as the starting access node, and locate the path node with the smallest distance to the ending anchor point of the target lead-out end graphic as the ending access node. Starting from the initial access node, traverse along the path edges segment by segment to the final access node, obtain all connected candidate paths, calculate the path cost of each connected candidate path, and take the connected candidate path with the minimum path cost as the target path.
8. The method for constructing the layout of frequency control lines in a quantum chip as described in claim 7, characterized in that: The division into coupling segment, lead-out segment, and main segment is as follows: Based on all path nodes of the target path and the path edges between adjacent path nodes, continuous path edges located inside the magnetic flux coupling zone and extending along the length direction of the magnetic flux coupling zone are taken as coupling segments. The continuous path edge extending from the anchor point outside the magnetic flux coupling zone to the starting position of the common routing path is used as the lead-out segment; The path edge located on the side of the lead-out segment away from the magnetic flux coupling zone and extending continuously to the target lead-out end graphic termination anchor point is taken as the main segment.
9. The method for constructing the layout of frequency control lines in a quantum chip as described in claim 8, characterized in that: The acquisition of the frequency modulation line layout results is specifically as follows: Read the path edges and line widths corresponding to the coupling segment, lead-out segment, and main segment, and offset the corresponding line widths on both sides of the normal direction with the center line of each path edge as the reference to form the widened areas of the coupling segment, lead-out segment, and main segment. At the inflection points connecting the coupling segment and the lead-out segment, and the lead-out segment and the main segment, an arc transition boundary tangent to the widening boundary on both sides is constructed based on the included angle of the adjacent path sides and the preset smooth radius. Connect the arc transition boundary with the widened areas of the coupling section, the lead-out section, and the main section to form a continuous smooth corner area. The widened regions of the coupling segment, the lead-out segment, the main segment, and the continuous corner smoothing region are processed by region merging and overlapping boundary elimination to obtain the frequency control line pattern. The frequency control line pattern is then written into the quantum chip layout to obtain the frequency control line layout result.
10. A layout construction system for quantum chip frequency control lines, based on the layout construction method for quantum chip frequency control lines according to any one of claims 1 to 9, characterized in that: include, The reading module reads layout objects from the quantum chip layout, including superconducting quantum interference device patterns, obstacle layout patterns, and target lead-out end patterns. The module constructs a local reference coordinate system by extracting the center coordinates of two Josephson junctions from the superconducting quantum interference device image. The projection module projects the superconducting quantum interference device pattern based on a local reference coordinate system and constructs a magnetic flux coupling region according to a preset coupling distance and coupling length. The calculation module performs an expansion calculation on the obstacle layout graphic based on the expansion parameters in the process rule data to obtain the deployable area, and performs skeleton extraction on the deployable area to construct a connected path graph; The path module, in the connected path graph, takes the anchor point outside the magnetic flux coupling zone as the starting point and the corresponding termination anchor point of the target lead-out end graph as the ending point, performs path search and cost comparison to obtain the target path. The target path is divided into three modules based on the positional relationship of the magnetic flux coupling zone: coupling segment, lead-out segment, and main segment. The merging module performs equidistant widening, corner smoothing, and region merging on the coupling segment, lead-out segment, and main segment according to their corresponding line widths to obtain the frequency control line layout results.