Leff graphic processing method of layout

Abstract

The application provides a LEF graphic processing method of a layout, comprising the following steps: S1, dividing the LEF graphic into multiple rectangular area blocks; S2, numbering each rectangular area block and pin, sequentially searching the pin contacted by each rectangular area block, and recording the rectangular area block number and corresponding pin number; S3, sequentially searching the rectangular area block number corresponding to each pin number, judging whether the number of the rectangular area blocks corresponding to the same pin number is equal to 2 and whether the two rectangular area blocks are contacted, if yes, screening the rectangular area blocks as the first type of rectangular area blocks, and executing step S4, if not, as the second type of rectangular area blocks, and then executing step S5; S4, merging the rectangular area blocks corresponding to the same pin into one rectangular area block; S5, merging the adjacent second type of rectangular area blocks. The application improves the recognition degree of the layout and wiring tool to the rectangular graphic.

Description

Technical Field

[0001] This invention relates to semiconductor integrated circuit manufacturing processes, and more particularly to a method for LEF pattern processing of a layout. Background Technology

[0002] An IP module is a pre-designed or even verified integrated circuit, device, or component with a specific function. Client chip data, i.e., layout data, often calls IP modules developed by the foundry. The unit modules in the layout data used by the client that need to be combined into IP modules only contain the Library Exchange Format (LEF) file. The LEF primarily defines the physical information of the unit module, such as cell size, geometry, and wiring layers. The unit module has no internal circuitry; therefore, the unit module that needs to be combined into an IP module is essentially an IP black box with only connectivity information and no internal circuitry.

[0003] During the layout design process, it is necessary to provide customers with LEF information so that they can synthesize IP modules based on this information. This LEF information provides placement and routing tools with process information and geometric characteristics of each layout cell. LEF information generally includes: cell name, cell boundary and origin coordinates; pin name, metal layer and input / output terminals; and other parasitic parameters.

[0004] Now, let's illustrate the graphical structure of LEF information with an example, such as... Figure 1 The image shown is the LEF diagram of an existing inverter, which shows... Figure 1 The interface includes an input terminal 101, an output terminal 102, a power supply terminal 103, and a ground terminal 104. Figure 1 The input terminal is represented by I, the output terminal by O, the power supply terminal by VSS, and the ground terminal by GND. The input terminal I has a rectangular structure, while the power supply terminal VSS, the output terminal O, and the ground terminal GND do not.

[0005] Existing technology processes LEF (Leadership Frame) graphics in a layout by breaking the graphic down into multiple rectangles. On the client side, EDA (Electronic Design Automation) routing tools, such as Premiere Pro, are used to perform routing, re-generating the routing diagram. There are generally two decomposition methods: one is vertical decomposition, such as... Figure 2 One method is to vertically decompose the shape into two rectangles, one on the left and one on the right. Another method is to horizontally decompose it, such as... Figure 3 The graphic can be vertically divided into two rectangles, left and right.

[0006] However, when disassembling vertically, PIN B may prevent the PR tool from correctly recognizing the pattern, and when disassembling horizontally, PIN A may prevent the PR tool from correctly recognizing the pattern. Summary of the Invention

[0007] The purpose of this invention is to provide a method for processing LEF graphics in a layout, which can improve the recognition accuracy of the layout and routing tools when recombining the rectangular graphics after decomposing the LEF graphics into multiple rectangular graphics.

[0008] To achieve the above objectives, the present invention provides a method for LEF graphic processing of a layout, comprising:

[0009] S1: Divide the LEF graphic into multiple rectangular regions;

[0010] S2: Number each rectangular area block and pin respectively, find the pin that each rectangular area block contacts in turn, and record the rectangular area block number and the corresponding pin number;

[0011] S3: Sequentially search for the rectangular area block number corresponding to each pin number, determine whether the number of rectangular area blocks corresponding to the same pin number is equal to 2 and whether the two rectangular area blocks are in contact. If so, filter out the rectangular area blocks as the first type of rectangular area blocks and execute step S4. If not, use them as the second type of rectangular area blocks and execute step S5.

[0012] S4: Merge the rectangular area blocks corresponding to the same pin into one rectangular area block;

[0013] S5: Merge adjacent second-type rectangular regions.

[0014] Optionally, in the LEF graphic processing method of the layout, the LEF graphic is divided into multiple rectangular area blocks, which exist in a multi-row, multi-column grid format.

[0015] Optionally, in the LEF graphic processing method of the layout, the rectangular area blocks are numbered starting from the bottom left corner, and each column of rectangular area blocks is numbered sequentially from left to right. In each column of rectangular area blocks, the numbers are increased sequentially from bottom to top.

[0016] Optionally, in the LEF graphic processing method of the layout, in step S2, the rectangular area block number and the corresponding pin number are recorded in a table.

[0017] Optionally, in the LEF graphic processing method of the layout, in step S3, the rectangular area block number corresponding to each pin number is sequentially searched according to the order of the pin numbers.

[0018] Optionally, in the LEF graphic processing method for the layout, step S2, the method for finding the pins contacted by each rectangular region block includes:

[0019] Locate the pin with the same coordinates as the rectangular region block in the layout.

[0020] Optionally, in the LEF graphic processing method for the layout, step S3, the method for determining whether two rectangular region blocks are in contact includes:

[0021] Determine whether the coordinates of two rectangular regions are the same on the layout. If they are, then the two rectangular regions are considered to be in contact.

[0022] Optionally, in the LEF graphic processing method of the layout, in step S5, each item is merged according to the number of each second type of rectangular area block.

[0023] Optionally, in the LEF graphic processing method for the layout, step S5 includes:

[0024] S51: According to the number of the second type of rectangular area block, determine whether each second type of rectangular area block has an adjacent second type of rectangular area block. If so, merge the second type of rectangular area block with the adjacent second type of rectangular area block.

[0025] S52: Repeat step S51, traverse the numbers of all second-type rectangular area blocks, and complete the merging of all second-type rectangular area blocks.

[0026] Optionally, in the LEF graphic processing method for the layout, step S5 includes:

[0027] S51: According to the number of the second type of rectangular area block, determine whether each second type of rectangular area block has an adjacent second type of rectangular area block. If so, merge the second type of rectangular area block with the adjacent second type of rectangular area block.

[0028] S52: Determine whether the merged second-type rectangular area block has an adjacent second-type rectangular area block. If so, continue merging with the second-type rectangular area block.

[0029] S53: Repeat steps S51 and S52, traverse all the numbers of the second type of rectangular area blocks, and merge all the second type of rectangular area blocks until there are no adjacent second type of rectangular area blocks.

[0030] In the LEF graphic processing method for layout provided by this invention, after decomposing the LEF graphic into multiple rectangular graphics, the rectangular region block number corresponding to each pin number is sequentially searched. It is determined whether the number of rectangular region blocks corresponding to the same pin number is equal to 2 and whether these two rectangular region blocks are in contact. If so, the rectangular region blocks corresponding to the same pin are merged into one rectangular region block; otherwise, adjacent second-type rectangular region blocks are merged. This eliminates the influence of pins on graphic recognition and improves the recognition accuracy of the placement and routing tool when reassembling the rectangular graphics. Attached Figure Description

[0031] Figure 1 This is a schematic diagram of the LEF (Low-Frequency) waveform of an inverter;

[0032] Figure 2 This is a schematic diagram of the vertical disassembly of LEF graphics in existing technology;

[0033] Figure 3 This is a schematic diagram of the horizontal disassembly of LEF graphics in existing technology;

[0034] Figure 4 This is a flowchart of the LEF graphic processing method for the layout according to an embodiment of the present invention;

[0035] Figures 5 to 7 This is a schematic diagram of the LEF graphic processing process of the layout in an embodiment of the present invention;

[0036] In the diagram: 101 - Input terminal, 102 - Output terminal, 103 - Power supply terminal, 104 - Ground terminal. Detailed Implementation

[0037] The specific embodiments of the present invention will now be described in more detail with reference to the accompanying drawings. The advantages and features of the present invention will become clearer from the following description. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present invention.

[0038] In the following text, the terms “first,” “second,” etc., are used to distinguish between similar elements and are not necessarily used to describe a specific order or chronological sequence. It should be understood that these terms, as used herein, may be replaced where appropriate. Similarly, if the methods described herein comprise a series of steps, and the order of these steps presented herein is not necessarily the only possible order in which they can be performed, and some described steps may be omitted and / or other steps not described herein may be added to the method.

[0039] Furthermore, it should be understood that when a layer (or film), region, pattern, or structure is referred to as being "on" a substrate, layer (or film), region, and / or pattern, it can be located directly on another layer or substrate, and / or intercalation layers may also be present. Additionally, it should be understood that when a layer is referred to as being "under" another layer, it can be located directly under that layer, and / or one or more intercalation layers may also be present. Furthermore, references to "on" and "under" the layers may be made based on the accompanying drawings.

[0040] Please refer to Figure 4 This invention provides a method for LEF graphic processing of a layout, comprising:

[0041] S1: Divide the LEF graphic into multiple rectangular regions;

[0042] S2: Number each rectangular area block and pin, find the pins that each rectangular area block contacts in turn, and record the rectangular area block number and the corresponding pin number.

[0043] S3: Sequentially search for the rectangular area block number corresponding to each pin number, determine whether the number of rectangular area blocks corresponding to the same pin number is equal to 2 and whether the two rectangular area blocks are in contact. If so, filter out the rectangular area blocks as the first type of rectangular area blocks and execute step S4. If not, use them as the second type of rectangular area blocks and execute step S5.

[0044] S4: Merge the rectangular area blocks corresponding to the same pin into one rectangular area block;

[0045] S5: Merge adjacent second-type rectangular regions.

[0046] Next, combined Figures 5 to 7 And Table 1 provides a detailed explanation.

[0047] First, perform step S1 to divide the LEF graphic into multiple rectangular regions, which exist in a multi-row, multi-column grid format. Then, starting from the bottom left rectangular region, number the rectangular regions in each column sequentially from left to right, increasing the numbers from bottom to top within each column. Please refer to... Figure 5 The graphic can be cut in stages from left to right and from bottom to top, and numbered B1, B2, B3, etc. according to the cutting order.

[0048] In step S2, each rectangular block and its pins are numbered. The pins that each rectangular block contacts are then located sequentially. The method for finding the pins that correspond to the rectangular block's coordinates on the layout includes finding the pins whose coordinates match those of the rectangular block. The rectangular block number and its corresponding pin number are then recorded. This can be done in a table, such as Table 1 below. Table 1 shows that the rectangular blocks are numbered B1, B2, and B3, and their corresponding pins are A and B, respectively. B1 corresponds to A, B2 to A, and B3 to B. This method can be used to record the correspondence between all rectangular blocks and their pins.

[0049] Table 1

[0050]

[0051] Step S3: Sequentially search for the rectangular area block number corresponding to each pin number according to the pin number order. Determine if the number of rectangular area blocks corresponding to the same pin number is equal to 2 and if these two rectangular area blocks are in contact. If so, filter the rectangular area block as the first type of rectangular area block and proceed to step S4. If not, classify it as the second type of rectangular area block and proceed to step S5. For each pin number, check if it has any contacting rectangular area blocks, check if the number of contacting blocks is equal to 2, and if these two rectangular area blocks are in contact. Repeat this process to complete the query for all pin numbers. The method for determining whether two rectangular area blocks are in contact includes: determining if the coordinates of the two rectangular area blocks in the layout are the same. If so, the two rectangular area blocks are considered to be in contact.

[0052] In step S4, the rectangular regions corresponding to the same pin are merged into one rectangular region. For details, please refer to... Figure 6 According to Table 1, PIN A is in contact with B1 and B2. Then B1 and B2 are directly disconnected. Therefore, they are directly merged, and PIN B is in contact with B1 and B3. Please refer to... Figure 7 Then B1 and B3 are in direct contact. Therefore, they are directly merged. Based on the above method, it can be seen that by reusing the B1 area, the integrity of the LEF pattern where PIN A and PIN B are in contact is achieved. This compensates for the incomplete pattern caused by splitting the LEF rectangle. Finally, the routing tool can perfectly recognize the pattern.

[0053] In step S5, the rectangular area blocks of the second type are merged item by item according to their numbers. First, the rectangular area blocks are divided into two categories based on their pins, and then merged separately. For merging the second type of rectangular area blocks, there are two merging methods: Example 1 and Example 2. Example 1 directly merges adjacent rectangular area blocks. Example 2 involves merging one area and then continuing to merge until the maximum area is reached, thus reducing the number of rectangular area blocks.

[0054] Example 1

[0055] Step S5 includes: S51: According to the number of the second type of rectangular area block, determine whether each second type of rectangular area block has an adjacent second type of rectangular area block. If so, merge the second type of rectangular area block and the adjacent second type of rectangular area block; S52: Repeat step S51, traverse all the numbers of the second type of rectangular area blocks, and complete the merging of all the second type of rectangular area blocks.

[0056] Example 2

[0057] Step S5 includes: S51: According to the number of the second type of rectangular area blocks, determine whether each second type of rectangular area block has an adjacent second type of rectangular area block. If so, merge the second type of rectangular area block with the adjacent second type of rectangular area block; S52: Determine whether the merged second type of rectangular area block has an adjacent second type of rectangular area block. If so, continue to merge with the merged second type of rectangular area block; S53: Repeat steps S51 and S52, traverse all the numbers of the second type of rectangular area blocks, and complete the merging of all the second type of rectangular area blocks until there are no adjacent second type of rectangular area blocks. In this way, the rectangular area blocks can be merged according to the principle of maximizing the area.

[0058] In summary, in the LEF graphic processing method for layout provided in this embodiment of the invention, after decomposing the LEF graphic into multiple rectangular graphics, the rectangular region block number corresponding to each pin number is sequentially searched. It is determined whether the number of rectangular region blocks corresponding to the same pin number is equal to 2 and whether these two rectangular region blocks are in contact. If so, the rectangular region blocks corresponding to the same pin are merged into one rectangular region block; otherwise, adjacent second-type rectangular region blocks are merged. This eliminates the influence of pins on graphic recognition and improves the recognition accuracy of the placement and routing tool when recombining rectangular graphics.

[0059] The above are merely preferred embodiments of the present invention and do not constitute any limitation on the present invention. Any equivalent substitutions or modifications made by those skilled in the art to the technical solutions and content disclosed in the present invention without departing from the scope of the present invention shall be deemed to have remained within the protection scope of the present invention.

Claims

1. A method for processing LEF graphics of a layout, characterized in that, include: S1: Divide the LEF graphic into multiple rectangular regions; S2: Number each rectangular area block and pin respectively, find the pin that each rectangular area block contacts in turn, and record the rectangular area block number and the corresponding pin number; S3: Sequentially search for the rectangular area block number corresponding to each pin number, determine whether the number of rectangular area blocks corresponding to the same pin number is equal to 2 and whether the two rectangular area blocks are in contact. If so, filter out the rectangular area blocks as the first type of rectangular area blocks and execute step S4. If not, use them as the second type of rectangular area blocks and execute step S5. S4: Merge the rectangular area blocks corresponding to the same pin into one rectangular area block; S5: Merge adjacent second-type rectangular regions.

2. The LEF graphic processing method for layout as described in claim 1, characterized in that, The LEF graphic is divided into multiple rectangular regions, which exist in a multi-row, multi-column grid format.

3. The LEF graphic processing method for layout as described in claim 2, characterized in that, Starting with the bottom left rectangular area, the rectangular areas in each column are numbered sequentially from left to right. Within each column, the numbers increase sequentially from bottom to top.

4. The LEF graphic processing method for layout as described in claim 1, characterized in that, In step S2, the rectangular area block number and the corresponding pin number are recorded in the table.

5. The LEF graphic processing method for layout as described in claim 1, characterized in that, In step S3, the rectangular area block number corresponding to each pin number is sequentially searched according to the order of the pin numbers.

6. The LEF graphic processing method for layout as described in claim 1, characterized in that, In step S2, the method for locating the pins in contact with each of the rectangular area blocks includes: Locate the pin with the same coordinates as the rectangular region block in the layout.

7. The LEF graphic processing method for layout as described in claim 1, characterized in that, In step S3, the method for determining whether two rectangular regions are in contact includes: Determine whether the coordinates of two rectangular regions are the same on the layout. If they are, then the two rectangular regions are considered to be in contact.

8. The LEF graphic processing method for a layout as described in claim 1, characterized in that, In step S5, each item is merged according to its number.

9. The LEF graphic processing method for a layout as described in claim 8, characterized in that, Step S5 includes: S51: According to the number of the second type of rectangular area block, determine whether each second type of rectangular area block has an adjacent second type of rectangular area block. If so, merge the second type of rectangular area block with the adjacent second type of rectangular area block. S52: Repeat step S51, traverse the numbers of all second-type rectangular area blocks, and complete the merging of all second-type rectangular area blocks.

10. The LEF graphic processing method for a layout as described in claim 8, characterized in that, Step S5 includes: S51: According to the number of the second type of rectangular area block, determine whether each second type of rectangular area block has an adjacent second type of rectangular area block. If so, merge the second type of rectangular area block with the adjacent second type of rectangular area block. S52: Determine whether the merged second-type rectangular area block has an adjacent second-type rectangular area block. If so, continue merging with the second-type rectangular area block. S53: Repeat steps S51 and S52, traverse all the numbers of the second type of rectangular area blocks, and merge all the second type of rectangular area blocks until there are no adjacent second type of rectangular area blocks.

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