Safety protection circuit of traction inverter and traction inverter comprising the same

Abstract

The present application relates to a kind of safety protection circuit for traction inverter, and traction inverter comprising the safety protection circuit.The safety protection circuit includes: first anti-through module, configured only when the upper bridge control signal and the lower bridge control signal are high simultaneously, output low level;First and second logic and gate, each logic and gate includes three input ends and an output;First and second logic or gate, the first input of first logic or gate is connected to the output of first logic and gate, and the first input of second logic or gate is connected to the output of second logic and gate;And fault diagnosis unit, the fault diagnosis unit is configured to enter the corresponding safety protection mode based on the fault signal received by inverter bridge circuit, the first output of the fault diagnosis unit is connected to the second input of first logic or gate, and the second output of the fault diagnosis unit is connected to the second input of second logic or gate.

Description

Technical Field

[0001] This invention relates to the field of vehicle safety protection technology, and more specifically, to a safety protection circuit for a traction inverter, and a traction inverter including the safety protection circuit. Background Technology

[0002] Currently, there are generally two ways to implement the safety logic execution circuit of high-voltage inverters: one is to use the safety mode function integrated in the driver chip, and the other is to use external logic circuits combined with different safety logic strategies.

[0003] However, the safety mode functions integrated into existing driver chips often have limitations, such as being unable to meet the complex fail-safe logic execution strategies of specific systems. Furthermore, these integrated safety functions may not be adaptable to all types of high-voltage inverter system architectures and control strategies, resulting in insufficient safety guarantees in certain application scenarios. While external logic circuits can be flexibly designed to adapt to different system requirements, their design complexity is high, and they may be insufficient in terms of fault response speed and reliability. Summary of the Invention

[0004] The present invention aims to provide a safety protection circuit for a traction inverter, so as to enable the traction inverter to switch freely between different safety modes, while preventing the upper and lower bridges from conducting simultaneously, avoiding the occurrence of short circuits, thereby improving the reliability and safety of the system.

[0005] A first aspect of the present invention provides a safety protection circuit for a traction inverter, the traction inverter including a controller and an inverter bridge circuit, the inverter bridge circuit being configured to convert direct current from a vehicle battery pack into alternating current for driving a motor, the controller being configured to periodically control the on / off states of various power switches in the inverter bridge circuit using pulse width modulation, the safety protection circuit being disposed between the controller and the driver chip of the inverter bridge circuit, and configured to control the inverter bridge circuit to enter a corresponding operating mode based on control signals and fault signals from the controller, wherein the safety protection circuit includes:

[0006] The first anti-snap-through module is used to receive the upper bridge control signal and the lower bridge control signal from the controller, and is configured to output a low level only when the upper bridge control signal and the lower bridge control signal are both high.

[0007] The first and second AND gates each include three inputs and one output. The first input of the first and second AND gates is connected to the output of the first anti-short-through module. The second input of the first AND gate is used to receive the upper bridge control signal from the controller. The second input of the second AND gate is used to receive the lower bridge control signal from the controller. The third input of the first and second AND gates is used to receive the fault enable signal from the controller.

[0008] The first and second OR gates are connected in the following way: the first input of the first OR gate is connected to the output of the first AND gate; the first input of the second OR gate is connected to the output of the second AND gate; the output of the first OR gate is connected to the upper bridge driver chip of the inverter bridge circuit; and the output of the second OR gate is connected to the lower bridge driver chip of the inverter bridge circuit.

[0009] A fault diagnosis unit is configured to receive a fault signal from the controller and cause the inverter bridge circuit to enter a corresponding safety protection mode based on the received fault signal. The first output terminal of the fault diagnosis unit is connected to the second input terminal of a first logic OR gate, and the second output terminal of the fault diagnosis unit is connected to the second input terminal of a second logic OR gate.

[0010] According to an optional embodiment, the first anti-short-through module is formed as a first logic NAND gate, the two inputs of which are respectively used to receive the upper bridge control signal and the lower bridge control signal from the controller.

[0011] According to an optional embodiment, the fault diagnosis unit includes:

[0012] An inverter configured to receive a fault enable signal from the controller and invert the fault enable signal.

[0013] The second anti-snap-through module receives the upper-bridge ASC enable signal and the lower-bridge ASC enable signal from the controller, and is configured to output a low level only when both the upper-bridge ASC enable signal and the lower-bridge ASC enable signal are simultaneously high; and

[0014] The third and fourth AND gates, each including three inputs and one output, wherein the first input of the third and fourth AND gates is connected to the output of the inverter, the second input of the third and fourth AND gates is connected to the output of the second anti-sniping module, the third input of the third AND gate is used to receive the upper bridge ASC enable signal from the controller, the third input of the fourth AND gate is used to receive the lower bridge ASC enable signal from the controller, the output of the third AND gate is connected to the second input of the first OR gate, and the output of the fourth AND gate is connected to the second input of the second OR gate.

[0015] According to an optional embodiment, the second anti-snap-through module is formed as a second logic NAND gate, the two inputs of which are respectively used to receive the upper bridge ASC enable signal and the lower bridge ASC enable signal from the controller.

[0016] According to an optional embodiment, the fault diagnosis unit further includes:

[0017] A first delay unit is disposed between the output of a third AND gate and the second input of a first OR gate; and

[0018] The second delay is disposed between the output of the fourth AND gate and the second input of the second OR gate.

[0019] According to an optional embodiment, the fault diagnosis unit is further configured to cause the inverter bridge circuit to enter the upper bridge ASC mode when the fault enable signal is low and the upper bridge ASC enable signal is high.

[0020] According to an optional embodiment, the fault diagnosis unit is further configured to cause the inverter bridge circuit to enter the lower bridge ASC mode when the fault enable signal is low and the lower bridge ASC enable signal is high.

[0021] According to an optional embodiment, the fault diagnosis unit is further configured to cause the inverter bridge circuit to enter the lower bridge Freewheeling mode when the fault enable signal is low and both the upper bridge ASC enable signal and the lower bridge ASC enable signal are low.

[0022] A second aspect of the invention also provides a traction inverter comprising a controller and an inverter bridge circuit configured to convert direct current from a vehicle battery pack into alternating current for driving a motor, wherein the controller is configured to periodically control the switching on and off of various power switches in the inverter bridge circuit in a pulse width modulation manner, and wherein the traction inverter further comprises the safety protection circuit described above.

[0023] The safety protection circuit of this invention can flexibly switch to different safety modes such as upper bridge ASC, lower bridge ASC, or Freewheeling based on various control signals and fault signals (including fault enable signal SFY_EN and ASC enable signals EN_H and EN_L) provided by the controller. This provides the most suitable safety protection strategy for the inverter under different fault conditions, effectively improving the reliability and safety of the traction inverter. Furthermore, this safety protection circuit has a shoot-through prevention function. By adding corresponding logic control elements, it ensures that the upper and lower bridges of the inverter do not conduct simultaneously, avoiding inverter bridge short circuits and improving system stability and safety. This safety protection circuit employs a combination of efficient logic gates and delayers, reducing circuit complexity and cost, while also having wide adaptability, especially suitable for inverter driver chips without safety protection functions, meeting the needs of different application scenarios. Attached Figure Description

[0024] By incorporating the figures in this article and subsequently the appendix Figure 1 The specific embodiments used to illustrate certain principles of the invention will make other features and advantages of the method of the invention clearer or more specifically explained.

[0025] Figure 1 An internal structural diagram of a safety protection circuit for a traction inverter according to an exemplary embodiment of the present invention is shown.

[0026] Figure 2 It shows Figure 1 The truth table of the input-output signals of the safety protection circuit shown is presented. Detailed Implementation

[0027] The safety protection circuit for a traction inverter according to the present invention will now be described with reference to the accompanying drawings and embodiments. In the following description, numerous specific details are set forth to enable those skilled in the art to gain a more complete understanding of the invention. However, it will be apparent to those skilled in the art that implementation of the invention may not include some of these specific details. Instead, the invention may be practiced with any combination of the following features and elements, regardless of whether they relate to different embodiments. Therefore, the following aspects, features, embodiments, and advantages are illustrative only and should not be considered as elements or limitations of the claims.

[0028] In high-voltage inverter systems, the safety logic execution circuit is typically implemented by the safety mode function integrated into the driver chip, making the selection of the driver chip crucial. However, most driver chips used in commercially available high-voltage inverters are custom-designed chips that lack shoot-through protection and safety logic functions. This prevents the system from directly entering a safe state through its internal logic when a fault occurs, increasing the risk of system malfunction.

[0029] This invention aims to address the shortcomings in the response of existing high-voltage inverter safety logic execution circuits under fault conditions. Specifically, for high-voltage inverter systems using custom drive chips lacking shoot-through protection and safety logic functions, this invention designs a dedicated safety protection circuit that can flexibly switch to different safety protection modes (e.g., upper bridge ASC, lower bridge ASC, and Freewheeling mode) based on the state of various control signals, while also providing shoot-through protection. This safety protection circuit ensures that the motor inverter can quickly and effectively enter the corresponding safe state when a system fault occurs, thereby avoiding potential dangers such as bus short circuits and improving the overall safety and reliability of the system.

[0030] Figure 1 An internal structural diagram of a safety protection circuit for a traction inverter according to an exemplary embodiment of the present invention is shown. The traction inverter typically includes a controller and an inverter bridge circuit, wherein the inverter bridge circuit is configured to convert direct current from a vehicle battery pack (e.g., a power battery pack) into alternating current for driving a motor, and the controller is configured to periodically control the on / off states of various power switches in the inverter bridge circuit in a pulse-width modulation manner.

[0031] The safety protection circuit proposed in this invention can be installed between the controller and the driver chip of the inverter bridge circuit. This circuit can flexibly control the inverter bridge circuit (upper bridge or lower bridge) to enter the corresponding safety protection mode based on the control signals PWMx_HI, PWMx_LI and fault enable signals SFY_EN, EN_H, EN_L from the controller. This safety protection circuit consists of multiple hardware logic modules and delays, effectively preventing the upper and lower bridges in the inverter bridge circuit from conducting simultaneously, avoiding short circuits, and ensuring that the system can safely switch to a predetermined safety mode in case of a fault, such as upper bridge ASC mode, lower bridge ASC mode, and Freewheeling mode.

[0032] The following is combined Figure 1 This section details the internal structure of the safety protection circuit and how it controls the inverter bridge circuit to enter the corresponding safety protection mode based on the control signals PWMx_HI, PWMx_LI and the fault enable signals SFY_EN, ASC enable signals EN_H, EN_L from the controller.

[0033] First, assuming that all five inputs of the safety protection circuit (i.e., control signals PWMx_HI, PWMx_LI and fault enable signals SFY_EN, ASC enable signals EN_H, EN_L) come from the controller in the traction inverter, the safety protection circuit can finally output two output signals PWMx_HO and PWMx_LO. These two output signals are provided to the upper bridge driver chip 12 and the lower bridge driver chip 13 of the inverter bridge circuit, respectively, and then control the power switching operation of the upper bridge 14 and the lower bridge 15, respectively.

[0034] like Figure 1 As shown, the safety protection circuit mainly consists of multiple logic control elements and delay units. Specifically, the safety protection circuit mainly includes a first anti-shoot-through module 7, first and second AND gates 8 and 9, first and second OR gates 10 and 11, and a fault diagnosis unit. The first anti-shoot-through module 7 is in the form of a AND gate, and its two inputs receive the upper bridge control signal PWMx_HI and the lower bridge control signal PWMx_LI from the controller, respectively. The function of this anti-shoot-through module is to ensure that a low level is output only when PWMx_HI and PWMx_LI are both high, thereby preventing the upper and lower bridges from conducting simultaneously and avoiding a short circuit in the inverter bridge.

[0035] The first AND gate 8 and the second AND gate 9 can also be called mode selection modules. Each of them includes three input terminals and one output terminal. The first input terminals of the two AND gates are connected to the output terminal of the first anti-shoot-through module 7. The second input terminals receive the upper bridge control signal PWMx_HI and the lower bridge control signal PWMx_LI from the controller, respectively. The third input terminal receives the fault enable signal SFY_EN from the controller. The function of these two AND gates 8 and 9 is to combine the fault enable signal SFY_EN, the upper and lower bridge control signals PWMx_HI and PWMx_LI, and the anti-shoot-through signal to comprehensively control the on / off state of the power switches in the inverter bridge circuit.

[0036] The first input terminals of the first OR gate 10 and the second OR gate 11 are respectively connected to the output terminals of the first AND gate 8 and the second AND gate 9. The output terminal of the first OR gate 10 is connected to the upper bridge driver chip 12 of the inverter bridge circuit, and the output terminal of the second OR gate 11 is connected to the lower bridge driver chip 13 of the inverter bridge circuit.

[0037] The fault diagnosis unit is the core diagnostic module in this safety control circuit. It receives fault enable signals SFY_EN, ASC enable signals EN_H, and EN_L from the controller and controls the inverter bridge circuit to enter the corresponding safety protection mode based on the received fault and ASC enable signals. The internal circuit structure of this fault diagnosis unit specifically includes an inverter 1, a second anti-shoot-through module 2, third and fourth logic AND gates 3 and 5, and first and second delays 4 and 6. Inverter 1 receives the fault enable signal SFY_EN from the controller and inverts it. The second anti-shoot-through module 2 receives the upper bridge ASC enable signal EN_H and the lower bridge ASC enable signal EN_L from the controller and is configured to output a low level only when both the upper bridge ASC enable signal EN_H and the lower bridge ASC enable signal EN_L are simultaneously high.

[0038] The third and fourth AND gates 3 and 5 each include three inputs and one output. The first input of these two AND gates 3 and 5 is connected to the output of inverter 1, and the second input is connected to the output of the second anti-short-through module 2. The third input of the third AND gate 3 is used to receive the upper bridge ASC enable signal EN_H from the controller, and the third input of the fourth AND gate 5 is used to receive the lower bridge ASC enable signal EN_L from the controller. The output of the third AND gate 3 is connected to the second input of the first OR gate 10, and the output of the fourth AND gate 5 is connected to the second input of the second OR gate 11.

[0039] The first delay unit 4 is located between the output of the third AND gate 3 and the second input of the first OR gate 10 to delay the signal transmission of the AND gate 3. The second delay unit 6 is located between the output of the fourth AND gate 5 and the second input of the second OR gate 11 to delay the signal transmission of the AND gate 5.

[0040] The safety protection circuit in this embodiment can achieve the following three safety protection modes:

[0041] - Upper Bridge ASC Mode: When the fault diagnosis unit detects that the fault enable signal SFY_EN is low (low level is valid) and the upper bridge ASC enable signal EN_H is high, the circuit controls the inverter bridge to enter the upper bridge ASC mode, that is, to turn on the upper bridge and turn off the lower bridge.

[0042] - Lower Bridge ASC Mode: When the fault diagnosis unit detects that the fault enable signal SFY_EN is low and the lower bridge ASC enable signal EN_L is high, the circuit controls the inverter bridge to enter the lower bridge ASC mode, that is, the lower bridge is turned on and the upper bridge is turned off; and

[0043] - Freewheeling mode: When the fault diagnosis unit detects that the fault enable signal SFY_EN is low and the upper bridge ASC enable signal EN_H and the lower bridge ASC enable signal EN_L are both low, the circuit enters the Freewheeling mode, that is, the upper and lower bridges are turned off.

[0044] The following is combined Figure 1 This paper details under what circumstances the safety protection circuit of the present invention enters the above three safety protection modes.

[0045] First, in normal control mode, the SFY_EN input signal is high, the output of inverter 1 is low, the output of AND gates 3 and 5 is low, and the output remains low after delays 4 and 6. This low level serves as the input signal for OR gates 10 and 11, without affecting the input states of the control signals PWMx_HI and PWMx_LI through AND gates 8 and 9, and OR gates 10 and 11. The output signals PWMx_HO and PWMx_LO follow the signal states of the input signals PWMx_HI and PWMx_LI to control the driving of the upper and lower bridges. Simultaneously, NAND gate 7 prevents the input signals PWMx_HI and PWMx_LI from being high simultaneously, thus avoiding a shoot-through short circuit between the upper and lower bridges.

[0046] In safety control mode, the SFY_EN input signal is low, and the output of AND gates 8 and 9 is also low, serving as the input signal for OR gates 10 and 11. The input signals PWMx_HI and PWMx_LI do not affect the output signal state of AND gates 8 and 9. When SFY_EN is low (i.e., a fault has occurred), the output signal of inverter 1 is high, while the input signals EN_H and EN_L are high and low, respectively. The output of AND gate 3 remains high, and after passing through delay 4, this high level becomes the input signal for OR gate 10. The output signal of the preceding AND gate 8 is low, serving as the input signal for OR gate 10. Therefore, the output signal of OR gate 10 is high, driving the upper bridge to conduct. Simultaneously, the input signal EN_L is low, and the output signal of AND gate 5 is low. After the delay timer 6, the low level is used as the input signal of OR gate 11. The output signal of the previous stage signal AND gate 9 is low, which is used as the input signal of OR gate 11. Therefore, the output signal of OR gate 11 is low, the lower bridge is turned off, and the safety protection circuit of the present invention controls the inverter bridge circuit to enter the upper bridge ASC mode.

[0047] Similarly, when the SFY_EN input signal is low, the EN_L input signal is high, and the EN_H input signal is low, the safety protection circuit of this invention controls the inverter bridge circuit to enter the lower bridge ASC mode. When the SFY_EN input signal is low, the EN_H input signal is low, and the EN_L input signal is low, the output signal after AND gates 3 and 5 is low, and after delays 4 and 6 it remains low, serving as the input signal for OR gates 10 and 11. The output signals of the preceding signal AND gates 8 and 9 are low, serving as the input signals for OR gates 10 and 11. Therefore, the output signals of OR gates 10 and 11 are low, and both the upper and lower bridges are turned off. The safety protection circuit of this invention controls the inverter bridge circuit to enter the Freewheeling mode. Similarly, NAND gate 2 can prevent the input signals EN_H and EN_L from being high simultaneously, that is, it can avoid the occurrence of a short circuit between the upper and lower bridges.

[0048] As can be seen from the above logical signal reasoning process, the safety protection circuit of this invention can determine whether to enter the upper bridge ASC or lower bridge ASC state based on the current state of the power switches in the inverter bridge, thus avoiding the occurrence of bus short circuits. Most commercially available driver chips with integrated safety protection functions can only enter the lower bridge ASC mode when a fault occurs. If a short circuit occurs in the power switch of the upper bridge, insisting on entering the lower bridge ASC mode will lead to the dangerous situation of a bus short circuit. In particular, this safety protection circuit is especially suitable for driver chips on the market that do not have integrated safety status functions.

[0049] Figure 2 It shows Figure 1 The truth table for the input-output signals of the safety protection circuit shown is as follows. In this truth table, "H" represents a high level, i.e., logic signal "1", and "L" represents a low level, i.e., logic signal "0".

[0050] The controller in the traction inverter provides five input signals to the safety protection circuit: control signals PWMx_HI and PWMx_LI, and three safety state enable signals SFY_EN, EN_H, and EN_L. SFY_EN is the fault enable signal, active low; EN_H controls entry into the upper bridge ASC (active short circuit) mode, active high, and requires a low SFY_EN signal to function; EN_L controls entry into the lower bridge ASC mode, active high, and also requires a low SFY_EN signal to function. Simultaneously, this safety protection circuit has shoot-through protection for the PWM control signals and enable control signals, thus preventing simultaneous conduction of the upper and lower bridges.

[0051] The safety protection circuit of this invention can flexibly switch to different safety modes such as upper bridge ASC, lower bridge ASC, or Freewheeling based on various control signals and fault and ASC enable signals (including fault enable signal SFY_EN and ASC enable signals EN_H, EN_L) provided by the controller. This provides the most suitable safety protection strategy for the inverter under different fault conditions, effectively improving the reliability and safety of the traction inverter. Furthermore, this safety protection circuit has a shoot-through prevention function. By adding corresponding logic control elements, it ensures that the upper and lower bridges of the inverter do not conduct simultaneously, avoiding inverter bridge short circuits and improving system stability and safety. This safety protection circuit employs a combination of efficient logic gates and delayers, reducing circuit complexity and cost, while also having wide adaptability, especially suitable for inverter driver chips without safety protection functions, meeting the needs of different application scenarios.

[0052] Those skilled in the art will understand that the steps of the method according to the present invention are not limited to being performed in the order listed above. Furthermore, in this invention, terms such as "comprising" and "including" indicate that, in addition to the steps directly and explicitly stated in the specification and claims, the technical solution of this application does not exclude the presence of other steps not directly or explicitly stated.

[0053] While the present invention has been disclosed above with reference to preferred embodiments, it is not limited thereto. Any modifications and alterations made by those skilled in the art without departing from the spirit and scope of the invention should be included within the scope of protection of the invention. Therefore, the scope of protection of the invention should be determined by the scope defined in the claims.

Claims

1. A safety protection circuit for a traction inverter, the traction inverter comprising a controller and an inverter bridge circuit, the inverter bridge circuit configured to convert direct current from a vehicle battery pack into alternating current for driving a motor, the controller configured to periodically control the on / off state of various power switches in the inverter bridge circuit in a pulse width modulation manner, the safety protection circuit being disposed between the controller and the driver chip of the inverter bridge circuit, and configured to control the inverter bridge circuit to enter a corresponding operating mode based on control signals (PWMx_HI, PWMx_LI) and fault signals (SFY_EN, EN_H, EN_L) from the controller, characterized in that... The safety protection circuit includes: The first anti-snap-through module (7) is used to receive the upper bridge control signal (PWMx_HI) and the lower bridge control signal (PWMx_LI) from the controller, and is configured to output a low level only when the upper bridge control signal (PWMx_HI) and the lower bridge control signal (PWMx_LI) are both high. The first and second AND gates (8,9) each include three inputs and one output. The first input of the first and second AND gates (8,9) is connected to the output of the first anti-short-through module (7). The second input of the first AND gate (8) is used to receive the upper bridge control signal (PWMx_HI) from the controller. The second input of the second AND gate (9) is used to receive the lower bridge control signal (PWMx_LI) from the controller. The third input of the first and second AND gates (8,9) is used to receive the fault enable signal (SFY_EN) from the controller. First and second OR gates (10, 11), the first input of the first OR gate (10) is connected to the output of the first AND gate (8), the first input of the second OR gate (11) is connected to the output of the second AND gate (9), the output of the first OR gate (10) is connected to the upper bridge driver chip of the inverter bridge circuit, and the output of the second OR gate (11) is connected to the lower bridge driver chip of the inverter bridge circuit; and The fault diagnosis unit is configured to receive fault signals (SFY_EN, EN_H, EN_L) from the controller and cause the inverter bridge circuit to enter the corresponding safety protection mode based on the received fault signals. The first output terminal of the fault diagnosis unit is connected to the second input terminal of the first logic OR gate (10), and the second output terminal of the fault diagnosis unit is connected to the second input terminal of the second logic OR gate (11).

2. The safety protection circuit for a traction inverter according to claim 1, characterized in that, The first anti-short-through module (7) is formed as a first logic NAND gate, and the two input terminals of the first logic NAND gate are used to receive the upper bridge control signal (PWMx_HI) and the lower bridge control signal (PWMx_LI) from the controller, respectively.

3. The safety protection circuit for a traction inverter according to claim 2, characterized in that, The fault diagnosis unit includes: An inverter (1) configured to receive a fault enable signal (SFY_EN) from the controller and invert the fault enable signal (SFY_EN). The second anti-snap-through module (2) is used to receive the upper bridge ASC enable signal (EN_H) and the lower bridge ASC enable signal (EN_L) from the controller, and is configured to output a low level only when both the upper bridge ASC enable signal (EN_H) and the lower bridge ASC enable signal (EN_L) are high; and The third and fourth AND gates (3,5) each have three inputs and one output. The first input of the third and fourth AND gates (3,5) is connected to the output of the inverter (1). The second input of the third and fourth AND gates (3,5) is connected to the output of the second anti-snap-through module (2). The third input of the third AND gate (3) is used to receive the upper bridge ASC enable signal (EN_H) from the controller. The third input of the fourth AND gate (5) is used to receive the lower bridge ASC enable signal (EN_L) from the controller. The output of the third AND gate (3) is connected to the second input of the first OR gate (10). The output of the fourth AND gate (5) is connected to the second input of the second OR gate (11).

4. The safety protection circuit for a traction inverter according to claim 3, characterized in that, The second anti-straight-through module (2) is formed as a second logic NAND gate. The two inputs of the second logic NAND gate are used to receive the upper bridge ASC enable signal (EN_H) and the lower bridge ASC enable signal (EN_L) from the controller, respectively.

5. The safety protection circuit for a traction inverter according to claim 3 or 4, characterized in that, The fault diagnosis unit also includes: The first delay unit (4) is disposed between the output of the third AND gate (3) and the second input of the first OR gate (10); and The second delay unit (6) is located between the output of the fourth AND gate (5) and the second input of the second OR gate (11).

6. The safety protection circuit for a traction inverter according to claim 3 or 4, characterized in that, The fault diagnosis unit is further configured to enable the inverter bridge circuit to enter the upper bridge ASC mode when the fault enable signal (SFY_EN) is low and the upper bridge ASC enable signal (EN_H) is high.

7. The safety protection circuit for a traction inverter according to claim 3 or 4, characterized in that, The fault diagnosis unit is further configured to enable the inverter bridge circuit to enter the lower bridge ASC mode when the fault enable signal (SFY_EN) is low and the lower bridge ASC enable signal (EN_L) is high.

8. The safety protection circuit for a traction inverter according to claim 3 or 4, characterized in that, The fault diagnosis unit is further configured to cause the inverter bridge circuit to enter the lower bridge Freewheeling mode when the fault enable signal (SFY_EN) is low and both the upper bridge ASC enable signal (EN_H) and the lower bridge ASC enable signal (EN_L) are low.

9. A traction inverter comprising a controller and an inverter bridge circuit, the inverter bridge circuit being configured to convert direct current from a vehicle battery pack into alternating current for driving a motor, the controller being configured to periodically control the on / off states of power switches in the inverter bridge circuit in a pulse-width modulation manner, characterized in that, The traction inverter also includes a safety protection circuit according to any one of claims 1 to 8.

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