USB-pd charging control chip and method supporting power dynamic allocation

Abstract

The present application relates to the technical field of USB-PD charging control, and particularly relates to a USB-PD charging control chip and method supporting power dynamic allocation. The USB-PD charging control chip comprises a SoC operation logic unit, a target PD port comprising a register and a plurality of PD port charging communication ports comprising registers; the SoC operation logic unit obtains charging information of each connected load through register access, and is used for monitoring plugging and unplugging of each USB-C output port; when a new load is connected, based on the charging information of each connected load and the maximum charging capacity of the charger, it is determined whether to temporarily shut down a certain output port, so as to obtain the charging information of the new load under the premise that the power consumption of each output port does not exceed the maximum charging power of the charger, and perform power redistribution. The present application can realize arbitrary plugging and unplugging of the load, ensure that the system will not be powered off, and does not need to reserve any power consumption for the unconnected port, and realizes full-load output of the charger.

Description

Technical Field

[0001] This invention relates to the field of USB-PD charging control technology, and in particular to a USB-PD charging control chip and method that supports dynamic power allocation. Background Technology

[0002] Currently, the maximum charging capacity of PD3.1 chargers is 48V / 5A 240W. However, for charging devices with multiple Type-C ports, this 240W power needs to be allocated to the other Type-C output ports according to certain rules.

[0003] Traditional USB-PD charging control circuits consist of several PD charging chips and an MCU (Microcontroller Unit) chip. The core principle is that the PD input chip invites the charger to output its maximum power of 240W, while the PD output chip interacts with the downstream device being charged, reporting the interaction result to the MCU. The MCU then dynamically determines the power allocation for each charging port. However, this approach requires reserving some power for unconnected output ports. Otherwise, if some charging ports have already consumed 240W, when a new load is connected to an unconnected port, the MCU cannot promptly determine that the total power consumption exceeds the charger's 240W capacity due to the slow communication speed of the I2C / SPI interface between the MCU and the PD output chip. This prevents the MCU from redistributing power, triggering the charger's protection mechanism and causing the entire system to shut down.

[0004] Moreover, even if some power is reserved for unconnected output ports, when a new load is connected to an unconnected port, the MCU main controller will be limited by the interface speed and will not be able to respond to the connected load in time, thus failing to redistribute power in a timely manner.

[0005] Therefore, traditional USB-PD charging control circuits cannot realize power redistribution in a timely manner due to the limitation of the MCU master control on the interface speed, and need to reserve some power for the output port that is not connected to the load, thus failing to realize the full load capacity of the charger. Based on this, there is an urgent need for a USB-PD charging control chip and method that supports dynamic power distribution. Summary of the Invention

[0006] This invention provides a USB-PD charging control chip and method that supports dynamic power allocation. It solves the problems of traditional USB-PD charging control circuits, where the MCU controller is limited by interface speed and cannot promptly redistribute power, and requires reserving some power for output ports without connected loads, thus failing to fully utilize the charger's load capacity. The technical solution is as follows: In a first aspect, embodiments of the present invention provide a USB-PD charging control chip that supports dynamic power allocation, comprising: a SoC computing logic unit, a target PD port containing registers, and multiple PD port charging communication ports containing registers; The target PD port is used to connect to the USB-C input port to obtain the charger's maximum charging capacity, which is stored in a register; the maximum charging capacity includes at least the maximum power. Each of the PD port charging communication ports is used to acquire the charging information of the load connected to the corresponding USB-C output port and store it in a register; the charging information includes at least the load's rated power, actual allocated power, battery power, actual voltage and rated voltage, and there is a one-to-one correspondence between the PD port charging communication port and the USB-C output port; The SoC computing logic unit is connected to the target PD port and each PD port charging communication port to obtain the charger's maximum charging capacity and the charging information of each connected load in real time through register access. The SoC computing logic unit is used to monitor the plugging and unplugging of each USB-C output port. When a new load is connected to a USB-C output port, based on the charging information of each connected load and the charger's maximum charging capacity, it selects whether to temporarily shut down a certain USB-C output port. This ensures that the power consumption of each USB-C output port does not exceed the charger's maximum charging power while obtaining the charging information of the newly connected load and performing power redistribution.

[0007] Secondly, embodiments of the present invention also provide a USB-PD charging control method based on the chip described in any embodiment of this specification, the method comprising: The maximum charging capacity of the charger is obtained using the target PD port and stored in the register of the target PD port. The charging information of the load connected to the corresponding USB-C output port is obtained through the PD port charging communication port and stored in the register of the PD port charging communication port; the charging information includes at least the rated power of the load, the actual allocated power, the battery power, the actual voltage and the rated voltage, and the PD port charging communication port and the USB-C output port have a one-to-one correspondence. The SoC computing logic unit uses register access to obtain the charger's maximum charging capacity and the charging information of each connected load in real time, and monitors the plugging and unplugging of each USB-C output port. When a new load is connected to a USB-C output port, based on the charging information of each connected load and the charger's maximum charging capacity, it selects whether to temporarily shut down a certain USB-C output port. This ensures that the power consumption of each USB-C output port does not exceed the charger's maximum charging power while obtaining the charging information of the newly connected load and performing power redistribution.

[0008] This invention provides a USB-PD charging control chip and method supporting dynamic power allocation. It removes the MCU control module and designs a dedicated charging chip, replacing I2C / SPI interface access with register access, thus improving the response rate by two orders of magnitude, from hundreds of milliseconds to within a few milliseconds (or even microseconds). After improving the response speed, the SoC (System-on-a-Chip) computing logic unit monitors the insertion and removal of each USB-C output port. When a new load is connected to a USB-C output port, the system can utilize the brief shutdown of a particular USB-C output port (within a few milliseconds) to quickly supply power to the newly connected load to obtain charging information and complete the power redistribution calculation. Since the charger can tolerate these milliseconds of current fluctuation, no system power outage occurs. Therefore, this solution allows for arbitrary insertion and removal of charging loads, ensuring no system power outage, and eliminates the need to reserve any power for unconnected ports, achieving full-load output from the charger. Attached Figure Description

[0009] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0010] Figure 1 This is a schematic diagram of a traditional USB-PD charging control circuit; Figure 2 This is a schematic diagram of a USB-PD charging control circuit provided in an embodiment of the present invention; Figure 3 This is a schematic diagram of a USB-PD charging control chip that supports dynamic power allocation according to an embodiment of the present invention; Figure 4 This is a functional schematic diagram of a SoC computing logic unit provided in an embodiment of the present invention; Figure 5 This is a schematic flowchart of a USB-PD charging control method supporting dynamic power allocation provided in an embodiment of the present invention. Detailed Implementation

[0011] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are some embodiments of the present invention, but not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0012] As mentioned earlier, traditional USB-PD charging control circuits consist of several PD charging chips plus an MCU main control chip. Figure 1 As shown, for simplicity, we take four PD charging chips as an example. The core principle is that PD chip #4 at the PD input port invites the charger to output its maximum power of 240W. PD output chips #1 to #3 interact with the downstream charged device (i.e., the load) and then report the interaction result to the MCU master controller, which dynamically determines the power allocation of each charging port. Since the MCU interacts with the PD charging chips via the I2C / SPI interface, and the I2C / SPI interface is slow with a polling time of hundreds of milliseconds, the MCU master controller cannot respond to connected loads in a timely manner. It needs to reserve some power for unconnected ports (usually 15W to 45W) to prevent the MCU master controller from being unable to calculate the new power allocation result in time when a new load is connected, thus exceeding the charger's maximum power, triggering the charger's protection mechanism, and causing the entire system to shut down. Therefore, the inventors removed the MCU control module and designed a dedicated charging chip. This chip uses the SoC's computational logic unit to access the registers of the PD port charging communication port instead of the traditional I2C / SPI interface, improving the response rate by two orders of magnitude, from hundreds of milliseconds to within a few milliseconds (or even microseconds).

[0013] Please refer to Figure 2 and Figure 3 This invention provides a USB-PD charging control chip that supports dynamic power allocation, including: a SoC computing logic unit, a target PD port containing registers, and multiple PD port charging communication ports containing registers; The target PD port is used to connect to the USB-C input port to obtain the charger's maximum charging capacity, which is stored in a register; the maximum charging capacity includes at least the maximum power. Each PD port charging communication port is used to obtain the charging information of the load connected to the corresponding USB-C output port and store it in a register; the charging information includes at least the load's rated power, actual allocated power, battery power, actual voltage and rated voltage, and there is a one-to-one correspondence between the PD port charging communication port and the USB-C output port. The SoC computing logic unit is connected to the target PD port and each PD port charging communication port to obtain the charger's maximum charging capacity and the charging information of each connected load in real time through register access. The SoC computing logic unit is used to monitor the plugging and unplugging of each USB-C output port. When a new load is connected to a USB-C output port, based on the charging information of each connected load and the charger's maximum charging capacity, it selects whether to temporarily shut down a certain USB-C output port. This ensures that the power consumption of each USB-C output port does not exceed the charger's maximum charging power while obtaining the charging information of the newly connected load and performing power redistribution.

[0014] In this embodiment of the invention, the MCU control module is removed, and a dedicated charging chip is designed. Register access replaces I2C / SPI interface access, improving the response rate by two orders of magnitude, from hundreds of milliseconds to within a few milliseconds (or even microseconds). After improving the response speed, the SoC (System-on-a-Chip) computing logic unit monitors the insertion and removal of each USB-C output port. When a new load is connected to a USB-C output port, the system can utilize the brief shutdown of a particular USB-C output port. During this few milliseconds of brief shutdown, power is quickly supplied to the newly connected load to obtain charging information and complete power redistribution calculations. Since the charger can tolerate these few milliseconds of current fluctuations, no system power outage occurs. Conversely, if an external MCU were used as the main controller, it would require hundreds of milliseconds, causing a system power outage and preventing power redistribution. Therefore, this solution allows for arbitrary insertion and removal of charging loads, ensuring the system does not lose power, and eliminates the need to reserve any power for unconnected ports, enabling the charger to output at full load.

[0015] Please refer to Figure 3 In some implementations, it also includes: a screen driver module; The screen driver module is connected to the external display screen and touch module, and is used to drive the display screen to display data. The touch module is used for human-computer interaction, allowing customers to set an uninterrupted power whitelist for the USB-C output port and configure time sensitivity for different types of loads.

[0016] It is understandable that the screen driver module can be directly connected to the SoC (System-on-a-Chip) computing logic unit, and the SoC computing logic unit can directly drive the screen driver module to display data. It also integrates a display module and a touch module as a human-machine interface, used to set the uninterrupted power whitelist for the USB-C output port, configure time sensitivity for different types of loads, and notify the user of the current charging status of each port.

[0017] Please refer to Figure 4 In some implementations, the SoC's computing logic unit monitors the insertion and removal of each USB-C output port. When a new load is connected to a USB-C output port, based on the charging information of each already connected load and the charger's maximum charging capacity, it selects whether to temporarily shut down a particular USB-C output port. This ensures that the power consumption of each USB-C output port does not exceed the charger's maximum charging power. During power redistribution, it obtains the charging information of the newly connected load and performs the following: S1 monitors the plugging and unplugging of each USB-C output port in real time to determine whether a new load has been connected. S2, when a new load is connected, calculate whether the sum of the actual allocated power of the already connected load and the rated power of the newly connected load is less than or equal to the maximum power of the charger. S3, if so, obtain the charging information of the newly connected load and perform power redistribution; S4. If not, based on the uninterrupted power whitelist, remove the USB-C output ports in the whitelist from the connected loads, and then determine whether there are any ports that can be turned off in the connected loads. If S5 is not present, an overload warning will be displayed on the screen, and the newly connected load will not be powered, maintaining the original actual power allocation of the already connected load. S6, if it exists, then in descending order of actual allocated power, temporarily shut down the USB-C output port corresponding to the maximum actual allocated power, recalculate whether the sum of the actual allocated power of the remaining connected loads and the rated power of the newly connected loads is less than or equal to the maximum power of the charger, and based on the calculation result, jump to step S3 or S4 accordingly.

[0018] In this embodiment, each PD port charging communication port can simultaneously detect both voltage and current. Figure 2For example, suppose that when a load is connected to both USB-C output ports 1 and 2, the 240W power is fully utilized, and the capacity of the two output ports is recorded internally in the charging chip. If a load is then connected to USB-C output port 3, the charging chip needs to immediately decide whether to prioritize cutting off USB-C output port 1 or output port 2 to avoid overcurrent protection of the entire charger. Only in this way can the charging chip have the opportunity to supply power to obtain the capacity of USB-C output port 3 within a few milliseconds of brief shutdown, and then redistribute power consumption according to the capacity of the three output ports. Since the charger can tolerate current fluctuations at the millisecond level, a system power outage will not occur. Conversely, if an external MCU is used as the main controller, it would take hundreds of milliseconds, causing a power outage of the entire system and making power redistribution impossible.

[0019] Assuming that neither USB-C output port 1 nor output port 2 is on the uninterrupted power-off whitelist, and assuming that the actual power allocated to USB-C output port 1 is greater than that of output port 2, then there are ports that can be shut down. Based on descending order of actual power allocation, USB-C output port 1, corresponding to the highest actual power allocation, is temporarily shut down. The actual power allocation of the remaining connected load output port 2 and the rated power of the newly connected load output port 3 are recalculated to see if the sum is less than or equal to the charger's maximum power. If it is less than or equal to, it indicates that the power consumption meets the standard, and there is no need to continue shutting down; power can be supplied to the newly connected load for power redistribution, so step S3 is executed. If it is greater than, it indicates that the power consumption does not meet the standard, and shutdown is required. Step S4 is executed. At this point, output port 2 can still be shut down. After shutting down, based on the calculation result, the system jumps to either step S3 or S4. This judgment process in this embodiment can prevent system power outages caused by the insertion of a new load.

[0020] In some implementations, obtaining charging information for newly connected loads and performing power reallocation includes steps A1-A5: A1 supplies power to the load based on the rated power of the newly connected load, samples the battery level of the load corresponding to each USB-C output port that is currently being powered at fixed time intervals to calculate the real-time charging efficiency of each USB-C output port, and obtains the real-time charging efficiency of the temporarily shut-down USB-C output ports before shutdown to calculate the initial allocation weight of each USB-C output port that is currently being powered and the temporarily shut-down USB-C output ports.

[0021] In some implementations, the initial allocation weights are calculated using the following formula: in, In the formula, Assign initial weights to this USB-C output port. Let n be the real-time charging efficiency of the i-th USB-C output port, where n is the total number of USB-C output ports calculated based on the currently powered USB-C output ports and the temporarily disabled USB-C output ports. Let i be the current battery level of the load corresponding to the i-th USB-C output port. It is a fixed time interval.

[0022] In this embodiment, the SoC computing logic unit samples the battery level of each port at fixed time intervals (preferably 1 to 10 seconds). Then, calculate the real-time charging efficiency of each port. For USB-C output ports that are temporarily shut down, simply obtain the real-time charging efficiency before shutdown, and then calculate the initial allocation weight for each USB-C output port.

[0023] A2, obtain the actual voltage of each USB-C output port currently being powered and the rated voltage of the corresponding load, as well as the actual voltage of the temporarily shut-down USB-C output port before shutdown and the rated voltage of the corresponding load; A3. Determine the ratio of the actual voltage to the corresponding rated voltage of each USB-C output port. When the ratio is greater than or equal to the set threshold, reduce the corresponding weighting coefficient value to adjust the initial allocation weight of the USB-C output port based on the weighting coefficient. Based on the reduction of the weighting coefficient value, distribute the reduced power evenly to the USB-C output ports with a ratio less than the set threshold to obtain the intermediate allocation weight of each USB-C output port.

[0024] In steps A2-A3, each PD port charging communication port can simultaneously detect voltage and current. Since the battery enters a constant-voltage trickle charging stage when the ratio of the actual voltage to the corresponding rated voltage exceeds 80%, even allocating more power cannot be converted into actual charging speed. This embodiment sets a transition stage, where weighting begins when the ratio exceeds 70%, hence the threshold is set to 70%.

[0025] Specifically, for ratios between 70% and 80%, the weighting factor is reduced. The value decreases linearly from 1.0 to 0.5, which is the transition phase. 80% ≤ Ratio < 90%, Weighting coefficient It decreased from 0.5 to 0.2; 90% ≤ Ratio ≤ 100%, Weighting coefficient The voltage drops from 0.2 to 0.1, marking the start of the backup power supply phase.

[0026] In some implementations, the intermediate allocation weight for each USB-C output port is calculated as follows: The calculation method for the intermediate allocation weight of USB-C output ports with a ratio greater than or equal to a set threshold is as follows: The calculation method for the intermediate allocation weight of USB-C output ports with a ratio less than a set threshold is as follows: In the formula, Assign weights to the middle of this USB-C output port. Assign initial weights to this USB-C output port. This is the current weighting factor value for the USB-C output port. This represents the reduction in the weighting factor value of USB-C output ports whose ratio is greater than or equal to a set threshold. m is the number of USB-C output ports whose ratio is greater than or equal to the set threshold, and n is the total number of USB-C output ports calculated based on currently powered USB-C output ports and temporarily disabled USB-C output ports.

[0027] In this embodiment, for USB-C output ports with a ratio greater than or equal to a set threshold, the weighting coefficient is reduced, and the initial allocation weight of the USB-C output port is adjusted directly based on the reduced weighting coefficient to obtain an intermediate allocation weight. For USB-C output ports with a ratio less than the set threshold, i.e., 70%, the allocation weight of each USB-C output port with a ratio greater than or equal to the set threshold needs to be received. This is to "reclaim" the power of the USB-C output ports with a ratio greater than or equal to the set threshold and distribute it evenly to devices still in the constant current fast charging stage, avoiding power waste.

[0028] A4 calculates the final allocation weight for each USB-C output port based on the type of load connected to each USB-C output port and the time sensitivity of different types of loads configured by the customer, combined with intermediate allocation weights.

[0029] In this step, the user's time sensitivity varies across different devices: For example, a mobile phone user might leave in half an hour, making them highly time-sensitive and requiring rapid recharging, such as γ=1.2.

[0030] Laptops: Users may plug them in all day in the office, so they are less time-sensitive and can use slow charging, such as γ=0.6.

[0031] TWS earphones: The battery capacity is extremely small, and it can be fully charged quickly even with 5W, without needing to compete for power such as γ=0.3.

[0032] A5 calculates the allocated power for each USB-C output port that is currently powered and for each USB-C output port that is temporarily powered off, based on the final allocation weight of each USB-C output port and the maximum power of the charger.

[0033] In this embodiment, the power allocation for each USB-C output port is calculated as follows: In the formula, The final weight assignment for this USB-C output port, The time sensitivity of the load connected to the USB-C output port, where n is the total number of USB-C output ports calculated based on currently powered and temporarily disabled USB-C output ports. This is the charger's maximum power. Allocate power to the USB-C output port.

[0034] In this embodiment, after a new load is connected, intelligent power dynamic reallocation is performed based on battery level, dynamic weight reduction during the charging phase, and user time sensitivity configuration.

[0035] Continue to refer to Figure 3 In some implementations, it also includes: RAM and DMA: The RAM is connected to the SoC computing logic unit and is used to store the power redistribution results of the SoC computing logic unit and the charging information of each USB-C output port. The DMA is connected to both the RAM and the screen driver module. The DMA is used to drive the screen driver module to display the power redistribution results stored in the RAM and the charging information of each USB-C output port on the display screen, and to receive the customer settings from the touch module.

[0036] In this embodiment, since the business of the SoC computing logic unit is relatively complex, including at least register access to obtain charging information, monitoring port plugging and unplugging, shutdown selection process, power redistribution calculation, etc., in order not to occupy SoC resources and ensure SoC response speed, this embodiment sets up RAM and DMA. RAM is used to store the power redistribution results of the SoC computing logic unit and the charging information of each USB-C output port. DMA is used to drive the screen driver module to display data. The SoC computing logic unit does not need to drive the screen driver module to display data. DMA can save SoC resources and will not affect other processes of the main control chip.

[0037] refer to Figure 3 In some implementations, it also includes: a storage module; The storage module is connected to RAM and is used to store the program of the SoC computing logic unit.

[0038] In this embodiment, a storage module is used to store the program of the SoC computing logic unit. When the SoC computing logic unit program malfunctions, it can be reloaded as a backup, thereby improving the reliability of the chip.

[0039] Please refer to Figure 5 This embodiment also provides a USB-PD charging control method based on any chip in this specification, the method including: 500, use the target PD port to obtain the charger's maximum charging capacity and store it in the register of the target PD port; 502. The charging information of the load connected to the corresponding USB-C output port is obtained by using the PD port charging communication port and stored in the register of the PD port charging communication port; the charging information includes at least the rated power of the load, the actual allocated power, the battery power, the actual voltage and the rated voltage, and there is a one-to-one correspondence between the PD port charging communication port and the USB-C output port. 504 utilizes the SoC's computing logic unit to access registers in real time to obtain the charger's maximum charging capacity and the charging information of each connected load, and monitors the plugging and unplugging of each USB-C output port. When a new load is connected to a USB-C output port, based on the charging information of each connected load and the charger's maximum charging capacity, it selects whether to temporarily shut down a certain USB-C output port, so as to obtain the charging information of the newly connected load and perform power redistribution while ensuring that the power consumption of each USB-C output port does not exceed the charger's maximum charging power.

[0040] It should be noted that the above method embodiments and chip embodiments belong to the same concept, and the specific implementation process can be found in the chip embodiments, which will not be repeated here.

[0041] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus.

[0042] Those skilled in the art will understand that all or part of the steps of the above method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it performs the steps of the above method embodiments. The aforementioned storage medium includes various media that can store program code, such as ROM, RAM, magnetic disk, or optical disk.

[0043] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A USB-PD charging control chip supporting dynamic power allocation, characterized in that, include: SoC computing logic unit, target PD port with registers, and multiple PD port charging communication ports with registers; The target PD port is used to connect to the USB-C input port to obtain the charger's maximum charging capacity, which is stored in a register; the maximum charging capacity includes at least the maximum power. Each of the PD port charging communication ports is used to acquire the charging information of the load connected to the corresponding USB-C output port and store it in a register; the charging information includes at least the load's rated power, actual allocated power, battery power, actual voltage and rated voltage, and there is a one-to-one correspondence between the PD port charging communication port and the USB-C output port; The SoC computing logic unit is connected to the target PD port and each PD port charging communication port to obtain the charger's maximum charging capacity and the charging information of each connected load in real time through register access. The SoC computing logic unit is used to monitor the plugging and unplugging of each USB-C output port. When a new load is connected to a USB-C output port, based on the charging information of each connected load and the maximum charging capacity of the charger, it selects whether to temporarily shut down a certain USB-C output port. This ensures that the power consumption of each USB-C output port does not exceed the maximum charging power of the charger, while obtaining the charging information of the newly connected load and performing power redistribution.

2. The chip according to claim 1, characterized in that, Also includes: Screen driver module; The screen driver module is connected to an external display screen and a touch module, and the screen driver module is used to drive the display screen to display data. The touch module is used for human-computer interaction, allowing customers to set an uninterrupted power whitelist for the USB-C output port and configure time sensitivity for different types of loads.

3. The chip according to claim 2, characterized in that, The SoC's computing logic unit monitors the insertion and removal of each USB-C output port. When a new load is connected to a USB-C output port, based on the charging information of each already connected load and the charger's maximum charging capacity, it selects whether to temporarily shut down a particular USB-C output port. This ensures that the power consumption of each USB-C output port does not exceed the charger's maximum charging power. During power redistribution, it obtains the charging information of the newly connected load and performs the following: S1 monitors the plugging and unplugging of each USB-C output port in real time to determine whether a new load has been connected. S2, when a new load is connected, determine whether the sum of the actual allocated power of the already connected load and the rated power of the newly connected load is less than or equal to the maximum power of the charger; S3, if so, obtain the charging information of the newly connected load and perform power redistribution; S4. If not, based on the uninterrupted power whitelist, remove the USB-C output ports in the whitelist from the connected loads, and then determine whether there are any ports that can be turned off in the connected loads. S5, if not present, will display an overload warning on the display screen, and the newly connected load will not be powered, maintaining the original actual power allocation of the already connected load; S6. If it exists, then according to the actual allocated power in descending order, temporarily shut down the USB-C output port corresponding to the maximum actual allocated power, recalculate whether the sum of the actual allocated power of the remaining connected loads and the rated power of the newly connected loads is less than or equal to the maximum power of the charger, and based on the calculation result, jump to step S3 or S4.

4. The chip according to claim 3, characterized in that, The step of obtaining charging information of newly connected loads and performing power reallocation includes: Power the load based on the rated power of the newly connected load, sample the battery power of the load corresponding to each USB-C output port that is currently being powered at fixed time intervals to calculate the real-time charging efficiency of each USB-C output port, and obtain the real-time charging efficiency of the temporarily shut-down USB-C output ports before shutdown to calculate the initial allocation weight of each USB-C output port that is currently being powered and the temporarily shut-down USB-C output ports. Obtain the actual voltage of each USB-C output port currently powered and the rated voltage of the corresponding load, as well as the actual voltage of the temporarily powered USB-C output port before shutdown and the rated voltage of the corresponding load. The ratio of the actual voltage to the corresponding rated voltage of each USB-C output port is determined. When the ratio is greater than or equal to a set threshold, the weighting coefficient is reduced accordingly. The initial allocation weight of the USB-C output port is adjusted based on the weighting coefficient. Based on the reduction of the weighting coefficient, the reduced power is evenly distributed to the USB-C output ports whose ratio is less than the set threshold to obtain the intermediate allocation weight of each USB-C output port. Based on the type of load connected to each USB-C output port and the time sensitivity of different types of loads configured by the customer, and in conjunction with the intermediate allocation weights, the final allocation weights for each USB-C output port are calculated respectively. Based on the final allocation weight of each USB-C output port and the maximum power of the charger, the allocated power for each USB-C output port that is currently powered and the USB-C output ports that are temporarily turned off are calculated respectively.

5. The chip according to claim 4, characterized in that, The formula for calculating the initial weight allocation is as follows: in, In the formula, Assign initial weights to this USB-C output port. Let n be the real-time charging efficiency of the i-th USB-C output port, where n is the total number of USB-C output ports calculated based on the currently powered USB-C output ports and the temporarily disabled USB-C output ports. Let i be the current battery level of the load corresponding to the i-th USB-C output port. The fixed time interval is defined as such.

6. The chip according to claim 4, characterized in that, The intermediate allocation weight for each USB-C output port is calculated as follows: The calculation method for the intermediate allocation weight of USB-C output ports whose ratio is greater than or equal to the set threshold is as follows: The calculation method for the intermediate allocation weight of USB-C output ports whose ratio is less than a set threshold is as follows: In the formula, Assign weights to the middle of this USB-C output port. Assign initial weights to this USB-C output port. This is the current weighting factor value for the USB-C output port. The reduction in the weighting coefficient value of the USB-C output ports whose ratio is greater than or equal to a set threshold, where m is the number of USB-C output ports whose ratio is greater than or equal to the set threshold, and n is the total number of USB-C output ports calculated based on the currently powered USB-C output ports and the temporarily disabled USB-C output ports.

7. The chip according to claim 4, characterized in that, The power allocation for each USB-C output port is calculated as follows: In the formula, The final weight assignment for this USB-C output port, The time sensitivity of the load connected to the USB-C output port, where n is the total number of USB-C output ports calculated based on currently powered and temporarily disabled USB-C output ports. The maximum power of the charger, Allocate power to the USB-C output port.

8. The chip according to claim 2, characterized in that, Also includes: RAM and DMA: The RAM is connected to the SoC computing logic unit, and the RAM is used to store the power redistribution results of the SoC computing logic unit and the charging information of each USB-C output port; The DMA is connected to the RAM and the screen driver module respectively. The DMA is used to drive the screen driver module to display the power redistribution results stored in the RAM and the charging information of each USB-C output port on the display screen, and to receive the customer settings content of the touch module.

9. The chip according to claim 8, characterized in that, Also includes: Storage module; The storage module is connected to the RAM and is used to store the program of the SoC computing logic unit.

10. A USB-PD charging control method based on the chip described in any one of claims 1-9, characterized in that, include: The maximum charging capacity of the charger is obtained using the target PD port and stored in the register of the target PD port. The charging information of the load connected to the corresponding USB-C output port is obtained through the PD port charging communication port and stored in the register of the PD port charging communication port; the charging information includes at least the rated power of the load, the actual allocated power, the battery power, the actual voltage and the rated voltage, and there is a one-to-one correspondence between the PD port charging communication port and the USB-C output port. The SoC computing logic unit uses register access to obtain the charger's maximum charging capacity and the charging information of each connected load in real time, and monitors the plugging and unplugging of each USB-C output port. When a new load is connected to a USB-C output port, based on the charging information of each connected load and the charger's maximum charging capacity, it selects whether to temporarily shut down a certain USB-C output port. This ensures that the power consumption of each USB-C output port does not exceed the charger's maximum charging power while obtaining the charging information of the newly connected load and performing power redistribution.

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