A grid-forming inverter system and a control device and method thereof

Abstract

The application discloses a grid-connected inverter system and a control device and method thereof, and belongs to the technical field of power electronics. The system comprises a grid-connected inverter and a control device. The output voltage and the output current are sampled. When the output current is out of limit, a hierarchical coordination control method of reducing negative sequence compensation first and reducing positive sequence reference when necessary is executed, so that the output voltage balance performance is maintained as much as possible under the conditions of most asymmetric loads and asymmetric faults, and the current-limiting safety and operation stability of the device are ensured.

Description

Technical Field

[0001] This invention relates to the field of power electronics technology, and in particular to a grid-type inverter system and its control device and control method. Background Technology

[0002] Grid-Forming inverters can actively establish voltage and frequency under off-grid or weak grid conditions, making them a key interface device in power systems with a high proportion of power electronics. However, compared to synchronous generators, the overcurrent capacity of grid-forming inverters is significantly limited. Therefore, their current limiting strategies under fault or abnormal operating conditions directly affect the device's self-protection, voltage support capability, transient stability, and fault recovery process. Existing technical literature, "N. Baeckeland, D. Chatterjee, M. Lu, B. Johnson, and G.-S. Seo, Overcurrent Limiting in Grid-Forming Inverters: A Comprehensive Review and Discussion, IEEE Transactions on Power Electronics, vol. 39, no. 11, pp. 14493-14517, Nov. 2024," studies the control problems of stand-alone grid-forming inverters under voltage regulation, harmonic compensation, and abnormal operating conditions, demonstrating that there are irreconcilable problems among different control strategies regarding fault current contribution, voltage support, transient stability, and fault recovery performance.

[0003] In off-grid operation scenarios, three-phase inverters, in addition to fulfilling basic power supply tasks, also need to address power quality issues caused by unbalanced loads and harmonic distortion. Existing technical literature, "H. Patel and V. Agarwal, Control of a Stand-Alone Inverter-Based Distributed Generation Source for Voltage Regulation and Harmonic Compensation, IEEE Transactions on Power Delivery, vol. 23, no. 2, pp. 1113-1120, April 2008," studies the voltage regulation and compensation control of stand-alone three-phase inverters, demonstrating that the output voltage quality of off-grid inverters under load disturbance conditions is closely related to the control strategy. When a single-phase high-power device is connected to the three-phase system, or when there are sudden changes in single-phase additional loads or severely unbalanced operating conditions, the output voltage is prone to imbalance, thus affecting power quality.

[0004] Furthermore, in the asymmetrical fault conditions of grid-formed inverters, the existing technical literature "Z. Li, KWChan, J. Hu and SW Or, An Adaptive Fault Ride-Through Scheme for Grid-Forming Inverters Under Asymmetrical Grid Faults," in IEEE Transactions on Industrial Electronics, vol. 69, no. 12, pp. 12912-12923, Dec. 2022, points out that an ideal control strategy should simultaneously consider multiple objectives such as current limiting of the faulty phase, voltage quality of the non-faulty phases, sequence component support, and post-fault recovery. However, these objectives are often coupled and mutually restrictive in actual control. If the control strategy prioritizes enhancing imbalance compensation, it is beneficial to improve voltage balance, but may cause the output current to exceed the limit. If the control strategy directly reduces the positive sequence voltage reference when an overcurrent trend occurs, although it can suppress the output current, it will bring about a significant voltage quality loss.

[0005] Therefore, it is urgent to solve the problems of output voltage imbalance and current exceeding limits of grid-connected inverters under unbalanced load and severe unbalanced fault conditions. Summary of the Invention

[0006] The present invention aims to provide a grid-type inverter system and its control device and control method.

[0007] To achieve the above objectives, the technical solution of the present invention is as follows: A control method for a grid-connected inverter system, the grid-connected inverter system including a grid-connected inverter, wherein the input terminal of the grid-connected inverter receives DC power, which is converted by a three-phase inverter bridge, and the output terminal outputs three-phase output voltage and three-phase output current; the control method for the grid-connected inverter system includes: Step S1: Collect the three-phase output voltage and three-phase output current at the output terminal of the grid-connected inverter; Step S4: Perform coordinate transformation on the three-phase output current, calculate the output current amplitude, and subtract the output current amplitude from the current limiting threshold to obtain the current over-limit deviation. Step S5: Determine whether the current limit deviation is greater than zero. If not, the current does not exceed the limit, proceed to step S6; if yes, the current exceeds the limit, proceed to step S8. Step S6: Using the preset recovery gain as the step size, linearly recover the negative sequence compensation retention coefficient to the initial value; Step S7: Keep the basic positive sequence d-axis voltage reference unchanged, and the output positive sequence d-axis voltage reference is the basic positive sequence d-axis voltage reference; Step S8: Based on the current over-limit deviation, linearly adjust the decreasing rate of the negative sequence compensation retention coefficient using a preset shrinkage gain as a proportional coefficient; Step S9: Determine whether the negative order compensation retention coefficient is less than or equal to a preset threshold; if not, proceed to step S7; if yes, proceed to step S10. Step S10: Using a preset positive-sequence derating gain as the step size, linearly reduce the basic positive-sequence d-axis voltage reference to generate a positive-sequence d-axis voltage reference.

[0008] Furthermore, in the control method for the grid-type inverter system, in step S4, the current component... i α , i β The output current amplitude is obtained by coordinate transformation of the three-phase output current and is calculated according to the following formula: in, The output current amplitude, The α-axis current component is obtained by coordinate transformation of the three-phase output current. The β-axis current component is obtained by coordinate transformation of the three-phase output current. The overline indicates the moving average filtering result; the window period of the average filtering is 20ms. The current limiting threshold Take the rated output current 1.5 times, that is: ; The current over-limit deviation Δ i The expression is: .

[0009] Furthermore, the formula for calculating the positive-sequence d-axis voltage reference is as follows: In the formula, u d,ref0 This serves as the baseline positive sequence d-axis voltage reference under rated system conditions. k sag The preset positive-sequence derating gain. k limit Negative order compensation retention coefficients generated for collaborative control; The output current amplitude, This is the preset rate limiting threshold.

[0010] Furthermore, the control method for the grid-type inverter system further includes: Step S2: Perform coordinate transformation and power calculation on the three-phase output voltage and the three-phase output current to generate a synchronization angle signal, α-axis voltage component, and β-axis voltage component; Step S3: Based on the synchronization angle signal, generate a basic positive sequence d-axis voltage reference, and perform negative sequence suppression and coordinate transformation on the α-axis voltage component and β-axis voltage component to obtain the three-phase negative sequence compensation voltage component.

[0011] Furthermore, the control method for the grid-type inverter system further includes: Step S11: The negative sequence compensation voltage component is scaled using the negative sequence compensation retention coefficient. The scaled negative sequence compensation voltage component is superimposed on the positive sequence three-phase voltage reference to generate a modulation reference signal, and then proceeds to step S13. The positive sequence three-phase voltage reference is obtained by adjusting the positive sequence d-axis voltage reference output in step S7 through voltage outer loop-current inner loop positive sequence double closed loop adjustment and coordinate transformation. Step S12: The negative sequence compensation voltage component is scaled using the negative sequence compensation retention coefficient. The scaled negative sequence compensation voltage component is superimposed on the positive sequence three-phase voltage reference to generate a modulation reference signal, and then proceeds to step S13. The positive sequence three-phase voltage reference is obtained by adjusting the positive sequence d-axis voltage reference output in step S10 through voltage outer loop-current inner loop positive sequence double closed loop adjustment and coordinate transformation. Step S13: Normalize, limit, and perform sinusoidal pulse width modulation on the modulation reference signal to control the output of the grid-type inverter, and return to step S1.

[0012] This invention establishes clear control criteria and execution paths by defining the coordination relationship between output current amplitude, current limiting threshold, current over-limit deviation and negative sequence compensation retention coefficient, thus enabling the control method to have good engineering feasibility.

[0013] A control device is applied to a grid-type inverter system, the grid-type inverter system including a grid-type inverter, the input terminal of the grid-type inverter receiving DC power, which is converted by a three-phase inverter bridge and outputs three-phase output voltage and three-phase output current; the control device includes: The output voltage sampling module samples the three-phase output voltage; The output current sampling module samples the three-phase output current; A first coordinate transformer is used to receive the three-phase output voltage and output voltage components. The second coordinate transformer is used to receive the three-phase output current and output current components; A collaborative current limiting and voltage balance control module is used to receive the output current component and output a positive-sequence d-axis voltage reference. A power calculation module is used to calculate the output active power based on the voltage component and the current component. A virtual synchronous generator control module is used to receive the active power output by the power calculation module and generate a synchronization angle signal. The voltage outer loop-current inner loop positive sequence dual closed loop module is used to receive the voltage component output by the first coordinate transformer, the current component output by the second coordinate transformer, and the positive sequence d-axis voltage reference output by the collaborative current limiting and voltage balance control module, and generate positive sequence control quantity. The first coordinate inverse transformer is used to receive the positive sequence control quantity and the synchronization angle signal, and output a positive sequence three-phase voltage reference. A negative sequence suppression control module is used to receive the voltage component output by the first coordinate transformer and output a negative sequence compensation control quantity. The second coordinate inverse transformer is used to convert the negative sequence compensation control quantity output by the negative sequence suppression control module into a three-phase negative sequence compensation voltage component. The negative sequence compensation scaling module is used to receive the three-phase negative sequence compensation voltage components and the negative sequence compensation retention coefficient output by the collaborative current limiting and voltage balance control module, and output the scaled negative sequence compensation voltage components. The superposition and normalization limiting control module is used to superimpose the positive sequence three-phase voltage reference with the scaled negative sequence compensation voltage component to generate a modulation reference signal. A modulator module, wherein the modulator module is used to receive a modulation reference signal to obtain a sinusoidal pulse width modulation signal; A power switch driver module is provided, which is used to receive the sinusoidal pulse width modulation signal to generate a drive signal.

[0014] Furthermore, in the aforementioned control device, the collaborative current limiting and voltage balancing control module includes: The output current amplitude calculation unit uses a moving average smoothing filter to smooth the current amplitude. A current limiting threshold setting unit, wherein the current limiting threshold setting unit is used to output a preset current limiting threshold; The current over-limit deviation generation unit is used to generate current over-limit deviation based on the output current amplitude and the preset output current limiting threshold. A negative sequence compensation retention coefficient generation unit is used to generate a negative sequence compensation retention coefficient based on the current over-limit deviation. A positive-sequence derating trigger determination unit is used to generate a positive-sequence derating trigger signal based on the current over-limit deviation and the negative-sequence compensation retention coefficient. A positive-sequence d-axis voltage reference generation unit is used to receive the positive-sequence derating trigger signal, the current over-limit deviation, and the basic positive-sequence d-axis voltage reference. When the trigger signal is valid, the basic positive-sequence d-axis voltage reference is corrected to generate a positive-sequence d-axis voltage reference.

[0015] This invention triggers the positive-sequence d-axis voltage reference derating only when the negative-sequence compensation retention coefficient has been reduced to a preset threshold and the output current still exceeds the limit. Therefore, it has the capability of hierarchical protection and current limiting under extreme asymmetrical fault conditions, which can effectively improve the current limiting safety and operational stability of the device.

[0016] A grid-connected inverter system includes a grid-connected inverter, wherein the grid-connected inverter comprises: The DC input filter module outputs DC power filtered by capacitors, which is then converted into three-phase instantaneous phase voltages by a three-phase inverter bridge module. These three-phase instantaneous phase voltages are then filtered by a three-phase filter inductor module and a three-phase filter capacitor module to provide three-phase output voltages for the unbalanced load network module. The grid-type inverter system also includes a control device for sampling the output voltage and output current and controlling the switching of the three-phase inverter bridge module.

[0017] Furthermore, in the aforementioned grid-type inverter system, the control device is any one of the control devices described above.

[0018] Furthermore, in the aforementioned grid-type inverter system, the control device executes the control method for the grid-type inverter system as described in any of the preceding claims.

[0019] Beneficial effects: This invention establishes a hierarchical coordinated control strategy that first reduces negative-sequence compensation and then lowers the positive-sequence reference when necessary. This strategy enables the inverter to achieve current limiting by reducing the amount of negative-sequence compensation injection when the output current just exceeds the current limiting threshold. Only when the negative-sequence compensation capability is nearly exhausted and the output current still exceeds the limit is the positive-sequence d-axis voltage reference further reduced. This helps to maintain the output voltage balance performance as much as possible under most unbalanced load and unbalanced fault conditions, while ensuring the overcurrent self-protection and operational stability of the device.

[0020] To make the above-mentioned features and advantages of the invention more apparent and understandable, specific embodiments are described below, and detailed descriptions are provided in conjunction with the accompanying drawings. Attached Figure Description

[0021] Figure 1 This is a schematic diagram of the structure of a grid-type inverter system according to the present invention.

[0022] Figure 2 This is a schematic diagram of the collaborative current limiting and voltage balance control module.

[0023] Figure 3 This is a flowchart of a control method for a grid-type inverter system.

[0024] Figure 4 The waveform diagram shows the simulation results when the present invention only uses complex vector proportional integral complex negative sequence compensation.

[0025] Figure 5 The waveform diagram shows the simulation results of the present invention when using a complex vector proportional-integral controller and flexible current limiting coordinated control.

[0026] Figure 6 The waveform diagram shows the simulation results of the present invention when using complex vector proportional-integral, flexible current limiting and positive sequence derating coordinated control.

[0027] In the diagram: 1 Inverter, 2 Control unit, 101 DC input filter module, 102 Three-phase inverter bridge module, 103 Three-phase filter inductor module, 104 Three-phase filter capacitor module, 105 Asymmetrical load network module, 201 Output voltage sampling module, 202 Output current sampling module, 203 Superposition and normalization limiting control module, 204 First coordinate inverter, 205 Voltage outer loop-current inner loop positive sequence dual closed loop module, 206 Virtual synchronous generator control module, 207 Power calculation module, 208 First coordinate inverter... The following modules are included: converter, collaborative current limiting and voltage balance control module, second coordinate transformer, negative sequence suppression control module, second coordinate inverse transformer, negative sequence compensation scaling module, power switch driver module, modulator module, output current amplitude calculation unit, current limiting threshold setting unit, current over-limit deviation generation unit, negative sequence compensation retention coefficient generation unit, positive sequence derating trigger determination unit, and positive sequence d-axis voltage reference generation unit. Detailed Implementation

[0028] To make the objectives and technical solutions of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the described embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0029] Figure 1 This is a schematic diagram of a grid-type inverter system according to the present invention. Figure 1 As shown, the grid-type inverter system includes an inverter device 1 and a control device 2.

[0030] Inverter 1 includes: DC input filter module 101, the DC input filter module 101 outputs DC power after capacitor filtering. V dc The instantaneous phase voltage of phase a is obtained after conversion by the three-phase inverter bridge module 102. u inv,a Phase b instantaneous phase voltage u inv,b c-phase instantaneous phase voltage u inv,c The alternating current is filtered by the three-phase filter inductor module 103 and the three-phase filter capacitor module 104, providing the a-phase output voltage to the unbalanced load network module 105. u a b-phase output voltage u b c-phase output voltage u c .

[0031] Specifically, the DC input filter module 101 includes a DC power supply. V dc DC bus capacitor C dc With DC power supply V dc in parallel.

[0032] The three-phase inverter bridge module 102 includes a switching transistor. S 1. Switching transistor S 2. Switching transistor S 3. Switching transistor S 4. Switching transistor S 5 and switching transistors S 6. The shut-off valve S 1. Switching transistor S 2. Switching transistor S 3. Switching transistor S 4. Switching transistor S 5 and switching transistors S 6. This constitutes a three-phase full-bridge structure.

[0033] The three-phase filter inductor module 103 includes an a-phase output filter inductor. L fa b-phase output filter inductor L fb and the c-phase output filter inductor L fcA-phase output filter inductor L fa The first terminal and the switching transistor S The source of phase 1 is connected, and the output filter inductor of phase b is connected. L fb The first terminal and the switching transistor S 3-phase source connection, c-phase output filter inductor L fc The first terminal and the switching transistor S 5. Source connection.

[0034] The three-phase filter capacitor module 104 includes an a-phase output filter capacitor. C fa b-phase output filter capacitor C fb and the c-phase output filter capacitor C fc Phase a output filter capacitor C fa The first terminal is connected to the output filter inductor of phase a. L fa The second terminal is connected to the b-phase output filter capacitor. C fb The first terminal is connected to the output filter inductor of phase b. L fb The second terminal is connected to the c-phase output filter capacitor. C fc The first terminal is connected to the c-phase output filter inductor L fc The second terminal is connected. Phase a output filter capacitor. C fa b-phase output filter capacitor C fb and the c-phase output filter capacitor C fc The second end is connected in parallel.

[0035] The asymmetrical load network module 105 includes an a-phase load resistor. R a a-phase load resistance R a The first terminal is connected to the output filter capacitor of phase a. C fa The second terminal is connected to the load resistor of phase a. R a The second terminal is connected to the b-phase load resistor. R b The second terminal and the c-phase load resistor R c The second terminal is connected to the b-phase load resistor. R b The first terminal is connected to the output filter capacitor of phase b.C fb The second terminal is connected to the c-phase load resistor. R c The first terminal is connected to the c-phase output filter capacitor. C fc The second end is connected.

[0036] Furthermore, the three-phase filter capacitor module 104 and the three-phase filter inductor module 103 together constitute an LC filter structure, which filters out high-frequency harmonics, makes the output voltage waveform sinusoidal, and provides reactive power support for the load.

[0037] As an example, a control device 2 samples the output voltage signal and the output current signal, and controls the switching of the three-phase inverter bridge module to achieve closed-loop control and strategy execution, specifically including: The output voltage sampling module 201 samples the output voltage filtered by the three-phase filter inductor module 103 to obtain the a-phase output voltage. u a b-phase output voltage u b c-phase output voltage u c .

[0038] The output current sampling module 202 samples the output current filtered by the three-phase filter inductor module 103 to obtain the output current of phase a. i a b-phase output current i b c-phase output current i c .

[0039] The first coordinate transformer 208 is used to receive the a-phase output voltage collected by the output voltage sampling module 201. u a b-phase output voltage u b c-phase output voltage u c And combined with the synchronization angle signal θ, output the d-axis voltage component u d q-axis voltage component u q α-axis voltage component u α β-axis voltage component u β .

[0040] The second coordinate transformer 210 is used to receive the a-phase output current collected by the output current sampling module 202. i a b-phase output current i bc-phase output current i c And combined with the synchronization angle signal θ Output d-axis current component i d q-axis current component i q α-axis current component i α β-axis current component i β .

[0041] Power calculation module 207, the power calculation module 207 is used to calculate the power based on the d-axis voltage component. u d q-axis voltage component u q d-axis current component i d q-axis current component i q Calculate the output active power P : In the formula, u d The voltage component along the d-axis. i d The current component is the d-axis component. i q For the q-axis current component, u q This represents the q-axis voltage component.

[0042] Virtual synchronous generator control module 206 is used to receive the active power output by power calculation module 207. P The active power-frequency control loop is retained, based on the active power output by the power calculation module 207. P Generate synchronization angle signal θ, This provides voltage and frequency support for grid-connected inverter systems, enabling grid-connected operation. Its core active power-frequency control is based on the rotor motion equations of a virtual synchronous generator, with the specific calculation formulas as follows: In the formula, P ref The active power reference value set for the system; P The active power output by the power calculation module; This refers to the actual output angular frequency of the virtual synchronous generator; ω n The rated operating angular frequency of the power grid; J The virtual moment of inertia set for the system; D The damping coefficient set for the system; θThis is the synchronization angle signal.

[0043] The collaborative current limiting and voltage balance control module 209 is used to receive the α-axis current component. β-axis current component Output positive sequence d-axis voltage reference u d,ref A hierarchical coordinated control strategy was implemented, which first reduces negative-sequence compensation and then lowers the positive-sequence reference when necessary. The positive-sequence d-axis voltage reference output by the coordinated current limiting and voltage balance control module 209 is... u d,ref The hierarchical integral regulation logic with conditional triggering and natural recovery is adopted, and its core calculation formula is as follows: In the formula, u d,ref0 This serves as the baseline positive sequence d-axis voltage reference under rated system operating conditions. k sag The preset positive-sequence derating gain. k limit The negative order compensation retention coefficient generated for collaborative control. This is the output current amplitude after processing with a moving average filter (MAF) with a window period of 20ms, i.e. , This is the preset rate limiting threshold.

[0044] The voltage outer loop-current inner loop positive sequence dual closed-loop module 205 is used to receive the d-axis voltage component output by the first coordinate transformer 208. u d q-axis voltage component u q The d-axis current component output by the second coordinate transformer 210 i d q-axis current component i q and the positive-sequence d-axis voltage reference output by the collaborative current limiting and voltage balance control module 209. u d,ref Generate d-axis positive sequence control quantity q-axis positive sequence control quantity This enables closed-loop regulation of the positive-sequence voltage amplitude and current, ensuring system voltage stability.

[0045] The first coordinate inverse transformer 204 is used to receive the positive sequence control quantity and the synchronization angle signal. θ Output positive sequence three-phase voltage reference .

[0046] Negative sequence suppression control module 211 is used to receive the α-axis voltage component output by the first coordinate transformer 208. u α β-axis voltage component u β Output α-axis negative sequence compensation control quantity u inj,α β-axis negative sequence compensation control quantity u inj,β .

[0047] As an example, the negative sequence suppression control module 211 may employ a complex vector proportional-integral (CPVI) complex domain negative sequence controller.

[0048] The second coordinate inverse transformer 212 is used to convert the α-axis negative sequence compensation control quantity output by the negative sequence suppression control module 211. u inj,α β-axis negative sequence compensation control quantity u inj,β Converted to three-phase negative sequence compensation voltage components u inj,abc .

[0049] Negative sequence compensation scaling module 213 is used to receive the three-phase negative sequence compensation voltage components. u inj,abc The negative sequence compensation retention coefficient output by the collaborative current limiting and voltage balance control module 209 k limit Output scaled negative sequence compensated voltage component The specific scaling formula is as follows: In the formula, , , This is the scaled three-phase negative sequence compensation voltage component; u inj,a , u inj,b , u inj,c The basic negative sequence compensated three-phase voltage component is output by the negative sequence suppression control module and obtained through inverse coordinate transformation.

[0050] The negative order compensation retention coefficient k limit The value range is constrained to between 0.05 and 1. By dynamically adjusting the output amplitude of the negative sequence compensation voltage, the amplitude of the negative sequence compensation command is ensured to be within the current limiting constraint range, thus avoiding current over-limit due to negative sequence compensation.

[0051] The superposition and normalization limiting control module 203 is used to superimpose the positive sequence three-phase voltage reference and the scaled negative sequence compensation voltage component. Superposition generates a modulation reference signal. u ref,abc .

[0052] Modulator module 215, modulator module 215 is used to receive modulation reference signal u ref,abc A sinusoidal pulse width modulation (SPWM) signal is obtained; As an example, modulator module 215 may employ a sinusoidal pulse width modulator.

[0053] Power switch driver module 214 is used to receive sinusoidal pulse width modulation signals and generate drive signals. It is used to control the operation of the three-phase inverter bridge module 102, drive the switching transistors of the three-phase inverter bridge module 102 to operate, and complete the power conversion.

[0054] Please see Figure 2 , Figure 2 This is a schematic diagram of the collaborative current limiting and voltage balance control module. Figure 2 As shown, Figure 1 The coordinated current limiting and voltage balance control module 209 is used to control the current based on the α-axis current component. β-axis current component Generate negative order compensation retention coefficient k limit and positive sequence d-axis voltage reference u d,ref This module includes: Output current amplitude calculation unit 2091 is used to receive the α-axis current component output by the second coordinate transformer 210. i α and β-axis current components i β Calculate the output current amplitude .

[0055] Specifically, the output current amplitude calculation unit 2091 uses a moving average filter with a window period of 20ms to smooth the current amplitude, thereby reducing the impact of second harmonic fluctuations on current limiting judgment under asymmetrical operating conditions. Output current amplitude It can be represented as: The underlined part represents the result of the moving average filtering.

[0056] The current limiting threshold setting unit 2092 is used to output a preset current limiting threshold. In this embodiment, the current limiting threshold is taken as the rated output current. 1.5 times, that is: Current over-limit deviation generation unit 2093 is used to generate current over-limit deviation based on the output current amplitude. and preset rate limiting threshold Generate current over-limit deviation Δ i Its expression is: when When this occurs, it indicates that the output current has exceeded the preset current limiting threshold; when If the output current does not exceed the preset current limiting threshold, it indicates that the output current has not exceeded the preset current limiting threshold.

[0057] Negative sequence compensation retention coefficient generation unit 2094 is used to generate the negative sequence compensation retention coefficient based on the current over-limit deviation Δ. i Generate negative order compensation retention coefficient k limit .

[0058] Specifically, when At that time, the control device 2 of the grid-type inverter system reduces the gain based on the current over-limit deviation. k attack The negative order compensation retention coefficient is adjusted linearly using a proportionality coefficient. k limit The rate of decrease, thereby reducing the amount of negative order compensation injection; when At that time, the preset recovery gain is used. k decay The step size is used to linearly recover the negative order compensation retention coefficients to the initial values.

[0059] Preferably, the negative order compensation retention coefficient k limit The range of values ​​for is limited to: when k limit When =1, the negative order compensation is fully retained; when k limit As the value gradually decreases, the negative order compensation is reduced proportionally; when... k limit When the value is close to 0, it indicates that the negative order compensation capacity has been basically eliminated.

[0060] Positive sequence derating trigger determination unit 2095 is used to determine the current over-limit deviation Δ based on the current over-limit deviation. i and negative order compensation retention coefficient k limit Generate positive-sequence derating trigger signal E n .

[0061] Specifically, the conditions for triggering a positive-order reduction in the amount are: That is, when the output current still exceeds the limit, and the negative sequence compensation retention factor is maintained. k limit When the derating rate has been reduced to or below the preset threshold, the positive sequence derating trigger determination unit 2095 outputs a positive sequence derating trigger signal. E n .

[0062] Positive sequence d-axis voltage reference generation unit 2096, the positive sequence d-axis voltage reference generation unit 2096 is used to receive the trigger signal. E n The current over-limit deviation Δ i and the basic positive sequence d-axis voltage reference u d,ref0 When the trigger signal is valid, the derating gain is reduced by a preset positive sequence. k sag The basic positive-sequence d-axis voltage reference is linearly reduced by a step size. u d,ref0 Generate positive-sequence d-axis voltage reference u d,ref The positive-sequence d-axis voltage reference u d,ref Output to Figure 1 The voltage outer loop-current inner loop positive sequence dual closed-loop module 205 in the middle, the k limit Output to Figure 1 The negative order compensation scaling module 213 in the middle.

[0063] It should be noted that, in this invention, the basic positive-sequence d-axis voltage reference u d,ref0 The derating is not the first priority control, but only serves as a backup protection mechanism when the negative sequence compensation capability is nearly exhausted. In other words, when the output current just begins to exceed the limit, this invention does not immediately reduce the reference base positive sequence d-axis voltage. u d,ref0 Instead, it prioritizes reducing the negative order compensation retention coefficient. k limit To reduce the intensity of negative order compensation; only when k limitOnly when the base positive sequence d-axis voltage reference has been reduced to the preset threshold but the output current still exceeds the limit will the base positive sequence d-axis voltage reference be further reduced. u d,ref0 This control priority is one of the key features that distinguishes this invention from existing technologies.

[0064] This invention also provides a control method for a grid-type inverter system; please refer to [link / reference]. Figure 3 , Figure 3 A flowchart of a control method for a grid-type inverter system is provided, including the following steps: Step S1: Collect the output voltage of phase a at the output terminal of the grid-connected inverter. u a b-phase output voltage u b c-phase output voltage u c and the output current of phase a i a b-phase output current i b c-phase output current i c ; Step S2, output voltage of phase a u a b-phase output voltage u b c-phase output voltage u c Perform coordinate transformation and power calculation to generate synchronization angle signal θ and α axis voltage components. u α β-axis voltage component u β ; Step S3, based on the synchronization angle signal θ Generate a basic positive-sequence d-axis voltage reference u d,ref0 The α-axis voltage component u α β-axis voltage component u β After negative sequence suppression and coordinate transformation, the three-phase negative sequence compensation voltage components are obtained. u inj,abc ; Step S4, output current for phase a i a b-phase output current i b c-phase output current i c Perform coordinate transformation and calculate the output current amplitude. The output current amplitude With the current limiting threshold The difference is taken to obtain the current over-limit deviation Δ. i ; Step S5: Determine if the output current exceeds the limit. If the current exceeds the limit, the deviation is... If the current exceeds the limit, proceed to step S6; Then proceed to step S8; Step S6: Use the preset recovery gain k decay Let the step size be the negative order compensation retention coefficient. k limit Linear recovery to the initial value; Step S7: Maintain the basic positive sequence d-axis voltage reference u d,ref0 The positive-sequence d-axis voltage reference remains unchanged. u d,ref That is, the basic positive sequence d-axis voltage reference u d,ref0， Proceed to step S11; Step S8: Based on the current over-limit deviation Δ i With preset shrinkage gain k attack The negative order compensation retention coefficient is adjusted linearly using a proportionality coefficient. k limit The rate of descent; Step S9: Determine the negative order compensation retention coefficient k limit Is it less than or equal to the preset threshold of 0.05? If so, proceed to step S7; Then proceed to step S10; Step S10: Set the preset positive-sequence derating gain as... k sag The step size linearly reduces the base positive sequence d-axis voltage reference. u d,ref0 Generate positive-sequence d-axis voltage reference u d,ref Proceed to step S12; Step S11: Utilize the negative order compensation retention coefficient k limit Three-phase negative sequence compensation voltage components u inj,abc Scaling is applied to the positive-sequence d-axis voltage reference. u d,ref The positive sequence three-phase voltage reference is obtained after positive sequence dual closed-loop regulation of the voltage outer loop and current inner loop and coordinate transformation. The three-phase negative sequence compensation voltage component u inj,abc Perform negative-sequence compensation scaling to generate negative-sequence compensation voltage components. The negative sequence compensation voltage component With positive sequence three-phase voltage reference Superimpose the signals to generate a modulation reference signal, and proceed to step S13; Step S12: Utilize the negative order compensation retention coefficient k limit Three-phase negative sequence compensation voltage components u inj,abc Scaling is applied to the positive-sequence d-axis voltage reference obtained after derating. u d,ref The positive sequence three-phase voltage reference is obtained after positive sequence dual closed-loop regulation of the voltage outer loop and current inner loop and coordinate transformation. The three-phase negative sequence compensation voltage component u inj,abc Perform negative-sequence compensation scaling to generate negative-sequence compensation voltage components. The negative sequence compensation voltage component With positive sequence three-phase voltage reference Superimpose the signals to generate a modulation reference signal, and proceed to step S13; Step S13: Normalize, limit, and perform sinusoidal pulse width modulation on the modulation reference signal to control the output of the grid-type inverter, and return to step S1.

[0065] Therefore, this invention clearly establishes two layers of judgment logic at the method flow level: the first layer of judgment is used to determine whether the output current exceeds the limit; the second layer of judgment is used to determine whether the negative sequence compensation retention coefficient has been reduced to a preset threshold. Through this two-layer judgment structure, the grid-type inverter system can prioritize current limiting by reducing negative sequence compensation under most asymmetrical operating conditions, without prematurely sacrificing positive sequence voltage support; under extreme asymmetrical operating conditions, it further activates positive sequence voltage reference derating to achieve self-protection and ensure operational safety.

[0066] In the first specific embodiment of the present invention, please refer to Figure 4 , Figure 4 The waveforms of the output current, output voltage, and control variables are shown when only complex vector proportional-integral (CPVI) negative sequence compensation is used, under the condition of t1=0.08s connection and t2=0.28s disconnection of the additional unbalanced load on phase A.

[0067] Phase A additional parallel resistor R a,add=3Ω, the grid-type inverter system has been put into operation with complex vector proportional-integral negative sequence compensation control and is running stably, but flexible current limiting has not been implemented. An additional unbalanced load is connected at t1=0.08s and disconnected at t2=0.28s. Under this condition, the complex vector proportional-integral complex domain negative sequence controller can compensate for the negative sequence component in the output voltage, thereby improving the output voltage imbalance to some extent. However, due to the lack of a coordinated current limiting mechanism, when an additional unbalanced load is connected to phase A, the injection of the negative sequence compensation voltage component will cause a significant increase in the output current, and the output current amplitude will... Exceeding the preset rate limiting threshold At this time, the negative order compensation retention coefficient k limit Always kept at 1, positive sequence d-axis voltage reference u d,ref Nothing changes.

[0068] This embodiment shows that although relying solely on complex vector proportional-integral negative sequence compensation can improve the output voltage balance, it will bring significant overcurrent risk under strong asymmetrical load conditions, making it difficult to simultaneously ensure voltage quality and current limiting safety.

[0069] In the second specific embodiment of the present invention, please refer to Figure 5 ,like Figure 5 The waveforms of the output current, output voltage, and control variables are shown when a complex vector proportional-integral controller and flexible current limiting are used in combination, under the conditions of t1=0.08s connection and t2=0.28s disconnection of the additional unbalanced load on phase A.

[0070] In this embodiment, a parallel resistor is added to phase A. R a,add =3Ω, the grid-type inverter system has been put into operation with complex vector proportional-integral and flexible current limiting coordinated control and is running stably, but the positive sequence derating branch has not been triggered. An additional unbalanced load is connected at t1=0.08s and disconnected at t2=0.28s. Under this operating condition, when the additional unbalanced load is connected to phase A, the output current amplitude is... Exceeding the rate limiting threshold The system detected an out-of-limit current deviation. Therefore, the negative sequence compensation retention coefficient should be reduced first based on the current over-limit deviation. k limit This causes the negative-sequence compensation voltage component to be reduced proportionally. Due to the negative-sequence compensation retention factor under this operating condition... k limit Although it has decreased significantly, it has not yet dropped to the preset threshold of 0.05, therefore the positive sequence d-axis voltage reference... u d,ref The value remains essentially unchanged. With the negative order compensation retention coefficient... k limitAs the voltage drops, the output current amplitude is suppressed to near the current limiting threshold, thus achieving current limiting without sacrificing the positive sequence voltage support capability.

[0071] When the unbalanced load on phase A is removed, the current exceeds the limit deviation Δ i When the value drops back to less than or equal to 0, the control network inverter system uses the recovery gain to retain the negative sequence compensation coefficient. k limit Recovery to the initial value. Since this invention does not include a separate positive-order reference recovery step, the recovery process after perturbation removal mainly relies on the negative-order compensation retention coefficient. k limit The smooth recovery and coordinated control logic are completed naturally, which can reduce the impact of control switching and improve the quality of recovery.

[0072] This embodiment illustrates that, under most moderately intense asymmetrical load conditions, the present invention can preferentially achieve current limiting by reducing negative sequence compensation without triggering positive sequence reference derating.

[0073] In the third specific embodiment of the present invention, please refer to Figure 6 , Figure 6 The waveforms of output current, output voltage, and control variables are shown when using complex vector proportional-integral, flexible current limiting, and positive sequence derating coordinated control, under the condition of triggering at t1=0.08s and clearing a severe asymmetrical fault at t2=0.28s.

[0074] In this embodiment, the system has implemented complex vector proportional-integral (CAP) control, flexible current limiting, and positive-sequence derating collaborative control, and is operating stably. This is achieved by adding a very small parallel resistor to phase A. The method approximates a single-phase short-circuit fault, triggering a severe asymmetrical fault at t1=0.08s and clearing the fault at t2=0.28s. Under this condition, after the severe asymmetrical fault occurs, the output current rises rapidly, and an over-limit current deviation is detected. First, reduce the negative order compensation retention coefficient. k limit This is to reduce the negative sequence compensation voltage component. However, since this fault condition is more severe, simply reducing the negative sequence compensation retention factor is not sufficient. k limit This is still insufficient to limit the output current within the safe threshold, therefore the negative sequence compensation retains the coefficient. k limit It continues to decrease and approaches the preset threshold. At this point, the current exceeds the limit deviation requirement. And negative order compensation retention coefficient Under the condition that the grid-connected inverter system triggers the positive-sequence d-axis voltage reference derating, reducing the positive-sequence d-axis voltage reference... u d,refThis further reduces the inverter's output voltage support level, thereby suppressing the output current.

[0075] Once the fault is cleared, the output current drops, the control system stops maintaining the over-limit state, and the negative sequence compensation retains the coefficient. k limit Gradually recovering; simultaneously, the positive-sequence d-axis voltage reference gradually recovers to normal levels during the coordinated control process. Because this invention does not include a separate positive-sequence reference recovery stage, therefore... Figure 6 The recovery process is still mainly completed naturally by the hierarchical coordination and control logic.

[0076] This embodiment illustrates that, under severe asymmetrical fault conditions, the present invention can further call upon the positive sequence voltage derating branch when the negative sequence compensation capability is nearly exhausted, forming a hierarchical protection current limiting mechanism that first reduces negative sequence compensation and then lowers the positive sequence reference, thereby taking into account both the device current limiting safety under extreme operating conditions and the recovery performance after the fault.

[0077] Without departing from the spirit and essence of the invention, the invention may also have the following optional embodiments: Firstly, the current limiting threshold is not limited to 1.5 times the rated output current. In other application scenarios, it can also be set to other preset values ​​according to the device's overcurrent tolerance, protection requirements, and grid-connected / off-grid operation mode.

[0078] Secondly, the asymmetrical operating condition is not limited to the A-phase additional parallel resistor, but can also be other single-phase additional load connection methods, single-phase short circuit approximation operating conditions, or more general three-phase unbalanced load operating conditions.

[0079] Third, the negative sequence controller is not limited to a complex vector proportional-integral controller or a complex vector proportional-integral complex domain negative sequence controller; it can also be other negative sequence suppression controllers that can generate negative sequence compensation voltage components. The modulation method is also not limited to sinusoidal pulse width modulation; other modulation methods suitable for inverter control can also be used without changing the core coordination logic of this invention.

[0080] Fourth, contraction gain k attack , restore gain k decay and positive sequence derating gain k sag Fixed parameters can be used, or adaptive adjustments can be made based on the output current amplitude, fault depth, or other operating status quantities. As long as the coordination logic of prioritizing the reduction of negative sequence compensation when the output current exceeds the limit and reducing the positive sequence reference when the negative sequence compensation retention coefficient reaches a preset threshold and the output current still exceeds the limit is still satisfied, it should be considered to fall within the protection scope of this invention.

[0081] In summary, this invention establishes a grid-type inverter system and its control device and method. It employs a hierarchical coordinated control strategy that first reduces negative-sequence compensation and then, when necessary, lowers the positive-sequence reference. This strategy enables the grid-type inverter to prioritize current limiting by reducing the amount of negative-sequence compensation injection when the output current just exceeds the current limiting threshold. Only when the negative-sequence compensation capability is nearly exhausted and the output current still exceeds the limit is the positive-sequence d-axis voltage reference further reduced. This approach maintains output voltage balance performance under most unbalanced load and unbalanced fault conditions, ensuring the current limiting safety and operational stability of the device.

[0082] Although the present invention has been disclosed above by way of embodiments, it is not intended to limit the present invention. Anyone skilled in the art can make some modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.

Claims

1. A control method for a grid-type inverter system, the grid-type inverter system comprising a grid-type inverter, wherein DC current is input to the input terminal of the grid-type inverter, and after conversion by a three-phase inverter bridge, three-phase output voltage and three-phase output current are output to the output terminal; characterized in that, The control method for the grid-type inverter system includes: Step S1: Collect the three-phase output voltage and three-phase output current at the output terminal of the grid-connected inverter; Step S4: Perform coordinate transformation on the three-phase output current, calculate the output current amplitude, and subtract the output current amplitude from the current limiting threshold to obtain the current over-limit deviation. Step S5: Determine whether the current limit deviation is greater than zero. If not, the current does not exceed the limit, and proceed to step S6; if yes, the current exceeds the limit, and proceed to step S8. Step S6: Using a preset recovery gain as the step size, linearly recover the negative sequence compensation retention coefficients to their initial values; Step S7: Keep the basic positive sequence d-axis voltage reference unchanged, and the output positive sequence d-axis voltage reference is the basic positive sequence d-axis voltage reference; Step S8: Based on the current over-limit deviation, linearly adjust the decreasing rate of the negative sequence compensation retention coefficient using a preset shrinkage gain as a proportional coefficient; Step S9: Determine whether the negative order compensation retention coefficient is less than or equal to a preset threshold; if not, proceed to step S7; if yes, proceed to step S10. Step S10: Using a preset positive-sequence derating gain as the step size, linearly reduce the basic positive-sequence d-axis voltage reference to generate a positive-sequence d-axis voltage reference.

2. The control method for a grid-type inverter system as described in claim 1, characterized in that, In step S4, the current component , The output current amplitude is obtained by coordinate transformation of the three-phase output current and is calculated according to the following formula: in, The output current amplitude, The α-axis current component is obtained by coordinate transformation of the three-phase output current. The β-axis current component is obtained by coordinate transformation of the three-phase output current. The overline indicates the moving average filtering result; the window period of the average filtering is 20ms. The current limiting threshold Take the rated output current 1.5 times, that is: ； The current over-limit deviation Δ i The expression is: 。 3. The control method for a grid-type inverter system as described in claim 2, characterized in that, The formula for calculating the positive-sequence d-axis voltage reference is as follows: In the formula, u d,ref0 This serves as the baseline positive sequence d-axis voltage reference under rated system operating conditions. k sag The preset positive-sequence derating gain. k limit Negative order compensation retention coefficients generated for collaborative control; The output current amplitude, This is the preset rate limiting threshold.

4. The control method for a grid-type inverter system as described in claim 1, characterized in that, Also includes: Step S2: Perform coordinate transformation and power calculation on the three-phase output voltage and the three-phase output current to generate a synchronization angle signal, α-axis voltage component, and β-axis voltage component; Step S3: Based on the synchronization angle signal, generate a basic positive sequence d-axis voltage reference, and perform negative sequence suppression and coordinate transformation on the α-axis voltage component and β-axis voltage component to obtain the three-phase negative sequence compensation voltage component.

5. The control method for a grid-type inverter system as described in claim 4, characterized in that, Also includes: Step S11: The negative sequence compensation voltage component is scaled using the negative sequence compensation retention coefficient. The scaled negative sequence compensation voltage component is superimposed on the positive sequence three-phase voltage reference to generate a modulation reference signal, and then proceeds to step S13. The positive sequence three-phase voltage reference is obtained by adjusting the positive sequence d-axis voltage reference output in step S7 through voltage outer loop-current inner loop positive sequence double closed loop adjustment and coordinate transformation. Step S12: The negative sequence compensation voltage component is scaled using the negative sequence compensation retention coefficient. The scaled negative sequence compensation voltage component is superimposed on the positive sequence three-phase voltage reference to generate a modulation reference signal, and then proceeds to step S13. The positive sequence three-phase voltage reference is obtained by adjusting the positive sequence d-axis voltage reference output in step S10 through voltage outer loop-current inner loop positive sequence double closed loop adjustment and coordinate transformation. Step S13: Normalize, limit, and perform sinusoidal pulse width modulation on the modulation reference signal to control the output of the grid-type inverter, and return to step S1.

6. A control device applied to a grid-type inverter system, the grid-type inverter system comprising a grid-type inverter, wherein the input terminal of the grid-type inverter receives DC power, which is converted by a three-phase inverter bridge, and the output terminal outputs three-phase output voltage and three-phase output current; characterized in that, The control device includes: The output voltage sampling module samples the three-phase output voltage; The output current sampling module samples the three-phase output current; A first coordinate transformer is used to receive the three-phase output voltage and output voltage components. The second coordinate transformer is used to receive the three-phase output current and output current components; A collaborative current limiting and voltage balance control module is used to receive the output current component and output a positive-sequence d-axis voltage reference. A power calculation module is used to calculate the output active power based on the voltage component and the current component. A virtual synchronous generator control module is used to receive the active power output by the power calculation module and generate a synchronization angle signal. The voltage outer loop-current inner loop positive sequence dual closed loop module is used to receive the voltage component output by the first coordinate transformer, the current component output by the second coordinate transformer, and the positive sequence d-axis voltage reference output by the collaborative current limiting and voltage balance control module, and generate positive sequence control quantity. The first coordinate inverse transformer is used to receive the positive sequence control quantity and the synchronization angle signal, and output a positive sequence three-phase voltage reference. A negative sequence suppression control module is used to receive the voltage component output by the first coordinate transformer and output a negative sequence compensation control quantity. The second coordinate inverse transformer is used to convert the negative sequence compensation control quantity output by the negative sequence suppression control module into a three-phase negative sequence compensation voltage component. The negative sequence compensation scaling module is used to receive the three-phase negative sequence compensation voltage components and the negative sequence compensation retention coefficient output by the collaborative current limiting and voltage balance control module, and output the scaled negative sequence compensation voltage components. The superposition and normalization limiting control module is used to superimpose the positive sequence three-phase voltage reference with the scaled negative sequence compensation voltage component to generate a modulation reference signal. A modulator module, wherein the modulator module is used to receive a modulation reference signal to obtain a sinusoidal pulse width modulation signal; A power switch driver module, wherein the power switch driver module is used to receive the sinusoidal pulse width modulation signal to generate a drive signal; The collaborative current limiting and voltage balance control module includes: The output current amplitude calculation unit uses a moving average smoothing filter to smooth the current amplitude. A current limiting threshold setting unit, wherein the current limiting threshold setting unit is used to output a preset current limiting threshold; The current over-limit deviation generation unit is used to generate current over-limit deviation based on the output current amplitude and the preset output current limiting threshold. A negative sequence compensation retention coefficient generation unit is used to generate a negative sequence compensation retention coefficient based on the current over-limit deviation. A positive-sequence derating trigger determination unit is used to generate a positive-sequence derating trigger signal based on the current over-limit deviation and the negative-sequence compensation retention coefficient. A positive-sequence d-axis voltage reference generation unit is used to receive the positive-sequence derating trigger signal, the current over-limit deviation, and the basic positive-sequence d-axis voltage reference. When the trigger signal is valid, the basic positive-sequence d-axis voltage reference is corrected to generate a positive-sequence d-axis voltage reference.

7. A grid-type inverter system, characterized in that, Including a grid-connected inverter, the grid-connected inverter comprising: The DC input filter module outputs DC power filtered by capacitors, which is then converted into three-phase instantaneous phase voltages by a three-phase inverter bridge module. These three-phase instantaneous phase voltages are then filtered by a three-phase filter inductor module and a three-phase filter capacitor module to provide three-phase output voltages for the unbalanced load network module. The grid-type inverter system further includes: a control device for sampling the output voltage and output current, and controlling the switching of the three-phase inverter bridge module; the control device executes the control method for the grid-type inverter system as described in any one of claims 1 to 5. Alternatively, the control device may be a control device as described in claim 6.

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