Dual mode of operation terahertz frequency multiplier

Abstract

The present application relates to the technical field of terahertz solid-state circuit, and particularly relates to a dual-working-mode terahertz frequency multiplier. Fixed frequency multiplication microstrip matching structures independently designed in two branches make a first target frequency and a second target frequency respectively around the respective branches to be optimized, thereby reducing the performance compromise brought by the same core matching network shared by different frequencies. The external impedance matching condition is adjusted through a detachable waveguide structure, so that the two working functions of single-branch high-efficiency frequency multiplication and double-branch collaborative output are realized on the same compact platform.

Description

Technical Field

[0001] This invention relates to the field of terahertz solid-state circuit technology, and more specifically to a dual-mode terahertz frequency multiplier. Background Technology

[0002] The terahertz local oscillator (LOO) is a core component of the terahertz solid-state transceiver link, and its performance largely determines the overall performance of the transceiver. When the operating frequency of the terahertz solid-state transceiver link is increased to the submillimeter-wave band, a high-power frequency multiplier is usually located in the front stage of the LOO link to provide sufficient drive power for the subsequent frequency multiplier, ensuring that the subsequent frequency multiplication process can proceed normally. Meanwhile, a narrowband high-efficiency frequency multiplier is usually located in the final stage of the LOO link. Its higher conversion efficiency helps reduce link power consumption and heat dissipation, which is of great significance for applications with strict power consumption and heat dissipation requirements, such as spaceborne and airborne applications.

[0003] Therefore, to adapt to different application requirements, frequency multipliers need to have high conversion efficiency near the target frequency while also providing high output capability in specific scenarios. Existing frequency multipliers mostly employ a fixed-matching structure, with their internal matching network typically designed around a single target frequency. When covering different frequencies, the fixed-matching structure struggles to maintain optimal matching at multiple frequencies simultaneously, easily leading to performance trade-offs. On the other hand, while traditional Y-junction power combining frequency multipliers can achieve high output power at a fixed frequency, their two branches typically require two independent frequency multiplier chips, resulting in increased transmission paths, higher transmission losses, and a larger overall size of the frequency multiplier module, hindering miniaturization and high integration.

[0004] Furthermore, Chinese invention patent application CN116722823A discloses a waveguide-reconfigurable multi-band terahertz frequency multiplier, which achieves multi-frequency output through a detachable waveguide structure. The key to this approach is achieving multiple frequency points by replacing the matching structure on one side, but different frequency points still share the same non-detachable core microstrip matching structure. Therefore, certain limitations remain when it is desired to obtain more fully optimized frequency multiplication performance for different frequency points, or to further achieve dual-branch coordinated output within the same frequency band. Summary of the Invention

[0005] To address the problems existing in the prior art, the present invention aims to propose a terahertz frequency multiplier with dual operating modes. On the one hand, it allows for the independent optimization of fixed frequency multiplication microstrip matching structures for different target frequencies; on the other hand, it adjusts the external impedance matching conditions through a detachable waveguide structure, thereby achieving both single-branch high-efficiency frequency multiplication and dual-branch coordinated output functions on the same compact platform.

[0006] The present invention adopts the following design process: (1) Design a fixed frequency multiplication microstrip matching structure optimized for the first target frequency point in the first frequency multiplication branch, and a corresponding detachable input waveguide matching circuit structure. (2) Design a fixed frequency multiplication microstrip matching structure optimized for the second target frequency point in the second frequency multiplication branch, and a corresponding detachable input waveguide matching circuit structure. (3) Design detachable waveguide filters for the operating frequency bands of the first and second harmonic branches, including detachable waveguide filters at the input and output ends; (3) By adjusting the structure of the detachable input waveguide matching circuit, the input impedance value is changed, and the detachable part of the branch in the cutoff state is replaced with a waveguide filter, so that the device can obtain high-efficiency output at the corresponding frequency point in single-branch mode. (4) In the dual-branch mode, by reconfiguring the detachable input waveguide matching circuit structure, the overall performance is compromised within the same frequency band, thereby achieving dual-branch coordinated output and obtaining a high-power output frequency multiplier. (5) By designing the layout of the three-dimensional electromagnetic model of the first Schottky diode, the first fixed microstrip matching circuit structure, the transition conversion structure between the first microstrip and the waveguide, the DC bias filter, the three-dimensional electromagnetic model of the second Schottky diode, the second fixed microstrip matching circuit structure, and the transition conversion structure between the second microstrip and the waveguide into a single chip, the overall structure volume is shortened and the system integration is improved.

[0007] To achieve the above objectives, the present invention adopts the following technical solution.

[0008] A dual-mode terahertz frequency multiplier, comprising a Y-junction power divider, a first frequency multiplication branch, a DC bias filter, a second frequency multiplication branch, a Y-junction power combiner, and a detachable waveguide filter; The first frequency doubling branch includes a first detachable input waveguide matching circuit structure, a first Schottky diode three-dimensional electromagnetic model, a first fixed microstrip matching circuit structure, a first microstrip-waveguide transition conversion structure, and a first detachable output waveguide matching circuit structure connected in sequence. The second frequency doubling branch includes a second detachable input waveguide matching circuit structure, a second Schottky diode three-dimensional electromagnetic model, a second fixed microstrip matching circuit structure, a second microstrip-waveguide transition conversion structure, and a second detachable output waveguide matching circuit structure connected in sequence. The DC bias filter is a low-pass filter, which is connected to both the first and second harmonic branches. It can simultaneously suppress harmonic signals of both the first and second harmonic branches, and achieve isolation between DC and radio frequency signals. The Y-junction power divider is used to couple the input fundamental signal to the first harmonic branch and / or the second harmonic branch; The Y-junction power combiner is used to output the frequency multiplied signal of the first frequency multiplier branch or the second frequency multiplier branch, or to combine the frequency multiplied signals of the first frequency multiplier branch and the second frequency multiplier branch for output.

[0009] The detachable waveguide filter includes an input detachable waveguide filter and an output detachable waveguide filter; When the terahertz frequency multiplier is operating in high-efficiency mode, the detachable waveguide filter replaces the detachable waveguide matching circuit in the cutoff branch to prevent the input signal or the frequency multiplication signal generated by the working branch from coupling to the non-working branch and reducing the frequency multiplication efficiency of the working branch.

[0010] The three-dimensional electromagnetic model of the first Schottky diode, the first fixed microstrip matching circuit structure, the first microstrip-waveguide transition structure, the DC bias filter, the three-dimensional electromagnetic model of the second Schottky diode, the second fixed microstrip matching circuit structure, and the second microstrip-waveguide transition structure are designed and arranged in a single chip. The DC bias filter is arranged in the middle as a common bias filter structure, with the first microstrip-waveguide transition structure and the second microstrip-waveguide transition structure connected to its two sides, respectively.

[0011] Compared with the scheme of sharing the same non-removable core microstrip matching structure for different frequency points, the present invention designs independent fixed frequency multiplier microstrip matching structures in two branches through an innovative architecture, so that the first target frequency point and the second target frequency point can be optimized around their respective branches, thereby reducing the performance trade-off caused by sharing the same core matching network for different frequency points.

[0012] Compared with traditional power combining frequency multipliers composed of two relatively independent frequency multiplier chips, this invention designs the frequency multiplier chips of the two branches on the same chip and shares the same bias filter structure, which helps to reduce transmission loss, shorten the overall structure size and improve integration. Attached Figure Description

[0013] Figure 1 This is a schematic diagram of a terahertz frequency multiplier with dual operating modes; Figure 2 This is a schematic diagram of a waveguide filter with a detachable input end; Figure 3 This is a schematic diagram of a waveguide filter with a detachable output end; Figure 4 This is a schematic diagram of a terahertz frequency multiplier chip with dual operating modes; Figure label: 1. Y-junction power divider; 2. First detachable input waveguide matching circuit structure; 3. Second detachable input waveguide matching circuit structure; 4. Three-dimensional electromagnetic model of the first Schottky diode; 5. Three-dimensional electromagnetic model of the second Schottky diode; 6. First fixed microstrip matching circuit structure; 7. Second fixed microstrip matching circuit structure; 8. DC bias filter; 9. First microstrip to waveguide transition structure; 10. Second microstrip to waveguide transition structure; 11. First detachable output waveguide matching circuit structure; 12. Second detachable output waveguide matching circuit structure; 13. Y-junction power combiner. Detailed Implementation

[0014] The technical solution of the present invention will be described in detail below with reference to the accompanying drawings and embodiments.

[0015] like Figure 1 and 4 As shown, a dual-mode terahertz frequency multiplier includes: 1. Y-junction power divider; 2. First detachable input waveguide matching circuit structure; 3. Second detachable input waveguide matching circuit structure; 4. Three-dimensional electromagnetic model of first Schottky diode; 5. Three-dimensional electromagnetic model of second Schottky diode; 6. First fixed microstrip matching circuit structure; 7. Second fixed microstrip matching circuit structure; 8. DC bias filter; 9. First microstrip to waveguide transition structure; 10. Second microstrip to waveguide transition structure; 11. First detachable output waveguide matching circuit structure; 12. Second detachable output waveguide matching circuit structure; 13. Y-junction power combiner.

[0016] In this invention, the first detachable input waveguide matching circuit structure 2, the first Schottky diode three-dimensional electromagnetic model 4, the first fixed microstrip matching circuit structure 6, the first microstrip and waveguide transition structure 9, and the first detachable output waveguide matching circuit structure 11, connected in sequence, are used as the first frequency doubling branch.

[0017] The second detachable input waveguide matching circuit structure 3, the second Schottky diode three-dimensional electromagnetic model 5, the second fixed microstrip matching circuit structure 7, the second microstrip and waveguide transition structure 10, and the second detachable output waveguide matching circuit structure 12, connected in sequence, are used as the second frequency doubling branch.

[0018] The first frequency doubling branch detachable waveguide structure (first detachable input waveguide matching circuit structure 2 and first detachable output waveguide matching circuit structure 11) and the second frequency doubling branch detachable waveguide structure (second detachable input waveguide matching circuit structure 3 and second detachable output waveguide matching circuit structure 12) are used to adjust the input matching impedance of the two frequency doubling branches to change the matching state of the two frequency doubling branches in different operating modes.

[0019] The Y-junction power divider 1, DC bias filter 8, and Y-junction power combiner 13 are common branches of two circuits. The input power distribution structure (Y-junction power divider) is used to couple the input fundamental signal to the first harmonic branch and / or the second harmonic branch. The output combining structure (Y-junction power combiner) is used to output the harmonic signal of one of the branches, or to combine the harmonic signals of the two branches. The common DC bias filter structure (DC bias filter) is connected to both the first harmonic branch and the second harmonic branch, and can simultaneously suppress the harmonic signals of the first harmonic branch and the second harmonic branch, thus achieving isolation between DC and RF signals.

[0020] In single-branch operation mode, the detachable waveguide filter replaces the detachable input waveguide matching circuit structure and the detachable output waveguide matching circuit structure in the cutoff branch with corresponding detachable waveguide filters (the first or second detachable input waveguide matching circuit structure is replaced with an input-side detachable waveguide filter, and the first or second detachable output waveguide matching circuit structure is replaced with an output-side detachable waveguide filter), preventing the input signal and the harmonic signal generated by the operating branch from coupling to the other branch. The input-side detachable waveguide filter is as follows: Figure 2 As shown, the output detachable waveguide filter is as follows: Figure 3 As shown, in order to enable the detachable waveguide filter and the detachable waveguide matching circuit structure to be interchangeable, the length of the detachable waveguide filter must be the same as that of the corresponding detachable waveguide matching circuit structure.

[0021] Based on the above structure, the following working modes can be achieved: (1) High-efficiency mode of the first harmonic branch alone: In the high-efficiency mode of the first frequency-doubling branch, its Schottky diode and frequency-doubling microstrip matching structure are operational. The detachable waveguide structure of the first frequency-doubling branch is configured as an input waveguide matching circuit structure, which is a matching circuit adapted to the first target frequency point, so that the first frequency-doubling branch achieves optimal or near-optimal frequency doubling efficiency near the first target frequency point. Simultaneously, the detachable waveguide structure of the second frequency-doubling branch is configured as a corresponding detachable waveguide filter to limit the second frequency-doubling branch from participating in fundamental wave transmission or coupling of frequency-doubled signals generated in the first frequency-doubling branch to the second frequency-doubling branch. In this mode, narrowband high-efficiency frequency-doubling output is achieved near the first target frequency point.

[0022] (2) High-efficiency mode of a separate second harmonic branch: In the high-efficiency mode of the second frequency-harmonic branch, its Schottky diode and frequency-harmonic microstrip matching structure are operational. The detachable waveguide structure of the second frequency-harmonic branch is configured as an input waveguide matching circuit structure, which is a matching circuit adapted to the second target frequency point to ensure that the second frequency-harmonic branch achieves optimal or near-optimal frequency-harmonic efficiency near the second target frequency point. Simultaneously, the detachable waveguide structure of the first frequency-harmonic branch is configured as a corresponding waveguide filter to limit the first frequency-harmonic branch from participating in fundamental wave transmission or from coupling the frequency-harmonic signals generated in the second frequency-harmonic branch to the first frequency-harmonic branch. In this mode, narrowband high-efficiency frequency-harmonic output is achieved near the second target frequency point.

[0023] (3) Dual-branch cooperative output mode: In the dual-branch cooperative output mode, the Schottky diodes and matching circuits of both the first and second frequency-doubling branches are operational. At this time, without altering the microstrip matching structure of the two branches, a compromise is achieved by reconfiguring either the first or second detachable waveguide structure to maintain the overall matching within the same operating frequency band. This allows both branches to operate simultaneously within the same frequency band. The input fundamental signal, after passing through the input power distribution structure, enters each of the two branches. After undergoing frequency doubling in each branch, the signals are synthesized and output through the output structure, thus realizing dual-branch cooperative output within a compact integrated structure.

[0024] It should be noted that the first and second target frequencies set in this invention are not arbitrarily selected, but should simultaneously fall within the effective single-mode operating frequency band of the waveguide corresponding to the Y-junction power divider. This is because the Y-junction power divider, as the common input coupling structure of two frequency-doubled branches, needs to maintain acceptable transmission loss, power distribution characteristics, and impedance matching at both the first and second target frequencies. Only when these conditions are met can the fixed frequency-doubled core matching structures optimized for different frequencies by the first and second frequency-doubled branches achieve effective excitation in a detachable waveguide matching state, and further achieve high-efficiency single-branch output or dual-branch collaborative output. Therefore, the first and second target frequencies should be limited to the waveguide operating frequency band of the Y-junction power divider.

[0025] Example 1: High-efficiency single-branch mode at the first target frequency Taking a frequency doubler with a first target frequency of 190GHz as an example, the microstrip matching structure corresponding to the first frequency doubler branch has been optimized for this frequency during the design phase. Its impedance value can achieve conjugate matching with the optimal embedding impedance of the output port of the Schottky diode's three-dimensional electromagnetic model. At this time, the harmonic signal generated by the Schottky diode can be transmitted to the transition structure between the microstrip and the waveguide with low transmission loss. Then, the detachable waveguide matching circuit structure of the first frequency doubler branch is configured to achieve conjugate matching with the input port of the Schottky diode's three-dimensional electromagnetic model, thereby achieving high-efficiency frequency doubler output near 190GHz. Simultaneously, both detachable waveguide structures in the second frequency doubler branch are configured as corresponding waveguide filter structures, keeping the second frequency doubler branch in the off state. It should be noted that to ensure the feasibility of replacing the detachable structure within the cavity structure, the length dimensions of all detachable structures are consistent.

[0026] Taking a frequency doubler with a second target frequency of 212 GHz as an example, the microstrip matching structure corresponding to the second frequency doubler branch has been optimized for this frequency during the design phase. Its impedance value can achieve conjugate matching with the optimal embedding impedance of the output port of the Schottky diode's three-dimensional electromagnetic model. At this time, the harmonic signal generated by the Schottky diode can be transmitted to the transition structure between the microstrip and the waveguide with low transmission loss. Then, the detachable waveguide matching circuit structure of the second frequency doubler branch is configured to achieve conjugate matching with the input port of the Schottky diode's three-dimensional electromagnetic model, thereby achieving high-efficiency frequency doubler output near 212 GHz. Simultaneously, the two detachable waveguide structures in the first frequency doubler branch are configured as corresponding waveguide filter structures, putting the first frequency doubler branch in a cutoff state. It should be noted that to ensure the feasibility of replacing the detachable structure in the cavity structure, the length dimensions of all detachable structures are consistent.

[0027] Dual-branch collaborative output mode: In dual-branch cooperative output mode, power combining frequency doublers operating at 190GHz or 212GHz can be formed respectively. The following explanation uses the 190GHz power combining frequency doubler as an example.

[0028] In this operating mode, the Schottky diodes and their corresponding matching circuits in the first and second frequency doubling branches operate simultaneously. The fixed microstrip matching circuit structure of the first frequency doubling branch is optimized for a 190GHz frequency point; the fixed microstrip matching circuit structure of the second frequency doubling branch is optimized for a 212GHz frequency point. Therefore, when the device operates in 190GHz power combining mode, although the second frequency doubling branch is not at its optimal design frequency, it does not affect its normal frequency doubling operation; only the conversion efficiency decreases compared to the optimal operating state. To reduce the performance degradation, the impedance matching state can be adjusted by reconfiguring the two detachable waveguide structures of the second frequency doubling branch, allowing the second frequency doubling branch to still achieve relatively high output power near 190GHz. This situation, where the device can still operate normally at a non-optimal design frequency point but with some performance changes, is also described in the technical solution disclosed in Chinese invention patent application CN116722823A.

[0029] Furthermore, to achieve effective synthesis of the dual-branch output signals, this invention employs a coordinated design of the phase relationship between the two branches. The second harmonic signals generated by the frequency multipliers in the first and second frequency multipliers satisfy the in-phase superposition condition at the synthesis end. Specifically, the fixed microstrip matching circuits in the two branches adopt a mirror structure, and the phase difference introduced by the circuit compensates for the inherent phase difference between the two branches of the Y-junction, thereby ensuring that the second harmonic signals reaching the output end are in phase, achieving power synthesis output.

[0030] In the above implementation examples, the first and second frequency-doubling branches share the same bias filter structure. This bias filter structure is connected to both branches via a common bias terminal, enabling filtering of 190GHz and 212GHz signals, thereby achieving DC and RF isolation. The above analysis demonstrates the feasibility of this invention.

[0031] All aspects not described in detail in this invention can be covered using conventional technical knowledge in the field.

[0032] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to the embodiments, those skilled in the art should understand that modifications or equivalent substitutions to the technical solutions of the present invention do not depart from the spirit and scope of the technical solutions of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.

Claims

1. A dual-mode terahertz frequency multiplier, characterized in that, The terahertz frequency multiplier includes a Y-junction power divider, a first frequency multiplication branch, a DC bias filter, a second frequency multiplication branch, a Y-junction power combiner, and a detachable waveguide filter. The first frequency doubling branch includes a first detachable input waveguide matching circuit structure, a first Schottky diode three-dimensional electromagnetic model, a first fixed microstrip matching circuit structure, a first microstrip-waveguide transition conversion structure, and a first detachable output waveguide matching circuit structure connected in sequence. The second frequency doubling branch includes a second detachable input waveguide matching circuit structure, a second Schottky diode three-dimensional electromagnetic model, a second fixed microstrip matching circuit structure, a second microstrip-waveguide transition conversion structure, and a second detachable output waveguide matching circuit structure connected in sequence. The DC bias filter is connected to both the first and second harmonic branches, which can simultaneously suppress harmonic signals of both the first and second harmonic branches, and achieve isolation between DC and radio frequency signals. The Y-junction power divider is used to couple the input fundamental signal to the first harmonic branch and / or the second harmonic branch; the Y-junction power combiner is used to output the harmonic signal of the first harmonic branch or the second harmonic branch, or to combine the harmonic signals of the first harmonic branch and the second harmonic branch for output. The detachable waveguide filter is used to replace the detachable waveguide matching circuit structure in the cutoff frequency multiplication branch when the terahertz frequency multiplier is operating in a high-efficiency single-branch mode.

2. The dual-mode terahertz frequency multiplier according to claim 1, characterized in that, The three-dimensional electromagnetic model of the first Schottky diode, the first fixed microstrip matching circuit structure, the first microstrip-waveguide transition structure, the DC bias filter, the three-dimensional electromagnetic model of the second Schottky diode, the second fixed microstrip matching circuit structure, and the second microstrip-waveguide transition structure are all designed and arranged in a single chip. The DC bias filter is arranged in the middle as a common bias filter structure, with the first microstrip-waveguide transition structure and the second microstrip-waveguide transition structure connected to its two sides, respectively.

3. The dual-mode terahertz frequency multiplier according to claim 1, characterized in that, The detachable waveguide filter includes an input detachable waveguide filter and an output detachable waveguide filter. The input detachable waveguide filter is used to replace a first detachable input waveguide matching circuit structure or a second detachable input waveguide matching circuit structure; the output detachable waveguide filter is used to replace a first detachable output waveguide matching circuit structure or a second detachable output waveguide matching circuit structure.

4. The dual-mode terahertz frequency multiplier according to claim 1, characterized in that, The dual working modes include: Single-branch operating mode: (1) High-efficiency mode of the first harmonic branch alone: In the high-efficiency mode of the first frequency-doubled branch, the Schottky diode and the frequency-doubled microstrip matching structure of the first frequency-doubled branch are in operation. The detachable waveguide structure of the first frequency-doubled branch is configured as an input waveguide matching circuit structure, which is a matching circuit adapted to the first target frequency point, so that the first frequency-doubled branch achieves the optimal or near-optimal frequency-doubled efficiency near the first target frequency point. At the same time, the detachable waveguide structure of the second frequency-doubled branch is configured as a corresponding detachable waveguide filter to limit the second frequency-doubled branch from participating in the fundamental wave transmission or coupling the frequency-doubled signal generated in the first frequency-doubled branch to the second frequency-doubled branch. (2) High-efficiency mode of a separate second harmonic branch: In the high-efficiency mode of the second frequency-harmonic branch, the Schottky diode and the frequency-harmonic microstrip matching structure of the second frequency-harmonic branch are in operation. The detachable waveguide structure of the second frequency-harmonic branch is configured as an input waveguide matching circuit structure, which is a matching circuit adapted to the second target frequency point so that the second frequency-harmonic branch achieves the optimal or near-optimal frequency-harmonic efficiency near the second target frequency point. At the same time, the detachable waveguide structure of the first frequency-harmonic branch is configured as a corresponding waveguide filter to limit the participation of the first frequency-harmonic branch in fundamental wave transmission or the coupling of the frequency-harmonic signal generated in the second frequency-harmonic branch to the first frequency-harmonic branch. Dual-branch collaborative output mode: In the dual-branch cooperative output mode, the Schottky diodes and matching circuits of the first and second frequency-doubling branches are both in operation. At this time, without changing the microstrip matching structure of the two branches, the first or second detachable waveguide structure is reconfigured to achieve a compromise in the overall matching state within the same operating frequency band, thereby enabling the two branches to operate simultaneously within the same frequency band. The input fundamental signal enters the two branches after passing through the input power distribution structure. After undergoing frequency doubling in the two branches, the signals are synthesized and output through the output structure.

5. The dual-mode terahertz frequency multiplier according to claim 4, characterized in that, The first and second target frequencies should both fall within the effective operating frequency band of the waveguide single-mode corresponding to the Y-junction power divider.

6. The dual-mode terahertz frequency multiplier according to claim 1, characterized in that, The length of the detachable waveguide filter is the same as the length of the detachable input waveguide matching circuit structure or the detachable output waveguide matching circuit structure.

7. The dual-mode terahertz frequency multiplier according to claim 1, characterized in that, The fixed microstrip matching circuit in the two frequency doubling branches adopts a mirror structure. The phase difference introduced by it compensates for the inherent phase difference between the two branches of the Y-junction, so that the second harmonic signal reaching the output end is in phase and achieves power synthesis output.

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