Radio frequency switch chip and radio frequency front end module

Abstract

The application discloses a radio frequency switch chip and a radio frequency front-end module. The radio frequency switch chip comprises a first switch unit and a second switch unit. The first switch unit is connected between at least one input port and at least one output port. The second switch unit comprises a first ground switch and a second ground switch. The first ground switch is connected between a first output port and a first ground port to form a first ground path. The second ground switch is connected between the first output port and the first ground port to form a second ground path. The first output port and the first ground port are both located on a first axis, and the first ground switch and the second ground switch are arranged on two sides of the first axis. The existence of the first ground switch and the second ground switch can form two electrostatic signal discharge paths, thereby improving the ESD capability of the radio frequency switch chip.

Description

Technical Field

[0001] This application relates to the field of radio frequency technology, and more specifically, to a radio frequency switch chip and a radio frequency front-end module. Background Technology

[0002] Currently, radio frequency (RF) front-end modules are widely used in wireless communication, the Internet of Things (IoT), smart homes, and other fields. They can process RF signals (e.g., power amplification, filtering, etc.) to complete the tasks of receiving and transmitting RF signals.

[0003] In the radio frequency (RF) front-end module, the RF switch chip is an important component. It is used to switch the transmission of RF signals in different frequency bands, ensuring the normal operation of all chips and components in the RF front-end module.

[0004] However, existing RF switch chips have the problem of poor electrostatic discharge capability. Summary of the Invention

[0005] This application provides an embodiment of an RF switch chip and an RF front-end module.

[0006] According to a first aspect of this application, an embodiment of this application provides a radio frequency (RF) switch chip. The RF switch chip has at least one input port, at least one output port, and at least one ground port. The at least one output port includes a first output port, and the at least one ground port includes a first ground port. The RF switch chip includes a first switch unit and a second switch unit. The first switch unit is connected between the at least one input port and the at least one output port, and is used to connect or disconnect a signal path between the at least one input port and the at least one output port. The second switch unit includes a first ground switch and a second ground switch. The first ground switch is connected between the first output port and the first ground port to form a first ground path; the second ground switch is connected between the first output port and the first ground port to form a second ground path. The first output port and the first ground port are both located on a first axis, and the first ground switch and the second ground switch are respectively disposed on opposite sides of the first axis.

[0007] This application provides a radio frequency switch chip, in which two parallel grounding switches (i.e., a first grounding switch and a second grounding switch) are provided between a first output port and a first grounding port of the radio frequency switch chip. The first grounding switch is located on a first grounding path between the first output port and the first grounding port, and the second grounding switch is located on a second grounding path between the first output port and the first grounding port.

[0008] Therefore, the first output port in this application is grounded through a "double ground switch". On the one hand, the presence of the first ground switch and the second ground switch can form two electrostatic discharge paths, thereby improving the electrostatic discharge (ESD) capability of the RF switch chip, enabling the RF switch chip to be used in scenarios with higher IEC performance requirements, thereby improving the market competitiveness of the RF switch chip.

[0009] On the other hand, compared to the "single-to-ground switch" grounding method in related technologies, although this application increases the number of grounding switches, the chip area occupied by the two grounding switches is almost the same as, or even smaller than, that occupied by the single-to-ground switch. Furthermore, the two grounding switches can be more flexibly placed on the RF switch chip's layout, improving the utilization efficiency of the chip layout without increasing the additional chip layout area.

[0010] Furthermore, the first output port and the first ground port together define the first axis, and the first ground switch and the second ground switch are respectively set on both sides of the first axis. This makes the overall layout of the RF switch chip more compact and reasonable, and also makes the path lengths of the two ground paths (i.e., the first ground path and the second ground path) approximately equal, so that static electricity can be uniformly discharged through the two ground paths, thereby optimizing the static electricity discharge capability.

[0011] According to a second aspect of this application, embodiments of this application also provide a radio frequency (RF) switch chip. The RF switch chip has at least one input port, at least one output port, and at least one ground port. The at least one output port includes a first output port, and the at least one ground port includes a first ground port. The RF switch chip includes a first switch unit and a second switch unit. The first switch unit is connected between the at least one input port and the at least one output port, and is used to connect or disconnect a signal path between the at least one input port and the at least one output port. The second switch unit includes a first ground switch and a second ground switch. The first ground switch is connected between the first output port and the first ground port to form a first ground path; the second ground switch is connected between the first output port and the first ground port to form a second ground path; wherein the absolute value of the difference between the total resistance of the components on the first ground path and the total resistance of the components on the second ground path is less than or equal to a specified resistance value.

[0012] This application also provides a radio frequency switch chip, wherein two parallel grounding switches (i.e., a first grounding switch and a second grounding switch) are provided between a first output port and a first grounding port of the radio frequency switch chip. The first grounding switch is located on a first grounding path between the first output port and the first grounding port, and the second grounding switch is located on a second grounding path between the first output port and the first grounding port.

[0013] Therefore, the first output port in this application is grounded through a "double ground switch". On the one hand, the presence of the first ground switch and the second ground switch can form two electrostatic discharge paths, thereby improving the ESD capability of the RF switch chip and enabling the RF switch chip to be used in scenarios with higher IEC performance requirements, thereby improving the market competitiveness of the RF switch chip.

[0014] On the other hand, compared to the "single-to-ground switch" grounding method in related technologies, although this application increases the number of grounding switches, the chip area occupied by the two grounding switches is almost the same as, or even smaller than, that occupied by the single-to-ground switch. Furthermore, the two grounding switches can be more flexibly placed on the RF switch chip's layout, improving the utilization efficiency of the chip layout without increasing the additional chip layout area.

[0015] Furthermore, the absolute value of the difference between the total resistance of the components on the first grounding path and the total resistance of the components on the second grounding path is less than or equal to the specified resistance value. In other words, the overall resistance to ground of the first grounding path and the overall resistance to ground of the second grounding path are approximately equal. Ideally, the overall resistance to ground of the two grounding paths are equal, that is, the specified resistance value is 0.

[0016] It's easy to understand that if the overall resistance to ground of the two grounding paths differs significantly, static electricity will preferentially choose the grounding path with the lower resistance for discharge, causing the other grounding path to fail and thus greatly reducing the static discharge capacity. Therefore, when the overall resistance to ground of the two grounding paths is approximately equal, static electricity can be discharged evenly through both grounding paths, optimizing the static discharge capacity.

[0017] According to a third aspect of this application, embodiments of this application also provide a radio frequency (RF) switch chip. The RF switch chip includes a first input port, a second input port, a first output port, a second output port, a first ground port, and a second ground port. The RF switch chip includes a first switch unit, a second switch unit, and a third switch unit. The first switch unit includes a first switch, a second switch, a third switch, and a fourth switch. The first switch is connected between the first input port and the first output port; the second switch is connected between the second input port and the first output port; the third switch is connected between the first input port and the second output port; and the fourth switch is connected between the second input port and the second output port. The second switch unit includes a first ground switch and a second ground switch. The first ground switch is connected between the first output port and the first ground port to form a first ground path; and the second ground switch is connected between the first output port and the first ground port to form a second ground path. The third switch unit includes a third ground switch and a fourth ground switch. The third ground switch is connected between the second output port and the second ground port to form a third ground path; and the fourth ground switch is connected between the second output port and the second ground port to form a fourth ground path.

[0018] This application provides a radio frequency switch chip with two input ports, two output ports and two ground ports. That is, the radio frequency switch chip adopts a "dual-input, dual-output" switching circuit architecture.

[0019] Specifically, two parallel grounding switches (i.e., a first grounding switch and a second grounding switch) are provided between the first output port and the first grounding port of the RF switch chip. The first grounding switch is located on the first grounding path between the first output port and the first grounding port, and the second grounding switch is located on the second grounding path between the first output port and the first grounding port.

[0020] Therefore, the first output port in this application is grounded via a "dual ground switch". On one hand, the presence of the first and second ground switches creates two electrostatic discharge paths, thereby improving the ESD capability of the RF switch chip and enabling it to be used in scenarios with higher IEC performance requirements, thus enhancing its market competitiveness. On the other hand, compared to the "single ground switch" grounding method in related technologies, although this application increases the number of ground switches, the chip area occupied by the two ground switches is almost unchanged, or even smaller, than that occupied by the single ground switch. Furthermore, the first and second ground switches can be more flexibly placed on the RF switch chip layout, improving the utilization efficiency of the chip layout without increasing the chip layout area.

[0021] Similarly, two parallel grounding switches (i.e., a third grounding switch and a fourth grounding switch) are provided between the second output port and the second grounding port of the RF switch chip. The third grounding switch is located on the third grounding path between the second output port and the second grounding port, and the fourth grounding switch is located on the fourth grounding path between the second output port and the second grounding port.

[0022] Therefore, the second output port in this application is grounded via a "dual ground switch" method. On one hand, the presence of the third and fourth ground switches creates two electrostatic discharge paths, thereby enhancing the ESD capability of the RF switch chip and enabling it to be used in scenarios with higher IEC performance requirements, thus improving its market competitiveness. On the other hand, compared to the "single ground switch" grounding method in related technologies, although this application increases the number of ground switches, the chip area occupied by the two ground switches is almost unchanged, or even smaller, than that occupied by the single ground switch. Furthermore, the third and fourth ground switches can be more flexibly placed on the RF switch chip layout, improving the utilization efficiency of the chip layout without increasing the chip layout area.

[0023] According to a fourth aspect of this application, embodiments of this application also provide a radio frequency (RF) front-end module, which includes a substrate, an RF switch chip, and a power amplifier chip. The substrate has at least one antenna port. The RF switch chip is disposed on the substrate and has at least one input port, at least one output port, and at least one ground port. The at least one output port and the at least one antenna port are connected in a one-to-one correspondence. The at least one output port includes a first output port, and the at least one ground port includes a first ground port. The RF switch chip includes a first switching unit and a second switching unit. The first switching unit is connected between the at least one input port and the at least one output port, and is used to connect or disconnect the signal path between the at least one input port and the at least one output port. The second switching unit includes a first ground switch and a second ground switch. The first ground switch is connected between the first output port and the first ground port to form a first ground path; the second ground switch is connected between the first output port and the first ground port to form a second ground path. The power amplifier chip is disposed on the substrate, and its output terminal is connected to the input port.

[0024] This application provides an RF front-end module in which two parallel grounding switches (i.e., a first grounding switch and a second grounding switch) are provided between a first output port and a first grounding port of an RF switch chip. The first grounding switch is located on a first grounding path between the first output port and the first grounding port, and the second grounding switch is located on a second grounding path between the first output port and the first grounding port.

[0025] Therefore, the first output port in this application is grounded through a "double ground switch". On the one hand, the presence of the first ground switch and the second ground switch can form two electrostatic discharge paths, thereby improving the ESD capability of the RF switch chip and enabling the RF switch chip to be used in scenarios with higher IEC performance requirements, so as to improve the market competitiveness of the RF front-end module.

[0026] On the other hand, compared to the "single-to-ground switch" grounding method in related technologies, although this application increases the number of grounding switches, the chip area occupied by the two grounding switches is almost the same as, or even smaller than, that occupied by the single-to-ground switch. Furthermore, the two grounding switches can be more flexibly placed on the RF switch chip's layout, improving the utilization efficiency of the chip layout without increasing the additional chip layout area.

[0027] Furthermore, the output terminal of the power amplifier chip is connected to the input port, and the output port is connected to the antenna port, indicating that the RF switch chip is an antenna switch chip used in the transmit path (TX). Therefore, this application improves the IEC performance and ESD capability of the RF switch chip, enabling the electrostatic discharge at the antenna port to be quickly discharged through the RF switch chip, thereby preventing electrostatic damage to the internal components of the RF front-end module (e.g., the power amplifier chip) and ensuring the operational reliability of the RF front-end module.

[0028] According to a fifth aspect of this application, embodiments of this application also provide a radio frequency (RF) front-end module, which includes a substrate, an RF switch chip, and a low-noise amplifier chip. The substrate has at least one antenna port. The RF switch chip is disposed on the substrate and has at least one input port, at least one output port, and at least one ground port. The at least one input port and the at least one antenna port are connected in a one-to-one correspondence. The at least one output port includes a first output port, and the at least one ground port includes a first ground port. The RF switch chip includes a first switching unit and a second switching unit. The first switching unit is connected between the at least one input port and the at least one output port, and is used to connect or disconnect the signal path between the at least one input port and the at least one output port. The second switching unit includes a first ground switch and a second ground switch. The first ground switch is connected between the first output port and the first ground port to form a first ground path; the second ground switch is connected between the first output port and the first ground port to form a second ground path. The low-noise amplifier chip is disposed on the substrate, and its input terminal and output port are connected.

[0029] This application provides an RF front-end module in which two parallel grounding switches (i.e., a first grounding switch and a second grounding switch) are provided between a first output port and a first grounding port of an RF switch chip. The first grounding switch is located on a first grounding path between the first output port and the first grounding port, and the second grounding switch is located on a second grounding path between the first output port and the first grounding port.

[0030] Therefore, the first output port in this application is grounded through a "double ground switch". On the one hand, the presence of the first ground switch and the second ground switch can form two electrostatic discharge paths, thereby improving the ESD capability of the RF switch chip and enabling the RF switch chip to be used in scenarios with higher IEC performance requirements, so as to improve the market competitiveness of the RF front-end module.

[0031] On the other hand, compared to the "single-to-ground switch" grounding method in related technologies, although this application increases the number of grounding switches, the chip area occupied by the two grounding switches is almost the same as, or even smaller than, that occupied by the single-to-ground switch. Furthermore, the two grounding switches can be more flexibly placed on the RF switch chip's layout, improving the utilization efficiency of the chip layout without increasing the additional chip layout area.

[0032] Furthermore, the input and output ports of the low-noise amplifier chip are connected, and the input port is connected to the antenna port, indicating that the RF switch chip is an antenna switch chip used in the receive path (RX). Therefore, this application improves the IEC performance and ESD capability of the RF switch chip, enabling the electrostatic discharge at the antenna port to be quickly discharged through the RF switch chip, thereby preventing electrostatic damage to the internal components of the RF front-end module (e.g., the low-noise amplifier chip) and ensuring the operational reliability of the RF front-end module. Attached Figure Description

[0033] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0034] Figure 1 This is a schematic diagram of the structure of a radio frequency switch chip provided in an embodiment of this application.

[0035] Figure 2 This is a schematic diagram of the structure of a radio frequency switch chip in related technologies.

[0036] Figure 3 yes Figure 1 The diagram shows a cross-sectional view of the RF switch chip.

[0037] Figure 4 This is another structural schematic diagram of the radio frequency switch chip provided in the embodiments of this application.

[0038] Figure 5 yes Figure 4 The circuit structure diagram of the radio frequency switch chip is shown.

[0039] Figure 6 yes Figure 4 The diagram shows the structure of the switch in the RF switch chip.

[0040] Figure 7 This is a schematic diagram of a radio frequency front-end module provided in an embodiment of this application.

[0041] Figure 8 This is another structural schematic diagram of the radio frequency front-end module provided in the embodiments of this application. Detailed Implementation

[0042] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are merely some embodiments of the present application, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present application without creative effort are within the scope of protection of the present application.

[0043] This application provides an embodiment of a radio frequency (RF) switch chip 100, which is a device used to control the on and off of RF signal branches. It is responsible for rapidly switching RF devices such as filters, power amplifiers, and low-noise amplifiers between different frequency bands, modes, or functions to ensure the normal operation of the RF front-end module. Specifically, the RF switch chip 100 can be a silicon-on-insulator (SOI) chip, a complementary metal-oxide-semiconductor (CMOS) chip, a gallium arsenide (GaAs) chip, etc., and this embodiment does not impose a specific limitation.

[0044] Please see Figure 1 The radio frequency switch chip 100 has at least one input port 12, at least one output port 14 and at least one ground port 16. The ground port 16 is used for grounding. The radio frequency signal is input through the input port 12 and output through the output port 14.

[0045] As an example, the number of input ports 12 can be one or more.

[0046] As an example, the number of output ports 14 can be one or more, and at least one output port 14 includes a first output port 141. For example, when the number of output ports 14 is one, the output port 14 can be... Figure 1 The first output port 141 is provided. When there are multiple output ports 14, the output ports 14 may include the first output port 141 and other output ports. This embodiment does not limit this.

[0047] As an example, the number of grounding ports 16 can be one or more, and at least one grounding port 16 includes a first grounding port 161. For example, when the number of grounding ports 16 is one, the grounding port 16 can be... Figure 1 The first grounding port 161 is provided. When there are multiple grounding ports 16, the grounding ports 16 may include the first grounding port 161 and other grounding ports. This embodiment does not limit this.

[0048] In this embodiment, the radio frequency switch chip 100 may include a first switch unit 20 and a second switch unit 30. The first switch unit 20 is connected between at least one input port 12 and at least one output port 14, and is used to turn on or off the signal path between at least one input port 12 and at least one output port 14.

[0049] In this embodiment, the second switching unit 30 may include a first grounding switch S1 and a second grounding switch S2. The first grounding switch S1 is connected between the first output port 141 and the first grounding port 161 to form a first grounding path W1. The second grounding switch S2 is connected between the first output port 141 and the first grounding port 161 to form a second grounding path W2.

[0050] Therefore, in this embodiment, the first output port 141 is grounded through a "dual ground switch". On the one hand, the presence of the first ground switch S1 and the second ground switch S2 can form two electrostatic discharge paths, thereby improving the electrostatic discharge (ESD) capability of the RF switch chip 100, so that the RF switch chip 100 can be applied in scenarios with higher IEC performance requirements, thereby improving the market competitiveness of the RF switch chip 100.

[0051] On the other hand, compared to the "single-to-ground switch" grounding method in related technologies, although this embodiment increases the number of grounding switches, the chip area occupied by the two grounding switches is almost unchanged, or even smaller, compared to the chip area occupied by the single-to-ground switch. Furthermore, the two grounding switches can be more flexibly arranged on the chip layout of the RF switch chip 100, improving the utilization efficiency of the chip layout without increasing the chip layout area.

[0052] Please see Figure 2 It shows the chip layout of the radio frequency switch chip 100 in the related art. Figure 2 In the circuit, there are two input ports 12, namely the first input port 121 and the second input port 123; there are two output ports 14, namely the first output port 141 and the second output port 143; and there are two ground ports 16, namely the first ground port 161 and the second ground port 163. It is easy to see that the RF switch chip 100 adopts a "dual-input, dual-output" switching circuit architecture. Of course, Figure 2 This is merely illustrative; the RF switch chip 100 in the related technology can also adopt other switch circuit architectures, such as a "single input, single output" architecture.

[0053] Specifically Figure 2 In this design, the first output port 141 and the second output port 143 are grounded using a single-to-ground switch method. The first output port 141 is connected to the first ground port 161 via a first grounding sub-switch S01, and the second output port 143 is connected to the second ground port 163 via a second grounding sub-switch S02. Furthermore, to ensure the IEC performance of the RF switch chip 100, the first grounding sub-switch S01 and the second grounding sub-switch S02 need to be of relatively large size to ensure good electrostatic discharge capability.

[0054] Specifically, compared to Figure 1 The first grounding switch S1 and the second grounding switch S2 in the middle, Figure 2 The first grounding switch S01 and the second grounding switch S02 are larger in size in the first direction X, thus occupying more chip layout area. Here, the first direction X is the extension direction of the first axis L1. Furthermore, Figure 2 The RF switch chip 100 in the chip also has certain blank areas in the layout (e.g., areas Z1 and Z2), which leads to low utilization efficiency of the chip layout.

[0055] To address the aforementioned issues, the inventors of this application propose a "dual grounding switch" grounding method. On one hand, by placing two parallel grounding switches between the first output port 141 and the first grounding port 161, the electrostatic discharge pressure of a single grounding switch can be alleviated. Furthermore, although the number of grounding switches increases, the chip area occupied by the two grounding switches remains almost unchanged, or even smaller, compared to the chip area occupied by a single grounding switch. On the other hand, the two grounding switches can be more flexibly positioned on the chip layout of the RF switch chip 100. For example, one grounding switch can be placed in a blank area Z1 of the layout, thereby improving the utilization efficiency of the chip layout without increasing the chip layout area.

[0056] It is easy to understand that in this embodiment, "first grounding switch S1 and second grounding switch S2" are used instead of Figure 2 Due to the improved electrostatic discharge capability, the size of the first grounding switch S01 or the second grounding switch S2 can be reduced to half or even less than the size of the first grounding switch S01. That is, the chip area occupied by the two grounding switches is almost the same as, or even smaller than, the chip area occupied by a single grounding switch.

[0057] Furthermore, the first output port 141 and the first ground port 161 are both located on the first axis L1, and the first ground switch S1 and the second ground switch S2 are respectively set on both sides of the first axis L1. This makes the overall layout of the RF switch chip 100 more compact and reasonable, and also makes the path lengths of the two ground paths (i.e., the first ground path W1 and the second ground path W2) approximately equal, so that static electricity can be uniformly discharged through the two ground paths, thereby optimizing the static electricity discharge capability.

[0058] It should be noted that "first axis L1" is a virtual axis. "Port XX is located on first axis L1" can be understood as the center point of port XX being located on first axis L1; or it can be that the center point of port XX is off-center from first axis L1, but first axis L1 passes through part of the structure of port XX. Here, "port XX" can be the first output port 141 or the first ground port 161.

[0059] The specific implementation of the RF switch chip 100 is described below.

[0060] Please see Figure 3 The RF switch chip 100 may include an active layer 102 and multiple metal layers 104. The active layer 102 is used to set switches, such as the switches included in the first switch unit 20 and the grounding switch included in the second switch unit 30, etc. Specifically, when the RF switch chip 100 is an SOI chip, the active layer 102 corresponds to a high-quality single-crystal silicon thin layer formed on an insulating layer (e.g., a silicon dioxide layer). When the RF switch chip 100 is a CMOS chip, the active layer 102 corresponds to the structural layer containing the active region on the substrate surface.

[0061] Multiple metal layers 104 are stacked on the active layer 102 for connecting multiple switches, transmitting radio frequency signals, etc. The multiple metal layers 104 may include a top metal layer 1041, which is the metal layer 104 with the largest distance from the active layer 102 and is exposed on the outer surface of the radio frequency switch chip 100. Specifically, at least one input port 12, at least one output port 14, and at least one ground port 16 may be disposed on the top metal layer 1041 to achieve electrical connection with other devices (e.g., a substrate). Exemplarily, the metal layers 104 may be copper layers, aluminum layers, etc.

[0062] exist Figure 3In this RF switch chip 100, a dielectric layer 106 may also be included. The dielectric layer 106 is located between two adjacent metal layers 104 and serves as a signal isolation layer. Specifically, the dielectric layer 106 has metal vias (not shown in the figure). These metal vias can be used to connect traces located on different metal layers 104, or to connect a switch located on the active layer 102 to a trace on the metal layer 104, or to connect a switch on the active layer 102 to a port on the top metal layer 1041, to ensure the normal operation of the RF switch chip 100. For example, the dielectric layer 106 may be a silicon dioxide layer, a low-k dielectric layer with a dielectric constant lower than 3.9, etc.

[0063] In this embodiment, the first switching unit 20 is connected between at least one input port 12 and at least one output port 14, and is used to turn on or off the signal path between at least one input port 12 and at least one output port 14.

[0064] As an example, the number of input ports 12 and output ports 14 is one each, and the first switching unit 20 may include a single switch. In this case, the RF switch chip 100 adopts a "single-input, single-output" switching circuit architecture. Specifically, the switch included in the first switching unit 20 may be a transistor, such as a heterojunction bipolar transistor (HBT), a metal-oxide-semiconductor field-effect transistor (MOSFET), etc., which is not limited in this embodiment.

[0065] As another example, the number of input ports 12 and output ports 14 are both multiple. The first switching unit 20 may include multiple switches, with different switches connected between different input ports 12 and different output ports 14. In this case, the RF switch chip 100 adopts a "multiple-input, multiple-output" switching circuit architecture. For example, the number of input ports 12 can be 2, 3, 5, 8, etc., and the number of output ports 14 can be 2, 3, 5, 8, etc.

[0066] Please see Figure 4 and Figure 5 The number of input ports 12 and output ports 14 are two each. The two input ports 12 may include a first input port 121 and a second input port 123, and the two output ports 14 may include a first output port 141 and a second output port 143.

[0067] The first switching unit 20 may include a first switch K1, a second switch K2, a third switch K3, and a fourth switch K4. Specifically, the first switch K1 is connected between the first input port 121 and the first output port 141; the second switch K2 is connected between the second input port 123 and the first output port 141; the third switch K3 is connected between the first input port 121 and the second output port 143; and the fourth switch K4 is connected between the second input port 123 and the second output port 143.

[0068] exist Figure 4 In this configuration, the first switch K1, the second switch K2, the third switch K3, and the fourth switch K4 can be arranged in a roughly 2x2 array on the chip layout of the RF switch chip 100 to make the overall layout of the chip layout more compact and reasonable. Specifically, the first switch K1 and the second switch K2 are arranged symmetrically about the first axis L1, and the third switch K3 and the fourth switch K4 are arranged symmetrically about the first axis L1.

[0069] Furthermore, the first input port 121 and the second input port 123 are located on the second axis L2, and the extension direction of the second axis L2 is the second direction Y. The first direction X and the second direction Y intersect. For example, the included angle between them can be greater than or equal to 80 degrees and less than or equal to 90 degrees. Specifically, the included angle can be 80 degrees, 82 degrees, 85 degrees, 88 degrees, 89 degrees, 90 degrees, etc. It is easy to understand that, ideally, the first direction X and the second direction Y are perpendicular.

[0070] It should be noted that "second axis L2" is a virtual axis. "Port XX is located on second axis L2" can be understood as the center point of port XX being located on second axis L2; ​​or it can be that the center point of port XX is offset from second axis L2, but second axis L2 passes through a portion of the structure of port XX. Here, "port XX" can be either the first input port 121 or the second input port 123.

[0071] Specifically Figure 4 In this embodiment, the first switch K1 and the third switch K3 are symmetrically arranged about the second axis L2, and the second switch K2 and the fourth switch K4 are symmetrically arranged about the second axis L2. Therefore, the four switches included in the first switch unit 20 in this embodiment are not only symmetrically arranged about the first axis L1, but also about the second axis L2, making the overall layout of the first switch unit 20 more compact and reasonable, and reducing the processing cost of the RF switch chip 100.

[0072] It should be noted that the "axisymmetric setting" in this application is allowed to have a certain degree of error in actual design and application. For example, if the overlap after symmetrical flipping is greater than or equal to 90%, it still falls under the axisymmetric setting defined in this application. Taking the first switch K1 and the third switch K3 as an example, after symmetrically flipping the first switch K1 about the second axis L2, if the overlap between the first switch K1 and the third switch K3 is greater than or equal to 90%, it can be considered that the first switch K1 and the third switch K3 are axisymmetric about the second axis L2. Here, "overlap" refers to the ratio of the overlapping area of ​​the first switch K1 and the third switch K3 to the area of ​​the first switch K1.

[0073] In some possible embodiments, the first input port 121 is located between the first switch K1 and the third switch K3, which can shorten the path length of the radio frequency signal input through the first input port 121 to the first switch K1 and the third switch K3 respectively, so as to reduce the transmission loss of the radio frequency signal and ensure the transmission quality of the radio frequency signal.

[0074] In some possible embodiments, the second input port 123 is located between the second switch K2 and the fourth switch K4, which can shorten the path length of the radio frequency signal input through the second input port 123 to the second switch K2 and the fourth switch K4 respectively, so as to reduce the transmission loss of the radio frequency signal and ensure the transmission quality of the radio frequency signal.

[0075] In some possible embodiments, the first switch K1, the second switch K2, the third switch K3, and the fourth switch K4 are of the same size, which allows for a more compact and reasonable layout of the RF switch chip 100 and reduces the processing cost of the RF switch chip 100. Specifically, when the switches included in the first switch unit 20 are transistors, the size of the switch can be the product of its length and width.

[0076] It should be noted that the term "same size" in this application allows for a certain degree of error in actual design and application. Specifically, a size error of less than or equal to 10% is still considered as having the same size as defined in this application. Taking the first switch K1 and the second switch K2 as an example, if the ratio of the size of the first switch K1 and the second switch K2 is greater than or equal to 90% and less than or equal to 110%, then the first switch K1 and the second switch K2 can be considered to have the same size.

[0077] In some possible examples, the electrodes corresponding to the transistor can be "comb-finger electrodes." In this case, the size of the switch can be the width-to-length ratio of the transistor. Here, we will use a MOSFET as an example to introduce the "width-to-length ratio of a transistor." Please refer to... Figure 6The designated electrode 52 of the transistor may include a plurality of comb-finger electrodes 521, one end of which is connected and arranged along a first designated direction P. Each comb-finger electrode 521 extends along a second designated direction Q. The first designated direction P and the second designated direction Q intersect. For example, the angle between the first designated direction P and the second designated direction Q is approximately 90 degrees; exemplarily, the angle can be 89.5 degrees, 89.7 degrees, 89.9 degrees, 90 degrees, etc. Ideally, the first designated direction P and the second designated direction Q are perpendicular.

[0078] Specifically, the specified electrode 52 can be either the source or the drain. Figure 6 In this configuration, one designated electrode 52a can be the source electrode, and the other designated electrode 52b can be the drain electrode. The multiple comb-finger electrodes 521 included in the source electrode and the multiple comb-finger electrodes 521 included in the drain electrode can be arranged alternately in sequence.

[0079] In this embodiment, the aspect ratio of the transistor is N*W / L. Where L is the dimension of a single comb-finger electrode 521 in the first specified direction P, W is the dimension of a single comb-finger electrode 521 in the second specified direction Q, and N is the number of comb-finger electrodes 521. For example, in... Figure 6 In the example, if N is 5, then the width-to-length ratio of the transistor is 5*W / L.

[0080] Of course, in other possible examples, the number of input ports 12 can be one, and the number of output ports 14 can be multiple; or, the number of input ports 12 can be multiple, and the number of output ports 14 can be one. This embodiment does not specifically limit the number of input ports 12 and output ports 14.

[0081] In this embodiment, the second switching unit 30 is disposed on one side of the first switching unit 20 and connected between the first output port 141 and the first ground port 161. The second switching unit 30 may include a first ground switch S1 and a second ground switch S2, which are connected in parallel between the first output port 141 and the first ground port 161 to form a first ground path W1 and a second ground path W2, respectively. Specifically, the ground switches included in the second switching unit 30 may be transistors, such as HBT transistors, MOSFET transistors, etc., but this embodiment does not limit this.

[0082] In some possible embodiments, the components on the first grounding path W1 and the components on the second grounding path W2 are respectively disposed on both sides of the first axis L1. The "components on the first grounding path W1" may include a first grounding switch S1, a metal via connected to the first grounding switch S1, a metal trace, or other passive components (e.g., capacitors, inductors, resistors), etc., and the "components on the second grounding path W2" may include a second grounding switch S2, a metal via connected to the second grounding switch S2, a metal trace, or other passive components (e.g., capacitors, inductors, resistors), etc.

[0083] Through the above-described settings, this embodiment can make the overall layout of the RF switch chip 100 more compact and reasonable. It can also make the path lengths of the two grounding paths (i.e., the first grounding path W1 and the second grounding path W2) approximately equal, so that static electricity can be uniformly discharged through the two grounding paths, thereby optimizing the static electricity discharge capability.

[0084] Furthermore, the components on the first grounding path W1 and the components on the second grounding path W2 are arranged symmetrically about the first axis L1. In this case, on the one hand, the processing cost of the RF switch chip 100 can be reduced; on the other hand, with the components of the two grounding paths arranged symmetrically, not only can the path lengths of the two grounding paths be ensured to be almost equal, but also the total resistance (overall resistance to ground) of the components on the two grounding paths can be ensured to be almost equal.

[0085] It's easy to understand that if the overall resistance to ground of the two grounding paths differs significantly, static electricity will preferentially choose the grounding path with the lower resistance for discharge, causing the other grounding path to fail and thus greatly reducing the static electricity discharge capacity. Therefore, when the overall resistance to ground of the two grounding paths is almost equal, static electricity can be discharged evenly through both grounding paths, optimizing the static electricity discharge capacity.

[0086] As an example, the first grounding switch S1 and the second grounding switch S2 are the same size and are arranged symmetrically about the first axis L1. For details on the "size of the grounding switches", please refer to the detailed description of the "size of the switches included in the first switching unit 20" in the instruction manual above, which will not be elaborated here.

[0087] Therefore, in this example, the first grounding switch S1 and the second grounding switch S2 are arranged symmetrically about the first axis L1, which makes the overall layout of the RF switch chip 100 more compact and saves processing costs; it can also improve the overall symmetry of the two grounding paths and achieve uniform discharge of static electricity.

[0088] As another example, please refer to [link / reference]. Figure 4The second switching unit 30 may further include a first connecting line 320 and a second connecting line 340, which may be located on the top metal layer 1041. One end of the first grounding switch S1 is connected to the first output port 141 via the first connecting line 320, and the other end of the first grounding switch S1 is connected to the first grounding port 161. Exemplarily, one end of the first grounding switch S1 may be connected to one end of the first connecting line 320 via a metal via (not shown in the figure), and the other end of the first connecting line 320 may be directly connected to the first output port 141; the other end of the first grounding switch S1 may be connected to the first grounding port 161 via a metal via (not shown in the figure).

[0089] One end of the second grounding switch S2 is connected to the first output port 141 via the second connecting line 340, and the other end of the second grounding switch S2 is connected to the first grounding port 161. Exemplarily, one end of the second grounding switch S2 can be connected to one end of the second connecting line 340 via a metal via (not shown in the figure), and the other end of the second connecting line 340 can be directly connected to the first output port 141; the other end of the second grounding switch S2 can be connected to the first grounding port 161 via a metal via (not shown in the figure).

[0090] Specifically, the first connecting line 320 and the second connecting line 340 are roughly "L" shaped and are symmetrical about the first axis L1, which can improve the overall symmetry of the two grounding paths and achieve uniform discharge of static electricity.

[0091] As another example, the metal vias connected to the first grounding switch S1 and the metal vias connected to the second grounding switch S2 are arranged symmetrically about the first axis L1, which can make the overall layout of the RF switch chip 100 more compact and save processing costs; it can also improve the overall symmetry of the two grounding paths and achieve uniform discharge of static electricity.

[0092] Please refer to it again. Figure 4 At least one output port 14 may further include a second output port 143, and at least one ground port 16 may further include a second ground port 163. The RF switch chip 100 may further include a third switch unit 40, which may include a third ground switch S3 and a fourth ground switch S4. The ground switches included in the third switch unit 40 may be disposed on the active layer 102. Specifically, the third ground switch S3 is connected between the second output port 143 and the second ground port 163 to form a third ground path W3; the fourth ground switch S4 is connected between the second output port 143 and the second ground port 163 to form a fourth ground path W4. Specifically, the ground switches included in the third switch unit 40 may be transistors, such as HBT transistors, MOSFET transistors, etc., which are not limited in this embodiment.

[0093] Therefore, in this embodiment, the second output port 143 is grounded through a "double ground switch". On the one hand, the presence of the third ground switch S3 and the fourth ground switch S4 can form two electrostatic discharge paths, thereby improving the ESD capability of the RF switch chip 100 and enabling the RF switch chip 100 to be used in scenarios with higher IEC performance requirements, thereby improving the market competitiveness of the RF switch chip 100.

[0094] On the other hand, compared to the grounding method of "single-to-ground switch" in related technologies, for example, Figure 2 The second output port 143 is connected to the second ground port 163 via the second grounding sub-switch S02. On one hand, by providing two parallel grounding switches between the second output port 143 and the second ground port 163, the electrostatic discharge pressure of a single grounding switch can be alleviated. Furthermore, although the number of grounding switches increases, the chip area occupied by the two grounding switches is almost unchanged, or even smaller, compared to the chip area occupied by a single grounding switch. On the other hand, the two grounding switches can be more flexibly arranged on the chip layout of the RF switch chip 100; for example, one of the grounding switches can be placed in a blank area Z2 of the layout, thereby improving the utilization efficiency of the chip layout.

[0095] Furthermore, the second grounding port 163 and the second output port 143 are both located on the first axis L1, and the third grounding switch S3 and the fourth grounding switch S4 are respectively set on both sides of the first axis L1. This makes the overall layout of the RF switch chip 100 more compact and reasonable, and also makes the path lengths of the two grounding paths (i.e., the third grounding path W3 and the fourth grounding path W4) approximately equal, so that static electricity can be uniformly discharged through the two grounding paths, thereby optimizing the static electricity discharge capability.

[0096] Please refer to it again. Figure 2 and Figure 4 Both correspond to a "dual-input, dual-output" switching circuit architecture. Specifically... Figure 4 In the case where both the first output port 141 and the second output port 143 are grounded through a "double ground switch", the utilization efficiency of the chip layout can be improved by setting the first ground switch S1 in the blank area Z1 of the layout and setting the third ground switch S3 in the blank area Z2 of the layout.

[0097] Furthermore, compared to Figure 2 The first grounding switch S01 and the second grounding switch S02 in the middle, Figure 4The dimensions of the first grounding switch S1, the second grounding switch S2, the third grounding switch S3, and the fourth grounding switch S4 in the first direction X are smaller, making... Figure 4 The grounding switch occupies less space in the first direction X, which can reduce the size of the RF switch chip 100 in the first direction X, thus facilitating miniaturization design.

[0098] In some possible embodiments, the components on the third grounding path W3 and the components on the fourth grounding path W4 are respectively disposed on both sides of the first axis L1. The "components on the third grounding path W3" may include a third grounding switch S3, metal vias connected to the third grounding switch S3, metal traces, or other passive components (e.g., capacitors, inductors, resistors), etc., and the "components on the fourth grounding path W4" may include a fourth grounding switch S4, metal vias connected to the fourth grounding switch S4, metal traces, or other passive components (e.g., capacitors, inductors, resistors), etc.

[0099] Through the above-described settings, this embodiment can make the overall layout of the RF switch chip 100 more compact and reasonable. It can also make the path lengths of the two grounding paths (i.e., the third grounding path W3 and the fourth grounding path W4) approximately equal, so that static electricity can be uniformly discharged through the two grounding paths, thereby optimizing the static electricity discharge capability.

[0100] Furthermore, the components on the third grounding path W3 and the fourth grounding path W4 are arranged symmetrically about the first axis L1. In this configuration, on the one hand, the manufacturing cost of the RF switch chip 100 can be reduced; on the other hand, with the components on the two grounding paths symmetrically arranged, not only can the path lengths of the two grounding paths be ensured to be almost equal, but also the total resistance (overall resistance to ground) of the components on the two grounding paths can be ensured to be almost equal. With the overall resistance to ground of the two grounding paths being almost equal, static electricity can be uniformly discharged through the two grounding paths, thus optimizing the static electricity discharge capability.

[0101] As an example, the third grounding switch S3 and the fourth grounding switch S4 are the same size and are arranged symmetrically about the first axis L1. For details on the "size of the grounding switches", please refer to the detailed description of the "size of the switches included in the first switching unit 20" in the instruction manual above, which will not be elaborated here.

[0102] Therefore, in this example, the third grounding switch S3 and the fourth grounding switch S4 are arranged symmetrically about the first axis L1, which makes the overall layout of the RF switch chip 100 more compact and saves processing costs; it can also improve the overall symmetry of the two grounding paths and achieve uniform discharge of static electricity.

[0103] As another example, please refer to [link / reference]. Figure 4 The third switch unit 40 may further include a third connecting line 410 and a fourth connecting line 430, which may be located on the top metal layer 1041. One end of the third grounding switch S3 is connected to the second output port 143 via the third connecting line 410, and the other end of the third grounding switch S3 is connected to the second grounding port 163. Exemplarily, one end of the third grounding switch S3 may be connected to one end of the third connecting line 410 via a metal via (not shown in the figure), and the other end of the third connecting line 410 may be directly connected to the second output port 143; the other end of the third grounding switch S3 may be connected to the second grounding port 163 via a metal via (not shown in the figure).

[0104] One end of the fourth grounding switch S4 is connected to the second output port 143 via the fourth connecting line 430, and the other end of the fourth grounding switch S4 is connected to the second grounding port 163. Exemplarily, one end of the fourth grounding switch S4 can be connected to one end of the fourth connecting line 430 via a metal via (not shown in the figure), and the other end of the fourth connecting line 430 is directly connected to the second output port 143; the other end of the fourth grounding switch S4 can be connected to the second grounding port 163 via a metal via (not shown in the figure).

[0105] Specifically, the third connecting line 410 and the fourth connecting line 430 are roughly "L" shaped and are symmetrical about the first axis L1, which can improve the overall symmetry of the two grounding paths and achieve uniform discharge of static electricity.

[0106] As another example, the metal vias connected to the third grounding switch S3 and the fourth grounding switch S4 are arranged symmetrically about the first axis L1, which makes the overall layout of the RF switch chip 100 more compact and saves processing costs; it can also improve the overall symmetry of the two grounding paths and achieve uniform discharge of static electricity.

[0107] Please refer to it again. Figure 4 The second switch unit 30, the first switch unit 20, and the third switch unit 40 are arranged sequentially along the extension direction of the first axis L1, which can make reasonable use of the layout space of the RF switch chip 100, making the chip layout of the RF switch chip 100 more compact and reasonable. Specifically, the second switch unit 30 and the third switch unit 40 are arranged symmetrically about the second axis L2, which can reduce the processing cost of the RF switch chip 100.

[0108] In some possible embodiments, the first grounding switch S1, the first switch K1, the third switch K3, and the third grounding switch S3 are sequentially arranged in the first direction X to form a first switch array (not shown in the figure). The second grounding switch S2, the second switch K2, the fourth switch K4, and the fourth grounding switch S4 are sequentially arranged in the first direction X to form a second switch array (not shown in the figure). The first switch array and the second switch array are sequentially arranged in the second direction Y. Therefore, Figure 4 The eight switches are arranged in a "2*4" array, which can maximize the use of the layout space of the RF switch chip 100. While improving ESD performance, it is also beneficial to achieve miniaturization of the RF switch chip 100.

[0109] It should be noted that the second switch unit 30, the first switch unit 20, and the third switch unit 40 in this embodiment can constitute a switch module. For example... Figure 4 As shown, the number of switch modules can be one. Of course, in other possible examples, the number of switch modules can be multiple, and multiple switch modules can be arranged sequentially along the second direction Y. For example, when the number of switch modules is two, the RF switch chip 100 adopts a "four-input, four-output" switch circuit architecture.

[0110] This application provides an RF switch chip 100, which has at least one input port 12, at least one output port 14, and at least one ground port 16. The RF switch chip 100 may include a first switch unit 20 and a second switch unit 30. The first switch unit 20 is connected between the at least one input port 12 and the at least one output port 14, and is used to connect or disconnect the signal path between the at least one input port 12 and the at least one output port 14. The second switch unit 30 may include a first ground switch S1 and a second ground switch S2. The first ground switch S1 is connected between the first output port 141 and the first ground port 161 to form a first ground path W1. The second ground switch S2 is connected between the first output port 141 and the first ground port 161 to form a second ground path W2.

[0111] Therefore, in this embodiment, the first output port 141 is grounded through a "double ground switch". On the one hand, the presence of the first ground switch S1 and the second ground switch S2 can form two electrostatic discharge paths, thereby improving the ESD capability of the RF switch chip 100 and enabling the RF switch chip 100 to be used in scenarios with higher IEC performance requirements, thereby improving the market competitiveness of the RF switch chip 100.

[0112] On the other hand, compared to the "single-to-ground switch" grounding method in related technologies, although this embodiment increases the number of grounding switches, the chip area occupied by the two grounding switches is almost unchanged, or even smaller, compared to the chip area occupied by the single-to-ground switch. Furthermore, the two grounding switches can be more flexibly arranged on the chip layout of the RF switch chip 100, improving the utilization efficiency of the chip layout without increasing the chip layout area.

[0113] Furthermore, the first output port 141 and the first ground port 161 are both located on the first axis L1, and the first ground switch S1 and the second ground switch S2 are respectively set on both sides of the first axis L1. This makes the overall layout of the RF switch chip 100 more compact and reasonable, and also makes the path lengths of the two ground paths (i.e., the first ground path W1 and the second ground path W2) approximately equal, so that static electricity can be uniformly discharged through the two ground paths, thereby optimizing the static electricity discharge capability.

[0114] Please refer to it again. Figure 1 This application also provides an RF switch chip 100, which has at least one input port 12, at least one output port 14, and at least one ground port 16. The at least one output port 14 may include a first output port 141, and the at least one ground port 16 may include a first ground port 161.

[0115] The radio frequency switch chip 100 may include a first switch unit 20 and a second switch unit 30. The first switch unit 20 is connected between at least one input port 12 and at least one output port 14, and is used to turn on or off the signal path between at least one input port 12 and at least one output port 14.

[0116] The second switching unit 30 may include a first grounding switch S1 and a second grounding switch S2. The first grounding switch S1 is connected between the first output port 141 and the first grounding port 161 to form a first grounding path W1; the second grounding switch S2 is connected between the first output port 141 and the first grounding port 161 to form a second grounding path W2.

[0117] Therefore, in this embodiment, the first output port 141 is grounded by a "dual ground switch". On the one hand, the presence of the first ground switch S1 and the second ground switch S2 can form two electrostatic discharge paths, thereby improving the electrostatic discharge ESD capability of the RF switch chip 100, so that the RF switch chip 100 can be applied in scenarios with higher IEC performance requirements, thereby improving the market competitiveness of the RF switch chip 100.

[0118] On the other hand, compared to the "single-to-ground switch" grounding method in related technologies, although this embodiment increases the number of grounding switches, the chip area occupied by the two grounding switches is almost unchanged, or even smaller, compared to the chip area occupied by the single-to-ground switch. Furthermore, the two grounding switches can be more flexibly arranged on the chip layout of the RF switch chip 100, improving the utilization efficiency of the chip layout without increasing the chip layout area.

[0119] Furthermore, the absolute value of the difference between the total resistance of the components on the first grounding path W1 and the total resistance of the components on the second grounding path W2 is less than or equal to a specified resistance value. In other words, the overall resistance to ground of the first grounding path W1 and the overall resistance to ground of the second grounding path W2 are approximately equal. This specified resistance value can be less than or equal to 0.5 ohms, and more specifically, it can be less than or equal to 0.1 ohms. Specifically, the smaller the specified resistance value, the closer the overall resistance to ground of the two grounding paths are, resulting in better overall uniformity during electrostatic discharge. For example, the specified resistance value can be 0.5 ohms, 0.2 ohms, 0.1 ohms, 0.08 ohms, 0.05 ohms, etc. Ideally, the overall resistance to ground of the two grounding paths is equal, that is, the specified resistance value is 0.

[0120] It's easy to understand that if the overall resistance to ground of the two grounding paths differs significantly, static electricity will preferentially choose the grounding path with the lower resistance for discharge, causing the other grounding path to fail and thus greatly reducing the static discharge capacity. Therefore, when the overall resistance to ground of the two grounding paths is approximately equal, static electricity can be discharged evenly through both grounding paths, optimizing the static discharge capacity.

[0121] In some possible embodiments, the total resistance of the components on the first grounding path W1 is equal to the total resistance of the components on the second grounding path W2.

[0122] Specifically, details regarding the features of input port 12, output port 14, ground port 16, first switching unit 20, and second switching unit 30 can be found in the detailed descriptions in the embodiments above. To save space, these details will not be elaborated upon here. Furthermore, without conflict, other technical features in the embodiments above can be incorporated into this embodiment, and vice versa.

[0123] Please refer to it again. Figure 4This application also provides an RF switch chip 100, which has a first input port 121, a second input port 123, a first output port 141, a second output port 143, a first ground port 161, and a second ground port 163. The RF switch chip 100 may include a first switch unit 20, a second switch unit 30, and a third switch unit 40.

[0124] The first switch unit 20 may include a first switch K1, a second switch K2, a third switch K3 and a fourth switch K4. The first switch K1 is connected between the first input port 121 and the first output port 141, the second switch K2 is connected between the second input port 123 and the first output port 141, the third switch K3 is connected between the first input port 121 and the second output port 143, and the fourth switch K4 is connected between the second input port 123 and the second output port 143.

[0125] The second switching unit 30 may include a first grounding switch S1 and a second grounding switch S2. The first grounding switch S1 is connected between the first output port 141 and the first grounding port 161 to form a first grounding path W1; the second grounding switch S2 is connected between the first output port 141 and the first grounding port 161 to form a second grounding path W2.

[0126] The third switching unit 40 may include a third grounding switch S3 and a fourth grounding switch S4. The third grounding switch S3 is connected between the second output port 143 and the second grounding port 163 to form a third grounding path W3; the fourth grounding switch S4 is connected between the second output port 143 and the second grounding port 163 to form a fourth grounding path W4.

[0127] This embodiment provides an RF switch chip 100, which has two input ports, two output ports and two ground ports. That is, the RF switch chip 100 adopts a "dual-input, dual-output" switch circuit architecture.

[0128] Specifically, two parallel grounding switches (i.e., first grounding switch S1 and second grounding switch S2) are provided between the first output port 141 and the first grounding port 161 of the RF switch chip 100. The first grounding switch S1 is located on the first grounding path W1 between the first output port 141 and the first grounding port 161, and the second grounding switch S2 is located on the second grounding path W2 between the first output port 141 and the first grounding port 161.

[0129] Therefore, in this embodiment, the first output port 141 is grounded via a "dual ground switch". On one hand, the presence of the first ground switch S1 and the second ground switch S2 forms two electrostatic discharge paths, thereby improving the ESD capability of the RF switch chip 100. This allows the RF switch chip 100 to be used in scenarios with higher IEC performance requirements, thus enhancing its market competitiveness. On the other hand, compared to the "single ground switch" grounding method in related technologies, although this embodiment increases the number of ground switches, the chip area occupied by the two ground switches is almost unchanged, or even smaller, than that occupied by the single ground switch. Furthermore, the first ground switch S1 and the second ground switch S2 can be more flexibly arranged on the chip layout of the RF switch chip 100, improving the utilization efficiency of the chip layout without increasing the chip layout area.

[0130] Similarly, two parallel grounding switches (i.e., the third grounding switch S3 and the fourth grounding switch S4) are provided between the second output port 143 and the second grounding port 163 of the RF switch chip 100. The third grounding switch S3 is located on the third grounding path W3 between the second output port 143 and the second grounding port 163, and the fourth grounding switch S4 is located on the fourth grounding path W4 between the second output port 143 and the second grounding port 163.

[0131] Therefore, in this embodiment, the second output port 143 is grounded via a "dual ground switch". On one hand, the presence of the third ground switch S3 and the fourth ground switch S4 forms two electrostatic discharge paths, thereby improving the ESD capability of the RF switch chip 100. This allows the RF switch chip 100 to be used in scenarios with higher IEC performance requirements, thus enhancing its market competitiveness. On the other hand, compared to the "single ground switch" grounding method in related technologies, although this embodiment increases the number of ground switches, the chip area occupied by the two ground switches is almost unchanged, or even smaller, than that occupied by the single ground switch. Furthermore, the third ground switch S3 and the fourth ground switch S4 can be more flexibly placed on the chip layout of the RF switch chip 100, improving the utilization efficiency of the chip layout without increasing the chip layout area.

[0132] In some possible embodiments, the first output port 141, the first ground port 161, the second ground port 163, and the second output port 143 are all located on the first axis L1, the first ground switch S1 and the second ground switch S2 are arranged symmetrically about the first axis L1, and the third ground switch S3 and the fourth ground switch S4 are arranged symmetrically about the first axis L1.

[0133] In some possible embodiments, the first input port 121 and the second input port 123 are located on the second axis L2. The first axis L1 extends in the first direction X, and the second axis L2 extends in the second direction Y. The first direction X and the second direction Y intersect. The first grounding switch S1 and the third grounding switch S3 are symmetrically arranged about the second axis L2, the second grounding switch S2 and the fourth grounding switch S4 are symmetrically arranged about the second axis L2, the first switch K1 and the third switch K3 are symmetrically arranged about the second axis L2, and the second switch K2 and the fourth switch K4 are symmetrically arranged about the second axis L2.

[0134] Specifically, details regarding the features of input port 12, output port 14, ground port 16, first switching unit 20, second switching unit 30, and third switching unit 40 can be found in the detailed descriptions in the embodiments above. To save space, these details will not be elaborated upon here. Furthermore, without conflict, other technical features in the embodiments above can be incorporated into this embodiment, and vice versa.

[0135] Please refer to the following documents separately. Figure 1 and Figure 7 This application also provides a radio frequency front-end module 600, which is a component that integrates two or more discrete devices such as radio frequency switches, low noise amplifiers, filters, duplexers, and power amplifiers into an independent module, thereby improving integration and hardware performance and miniaturizing size.

[0136] In this embodiment, the RF front-end module 600 may include a substrate 70, an RF switch chip 100, and a power amplifier chip 80. The substrate 70 is generally rectangular and serves to fix and support the components in the RF front-end module 600 (e.g., the RF switch chip 100, the power amplifier chip 80, filters, duplexers, etc.). Specifically, the substrate 70 may be a copper-clad laminate. By performing hole processing, chemical copper plating, electroplating, etching, and other processes on the copper-clad laminate, circuits can be printed on the surface of the substrate. In other possible examples, the substrate 70 may also be a high-resistivity silicon (HR-Si) substrate, an ultra-thin glass substrate, a low-temperature co-fired ceramic (LTCC) substrate, a thin-film piezoelectric insulating substrate (POI), etc.

[0137] Specifically, the substrate 70 is provided with at least one antenna port 720, which is used to connect an external antenna to realize the reception and transmission of radio frequency signals. The number of antenna ports 720 can be one or more, and this embodiment does not limit this.

[0138] In this embodiment, the radio frequency switch chip 100 is disposed on the substrate 70. For example, the radio frequency switch chip 100 can be fixed on the substrate 70 by a flip-chip process or a wire bonding process. The radio frequency switch chip 100 has at least one input port 12, at least one output port 14, and at least one ground port 16. The at least one output port 14 and at least one antenna port 720 are connected in a one-to-one correspondence. The at least one output port 14 may include a first output port 141, and the at least one ground port 16 may include a first ground port 161.

[0139] In this embodiment, the RF switch chip 100 is a tune switch directly connected to the antenna port 720. Since the tune switch is directly connected to the antenna port 720, and static electricity is particularly prevalent and intense at the antenna port 720, this application places higher demands on the electrostatic discharge (ESD) protection of the RF switch chip 100.

[0140] In this embodiment, the RF switch chip 100 may include a first switch unit 20 and a second switch unit 30. The first switch unit 20 is connected between at least one input port 12 and at least one output port 14, and is used to turn on or off the signal path between the at least one input port 12 and at least one output port 14. The second switch unit 30 may include a first ground switch S1 and a second ground switch S2. The first ground switch S1 is connected between the first output port 141 and the first ground port 161 to form a first ground path W1; the second ground switch S2 is connected between the first output port 141 and the first ground port 161 to form a second ground path W2.

[0141] Therefore, in this embodiment, the first output port 141 is grounded by a "double ground switch". On the one hand, the presence of the first ground switch S1 and the second ground switch S2 can form two electrostatic discharge paths, thereby improving the ESD capability of the RF switch chip 100 and enabling the RF switch chip 100 to be used in scenarios with higher IEC performance requirements, so as to improve the market competitiveness of the RF front-end module 600.

[0142] On the other hand, compared to the "single-to-ground switch" grounding method in related technologies, although this embodiment increases the number of grounding switches, the chip area occupied by the two grounding switches is almost unchanged, or even smaller, compared to the chip area occupied by the single-to-ground switch. Furthermore, the two grounding switches can be more flexibly arranged on the chip layout of the RF switch chip 100, improving the utilization efficiency of the chip layout without increasing the chip layout area.

[0143] Specifically, for details regarding the features of input port 12, output port 14, ground port 16, first switching unit 20, and second switching unit 30, please refer to the detailed description in the embodiments above in the specification. To save space, these details will not be elaborated upon here.

[0144] In this embodiment, the power amplifier chip 80 is disposed on the substrate 70. For example, the power amplifier chip 80 can be fixed on the substrate 70 by a flip-chip process or a wire bonding process. The output terminal of the power amplifier chip 80 is connected to the input port 12. That is to say, the RF switch chip 100 in this embodiment is an antenna switch chip used in the transmit path (TX).

[0145] Therefore, by improving the IEC performance and ESD capability of the RF switch chip 100, this embodiment enables the static electricity at the antenna port 720 to be quickly discharged through the RF switch chip 100, thereby avoiding the occurrence of static electricity damaging the internal components of the RF front-end module 600 (e.g., the power amplifier chip 100), and ensuring the operational reliability of the RF front-end module 600.

[0146] Specifically, the power amplifier chip 80 can be a heterojunction bipolar transistor (HBT) chip, a CMOS chip, etc. The power amplifier chip 80 may include at least one power amplifier (PA), and the output terminal of the at least one power amplifier is connected to at least one input port 12 in a one-to-one correspondence. This embodiment does not limit the specific implementation of the power amplifier chip 80.

[0147] In some possible embodiments, the first output port 141 and the first ground port 161 are both located on the first axis L1, and the first ground switch S1 and the second ground switch S2 are arranged symmetrically about the first axis L1.

[0148] It should be noted that, without conflict, other technical features of the RF switch chip 100 in the above embodiments can be incorporated into this embodiment, and the relevant technical features in this embodiment can also be incorporated into the above embodiments. To save space, they will not be elaborated here.

[0149] Please refer to the following documents separately. Figure 1 and Figure 8This application also provides a radio frequency (RF) front-end module 600, which may include a substrate 70, an RF switch chip 100, and a low-noise amplifier chip 90. The substrate 70 is provided with at least one antenna port 720. For details regarding the substrate 70, please refer to the specific description in the embodiments above. To save space, further details are omitted here.

[0150] In this embodiment, the radio frequency switch chip 100 is disposed on the substrate 70. For example, the radio frequency switch chip 100 can be fixed on the substrate 70 by a flip-chip process or a wire bonding process. The radio frequency switch chip 100 is provided with at least one input port 12, at least one output port 14, and at least one ground port 16. The at least one input port 12 and at least one antenna port 720 are connected in a one-to-one correspondence. The at least one output port 14 may include a first output port 141, and the at least one ground port 16 may include a first ground port 161.

[0151] In this embodiment, the RF switch chip 100 is a tune switch directly connected to the antenna port 720. Since the tune switch is directly connected to the antenna port 720, and static electricity is particularly prevalent and intense at the antenna port 720, this application places higher demands on the electrostatic discharge (ESD) protection of the RF switch chip 100.

[0152] In this embodiment, the RF switch chip 100 may include a first switch unit 20 and a second switch unit 30. The first switch unit 20 is connected between at least one input port 12 and at least one output port 14, and is used to turn on or off the signal path between the at least one input port 12 and at least one output port 14. The second switch unit 30 may include a first ground switch S1 and a second ground switch S2. The first ground switch S1 is connected between the first output port 141 and the first ground port 161 to form a first ground path W1; the second ground switch S2 is connected between the first output port 141 and the first ground port 161 to form a second ground path W2.

[0153] Therefore, in this embodiment, the first output port 141 is grounded by a "double ground switch". On the one hand, the presence of the first ground switch S1 and the second ground switch S2 can form two electrostatic discharge paths, thereby improving the ESD capability of the RF switch chip 100 and enabling the RF switch chip 100 to be used in scenarios with higher IEC performance requirements, so as to improve the market competitiveness of the RF front-end module 600.

[0154] On the other hand, compared to the "single-to-ground switch" grounding method in related technologies, although this embodiment increases the number of grounding switches, the chip area occupied by the two grounding switches is almost unchanged, or even smaller, compared to the chip area occupied by the single-to-ground switch. Furthermore, the two grounding switches can be more flexibly arranged on the chip layout of the RF switch chip 100, improving the utilization efficiency of the chip layout without increasing the chip layout area.

[0155] Specifically, for details regarding the features of input port 12, output port 14, ground port 16, first switching unit 20, and second switching unit 30, please refer to the detailed description in the embodiments above in the specification. To save space, these details will not be elaborated upon here.

[0156] In this embodiment, the low-noise amplifier chip 90 is disposed on the substrate 70. For example, the low-noise amplifier chip 90 can be fixed on the substrate 70 by a flip-chip process or a wire bonding process. The input terminal and the output port 14 of the low-noise amplifier chip 90 are connected. That is to say, the RF switch chip 100 in this embodiment is an antenna switch chip used in the receive path (RX).

[0157] Therefore, by improving the IEC performance and ESD capability of the RF switch chip 100, the static electricity at the antenna port 720 can be quickly discharged through the RF switch chip 100, thereby avoiding the occurrence of static electricity damaging the internal components of the RF front-end module 600 (e.g., the low-noise amplifier chip 90), and ensuring the operational reliability of the RF front-end module 600.

[0158] Specifically, the low-noise amplifier chip 90 can be an HBT chip, a CMOS chip, etc. The low-noise amplifier chip 90 may include at least one low-noise amplifier (LNA), and the input terminal of the at least one low-noise amplifier is connected to at least one output port 14 in a one-to-one correspondence. This embodiment does not limit the specific implementation of the low-noise amplifier chip 90.

[0159] In some possible embodiments, the first output port 141 and the first ground port 161 are both located on the first axis L1, and the first ground switch S1 and the second ground switch S2 are arranged symmetrically about the first axis L1.

[0160] It should be noted that, without conflict, other technical features of the RF switch chip 100 in the above embodiments can be incorporated into this embodiment, and the relevant technical features in this embodiment can also be incorporated into the above embodiments. To save space, they will not be elaborated here.

[0161] This application also provides an electronic device, which can be a smartphone, tablet, smartwatch, or other 4G or 5G communication device. Specifically, the electronic device may include an antenna and the radio frequency front-end module 600 described in the above embodiment, with the antenna port 720 of the radio frequency front-end module 600 connected to the antenna. On one hand, the radio frequency signal output by the radio frequency front-end module 600 can be transmitted to the outside world through the antenna; on the other hand, the radio frequency signal received through the antenna can be transmitted back to the radio frequency front-end module 600. Specifically, the antenna can be a line antenna, a surface antenna, a microstrip antenna, etc., and this embodiment does not impose a specific limitation.

[0162] Furthermore, with the development of 5G technology, the requirements for the performance of radio frequency front-end modules are becoming increasingly stringent. The technical solution of this application can be applied to 5G radio frequency front-end modules to improve the communication performance of 5G communication equipment.

[0163] In this application specification, certain terms are used to refer to specific components. Those skilled in the art will understand that hardware manufacturers may use different names to refer to the same component. The specification and claims do not distinguish components based on differences in name, but rather on differences in function. The term "comprising" throughout the specification and claims is an open-ended term and should be interpreted as "including but not limited to"; "generally" means that those skilled in the art can solve the technical problem within a certain margin of error and basically achieve the technical effect.

[0164] In the description of this application, it should be understood that the terms "upper", "lower", "front", "back", "left", "right", "inside", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the purpose of simplifying the description of this application and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0165] In this application, unless otherwise expressly specified or limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or merely surface contact. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0166] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0167] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0168] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.

Claims

1. A radio frequency switch chip, characterized in that, It is provided with at least one input port, at least one output port and at least one ground port; the at least one output port includes a first output port and the at least one ground port includes a first ground port. The radio frequency switch chip includes: A first switching unit is connected between at least one input port and at least one output port, for connecting or disconnecting the signal path between at least one input port and at least one output port; and The second switching unit includes a first grounding switch and a second grounding switch; the first grounding switch is connected between the first output port and the first grounding port to form a first grounding path; the second grounding switch is connected between the first output port and the first grounding port to form a second grounding path. The first output port and the first grounding port are both located on the first axis, and the first grounding switch and the second grounding switch are respectively located on both sides of the first axis.

2. The radio frequency switch chip according to claim 1, characterized in that, The components on the first grounding path and the components on the second grounding path are respectively arranged on both sides of the first axis.

3. The radio frequency switch chip according to claim 2, characterized in that, The components on the first grounding path and the components on the second grounding path are arranged symmetrically about the first axis.

4. The radio frequency switch chip according to claim 1, characterized in that, The first grounding switch and the second grounding switch are the same size and are arranged symmetrically about the first axis.

5. The radio frequency switch chip according to claim 4, characterized in that, The second switching unit also includes a first connecting line and a second connecting line; One end of the first grounding switch is connected to the first output port via the first connecting line, and the other end of the first grounding switch is connected to the first grounding port; one end of the second grounding switch is connected to the first output port via the second connecting line, and the other end of the second grounding switch is connected to the first grounding port. The first connecting line and the second connecting line are arranged symmetrically about the first axis.

6. The radio frequency switch chip according to any one of claims 1 to 5, characterized in that, At least one of the output ports further includes a second output port, and at least one of the ground ports further includes a second ground port; The RF switch chip further includes a third switch unit, which includes a third ground switch and a fourth ground switch; the third ground switch is connected between the second output port and the second ground port to form a third ground path; the fourth ground switch is connected between the second output port and the second ground port to form a fourth ground path. The second grounding port and the second output port are both located on the first axis, and the third grounding switch and the fourth grounding switch are respectively located on both sides of the first axis.

7. The radio frequency switch chip according to claim 6, characterized in that, The components on the third grounding path and the components on the fourth grounding path are respectively arranged on both sides of the first axis.

8. The radio frequency switch chip according to claim 7, characterized in that, The components on the third grounding path and the components on the fourth grounding path are arranged symmetrically about the first axis.

9. The radio frequency switch chip according to claim 6, characterized in that, The third grounding switch and the fourth grounding switch are the same size and are arranged symmetrically about the first axis.

10. The radio frequency switch chip according to claim 9, characterized in that, The third switching unit also includes a third connecting line and a fourth connecting line; One end of the third grounding switch is connected to the second output port via the third connecting line, and the other end of the third grounding switch is connected to the second grounding port; one end of the fourth grounding switch is connected to the second output port via the fourth connecting line, and the other end of the fourth grounding switch is connected to the second grounding port. The third connecting line and the fourth connecting line are arranged symmetrically about the first axis.

11. The radio frequency switch chip according to claim 6, characterized in that, The second switch unit, the first switch unit, and the third switch unit are arranged sequentially in the extension direction of the first axis; At least one of the input ports is located on the second axis, and the second switch unit and the third switch unit are arranged symmetrically about the second axis.

12. The radio frequency switch chip according to claim 6, characterized in that, At least one of the input ports includes a first input port and a second input port. The first switching unit includes a first switch, a second switch, a third switch, and a fourth switch. The first switch is connected between the first input port and the first output port. The second switch is connected between the second input port and the first output port. The third switch is connected between the first input port and the second output port. The fourth switch is connected between the second input port and the second output port. The first grounding switch, the first switch, the third switch, and the third grounding switch are arranged sequentially in a first direction to form a first switch array; the second grounding switch, the second switch, the fourth switch, and the fourth grounding switch are arranged sequentially in the first direction to form a second switch array; the first switch array and the second switch array are arranged sequentially in a second direction, and the first direction and the second direction intersect.

13. The radio frequency switch chip according to claim 12, characterized in that, The first input port is located between the first switch and the third switch; or / and, The second input port is located between the second switch and the fourth switch.

14. The radio frequency switch chip according to claim 12, characterized in that, The first switch, the second switch, the third switch, and the fourth switch are all the same size.

15. A radio frequency switch chip, characterized in that, It is provided with at least one input port, at least one output port and at least one ground port; the at least one output port includes a first output port and the at least one ground port includes a first ground port. The radio frequency switch chip includes: A first switching unit is connected between at least one input port and at least one output port, for connecting or disconnecting the signal path between at least one input port and at least one output port; and The second switching unit includes a first grounding switch and a second grounding switch; the first grounding switch is connected between the first output port and the first grounding port to form a first grounding path; the second grounding switch is connected between the first output port and the first grounding port to form a second grounding path. Wherein, the absolute value of the difference between the total resistance of the components on the first grounding path and the total resistance of the components on the second grounding path is less than or equal to the specified resistance value.

16. The radio frequency switch chip according to claim 15, characterized in that, The total resistance of the components on the first grounding path is equal to the total resistance of the components on the second grounding path.

17. A radio frequency switch chip, characterized in that, The RF switch chip includes a first input port, a second input port, a first output port, a second output port, a first ground port, and a second ground port; the RF switch chip comprises: The first switching unit includes a first switch, a second switch, a third switch, and a fourth switch. The first switch is connected between the first input port and the first output port, the second switch is connected between the second input port and the first output port, the third switch is connected between the first input port and the second output port, and the fourth switch is connected between the second input port and the second output port. The second switching unit includes a first grounding switch and a second grounding switch; the first grounding switch is connected between the first output port and the first grounding port to form a first grounding path; the second grounding switch is connected between the first output port and the first grounding port to form a second grounding path; and The third switching unit includes a third grounding switch and a fourth grounding switch; the third grounding switch is connected between the second output port and the second grounding port to form a third grounding path; the fourth grounding switch is connected between the second output port and the second grounding port to form a fourth grounding path.

18. The radio frequency switch chip according to claim 17, characterized in that, The first output port, the first ground port, the second ground port, and the second output port are all located on the first axis. The first ground switch and the second ground switch are arranged symmetrically about the first axis. The third ground switch and the fourth ground switch are also arranged symmetrically about the first axis.

19. The radio frequency switch chip according to claim 18, characterized in that, The first input port and the second input port are located on the second axis, the first axis extends in the first direction, the second axis extends in the second direction, and the first direction and the second direction intersect. The first grounding switch and the third grounding switch are arranged symmetrically about the second axis, the second grounding switch and the fourth grounding switch are arranged symmetrically about the second axis, the first switch and the third switch are arranged symmetrically about the second axis, and the second switch and the fourth switch are arranged symmetrically about the second axis.

20. A radio frequency front-end module, characterized in that, include: The substrate has at least one antenna port; An RF switch chip is disposed on the substrate; The radio frequency switch chip has at least one input port, at least one output port, and at least one ground port; at least one output port and at least one antenna port are connected in a one-to-one correspondence, at least one output port includes a first output port, and at least one ground port includes a first ground port; the radio frequency switch chip includes a first switch unit and a second switch unit; The first switching unit is connected between at least one input port and at least one output port for connecting or disconnecting the signal path between at least one input port and at least one output port; the second switching unit includes a first grounding switch and a second grounding switch; the first grounding switch is connected between the first output port and the first grounding port to form a first grounding path; the second grounding switch is connected between the first output port and the first grounding port to form a second grounding path; as well as A power amplifier chip is disposed on the substrate; The output terminal of the power amplifier chip is connected to the input port.

21. The radio frequency front-end module according to claim 20, characterized in that, Both the first output port and the first ground port are located on the first axis, and the first ground switch and the second ground switch are arranged symmetrically about the first axis.

22. A radio frequency front-end module, characterized in that, include: The substrate has at least one antenna port; An RF switch chip is disposed on the substrate; The radio frequency switch chip has at least one input port, at least one output port, and at least one ground port; at least one input port and at least one antenna port are connected in a one-to-one correspondence; at least one output port includes a first output port; at least one ground port includes a first ground port; the radio frequency switch chip includes a first switching unit and a second switching unit. The first switching unit is connected between at least one input port and at least one output port for connecting or disconnecting the signal path between at least one input port and at least one output port; the second switching unit includes a first grounding switch and a second grounding switch; the first grounding switch is connected between the first output port and the first grounding port to form a first grounding path; the second grounding switch is connected between the first output port and the first grounding port to form a second grounding path; as well as A low-noise amplifier chip is disposed on the substrate; The input terminal of the low-noise amplifier chip is connected to the output port.

23. The radio frequency front-end module according to claim 22, characterized in that, Both the first output port and the first ground port are located on the first axis, and the first ground switch and the second ground switch are arranged symmetrically about the first axis.

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