A chaotic sequence password generation method and system based on time-varying coupling variable structure

CN122601167APending Publication Date: 2026-08-18STATE GRID JIANGXI ELECTRIC POWER CO LTD RES INST
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Patent Information

Application Number
CN202611088221.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-07-22
Publication Date
2026-08-18

AI Technical Summary

Technical Problem

[0004]本发明提供一种基于时变耦合变结构的混沌序列密码生成方法及系统,旨在解决现有技术在有限精度下混沌退化严重、硬件资源消耗高以及安全性不足的技术问题

Benefits of technology

[0021]本申请的基于时变耦合变结构的混沌序列密码生成方法及系统,首先,通过构建梳状混沌映射并引入2的负幂次扰动参数,在28比特有限精度下有效抑制了数字混沌退化,结合时滞耦合与每轮迭代后动态更新的第一动态索引、第二动态索引,使系统状态演化轨迹具有高度不可预测性,224比特密钥空间与256比特内部状态远超128比特安全阈值,能够抵抗代数攻击、线性攻击和差分攻击;其次,非线性移位预处理摒弃传统循环移位而创新性地采用按位与、右移、比特拼接及异或的组合操作,显著增强了状态矩阵的混淆与扩散能力,配合动态变结构机制(每完成一维更新立即重新计算索引),打破了固定结构可能存在的代数规律性;再次,所有运算均设计为移位、加法、异或、按位与等硬件友好型操作,梳状映射中的乘法由移位替代,耦合函数仅需一个模加器与循环移位器,非线性移位仅消耗少量逻辑门,使得整体硬件实现等效门数低至3986GE,在资源受限的FPGA/ASIC平台上实现了高安全性与高效率的统一;最后,密钥流生成过程中,中间变量s的低16比特与动态选取的两个16比特子变量进行异或,并将s反馈至过渡状态寄存器作为下一轮迭代的当前过渡状态,形成了闭环动态连续性,进一步增强了前后密钥帧间的无关联性。

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Abstract

The application discloses a chaotic sequence password generation method and system based on time-varying coupling variable structure, and the method comprises the following steps: extracting a specific bit from a state variable to generate a dynamic index which dynamically changes with iteration; selecting state variables from a current state set and a time-lag state set according to the dynamic index to generate a coupling term through coupling operation; selecting a mapping function from a preset comb-shaped chaotic mapping function library by using the dynamic index to perform nonlinear transformation and update the time-lag state variable; after completing a round of update, generating an intermediate variable based on the updated state and the transition state; selecting part of state variables from the internal state set by using the intermediate variable and the dynamic index to perform combination transformation and output a key stream, and meanwhile, feeding back the intermediate variable to the transition state register. Through the introduction of a disturbance parameter, the chaotic degradation is suppressed, the bit-by-bit and nonlinear shift and the dynamic variable structure mechanism are adopted, high security and low hardware overhead are combined, and the method is suitable for resource-limited high-speed encryption communication scenes.
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Description

Technical Field

[0001] This invention belongs to the field of information security technology, and in particular relates to a method and system for generating chaotic sequence cryptography based on time-varying coupled variable structure. Background Technology

[0002] Chaotic systems, due to their extreme sensitivity to initial conditions, ergodicity, and unpredictability, are widely used in cryptography, especially in the design of stream ciphers. However, traditional chaotic maps (such as the Logistic map and Henon map) rely on complex multiplication operations in hardware implementation, resulting in high resource consumption and poor real-time performance; while the Tent map, although simple in structure, lacks sufficient nonlinear strength, making it difficult to meet cryptographic security requirements. Furthermore, digital chaotic systems are prone to dynamic degradation under finite precision, leading to shortened keystream periods and decreased randomness, seriously threatening cryptographic security.

[0003] While existing lightweight cryptographic algorithms (such as Trivium and Enocoro-80) consume low hardware resources, their key spaces are small (typically 80 bits), resulting in low randomness test pass rates and making it difficult to balance security and efficiency. Algorithms like SOSEMANUK and eSTREAM, while offering high throughput, consume excessive hardware resources (approximately 18500 GE), making them unsuitable for resource-constrained scenarios. Therefore, there is an urgent need for a chaotic sequence cryptography generation method that can guarantee high security while maintaining low hardware overhead. Summary of the Invention

[0004] This invention provides a chaotic sequence cryptography generation method and system based on time-varying coupled variable structure, aiming to solve the technical problems of severe chaotic degradation, high hardware resource consumption, and insufficient security in existing technologies with limited accuracy.

[0005] In a first aspect, the present invention provides a chaotic sequence cryptography generation method based on time-varying coupled variable structure, comprising:

[0006] The system's internal state set and transition state register are initialized according to the seed key; the internal state set includes the current state set and the time-delay state set.

[0007] Extract bit data at preset positions from the state variables in the current state set to generate a dynamic index, which changes dynamically with system iteration;

[0008] In each iteration, state variables are selected from the current state set and the time-delay state set according to the dynamic index, coupling operations are performed on the selected state variables to generate coupling terms, and a target chaotic mapping function is determined from a set of preset chaotic mapping functions according to the dynamic index. The coupling terms are then subjected to a nonlinear transformation using the target chaotic mapping function, and the selected state variables in the time-delay state set are updated based on the transformation results.

[0009] After updating the state variables, the dynamic index is updated synchronously, and then the next dimension iteration is started, until all dimensions have been updated.

[0010] Intermediate variables are generated based on the updated state variables and the current transition state stored in the transition state register;

[0011] Based on the updated dynamic index, select a portion of state variables from the internal state set, combine and transform the intermediate variables with the selected portion of state variables, output a key stream, and write the intermediate variables into the transition state register to update the current transition state.

[0012] Secondly, the present invention provides a chaotic sequence cryptography generation system based on time-varying coupled variable structure, comprising:

[0013] An initialization module is configured to initialize the system’s internal state set and transition state register based on a seed key, wherein the internal state set includes a current state set and a time-delay state set.

[0014] The extraction module is configured to extract bit data at a preset position from the state variables in the current state set and generate a dynamic index, which changes dynamically with system iteration.

[0015] The first generation module is configured to, in each iteration, select state variables from the current state set and the time-delay state set according to the dynamic index, perform coupling operations on the selected state variables to generate coupling terms, determine a target chaotic mapping function from a set of preset chaotic mapping functions according to the dynamic index, perform nonlinear transformation on the coupling terms using the target chaotic mapping function, and update the selected state variables in the time-delay state set according to the transformation result.

[0016] The update module is configured to synchronously update the dynamic index after completing the update of the state variables, and then proceed to the next dimension iteration until all dimensions have been updated.

[0017] The second generation module is configured to generate intermediate variables based on the updated state variables and the current transition state stored in the transition state register.

[0018] The output module is configured to select a subset of state variables from the internal state set based on the updated dynamic index, combine and transform the intermediate variables with the selected subset of state variables, output a key stream, and write the intermediate variables into the transition state register to update the current transition state.

[0019] Thirdly, an electronic device is provided, comprising: at least one processor, and a memory communicatively connected to the at least one processor, wherein the memory stores instructions executable by the at least one processor, the instructions being executed by the at least one processor to enable the at least one processor to perform the steps of the chaotic sequence cryptography generation method based on time-varying coupled variable structure according to any embodiment of the present invention.

[0020] Fourthly, the present invention also provides a computer-readable storage medium having a computer program stored thereon, wherein when the program instructions are executed by a processor, the processor performs the steps of the chaotic sequence cryptography generation method based on time-varying coupled variable structure according to any embodiment of the present invention.

[0021] This application presents a chaotic sequence cryptography generation method and system based on time-varying coupled variable structure. First, by constructing a comb-like chaotic map and introducing a negative power of 2 perturbation parameter, digital chaotic degradation is effectively suppressed at 28-bit finite precision. Combined with time-delay coupling and dynamically updated first and second dynamic indices after each iteration, the system state evolution trajectory becomes highly unpredictable. The 224-bit key space and 256-bit internal state far exceed the 128-bit security threshold, resisting algebraic, linear, and differential attacks. Second, the nonlinear shift preprocessing abandons traditional cyclic shifting and innovatively adopts a combination of bitwise AND, right shift, bit concatenation, and XOR operations, significantly enhancing the confusion and diffusion capabilities of the state matrix. This, combined with the dynamic variable structure mechanism (each time a one-dimensional update is completed...), further enhances the system's ability to generate chaotic sequences. This involves recalculating the index, breaking the algebraic regularity that may exist in a fixed structure. Furthermore, all operations are designed as hardware-friendly operations such as shifting, addition, XOR, and bitwise AND. Multiplication in the comb mapping is replaced by shifting, and the coupling function requires only one modulo adder and a cyclic shifter. Nonlinear shifts consume only a small number of logic gates, resulting in an overall hardware implementation with an equivalent gate count as low as 3986GE. This achieves a balance between high security and high efficiency on resource-constrained FPGA / ASIC platforms. Finally, during key stream generation, the lower 16 bits of the intermediate variable s are XORed with two dynamically selected 16-bit sub-variables, and s is fed back to the transition state register as the current transition state for the next iteration, forming a closed-loop dynamic continuity and further enhancing the independence between consecutive key frames.

[0022] In summary, this invention has made significant progress in suppressing digital chaos degradation, improving nonlinear confusion capabilities, reducing hardware overhead, and increasing throughput and randomness. It is particularly suitable for high-speed encrypted communication scenarios with limited resources, such as IoT terminals, encrypted network cards, and security chips. Attached Figure Description

[0023] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the following description of the embodiments will be briefly introduced. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1 A flowchart of a chaotic sequence cryptography generation method based on time-varying coupled variable structure provided in an embodiment of the present invention;

[0025] Figure 2 This is a structural block diagram of a chaotic sequence cryptography generation system based on a time-varying coupled variable structure, provided in an embodiment of the present invention.

[0026] Figure 3 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0027] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0028] Please see Figure 1 The diagram shows a flowchart of a chaotic sequence cryptography generation method based on a time-varying coupled variable structure according to this application.

[0029] like Figure 1 As shown, the chaotic sequence cryptography generation method based on time-varying coupled variable structure specifically includes the following steps:

[0030] Step S101: Initialize the system's internal state set and transition state register according to the seed key. The internal state set includes the current state set and the time-delay state set.

[0031] In this step, the seed key is mapped to eight initial state variables with a preset precision. These eight initial state variables constitute a four-dimensional current state and a four-dimensional time-delay state.

[0032] The initial value of the transition state register is set to a preset constant or derived from the seed key, and is used to store the intermediate variables generated in the previous iteration as the current transition state of the current iteration.

[0033] In one specific embodiment, a 224-bit seed key K is first obtained from an external input. K is then divided into groups of 28 bits, resulting in eight 28-bit initial state variables, denoted as follows: Among them, the first four state variables The four-dimensional state set at the current moment The last four state variables The four-dimensional time-delay state set of the previous moment Simultaneously, a 28-bit transition state register is set up. Its initial value can be set to an all-zero constant (e.g., 0x0000000), or a non-zero initial value can be derived by hashing or performing a simple XOR operation on the seed key. This transition state register is used to store the intermediate variable s generated in the previous iteration and participates in the nonlinear coupling operation as the current transition state in the current iteration. After initialization, the system enters the subsequent iterative encryption process.

[0034] Step S102: Extract bit data at a preset position from the state variables in the current state set to generate a dynamic index, which changes dynamically with system iteration.

[0035] In this step, before extracting specific location data from the state variables in the current state set and generating a dynamic index, a nonlinear shift preprocessing is performed on the state variables in the internal state set, specifically:

[0036] Let the eight 28-bit state variables at the current moment be... Where the i-th state variable is represented as .

[0037] The state variables in the current state set are nonlinearly shifted by a combination of bitwise AND, right shift, bit concatenation, and XOR operations to obtain new nonlinearly shifted state variables. The expression is:

[0038] ,

[0039] In the formula, Let i be the (i+1)th state variable. Let i be the i-th state variable. Indicates a bitwise AND operation. This indicates a bitwise XOR operation. This indicates a right shift operation. This indicates a bit concatenation operation. The preset 28-bit mask, To preset the number of bits to shift right, To obtain state variables The a-th to the b-th positions, To obtain state variables The c-th to d-th positions.

[0040] It should be noted that extracting bit data at a preset position from the state variables in the current state set to generate a dynamic index includes:

[0041] Take the second bit of each state variable in the current state set to obtain 8 bits.

[0042] Perform a bitwise XOR operation on the 8 bits, then perform a modulo-4 operation on the XOR result to generate the first dynamic index. and the first dynamic index Add 1 and modulo 4 to generate a second dynamic index. The expression is:

[0043] ,

[0044] ,

[0045] In the formula, This indicates a bitwise XOR operation. This indicates taking the remainder modulo 4. It represents the second position of the i-th state variable.

[0046] In one specific embodiment, the mask is taken. (i.e., clear the high 4 bits and set all 1s to the low 24 bits), right shift by bits. ,Pick ,Right now It is 6 bits. The original value is 6 bits, which are concatenated to obtain 12 bits. The calculation formula then becomes:

[0047] .

[0048] The above operations are performed in parallel or sequentially on all eight state variables to obtain a preprocessed new state matrix. This preprocessing method abandons the traditional simple cyclic shifting and instead extracts key bits by bitwise AND, introduces high-order information of adjacent states by right shifting, and mixes different bit segments of different states by bit concatenation. Finally, it fuses them by XOR, which significantly enhances the nonlinearity and diffusion effect.

[0049] After completing the nonlinear shift preprocessing, a first dynamic index is generated based on the preprocessed state variables. Second dynamic index The specific process is as follows:

[0050] From each state variable Extract the second bit (starting from the least significant bit, bit 0, i.e.) ), resulting in 8 bits .

[0051] Perform a bitwise XOR operation on these 8 bits to obtain a 1-bit intermediate value. .

[0052] Will Expanded to 2 bits (e.g.) The least significant bit is itself, and the higher bits are padded with 0s), then modulo 4 is taken (because the XOR result is only 0 or 1, and modulo 4 still results in 0 or 1), but to increase the index range, it can also be... XORing the value with its own left-shifted value by 1 bit and then modulo 4, in a specific embodiment of the present invention, the result is directly calculated using the following formula:

[0053] ,

[0054] Since the parentheses contain only 0 or 1, the result modulo 4 is the value itself. It can be 0 or 1. To further enrich the index values, it can be changed to:

[0055] ,

[0056] Then calculate the second dynamic index:

[0057] ,

[0058] so always The next loop value is guaranteed to be different from the two indices, and it will be recalculated after each iteration.

[0059] generated and All are 2-bit integers (values ​​0, 1, 2, or 3), which will be used in subsequent steps to dynamically select the coupled state variables and chaotic mapping functions. Since the state variables are updated after each iteration, the dynamic index also changes accordingly, giving the system structure time-varying characteristics.

[0060] Through the aforementioned nonlinear shift preprocessing and dynamic index generation, a sufficiently confused initial state and flexible adaptive control signals are provided for subsequent hyperchaotic iterations, effectively improving the security and unpredictability of the cryptographic system.

[0061] Step S103: In each iteration, state variables are selected from the current state set and the time-delay state set according to the dynamic index, coupling operations are performed on the selected state variables to generate coupling terms, and a target chaotic mapping function is determined from a set of preset chaotic mapping functions according to the dynamic index. The coupling terms are then subjected to nonlinear transformation using the target chaotic mapping function, and the selected state variables in the time-delay state set are updated according to the transformation result.

[0062] In this step, based on the first dynamic index Select a state variable from the current state set. According to the second dynamic index Select another state variable from the set of time-delay states. .

[0063] For the state variable and the other state variable Performing a coupled operation yields the coupling term, expressed as:

[0064] ,

[0065] In the formula, For coupling terms, This indicates a circular left shift.

[0066] It should be noted that the preset multiple chaotic mapping functions include a comb-shaped chaotic mapping function constructed based on piecewise linear mapping, wherein the comb-shaped chaotic mapping function introduces a perturbation parameter. To suppress digital chaos degradation under finite precision, the expression is:

[0067] ,

[0068] ,

[0069] In the formula, The number of comb teeth. Let be the forward mapping function of the comb-like chaotic mapping. Let be the inverse mapping function of the comb-like chaotic mapping. A number between 0 and 1 To perform a modulo operation on 1.

[0070] Step S104: After updating the state variables, the dynamic index is updated synchronously, and then the next dimension iteration is entered until all dimensions are updated.

[0071] Step S105: Generate intermediate variables based on the updated state variables and the current transition state stored in the transition state register.

[0072] In this step, the updated state variable is nonlinearly coupled with the current transition state. Then, based on the current first dynamic index and second dynamic index, a corresponding mapping function is selected from a set of pre-set chaotic mapping functions to perform a nonlinear transformation on the coupling result, and a 28-bit intermediate variable s is output.

[0073] Step S106: Select a portion of state variables from the internal state set according to the updated dynamic index, combine and transform the intermediate variables with the selected portion of state variables, output the key stream, and write the intermediate variables into the transition state register to update the current transition state.

[0074] In this step, the 0th to 15th bits of the intermediate variable s are logically combined with the updated first dynamic index and second dynamic index to generate an address selection signal.

[0075] Based on the address selection signal, two 16-bit state variables are selected by address from the internal state set consisting of eight 28-bit state variables, and are denoted as the first state variable. Second state variable .

[0076] Bits 0 through 15 of the intermediate variable s are compared with the first state variable. Second state variable Perform a bitwise XOR operation to output a 16-bit key stream. The expression is:

[0077] ,

[0078] In the formula, For the 0th to 15th bits of the intermediate variable s, This is a bitwise XOR operation.

[0079] In one specific embodiment, the 0th to 15th bits of the intermediate variable s are taken. (i.e., the lower 16 bits). Simultaneously, obtain the current first dynamic index. Second dynamic index (Each bit is 2 bits, with a value range of 0 to 3). These bits are logically combined according to a preset rule to generate an address selection signal, which is used to select two 16-bit sub-variables from the internal state set.

[0080] In one specific embodiment, the following combination method is used: the 12th to 15th bits of the intermediate variable s are combined. (4 bits) and (that is, to put) After shifting left by 2 bits, and Perform a bitwise XOR operation on the concatenated 4 bits to obtain a 4-bit address. Then, change the 8th to 11th positions of the intermediate variable s. and XORing yields a 4-bit address. ,Right now:

[0081] ,

[0082] ,

[0083] in, Indicates left shift, This indicates bit concatenation.

[0084] The internal state set contains eight 28-bit state variables, denoted as... Each 28-bit variable can be split into a high 12 bits and a low 16 bits, or split in other custom ways. In this invention, in order to obtain 16-bit sub-variables, the low 16 bits (bits 0 to 15) of each state variable are usually directly taken as selectable sub-variables.

[0085] Based on the generated address selection signal and Two 16-bit sub-variables are selected from each of the eight state variables. and ,For example:

[0086] make ,choose The lower 16 bits as .

[0087] make ,choose The lower 16 bits as .

[0088] To prevent and From the same state variable (reducing security), a rule can be added: if Then Add 1 to mold 8, or use and The higher bits are selected as either the high 16 bits or the low 16 bits, so that the two sub-variables come from different states or different byte segments.

[0089] In a preferred embodiment, the lower 16 bits are always extracted from each state variable, and the two addresses must be different. The specific operation is as follows: , .

[0090] In summary, the method of this application extracts specific points from state variables to generate dynamic indices that change dynamically with iteration; based on the dynamic indices, it selects state variables from the current state set and the time-delayed state set respectively for coupling operations to generate coupling terms; it then uses the dynamic indices to select mapping functions from a pre-set comb-shaped chaotic mapping function library for nonlinear transformation to update the time-delayed state variables; after completing one round of updates, it generates intermediate variables based on the updated state and the transition state; and then uses the intermediate variables and the dynamic indices to select some state variables from the internal state set for combined transformation to output the key stream, while simultaneously feeding the intermediate variables back to the transition state register; by introducing perturbation parameters to suppress chaotic degradation and employing bitwise and nonlinear shift and dynamic variable structure mechanisms, it combines high security with low hardware overhead, making it suitable for high-speed encrypted communication scenarios with limited resources.

[0091] Please see Figure 2 The diagram shows a structural block diagram of a chaotic sequence cryptography generation system based on a time-varying coupled variable structure according to this application.

[0092] like Figure 2 As shown, the chaotic sequence password generation system 200 includes an initialization module 210, an extraction module 220, a first generation module 230, an update module 240, a second generation module 250, and an output module 260.

[0093] The initialization module 210 is configured to initialize the system's internal state set and transition state register according to the seed key. The internal state set includes a current state set and a time-delay state set. The extraction module 220 is configured to extract bit data at preset positions from the state variables in the current state set and generate a dynamic index, which changes dynamically with system iteration. The first generation module 230 is configured to, in each iteration, select state variables from the current state set and the time-delay state set according to the dynamic index, perform coupling operations on the selected state variables to generate coupling terms, and determine a target chaotic mapping function from a preset set of chaotic mapping functions according to the dynamic index, and use the target chaotic mapping function to perform coupling operations on the selected state variables. The coupling term undergoes a nonlinear transformation, and the selected state variables in the time-delay state set are updated based on the transformation result. The update module 240 is configured to synchronously update the dynamic index after completing the update of the state variables, and then proceed to the next dimension iteration until all dimensions are updated. The second generation module 250 is configured to generate intermediate variables based on the updated state variables and the current transition state stored in the transition state register. The output module 260 is configured to select a portion of state variables from the internal state set according to the updated dynamic index, combine the intermediate variables with the selected portion of state variables, output a key stream, and write the intermediate variables into the transition state register to update the current transition state.

[0094] It should be understood that Figure 2 The modules and references described in the document Figure 1 The steps described in the text correspond to those in the method described above. Therefore, the operations, features, and corresponding technical effects described above also apply to the method described in the text. Figure 2 The various modules in the document will not be described in detail here.

[0095] In other embodiments, the present invention also provides a computer-readable storage medium storing a computer program thereon, wherein when the program instructions are executed by a processor, the processor performs the chaotic sequence cryptography generation method based on time-varying coupled variable structure in any of the above method embodiments.

[0096] In one embodiment, the computer-readable storage medium of the present invention stores computer-executable instructions, which are configured as follows:

[0097] The system's internal state set and transition state register are initialized based on the seed key. The internal state set includes the current state set and the time-delay state set.

[0098] Bit data at a preset position is extracted from the state variables in the current state set to generate a dynamic index, which changes dynamically with system iteration.

[0099] In each iteration, state variables are selected from the current state set and the time-delay state set according to the dynamic index, coupling operations are performed on the selected state variables to generate coupling terms, and a target chaotic mapping function is determined from a set of preset chaotic mapping functions according to the dynamic index. The coupling terms are then subjected to a nonlinear transformation using the target chaotic mapping function, and the selected state variables in the time-delay state set are updated based on the transformation results.

[0100] After updating the state variables, the dynamic index is updated synchronously, and then the next dimension iteration is started, until all dimensions have been updated.

[0101] Intermediate variables are generated based on the updated state variables and the current transition state stored in the transition state register.

[0102] Based on the updated dynamic index, select a portion of state variables from the internal state set, combine and transform the intermediate variables with the selected portion of state variables, output a key stream, and write the intermediate variables into the transition state register to update the current transition state.

[0103] Computer-readable storage media may include a stored program area and a stored data area, wherein the stored program area may store an operating system and an application program required for at least one function; the stored data area may store data created based on the use of a chaotic sequence cryptography generation system based on a time-varying coupled variable structure. In addition, the computer-readable storage medium may include high-speed random access memory and may also include memory, such as at least one disk storage device, flash memory device, or other non-volatile solid-state storage device. In some embodiments, the computer-readable storage medium may optionally include memory remotely located relative to the processor. These remote memories can be connected to the chaotic sequence cryptography generation system based on a time-varying coupled variable structure via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0104] Figure 3 This is a schematic diagram of the structure of the electronic device provided in the embodiment of the present invention, such as... Figure 3 As shown, the device includes a processor 310 and a memory 320. The electronic device may also include an input device 330 and an output device 340. The processor 310, memory 320, input device 330, and output device 340 can be connected via a bus or other means. Figure 3 Taking a bus connection as an example, memory 320 is the computer-readable storage medium described above. Processor 310 executes various server functions and data processing by running non-volatile software programs, instructions, and modules stored in memory 320, thereby implementing the chaotic sequence cryptography generation method based on time-varying coupled variable structure described in the above method embodiment. Input device 330 can receive input digital or character information and generate key signal inputs related to user settings and function control of the chaotic sequence cryptography generation system based on time-varying coupled variable structure. Output device 340 may include a display screen or other display device.

[0105] The aforementioned electronic device can execute the method provided in the embodiments of the present invention, and has the corresponding functional modules and beneficial effects for executing the method. Technical details not described in detail in this embodiment can be found in the method provided in the embodiments of the present invention.

[0106] In one implementation, the above-described electronic device is applied to a chaotic sequence cryptography generation system based on a time-varying coupled variable structure, serving as a client, and includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, the instructions being executed by the at least one processor to enable the at least one processor to:

[0107] The system's internal state set and transition state register are initialized based on the seed key. The internal state set includes the current state set and the time-delay state set.

[0108] Bit data at a preset position is extracted from the state variables in the current state set to generate a dynamic index, which changes dynamically with system iteration.

[0109] In each iteration, state variables are selected from the current state set and the time-delay state set according to the dynamic index, coupling operations are performed on the selected state variables to generate coupling terms, and a target chaotic mapping function is determined from a set of preset chaotic mapping functions according to the dynamic index. The coupling terms are then subjected to a nonlinear transformation using the target chaotic mapping function, and the selected state variables in the time-delay state set are updated based on the transformation results.

[0110] After updating the state variables, the dynamic index is updated synchronously, and then the next dimension iteration is started, until all dimensions have been updated.

[0111] Intermediate variables are generated based on the updated state variables and the current transition state stored in the transition state register.

[0112] Based on the updated dynamic index, select a portion of state variables from the internal state set, combine and transform the intermediate variables with the selected portion of state variables, output a key stream, and write the intermediate variables into the transition state register to update the current transition state.

[0113] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., including several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods of various embodiments or some parts of embodiments.

[0114] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for generating chaotic sequence cryptography based on time-varying coupled variable structures, characterized in that, include: The system's internal state set and transition state register are initialized according to the seed key; the internal state set includes the current state set and the time-delay state set. Extract bit data at preset positions from the state variables in the current state set to generate a dynamic index, which changes dynamically with system iteration; In each iteration, state variables are selected from the current state set and the time-delay state set according to the dynamic index, coupling operations are performed on the selected state variables to generate coupling terms, and a target chaotic mapping function is determined from a set of preset chaotic mapping functions according to the dynamic index. The coupling terms are then subjected to a nonlinear transformation using the target chaotic mapping function, and the selected state variables in the time-delay state set are updated based on the transformation results. After updating the state variables, the dynamic index is updated synchronously, and then the next dimension iteration is started, until all dimensions have been updated. Intermediate variables are generated based on the updated state variables and the current transition state stored in the transition state register; Based on the updated dynamic index, select a portion of state variables from the internal state set, combine and transform the intermediate variables with the selected portion of state variables, output a key stream, and write the intermediate variables into the transition state register to update the current transition state.

2. The chaotic sequence cryptography generation method based on time-varying coupled variable structure according to claim 1, characterized in that, The initialization of the system's internal state set and transition state register based on the seed key includes: The seed key is mapped to eight initial state variables with a preset precision, and the eight initial state variables constitute a four-dimensional current state and a four-dimensional time-delay state. The initial value of the transition state register is set to a preset constant or derived from the seed key, and is used to store the intermediate variables generated in the previous iteration as the current transition state of the current iteration.

3. The chaotic sequence cryptography generation method based on time-varying coupled variable structure according to claim 1, characterized in that, Before extracting bit data at a preset position from the state variables in the current state set and generating a dynamic index, the method further includes: Let the eight 28-bit state variables at the current moment be... Where the i-th state variable is represented as ; The state variables in the current state set are nonlinearly shifted by a combination of bitwise AND, right shift, bit concatenation, and XOR operations to obtain new nonlinearly shifted state variables. The expression is: , In the formula, Let i be the (i+1)th state variable. Let i be the i-th state variable. Indicates a bitwise AND operation. This indicates a bitwise XOR operation. This indicates a right shift operation. This indicates a bit concatenation operation. The preset 28-bit mask, To preset the number of bits to shift right, To obtain state variables The a-th to the b-th positions, To obtain state variables The c-th to d-th positions.

4. The chaotic sequence cryptography generation method based on time-varying coupled variable structure according to claim 1, characterized in that, The step of extracting bit data at a preset position from the state variables in the current state set and generating a dynamic index includes: Take the second bit of each state variable in the current state set to obtain 8 bits; Perform a bitwise XOR operation on the 8 bits, then perform a modulo-4 operation on the XOR result to generate the first dynamic index. and the first dynamic index Add 1 and modulo 4 to generate a second dynamic index. The expression is: , , In the formula, This indicates a bitwise XOR operation. This means taking the remainder modulo 4. This represents the second position of the i-th state variable.

5. The chaotic sequence cryptography generation method based on time-varying coupled variable structure according to claim 4, characterized in that, The step of selecting state variables from the current state set and the time-delay state set according to the dynamic index, and performing coupling operations on the selected state variables to generate coupling terms includes: According to the first dynamic index Select a state variable from the current state set. According to the second dynamic index Select another state variable from the set of time-delay states. ; For the state variable and the other state variable Performing a coupled operation yields the coupling term, expressed as: , In the formula, For coupling terms, This indicates a circular left shift.

6. The chaotic sequence cryptography generation method based on time-varying coupled variable structure according to claim 1, characterized in that, The preset multiple chaotic mapping functions include a comb-shaped chaotic mapping function constructed based on piecewise linear mapping, wherein the comb-shaped chaotic mapping function introduces a perturbation parameter. To suppress digital chaos degradation under finite precision, the expression is: , , In the formula, The number of comb teeth. Let be the forward mapping function of the comb-like chaotic mapping. Let be the inverse mapping function of the comb-like chaotic mapping. A number between 0 and 1 To perform a modulo operation on 1.

7. The chaotic sequence cryptography generation method based on time-varying coupled variable structure according to claim 1, characterized in that, The generation of intermediate variables based on the updated state variables and the current transition state stored in the transition state register includes: The updated state variable is nonlinearly coupled with the current transition state. Then, based on the current first dynamic index and second dynamic index, a corresponding mapping function is selected from a plurality of preset chaotic mapping functions to perform a nonlinear transformation on the coupling result, and a 28-bit intermediate variable s is output.

8. The chaotic sequence cryptography generation method based on time-varying coupled variable structure according to claim 1, characterized in that, The step of selecting sub-state variables from the internal state set based on the updated dynamic index, combining and transforming the intermediate variables with the sub-state variables, and outputting a key stream includes: The address selection signal is generated by logically combining the 0th to 15th bits of the intermediate variable s with the updated first dynamic index and second dynamic index. Based on the address selection signal, two 16-bit state variables are selected by address from the internal state set consisting of eight 28-bit state variables, and are denoted as the first state variable. Second state variable ; Bits 0 through 15 of the intermediate variable s are compared with the first state variable. Second state variable Perform a bitwise XOR operation to output a 16-bit key stream. The expression is: , In the formula, For the 0th to 15th bits of the intermediate variable s, This is a bitwise XOR operation.

9. A chaotic sequence cryptography generation system based on a time-varying coupled variable structure, characterized in that, include: An initialization module is configured to initialize the system’s internal state set and transition state register based on a seed key, wherein the internal state set includes a current state set and a time-delay state set. The extraction module is configured to extract bit data at a preset position from the state variables in the current state set and generate a dynamic index, which changes dynamically with system iteration. The first generation module is configured to, in each iteration, select state variables from the current state set and the time-delay state set according to the dynamic index, perform coupling operations on the selected state variables to generate coupling terms, determine a target chaotic mapping function from a set of preset chaotic mapping functions according to the dynamic index, perform nonlinear transformation on the coupling terms using the target chaotic mapping function, and update the selected state variables in the time-delay state set according to the transformation result. The update module is configured to synchronously update the dynamic index after completing the update of the state variables, and then proceed to the next dimension iteration until all dimensions have been updated. The second generation module is configured to generate intermediate variables based on the updated state variables and the current transition state stored in the transition state register. The output module is configured to select a subset of state variables from the internal state set based on the updated dynamic index, combine and transform the intermediate variables with the selected subset of state variables, output a key stream, and write the intermediate variables into the transition state register to update the current transition state.