Fault tracing method and device, building automation system, storage medium and program product

Abstract

The present disclosure provides a fault tracing method and device, a building automation system, a storage medium and a program product. The fault tracing method comprises: writing node identifiers of nodes performing a specified service in a topology network into a cache; acquiring an output value of an end output node associated with the specified service at a predetermined period; determining whether the output of the end output node is abnormal; in the case that the output of the end output node is abnormal, generating a total link of the specified service based on the node identifiers of the nodes in the cache and topology information of the topology network, the total link comprising a plurality of branch links, each branch link comprising one or more nodes; presenting the total link; in response to an abnormality query instruction, acquiring a historical output value of a logical judgment node in each branch link; in the case that it is determined that the dead zone threshold configuration of the logical judgment node is abnormal according to the historical output value, highlighting the logical judgment node in the total link.

Description

Technical Field

[0001] This disclosure relates to the field of control, and in particular to a fault tracing method and apparatus, a building automation system, a storage medium, and a program product. Background Technology

[0002] Logic debugging of building automation systems is a crucial step in project implementation. Currently, debugging personnel primarily perform forward debugging by providing input signals and observing whether the output meets expectations. However, in real-world operating environments, debugging personnel are typically not the developers of the control logic and are unfamiliar with the dependencies between complex logic blocks, priority scheduling strategies, and boundary transition conditions. Therefore, hidden problems caused by abnormal logic block priority scheduling, repeated threshold jumps, and improper dead-zone handling are often difficult to detect, leading to time-consuming and laborious troubleshooting when sporadic errors or control failures occur on-site. Summary of the Invention

[0003] The inventors noted that in related technologies, some manufacturers use visual logic development functions to assist in understanding the design phase in order to improve debugging efficiency. However, this function only serves the programming and configuration stages, and cannot dynamically track the actual execution path of the logic during actual operation. For the operating environment, mainstream manufacturers can record the waveforms of internal variables of the Programmable Logic Controller (PLC) by configuring trigger conditions for analyzing signal timing and occasional faults. However, this method requires prior configuration and download to the controller to work. It cannot capture sudden faults that are unpredictable and for which trigger conditions cannot be set in advance. Furthermore, it records the waveform of a single variable, and after a fault occurs, it cannot automatically associate signal changes with specific logic blocks and execution paths; debugging personnel still need to manually deduce the causal relationship. In addition, this function is highly dependent on the controller's storage and computing resources, making it difficult to deploy on controllers with low computing power and difficult to upgrade existing systems.

[0004] Accordingly, this disclosure provides a fault tracing method that automatically obtains and highlights the actual execution path that caused the abnormality when the output of the terminal output node is abnormal, so that even debuggers who are not familiar with the logic code can quickly locate hidden control defects.

[0005] In a first aspect of this disclosure, a fault tracing method is provided, executed by a fault tracing device, comprising: writing node identifiers of each node executing a specified service in a topology network into a cache; acquiring output values ​​of end-output nodes associated with the specified service at predetermined intervals; determining whether the output of the end-output nodes is abnormal; if the output of the end-output nodes is abnormal, generating a total link for the specified service based on the node identifiers of each node in the cache and the topology information of the topology network, wherein the total link includes multiple branch links, each branch link including one or more nodes; presenting the total link; in response to an anomaly query instruction, acquiring historical output values ​​of logical judgment nodes in each branch link; determining whether the dead-zone threshold configuration of the logical judgment nodes is abnormal based on the historical output values; if it is determined that the dead-zone threshold configuration of the logical judgment nodes is abnormal, highlighting the logical judgment nodes in the total link.

[0006] In some embodiments, historical output values ​​include the output value of the logical decision node in the current period N and the output values ​​in the previous m periods. Determining whether the dead-zone threshold configuration of the logical decision node is abnormal based on historical output values ​​includes: determining whether the deviation between the output value of the logical decision node in the nth period and the output value in the (n-1)th period is greater than a first threshold. If the deviation between the output value of the logical decision node in the nth cycle and the output value in the (n-1)th cycle is greater than the first threshold, then it is determined that the output value of the logical decision node in the nth cycle has jumped relative to the output value in the (n-1)th cycle. If the number of jumps of the logical decision node in the current cycle N and the previous m cycles is greater than the jump threshold, then it is determined that the dead zone threshold configuration of the logical decision node is abnormal.

[0007] In some embodiments, the logical decision node includes a comparator or a timer.

[0008] In some embodiments, determining whether the output of the terminal output node is abnormal includes: determining whether the difference between the output value of the terminal output node in the current period and the output value in the previous period exceeds a predetermined threshold. If the difference between the output value of the terminal output node in the current period and the output value in the previous period exceeds the predetermined threshold, it is determined that the output of the terminal output node is abnormal.

[0009] In some embodiments, in response to an exception query command, the execution path of a specified service is extracted from the overall link. Priority information of all nodes on the execution path is extracted. Based on the priority information of all nodes and their upstream and downstream relationships, it is determined whether the execution order of the specified service is correct. If the execution order of the specified service is determined to be incorrect, the execution path is highlighted in the overall link using a first display mode.

[0010] In some embodiments, determining whether the execution order of a specified service is correct includes: judging whether the priority information of all nodes corresponds to the upstream and downstream relationships of all nodes. If the priority information of all nodes does not correspond to the upstream and downstream relationships of all nodes, the execution order of the specified service is determined to be incorrect.

[0011] In some embodiments, extracting the execution path of a specified service from the overall link includes: identifying all root nodes in the overall link; and extracting the path from each root node to the final output node as the execution path.

[0012] In some embodiments, if the execution order of a specified service is determined to be correct, the execution path is highlighted in the overall link in a second display mode, wherein the second display mode is different from the first display mode.

[0013] In some embodiments, all nodes required to execute a specified service are retrieved from a preset service information list. It is then determined whether any nodes are missing, where the missing nodes are not included in the overall network link. If a missing node exists, it is added to the overall network link according to the network topology information to update the overall network link. The missing node and the link containing it are highlighted.

[0014] In a second aspect of this disclosure, a fault tracing apparatus is provided, comprising: a memory configured to store instructions; and a processor coupled to the memory, the processor being configured to execute the method described in any of the above embodiments based on the instructions stored in the memory.

[0015] In a third aspect of this disclosure, a building automation system is provided, including the aforementioned fault tracing device.

[0016] In a fourth aspect of this disclosure, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores computer instructions that, when executed by a processor, implement the method as described in any of the above embodiments.

[0017] In a fifth aspect of this disclosure, a computer program product is provided, including computer instructions, wherein when executed by a processor, the computer instructions implement the method as described in any of the above embodiments.

[0018] Other features and advantages of this disclosure will become clear from the following detailed description of exemplary embodiments with reference to the accompanying drawings. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of this disclosure or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is a flowchart illustrating a fault tracing method according to an embodiment of the present disclosure.

[0021] Figure 2 This is a schematic diagram of the overall link structure of one embodiment of the present disclosure.

[0022] Figure 3 This is a schematic diagram of the overall link structure according to another embodiment of this disclosure.

[0023] Figure 4 This is one of the structural diagrams of the overall link in yet another embodiment of this disclosure.

[0024] Figure 5 This is a second schematic diagram of the overall link structure of yet another embodiment of this disclosure.

[0025] Figure 6 This is the third schematic diagram of the overall link structure of yet another embodiment of this disclosure.

[0026] Figure 7 This is a flowchart illustrating a fault tracing method according to another embodiment of the present disclosure.

[0027] Figure 8 This is the fourth schematic diagram of the overall link structure of yet another embodiment of this disclosure.

[0028] Figure 9 This is the fifth schematic diagram of the overall link structure of yet another embodiment of this disclosure.

[0029] Figure 10 This is a schematic diagram of the structure of a fault tracing device according to an embodiment of the present disclosure.

[0030] Figure 11 This is a schematic diagram of the structure of a building automation system according to an embodiment of the present disclosure. Detailed Implementation

[0031] The technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit this disclosure or its application or use. All other embodiments obtained by those skilled in the art based on the embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.

[0032] Unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps set forth in these embodiments do not limit the scope of this disclosure.

[0033] At the same time, it should be understood that, for ease of description, the dimensions of the various parts shown in the accompanying drawings are not drawn according to actual scale.

[0034] Techniques, methods, and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and equipment should be considered part of the specification.

[0035] In all examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not as limitations. Therefore, other examples of exemplary embodiments may have different values.

[0036] It should be noted that similar labels and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be discussed further in subsequent figures.

[0037] Figure 1 This is a schematic flowchart of a fault tracing method according to an embodiment of the present disclosure. In some embodiments, the following fault tracing method is executed by a fault tracing device, including steps 111-118.

[0038] In step 111, the node identifiers of each node executing the specified service in the topology network are written into the cache.

[0039] For example, each node is assigned a globally unique 32-bit integer identifier (ID), and the topology of the network is cached. Configurable parameters, including dead zone threshold, priority information, and preemption strategy, can be set in the attribute configuration interface for the connection links between nodes.

[0040] In step 112, the output values ​​of the end output nodes associated with the specified service are obtained at predetermined intervals.

[0041] For example, it can be executed cyclically according to a fixed scan cycle, such as 50ms.

[0042] The output types of the terminal output nodes include digital output, analog output, or control word register.

[0043] For example, digital outputs can be used for relay control to control the start and stop of fans, and valve switching control.

[0044] For example, analog outputs control the opening degree of valves and the speed of frequency converters.

[0045] For example, the control word register is the status word register of the air conditioning unit.

[0046] In step 113, determine whether the output of the terminal output node is abnormal.

[0047] In some embodiments, it is determined whether the difference between the output value of the end output node in the current cycle and the output value in the previous cycle exceeds a predetermined threshold.

[0048] If the difference between the output value of the terminal output node in the current cycle and the output value in the previous cycle exceeds a predetermined threshold, it is determined that the output of the terminal output node is abnormal.

[0049] For example, the output of the terminal output node is an analog quantity, and the predetermined threshold is 1.2. If the difference between the output value of the terminal output node in the current i-th cycle and the output value in the (i-1)-th cycle is greater than 1.2, then it is determined that the output of the terminal output node is abnormal.

[0050] For example, if the output of the terminal output node is a digital value, and the output value of the terminal output node is 0 in the current i-th cycle and 1 in the (i-1)-th cycle, then it is determined that the output of the terminal output node is abnormal.

[0051] This can prevent abnormal output from terminal output nodes due to small normal fluctuations, quickly identify abnormal outputs exceeding predetermined thresholds, and improve the safety of building automation system operation.

[0052] In step 114, if the output of the terminal output node is abnormal, a total link for the specified service is generated based on the node identifiers of each node in the cache and the topology information of the topology network. The total link includes multiple branch links, and each branch link includes one or more nodes.

[0053] It should be noted that the topology network includes a large number of end output nodes for different services. Only the total link corresponding to the end output node that is currently experiencing an anomaly is generated, thereby isolating unrelated service links and avoiding interference from other services.

[0054] For example, Figure 2This is a schematic diagram of the overall link structure according to an embodiment of the present disclosure. The overall link structure is divided into a three-level hierarchical structure: the overall link is the first level, the branch links are the second level, and the nodes are the third level. The overall link includes branch link 1, branch link 2, branch link 3, etc. Branch link 1 includes nodes 11, 12, 13, etc., branch link 2 includes nodes 21, 22, 23, etc., and branch link 3 includes nodes 31, 32, 33, etc.

[0055] For example, consider a specific service: if the temperature sensor detects a temperature greater than 30 degrees Celsius and the oxygen sensor detects an oxygen content less than 50%, the air conditioner will turn on. In this specific service, the air conditioner's on / off switch is the final output node. When the air conditioner's on / off switch output malfunctions, a total link is generated based on the node identifiers of each node in the cache and the topology information of the network.

[0056] Figure 3 This is a schematic diagram of the overall link structure according to another embodiment of this disclosure. In the event of an abnormal output from the air conditioner switch, the overall link 300 for the specified service is generated based on the node identifiers of each node in the cache and the topology information of the network.

[0057] The main link 300 includes branch links 310 and 320. Branch link 310 includes a temperature sensor 311, a first comparator 312, an AND gate 313, and an air conditioning switch 314. Branch link 320 includes an oxygen sensor 315, a second comparator 316, an AND gate 313, and an air conditioning switch 314.

[0058] In some embodiments, an independent ring buffer is maintained for each terminal output node. The depth of the ring buffer can be configured by the host computer, with a default value of 8. Each buffer entry includes a total link ID, a branch link ID, a node ID, a trigger timestamp, and an array of logical judgment node timestamps. The trigger timestamp is used to record the period count value when the terminal output node experiences an anomaly. The array of logical judgment node timestamps is used to record the period count value when the dead zone threshold configuration of the logical judgment node fails.

[0059] In step 115, the total link is presented.

[0060] In step 116, in response to the exception query instruction, the historical output value of the logical judgment node in each branch link is obtained.

[0061] In some embodiments, the logical decision node includes a comparator or a timer.

[0062] This enables the topology network to simultaneously support threshold judgment and timing control logic, thereby improving the versatility of the topology network.

[0063] In step 117, the dead zone threshold configuration of the logical judgment node is determined to be abnormal based on the historical output values.

[0064] In some embodiments, the historical output value includes the output value of the logical judgment node in the current period N and the output value in the previous m periods.

[0065] In some embodiments, the deviation between the output value of the judgment node in the nth cycle and the output value in the (n-1)th cycle is determined to be greater than a first threshold, wherein, If the deviation between the output value of the logical decision node in the nth cycle and the output value in the (n-1)th cycle is greater than the first threshold, then it is determined that the output value of the logical decision node in the nth cycle has jumped relative to the output value in the (n-1)th cycle. If the number of jumps of the logical decision node in the current cycle N and the previous m cycles is greater than the jump threshold, then it is determined that the dead zone threshold configuration of the logical decision node is abnormal.

[0066] When the number of transitions of a logic decision node in the current period N and the previous m periods exceeds the transition threshold, it is determined that the dead-zone threshold configuration of the logic decision node is abnormal. This effectively distinguishes between transient signal interference and dead-zone threshold configuration abnormalities, filters false alarms caused by transient disturbances, and accurately captures defects caused by dead-zone configuration abnormalities.

[0067] In step 118, if it is determined that there is an abnormality in the dead zone threshold configuration of the logical judgment node, the logical judgment node is highlighted in the total link.

[0068] For example, logical judgment nodes that are abnormally configured for dead zone thresholds are filled with different background colors.

[0069] For example, the border of the logical judgment node that is abnormally configured for the dead zone threshold is thickened.

[0070] For example, a logical judgment node with an abnormal dead zone threshold configuration can be displayed by flashing.

[0071] For example, such as Figure 4 As shown, when Figure 3 In the event of an abnormal threshold configuration of the first comparator 312 shown, the first comparator 312 is filled with a gray background in the entire link.

[0072] For example, consider the effect of temperature on the on / off state of an air conditioner. Figure 5As shown, assuming the actual control logic is to turn on the air conditioner when the temperature exceeds 26 degrees Celsius and turn it off when the temperature is below 26 degrees Celsius, comparator 520 has no dead zone. When the terminal output node (air conditioner switch 314) is detected to operate frequently in a short period of time, the system automatically determines this by parsing the actual execution path: the node sequence recorded in the path includes temperature sensor 311, comparator 520, and air conditioner switch 314. If the output of comparator 520 directly drives the air conditioner and there are no other nodes (such as delays or filters) interfering in the path, and the start and stop times of the air conditioner each time strictly correspond to the flipping time of the comparator 520 output, then comparator 520 can be determined as the only key node causing the change of air conditioner switch 314. The frequency of comparator 520 output flipping is checked within a time window (e.g., 5 consecutive actions). If the flipping interval is less than the normal thermal inertia time (e.g., more than 3 flips within 10 seconds), and the dead zone is configured to be 0 or very small, then it is determined that the dead zone threshold is improperly configured, causing oscillation, and comparator 520 is highlighted in the overall link.

[0073] For example, such as Figure 6 As shown, comparator 520 in the overall link is filled with a gray background.

[0074] Therefore, by constructing a hierarchical traceability structure, troubleshooting efficiency is improved. Upon detecting abnormal device actions, the actual execution path leading to that action is automatically obtained and highlighted on a canvas. Simultaneously, dead zone threshold configuration anomalies are automatically marked, significantly reducing the time-consuming manual step-by-step troubleshooting. Furthermore, the path is recorded only when the end-output node is abnormal, resulting in extremely low memory and computing power overhead, making it suitable for already deployed low-computing-power controllers.

[0075] Figure 7 This is a flowchart illustrating a fault tracing method according to another embodiment of the present disclosure, including steps 701-704.

[0076] In step 701, in response to the exception query command, the execution path of the specified service is extracted from the total link.

[0077] In some embodiments, all root nodes in the overall link are identified. The path from each root node to the final output node is extracted as the execution path.

[0078] It's important to note that the node without upstream input dependencies is the root node. This allows us to extract the branch links from each root node to the final output node, enabling precise identification of the branch to which the anomaly belongs. This allows for the individual highlighting of the abnormal branch link, significantly narrowing the scope of troubleshooting.

[0079] In step 702, priority information of all nodes on the execution path is extracted.

[0080] In step 703, based on the priority information of all nodes and the upstream and downstream relationships of all nodes, it is determined whether the execution order of the specified business is correct.

[0081] In some embodiments, it is determined whether the priority information of all nodes corresponds to the upstream and downstream relationships of all nodes. If the priority information of all nodes does not correspond to the upstream and downstream relationships of all nodes, it is determined that the execution order of the specified service is incorrect.

[0082] For example, incorrect parameter input or reversed priority when manually configuring priorities can lead to signal processing timing disorder, disordered action timing of downstream terminal output nodes, and erroneous start-up and shutdown of equipment such as air conditioners.

[0083] For example, such as Figure 8 As shown, there is a specified service: read temperature sensor A, input the output value of the temperature sensor into filter B for filtering, compare the filtered temperature with that of air conditioner D through comparator C, and output the result to air conditioner D. The expected execution order is: A (sensor). B (filter) C (comparator) D (Air Conditioner Switch): If the developer has made an incorrect priority configuration, setting the priority of block C (Comparator) to 100 and the priority of block B (Filter) to 50, where a higher priority value corresponds to a higher priority, the actual execution order is as follows: First, block C (priority 100) is executed, but block B has not yet been executed. Block C reads the value of block B from the previous cycle (e.g., 25.8℃); next, block B (priority 50) is executed, calculating the current filter value (26.2℃); then, block A (default priority) is executed, reading the sensor value; finally, block D is executed, outputting the result of block C (based on the value of the previous cycle, outputting FALSE). When executing output block D, the output value changes, for example, from 0... 1, or from 1 0, thus triggering path recording. The order saved in the execution path is [C, B, A, D], and the expected order derived from the topology is [A, B, C, D]. The comparison reveals a discrepancy, thus determining that the execution order of the specified business is incorrect.

[0084] Therefore, by verifying whether the priority information configured for all nodes matches the upstream and downstream relationships of the nodes, it is possible to identify whether the priority parameter configuration conflicts with the actual signal flow and determine whether the execution order of the specified service is disordered.

[0085] In step 704, if it is determined that the execution order of the specified service is incorrect, the execution path is highlighted in the overall link in the first display mode.

[0086] For example, the first display method is to highlight the execution path with abnormal priority.

[0087] For example, the first display method is to display the execution path with a dashed line when the priority is abnormal.

[0088] For example, the first display method is to flash the execution path with abnormal priority.

[0089] It should be noted that the first display mode is used to visually highlight paths with abnormal execution order, so that debuggers can quickly locate them.

[0090] For example, such as Figure 9 As shown, the path [A, B, C, D] is highlighted with a dashed line and the message "Execution order error" is displayed.

[0091] Therefore, upon detecting an abnormal device, the system automatically traces the complete execution path that triggered the abnormal action and highlights the execution path of the abnormality on the canvas, allowing debugging personnel to intuitively locate the abnormal area. Furthermore, it records the path only when the end output node malfunctions, resulting in extremely low memory and computing power overhead, making it suitable for low-computing-power controllers already in operation.

[0092] In some embodiments, if the execution order of a specified service is determined to be correct, the execution path is highlighted in the overall link in a second display mode, wherein the second display mode is different from the first display mode.

[0093] For example, such as Figure 3 As shown, the main link 300 includes branch links 310 and 320. If the execution order of branch links 310 is incorrect, but the execution order of branch links 320 is correct, then branch links 310 will be highlighted in red, while branch links 320 will remain displayed normally by default.

[0094] Therefore, two different display methods are used for execution paths with correct execution order and execution paths with incorrect execution order, so that the execution links with correct priority and sequence can be directly distinguished by visual appearance.

[0095] In some embodiments, all nodes required to execute a specified service are retrieved from a preset service information list. It is then determined whether any nodes are missing, where the missing nodes are not included in the overall network link. If a missing node exists among all nodes, it is added to the overall network link according to the network topology information to update the overall network link. The missing node and the link containing it are highlighted.

[0096] It's important to note that by querying all nodes required for a specified service based on a pre-defined service information list, the system automatically verifies whether there are any missing nodes in the overall network link. Once a missing node is detected, it can be automatically added to the overall network link to complete the topology update, based on the network topology information. The missing node and its associated link are highlighted, preventing service execution anomalies caused by node loss. This eliminates the tedious manual verification and addition of nodes, reducing the probability of errors.

[0097] Figure 10 This is a schematic diagram of the structure of a fault tracing device according to an embodiment of the present disclosure.

[0098] like Figure 10 As shown, the fault tracing device 100 can be represented in the form of a general computing device. The fault tracing device 100 includes a memory 101, a processor 102, and a bus 103 connecting different system components.

[0099] Memory 101 may include, for example, system memory, non-volatile storage media, etc. System memory may store, for example, an operating system, application programs, a boot loader, and other programs. System memory may include volatile storage media, such as random access memory (RAM) and / or cache memory. Non-volatile storage media may store, for example, instructions for a corresponding embodiment of at least one fault tracing method being executed. Non-volatile storage media include, but are not limited to, disk storage, optical storage, flash memory, etc.

[0100] The processor 102 can be implemented using a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic devices, discrete hardware components such as discrete gates or transistors. Accordingly, each module, such as the acquisition module, the calculation module, and the adjustment module, can be implemented by executing instructions in the central processing unit (CPU) running memory to perform the corresponding steps, or by implementing dedicated circuits that perform the corresponding steps.

[0101] For example, processor 102 is configured as a memory-based instruction execution implementation such as Figure 1-9 The method involved in any of the embodiments.

[0102] Bus 103 can use any of the various bus architectures. For example, bus architectures include, but are not limited to, Industry Standard Architecture (ISA) bus, Micro Channel Architecture (MCA) bus, and Peripheral Component Interconnect (PCI) bus.

[0103] The interfaces 104, 105, and 106 of the fault tracing device 100, as well as the memory 101 and processor 102, can be connected via bus 103. Input / output interface 104 provides a connection interface for input / output devices such as monitors, mice, and keyboards. Network interface 105 provides a connection interface for various networked devices. Storage interface 106 provides a connection interface for external storage devices such as floppy disks, USB flash drives, and SD cards.

[0104] Various aspects of this disclosure are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus, and computer program products according to embodiments of this disclosure. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations thereof, can be implemented by computer-readable program instructions.

[0105] These computer-readable program instructions are provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable device to produce a machine, such that execution of the instructions by the processor produces means for implementing the functions specified in one or more boxes of the flowchart and / or block diagram.

[0106] These computer-readable program instructions may also be stored in a computer-readable storage medium. These instructions cause a computer to work in a particular manner to produce an article of manufacture, including instructions that implement the functions specified in one or more boxes in a flowchart and / or block diagram.

[0107] This disclosure may take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects.

[0108] Figure 11 This is a schematic diagram of the structure of a building automation system according to an embodiment of this disclosure. Figure 11 As shown, the building automation system 110 includes the aforementioned fault tracing device 100.

[0109] This disclosure also provides a computer-readable storage medium storing computer instructions that, when executed by a processor, implement... Figure 1-9 The method involved in any of the embodiments.

[0110] This disclosure also provides a computer program product, including computer instructions, wherein the computer instructions, when executed by a processor, implement as follows: Figure 1-9 The method involved in any of the embodiments.

[0111] By implementing the above embodiments of this disclosure, the following beneficial effects can be obtained.

[0112] A hierarchical traceability structure is built to improve troubleshooting efficiency. Upon detecting abnormal device actions, the actual execution path leading to that action is automatically obtained and highlighted on a canvas. Simultaneously, dead-zone threshold configuration anomalies and execution sequence anomalies are automatically marked. By comparing the expected path with the actual path, hidden defects such as path execution errors and improper dead-zone threshold configurations can be quickly located, significantly reducing the time-consuming process of manual step-by-step troubleshooting. The entire process requires no hardware modification; the path is only recorded when the output changes, resulting in extremely low memory and computing power overhead, making it suitable for already deployed low-computing-power controllers.

[0113] In some embodiments, the functional units described above may be implemented as general-purpose processors, programmable logic controllers (PLCs), digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or any suitable combination thereof for performing the functions described herein.

[0114] Those skilled in the art will understand that all or part of the steps of the above embodiments can be implemented by hardware or by a program instructing related hardware. The program can be stored in a computer-readable storage medium, such as a read-only memory, a disk, or an optical disk.

[0115] The description in this disclosure is provided for illustrative and descriptive purposes only and is not intended to be exhaustive or to limit the disclosure to its forms. Many modifications and variations will be apparent to those skilled in the art. The embodiments were chosen and described in order to better illustrate the principles and practical application of this disclosure and to enable those skilled in the art to understand this disclosure and to design various embodiments with various modifications suitable for a particular purpose.

Claims

1. A fault tracing method, executed by a fault tracing device, comprising: Write the node identifiers of each node performing the specified service in the topology network into the cache; The output values ​​of the end output nodes associated with the specified service are obtained at predetermined intervals; Determine whether the output of the terminal output node is abnormal; In the event of an abnormal output at the terminal output node, a total link for the specified service is generated based on the node identifiers of each node in the cache and the topology information of the topology network. The total link includes multiple branch links, and each branch link includes one or more nodes. Present the total link; In response to an anomaly query command, the historical output values ​​of the logical judgment nodes in each branch link are obtained; Determine whether there is an anomaly in the dead zone threshold configuration of the logical judgment node based on the historical output values; If it is determined that the dead zone threshold configuration of the logical judgment node is abnormal, the logical judgment node will be highlighted in the total link.

2. The fault tracing method according to claim 1, wherein, The historical output values ​​include the output value of the logical judgment node in the current period N, and the output values ​​in the previous m periods; Determining whether the dead zone threshold configuration of the logical judgment node is abnormal based on the historical output values ​​includes: Determine whether the deviation between the output value of the logic judgment node in the nth cycle and the output value in the (n-1)th cycle is greater than a first threshold. ; If the deviation between the output value of the logic judgment node in the nth cycle and the output value in the (n-1)th cycle is greater than the first threshold, then it is determined that the output value of the logic judgment node in the nth cycle has changed relative to the output value in the (n-1)th cycle. If the number of transitions of the logical judgment node in the current period N and the previous m periods is greater than the transition threshold, then it is determined that the dead zone threshold configuration of the logical judgment node is abnormal.

3. The fault tracing method according to claim 1, wherein, The logical decision node includes a comparator or a timer.

4. The fault tracing method according to claim 1, wherein, The step of determining whether the output of the terminal output node is abnormal includes: Determine whether the difference between the output value of the terminal output node in the current cycle and the output value in the previous cycle exceeds a predetermined threshold; If the difference between the output value of the current cycle and the output value of the previous cycle of the terminal output node exceeds a predetermined threshold, it is determined that the output of the terminal output node is abnormal.

5. The fault tracing method according to claim 1 further includes: In response to an anomaly query command, the execution path of the specified service is extracted from the overall link; Extract the priority information of all nodes on the execution path; Based on the priority information of all nodes and the upstream and downstream relationships of all nodes, determine whether the execution order of the specified service is correct; If it is determined that the execution order of the specified service is incorrect, the execution path is highlighted in the overall link in a first display mode.

6. The fault tracing method according to claim 5, wherein, Determining whether the execution order of the specified service is correct includes: Determine whether the priority information of all nodes corresponds to the upstream and downstream relationships of all nodes; If the priority information of all nodes does not correspond to the upstream and downstream relationships of all nodes, it is determined that the execution order of the specified service is incorrect.

7. The fault tracing method according to claim 5, wherein, The step of extracting the execution path of the specified service from the overall link includes: Identify all root nodes in the total link; Extract the path from each root node to the final output node as the execution path.

8. The fault tracing method according to claim 5, wherein, If the execution order of the specified service is determined to be correct, the execution path is highlighted in the overall link in a second display mode, wherein the second display mode is different from the first display mode.

9. The fault tracing method according to any one of claims 1-8 further includes: Retrieve all nodes required to execute the specified service from the preset service information list; Determine whether any of the nodes are missing, wherein the missing nodes are not included in the total link; If the lost node exists among all the nodes, then according to the topology information of the topology network, the lost node is added to the total link so as to update the total link; The lost node and the link on which the lost node is located are highlighted.

10. A fault tracing device, comprising: The memory is configured to store instructions; A processor, coupled to a memory, configured to implement the method as described in any one of claims 1-9 based on memory-stored instruction execution.

11. A building automation system, comprising the fault tracing device as described in claim 10.

12. A computer-readable storage medium, wherein, The computer-readable storage medium stores computer instructions that, when executed by a processor, implement the fault tracing method as described in any one of claims 1-9.

13. A computer program product comprising computer instructions, wherein the computer instructions, when executed by a processor, implement the fault tracing method as described in any one of claims 1-9.

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