A high-speed optical module parallel program downloading system and method
Patent Information
- Application Number
- CN202610520179.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-04-20
- Publication Date
- 2026-08-18
AI Technical Summary
[0004]台位利用率低:每个昂贵的下载台位在单位时间内只能服务一个模块,设备利用率低下
[0054] 1. Revolutionary Improvement in Download Efficiency: Through an innovative parallel system architecture of "one master control to multiple communication boards," the traditional serial download mode is transformed into a parallel download mode. For example, in one implementation, a stable "one-to-four" parallel download can be achieved, increasing the theoretical efficiency of a single download station to 300%-400% of the original, greatly shortening the production cycle time.
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Figure CN122601653A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of optical communication technology, and in particular to a high-speed optical module parallel program download system and method. Background Technology
[0002] With the rapid development of data centers and 5G communications, the demand for high-speed optical modules has increased dramatically, placing higher demands on their production efficiency and manufacturing costs. Downloading the firmware program to the module's internal memory is a necessary step in the optical module manufacturing process.
[0003] Currently, the downloading methods commonly used in the industry are inefficient. Traditional downloading platforms typically employ a "one-to-one" model, meaning that one downloading station (workstation) can only download programs to one optical module at a time. In large-scale mass production, to meet capacity demands, a large number of downloading stations and corresponding operators must be deployed. This model has the following significant drawbacks:
[0004] Low station utilization: Each expensive download station can only serve one module per unit of time, resulting in low equipment utilization.
[0005] High labor costs: A large number of operators are required to perform repetitive, simple plugging, unplugging, and clicking operations, resulting in high labor costs.
[0006] Low overall efficiency: The serial operation method results in a long production cycle and limited overall capacity, which becomes a bottleneck to improving production efficiency.
[0007] Therefore, there is an urgent need for an advanced high-speed optical module program downloading technology that can significantly improve the download efficiency of a single unit, save manpower, and reduce production costs. Summary of the Invention
[0008] In view of the technical defects and drawbacks existing in the prior art, embodiments of the present invention provide a high-speed optical module parallel program download system and method to overcome the above problems or at least partially solve the above problems, the specific solution of which is as follows;
[0009] As a first aspect of the present invention, a high-speed optical module parallel program download system is provided, comprising:
[0010] A main control computer, configured with multiple independent serial communication ports, and running download management software;
[0011] Multiple communication control boards, the number of which corresponds to the number of serial communication ports, and each of the communication control boards is connected to one of the serial communication ports of the main control computer through an independent serial communication link;
[0012] Multiple optical module program download interfaces are provided, the number of which corresponds to the number of communication control boards. Each communication control board is connected to one of the optical module program download interfaces through an independent I2C communication link, and is used to access an optical module to be programmed.
[0013] The download management software of the main control computer is used to synchronously send program data and control commands to the corresponding multiple communication control boards through the multiple independent serial communication ports.
[0014] Each of the communication control boards is used to respond to control commands from the main control computer by writing the received program data into the optical module connected to it via the I2C communication protocol.
[0015] Furthermore, each of the communication control boards includes:
[0016] A serial port conversion circuit, the input of which constitutes the first communication interface of the serial communication link on the communication control board side, for serial communication with the main control computer;
[0017] A microcontroller, whose communication port is connected to the output of the serial port conversion circuit, is used to receive and parse instructions and data from the host computer and generate I2C bus control signals;
[0018] An I2C driver circuit, whose input is connected to the I2C pin of the microcontroller, and whose output constitutes the second communication interface of the I2C communication link on the communication control board side, for connecting and driving the optical module program download interface;
[0019] An address configuration circuit, connected to the input pin of the microcontroller, is used to provide the microcontroller with a hardware board-level address identifier;
[0020] The microcontroller is configured to: respond to instructions from the host computer addressed to the board-level address based on the board-level address identifier it has acquired, and perform program data writing operations on the corresponding optical module through the I2C driver circuit.
[0021] Furthermore, the microcontroller is an STM32 series microcontroller;
[0022] The communication control board also includes a power supply interface and a power management circuit.
[0023] The power supply interface is used to receive external DC power.
[0024] The power management circuit is connected to the power supply interface, the serial port conversion circuit, the microcontroller, and the I2C driver circuit respectively, and is used to convert the external DC power supply into the operating voltage required by the serial port conversion circuit, the microcontroller, and the I2C driver circuit, and to power them.
[0025] Furthermore, the address configuration circuit includes a DIP switch, and the combined state of multiple toggle bits of the DIP switch is used to set a hardware address code of the communication control board.
[0026] The download management software includes a serial port configuration module, which is configured to maintain an address mapping table that defines the correspondence between different hardware address codes and different serial communication port identifiers on the host computer.
[0027] The serial port configuration module can allocate a suitable serial communication port for communication based on the hardware address encoding of the communication control board by querying the address mapping table.
[0028] Furthermore, the download management software is configured to have a parallel processing architecture;
[0029] The parallel processing architecture includes multiple independent task execution instances, the number of which corresponds to the number of serial communication ports on the main control computer used to connect to the communication control board;
[0030] Each task execution instance is bound to a specific serial communication port identifier recorded in the address mapping table and configured to communicate independently with a corresponding communication control board through its bound serial communication port to send program data and instructions to the communication control board.
[0031] As another aspect of the present invention, a high-speed optical module parallel program download method is also provided, applied to the high-speed optical module parallel program download system as described in any of the above claims, the method comprising:
[0032] S1. Configuration and Addressing: Connect each communication control board to a serial communication port of the main control computer via its serial communication link, and connect it to an optical module to be programmed via its I2C communication link; at the same time, operate the address configuration circuit on each communication control board to set a unique hardware address code for each communication control board.
[0033] S2. Software Mapping and Loading: In the download management software of the main control computer, an address mapping table is created and maintained. The address mapping table records the correspondence between the hardware address code of each communication control board and the serial communication port it is connected to. At the same time, the program file to be downloaded is imported into the download management software.
[0034] S3. Parallel Download Execution: The download management software is run, which creates and binds an independent task execution instance for each communication control board with a valid hardware address code according to the address mapping table; in response to the download command, each task execution instance synchronously sends the program data and control commands to the corresponding communication control board through its bound serial communication port, so that each communication control board writes the received program data into its connected optical module.
[0035] Furthermore, the configuration and addressing include:
[0036] Hardware connection and address configuration operations: For each communication control board, perform the following operations:
[0037] (a) Connect it to a serial communication port of the host computer via a physical serial communication cable;
[0038] (b) Connect it to an optical module to be programmed via an I2C communication cable;
[0039] (c) Manually set the DIP switch on it to a specific state so that the communication control board generates a unique hardware address code;
[0040] The hardware address code is used to be recognized by the download management software in the subsequent software mapping and loading steps, and associated with the serial communication port connected to the communication control board to update the address mapping table.
[0041] Furthermore, the software mapping and loading includes an address mapping table establishment sub-step, specifically including:
[0042] The serial port configuration module of the download management software enumerates the available serial communication ports on the main control computer and performs a communication handshake with each communication control board to read its hardware address code.
[0043] Subsequently, the serial port configuration module creates a record in the address mapping table for each communication control board that successfully communicates. This record binds the hardware address code of the communication control board to the identifier of the serial communication port it is actually connected to.
[0044] Furthermore, the parallel download execution includes task execution and data transmission sub-steps:
[0045] S31. Instantiation and Port Binding: The download management software instantiates a corresponding task execution instance for each communication control board recorded in the address mapping table, and binds each task execution instance to the serial communication port corresponding to the communication control board.
[0046] S32. Concurrent Data Push: Each of the task execution instances concurrently performs the following operations:
[0047] (i) Initiate a communication session with the corresponding communication control board through its bound serial communication port;
[0048] (ii) Read data blocks from the imported program files;
[0049] (iii) Encapsulate the data block into a message conforming to the serial communication protocol format and send it to the corresponding communication control board through the serial communication port;
[0050] S33. Download Status Synchronization: After completing the data transfer of its associated program file, each task execution instance reports its download status to the download management software.
[0051] Furthermore, in the concurrent data push sub-step, the operations performed by the task execution instance include:
[0052] The data block is encapsulated according to a predefined communication protocol format to form an application data frame. The frame structure of the application data frame includes fields for indicating the I2C device address, register address, and valid program data payload.
[0053] The present invention has the following beneficial effects:
[0054] 1. Revolutionary Improvement in Download Efficiency: Through an innovative parallel system architecture of "one master control to multiple communication boards," the traditional serial download mode is transformed into a parallel download mode. For example, in one implementation, a stable "one-to-four" parallel download can be achieved, increasing the theoretical efficiency of a single download station to 300%-400% of the original, greatly shortening the production cycle time.
[0055] 2. Significantly reduced costs: The high efficiency of single-station parallel operation reduces the number of hardware units required for downloading, and at the same time significantly reduces the number of operators required, thereby saving expensive equipment investment and long-term labor costs.
[0056] 3. Stable and reliable system with flexible deployment: The communication control board integrates complete protocol conversion, address management, and power supply functions. It connects to the main control computer via a standard serial port, forming a stable and reliable data channel. The dynamic mapping mechanism between hardware addresses and software ports makes the system flexible in configuration, easy to maintain and expand, and adaptable to different production line layouts. Attached Figure Description
[0057] Figure 1 Provided for embodiments of the present invention;
[0058] Figure 2 This is a structural block diagram of an electronic device provided in an embodiment of the present invention. Detailed Implementation
[0059] To enable those skilled in the art to better understand the technical solutions of the present invention, exemplary embodiments of the present invention are described below in conjunction with the accompanying drawings, including various details of the embodiments of the present invention to aid understanding. These should be considered merely exemplary. Therefore, those skilled in the art should recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of the present invention. Similarly, for clarity and brevity, descriptions of well-known functions and structures are omitted in the following description.
[0060] Where there is no conflict, the various embodiments of the present invention and the features thereof may be combined with each other.
[0061] As used herein, the term “and / or” includes any and all combinations of one or more related enumerated entries.
[0062] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used herein, the singular forms “a” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will also be understood that when the terms “comprising” and / or “made of” are used in this specification, the presence of the stated feature, integral, step, operation, element, and / or component is specified, but the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof is not excluded. Terms such as “connected” or “linked” are not limited to physical or mechanical connections but can include electrical connections, whether direct or indirect.
[0063] Unless otherwise specified, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art. It will also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having the meaning consistent with their meaning in the context of the relevant art and the invention, and will not be interpreted as having an idealized or overly formal meaning unless expressly so defined herein.
[0064] In the technical solution of this invention, the collection, storage, use, processing, transmission, provision, and disclosure of user personal information all comply with relevant laws and regulations and do not violate public order and good morals. The use of user data in this technical solution follows relevant national laws and regulations (e.g., the "Information Security Technology - Personal Information Security Specification"). For example: appropriate measures are taken for personal information access control; restrictions are imposed on the display of personal information; the purpose of using personal information does not exceed the scope of direct or reasonable association; and explicit identity targeting is eliminated when using personal information to avoid precisely locating a specific individual.
[0065] To address at least one of the technical problems existing in the aforementioned related technologies, the present invention provides a high-speed optical module parallel program download system. Figure 1 A schematic diagram of a high-speed optical module parallel program download system provided in an embodiment of the present invention includes:
[0066] A main control computer, configured with multiple independent serial communication ports, and running download management software;
[0067] Multiple communication control boards, the number of which corresponds to the number of serial communication ports, and each of the communication control boards is connected to one of the serial communication ports of the main control computer through an independent serial communication link;
[0068] Multiple optical module program download interfaces are provided, the number of which corresponds to the number of communication control boards. Each communication control board is connected to one of the optical module program download interfaces through an independent I2C communication link, and is used to access an optical module to be programmed.
[0069] The download management software of the main control computer is used to synchronously send program data and control commands to the corresponding multiple communication control boards through the multiple independent serial communication ports.
[0070] Each of the communication control boards is used to respond to control commands from the main control computer by writing the received program data into the optical module connected to it via the I2C communication protocol.
[0071] This invention solves the core problem of low efficiency in traditional optical module program download stations by constructing a hierarchical parallel architecture of "one host + multiple communication boards + multiple optical modules". Specifically, this invention revolutionizes the traditional "one-to-one" serial download mode into a "one-to-many" parallel download mode, greatly improving the download capacity per unit time. For example, in a typical implementation scenario, the traditional method allows only one module to be processed at a time at a download station, while with this system, one main control computer can drive four communication control boards simultaneously, thus downloading programs to four optical modules in parallel. This directly improves the theoretical download efficiency of a single station by several times (e.g., 300%) at the system architecture level, significantly reducing the number of stations and operators required on the production line, lowering equipment and labor costs, and shortening the production cycle.
[0072] In some embodiments, each of the communication control boards includes:
[0073] A serial port conversion circuit, the input of which constitutes the first communication interface of the serial communication link on the communication control board side, for serial communication with the main control computer;
[0074] A microcontroller, whose communication port is connected to the output of the serial port conversion circuit, is used to receive and parse instructions and data from the host computer and generate I2C bus control signals;
[0075] An I2C driver circuit, whose input is connected to the I2C pin of the microcontroller, and whose output constitutes the second communication interface of the I2C communication link on the communication control board side, for connecting and driving the optical module program download interface;
[0076] An address configuration circuit, connected to the input pin of the microcontroller, is used to provide the microcontroller with a hardware board-level address identifier;
[0077] The microcontroller is configured to: respond to instructions from the host computer addressed to the board-level address based on the board-level address identifier it has acquired, and perform program data writing operations on the corresponding optical module through the I2C driver circuit.
[0078] The above embodiments, by specifically defining the serial port converter, microcontroller, I2C driver, and address configuration integrated within the communication control board, transform abstract higher-level concepts into implementable hardware solutions, ensuring the stability and reliability of parallel control. Specifically, this invention provides a standardized hardware interface conversion and protocol execution unit, achieving efficient and accurate bridging between the general-purpose serial port of the host computer and the dedicated I2C interface of the optical module. For example, the STM32 microcontroller, as the core, can accurately parse complex instructions from the host and reliably generate I2C bus timing sequences recognizable by the optical module. The address configuration circuit provides independent identification for multiple parallel communication control boards, serving as the key hardware foundation for the system to achieve precise "one-to-many" addressing rather than broadcast-style chaotic operation, thus eliminating signal conflicts and data corruption at the hardware level.
[0079] Optionally, the microcontroller is specifically configured to execute the following firmware logic:
[0080] Serial data from the serial port conversion circuit is parsed to extract data packets containing I2C device address, register address, and data to be written;
[0081] Based on the I2C device address and register address in the data packet, the I2C driver circuit is controlled to generate timing signals conforming to the I2C bus protocol, so as to write the data to be written to the corresponding storage address of the target optical module.
[0082] In some embodiments, the microcontroller is an STM32 series microcontroller;
[0083] The communication control board also includes a power supply interface and a power management circuit.
[0084] The power supply interface is used to receive external DC power.
[0085] The power management circuit is connected to the power supply interface, the serial port conversion circuit, the microcontroller, and the I2C driver circuit respectively, and is used to convert the external DC power supply into the operating voltage required by the serial port conversion circuit, the microcontroller, and the I2C driver circuit, and to power them.
[0086] The above embodiments, by specifically limiting the use of STM32 series microcontrollers, reliably implement complex communication protocol parsing and I2C timing control functions, reducing the technical risks and costs of hardware selection and firmware development. Secondly, the addition of an independent power supply system allows the communication control board to obtain a stable and clean operating power supply through a unified interface (such as USB), eliminating the need for complex power supplies from the optical module or the main control computer. This simplifies system connections and ensures the independence of each circuit (especially the sensitive serial port and I2C driver circuits) in terms of operating voltage, improving the overall system's anti-interference capability and long-term operational stability.
[0087] In some embodiments:
[0088] The address configuration circuit includes a DIP switch, and the combined state of multiple toggle bits of the DIP switch is used to set a hardware address code of the communication control board.
[0089] The download management software includes a serial port configuration module, which is configured to maintain an address mapping table that defines the correspondence between different hardware address codes and different serial communication port identifiers on the host computer.
[0090] The serial port configuration module can allocate a suitable serial communication port for communication based on the hardware address encoding of the communication control board by querying the address mapping table.
[0091] The above embodiment creatively solves the problem of automatic matching between "physical connection" and "logical control" in multi-device parallel systems by dynamically associating the address settings of hardware DIP switches with the address mapping table in the software. Specifically, it achieves a seamless connection between the flexibility of hardware configuration and the automation of software control. For example, the operator only needs to set the DIP switches on the hardware side, and the serial port configuration module on the software side can automatically or through simple configuration identify the hardware address and establish a unique binding relationship with the currently used physical serial port. This avoids the trouble of writing rigid code for each fixed workstation, allowing the same set of hardware and software to flexibly adapt to different production line layouts or connection sequences. System deployment and changes are extremely convenient. At the same time, this mapping relationship ensures that every instruction sent by the software can be accurately routed to the target communication control board, which is the core software guarantee for parallel operation without disorder or conflict.
[0092] In some embodiments, the download management software is configured to have a parallel processing architecture;
[0093] The parallel processing architecture includes multiple independent task execution instances, the number of which corresponds to the number of serial communication ports on the main control computer used to connect to the communication control board;
[0094] Each task execution instance is bound to a specific serial communication port identifier recorded in the address mapping table and configured to communicate independently with a corresponding communication control board through its bound serial communication port to send program data and instructions to the communication control board.
[0095] Optionally, the download management software is developed based on the LabVIEW graphical programming platform.
[0096] The above embodiments, by limiting the download management software to adopt a parallel processing architecture based on address mapping tables, ensure the full utilization of hardware parallel capabilities from the software operation mechanism, avoid "pseudo-parallelism" or resource contention, and achieve true, mutually isolated concurrent data flow control. Specifically, the software creates an independent task execution instance (such as a thread or process) for each mapped communication control board, and each instance exclusively occupies a serial communication port channel. This means that, for example, when downloading to four modules, the four data streams are truly transmitted simultaneously and independently. Communication delays or errors on one port will not block the operation of other ports. This architecture maximizes the utilization of hardware bandwidth, making the overall download time close to the operation time of a single module, thereby translating the improvement in system architectural efficiency into observable actual performance gains.
[0097] Based on the same inventive concept, embodiments of the present invention also provide a high-speed optical module parallel program download method, applied to the high-speed optical module parallel program download system as described in any of the above claims, the method comprising:
[0098] S1. Configuration and Addressing: Connect each communication control board to a serial communication port of the main control computer via its serial communication link, and connect it to an optical module to be programmed via its I2C communication link; at the same time, operate the address configuration circuit on each communication control board to set a unique hardware address code for each communication control board.
[0099] S2. Software Mapping and Loading: In the download management software of the main control computer, an address mapping table is created and maintained. The address mapping table records the correspondence between the hardware address code of each communication control board and the serial communication port it is connected to. At the same time, the program file to be downloaded is imported into the download management software.
[0100] S3. Parallel Download Execution: The download management software is run, which creates and binds an independent task execution instance for each communication control board with a valid hardware address code according to the address mapping table; in response to the download command, each task execution instance synchronously sends the program data and control commands to the corresponding communication control board through its bound serial communication port, so that each communication control board writes the received program data into its connected optical module.
[0101] The above method ensures the standardization and reliability of parallel download operations through three stages: "configuration and addressing -> software mapping and loading -> parallel download execution". Following this method, operators can systematically complete hardware connection, address setting, and software configuration, and then trigger efficient parallel downloads with a single click, avoiding communication failures or inefficiencies caused by chaotic operation procedures. This method clearly defines the entire process from physical connection to logical mapping to concurrent execution, transforming the batch download of high-speed optical modules from a skill dependent on personal experience into a standardized, rapidly trainable production process.
[0102] In some embodiments, the configuration and addressing include:
[0103] Hardware connection and address configuration operations: For each communication control board, perform the following operations:
[0104] (a) Connect it to a serial communication port of the host computer via a physical serial communication cable;
[0105] (b) Connect it to an optical module to be programmed via an I2C communication cable;
[0106] (c) Manually set the DIP switch on it to a specific state so that the communication control board generates a unique hardware address code;
[0107] The hardware address code is used to be recognized by the download management software in the subsequent software mapping and loading steps, and associated with the serial communication port connected to the communication control board to update the address mapping table.
[0108] The above embodiments specify the hardware connection and address setting process, providing clear and reliable operational guidelines to ensure the correct establishment of the physical and logical foundation for the system's parallel operation. Specifically, it clarifies the order of "connect first, then address" and the mechanism for generating hardware address codes. Following these steps, the operator establishes all communication links via physical cables and then manually sets the DIP switches on each communication board. The unique hardware address code generated by this operation is the "root information" of the entire subsequent parallel control process. This step ensures that each communication control board has a globally unique identifier within the system, which is an indispensable prerequisite for achieving accurate software addressing and parallel control, eliminating system malfunctions caused by address conflicts or incorrect settings from the operational source.
[0109] In some embodiments, the software mapping and loading includes an address mapping table establishment sub-step, specifically including:
[0110] The serial port configuration module of the download management software enumerates the available serial communication ports on the main control computer and performs a communication handshake with each communication control board to read its hardware address code.
[0111] Subsequently, the serial port configuration module creates a record in the address mapping table for each communication control board that successfully communicates. This record binds the hardware address code of the communication control board to the identifier of the serial communication port it is actually connected to.
[0112] The above embodiments illustrate how software automatically discovers and establishes an address-port mapping table. Compared to relying entirely on manual mapping on the interface, this method reads the hardware address code by having the software actively enumerate ports and perform a communication handshake with the communication control board. The software can automatically scan all serial ports, send query commands to connected devices, and automatically record the address and current port number in the mapping table. This reduces the workload of manual configuration and the risk of incorrect mapping relationships due to human input errors, making the configuration of multi-board systems faster and more accurate. Simultaneously, this process also completes a power-on self-test, automatically identifying communication boards that are not correctly connected or are not responding, improving system maintainability.
[0113] In some embodiments, the parallel download execution includes task execution and data transmission sub-steps:
[0114] S31. Instantiation and Port Binding: The download management software instantiates a corresponding task execution instance for each communication control board recorded in the address mapping table, and binds each task execution instance to the serial communication port corresponding to the communication control board.
[0115] S32. Concurrent Data Push: Each of the task execution instances concurrently performs the following operations:
[0116] (i) Initiate a communication session with the corresponding communication control board through its bound serial communication port;
[0117] (ii) Read data blocks from the imported program files;
[0118] (iii) Encapsulate the data block into a message conforming to the serial communication protocol format and send it to the corresponding communication control board through the serial communication port;
[0119] S33. Download Status Synchronization: After completing the data transfer of its associated program file, each task execution instance reports its download status to the download management software.
[0120] In the above embodiments, the software dynamically creates control instances corresponding to the hardware based on the mapping table. Each instance is independently responsible for a complete data push process, from establishing communication, reading files, encapsulating data to sending, without waiting for other instances. This design maximizes the decoupling between multiple download tasks, making full use of the hardware concurrency capabilities of multi-core CPUs and multiple serial port controllers. Finally, the status synchronization mechanism provides the operator with a clear signal of the overall job completion and a download result report for each module, realizing refined management of the batch download process.
[0121] In some embodiments, in the concurrent data push sub-step, the operation (iii) performed by the task execution instance includes:
[0122] The data block is encapsulated according to a predefined communication protocol format to form an application data frame. The frame structure of the application data frame includes fields for indicating the I2C device address, register address, and valid program data payload.
[0123] Example embodiments have been disclosed herein, and while specific terminology has been used, it is for illustrative purposes only and should be construed as such, and is not intended to be limiting. In some instances, it will be apparent to those skilled in the art that features, characteristics, and / or elements described in conjunction with particular embodiments may be used alone, or in combination with features, characteristics, and / or elements described in conjunction with other embodiments, unless otherwise expressly indicated. Therefore, those skilled in the art will understand that various changes in form and detail may be made without departing from the scope of the invention as set forth in the appended claims.
Claims
1. A high-speed optical module parallel program download system, characterized in that, include: A main control computer, configured with multiple independent serial communication ports, and running download management software; Multiple communication control boards, the number of which corresponds to the number of serial communication ports, and each of the communication control boards is connected to one of the serial communication ports of the main control computer through an independent serial communication link; Multiple optical module program download interfaces are provided, the number of which corresponds to the number of communication control boards. Each communication control board is connected to one of the optical module program download interfaces through an independent I2C communication link, and is used to access an optical module to be programmed. The download management software of the main control computer is used to synchronously send program data and control commands to the corresponding multiple communication control boards through the multiple independent serial communication ports. Each of the communication control boards is used to respond to control commands from the main control computer by writing the received program data into the optical module connected to it via the I2C communication protocol.
2. The high-speed optical module parallel program download system according to claim 1, characterized in that, Each of the communication control boards includes: A serial port conversion circuit, the input of which constitutes the first communication interface of the serial communication link on the communication control board side, for serial communication with the main control computer; A microcontroller, whose communication port is connected to the output of the serial port conversion circuit, is used to receive and parse instructions and data from the host computer and generate I2C bus control signals; An I2C driver circuit, whose input is connected to the I2C pin of the microcontroller, and whose output constitutes the second communication interface of the I2C communication link on the communication control board side, for connecting and driving the optical module program download interface; An address configuration circuit, connected to the input pin of the microcontroller, is used to provide the microcontroller with a hardware board-level address identifier; The microcontroller is configured to: respond to instructions from the host computer addressed to the board-level address based on the board-level address identifier it has acquired, and perform program data writing operations on the corresponding optical module through the I2C driver circuit.
3. The high-speed optical module parallel program download system according to claim 2, characterized in that, The microcontroller is an STM32 series microcontroller; The communication control board also includes a power supply interface and a power management circuit. The power supply interface is used to receive external DC power. The power management circuit is connected to the power supply interface, the serial port conversion circuit, the microcontroller, and the I2C driver circuit respectively, and is used to convert the external DC power supply into the operating voltage required by the serial port conversion circuit, the microcontroller, and the I2C driver circuit, and to power them.
4. The high-speed optical module parallel program download system according to claim 2, characterized in that: The address configuration circuit includes a DIP switch, and the combined state of multiple toggle bits of the DIP switch is used to set a hardware address code of the communication control board. The download management software includes a serial port configuration module, which is configured to maintain an address mapping table that defines the correspondence between different hardware address codes and different serial communication port identifiers on the host computer. The serial port configuration module can allocate a suitable serial communication port for communication based on the hardware address encoding of the communication control board by querying the address mapping table.
5. The high-speed optical module parallel program download system according to claim 4, characterized in that, The download management software is configured with a parallel processing architecture; The parallel processing architecture includes multiple independent task execution instances, the number of which corresponds to the number of serial communication ports on the main control computer used to connect to the communication control board; Each task execution instance is bound to a specific serial communication port identifier recorded in the address mapping table and configured to communicate independently with a corresponding communication control board through its bound serial communication port to send program data and instructions to the communication control board.
6. A method for parallel program downloading of a high-speed optical module, applied to the high-speed optical module parallel program downloading system as described in any one of claims 1-5, characterized in that, The method includes: S1. Configuration and Addressing: Connect each communication control board to a serial communication port of the main control computer via its serial communication link, and connect it to an optical module to be programmed via its I2C communication link; at the same time, operate the address configuration circuit on each communication control board to set a unique hardware address code for each communication control board. S2. Software Mapping and Loading: In the download management software of the main control computer, an address mapping table is created and maintained. The address mapping table records the correspondence between the hardware address code of each communication control board and the serial communication port it is connected to. At the same time, the program file to be downloaded is imported into the download management software. S3. Parallel Download Execution: The download management software is run, which creates and binds an independent task execution instance for each communication control board with a valid hardware address code according to the address mapping table; in response to the download command, each task execution instance synchronously sends the program data and control commands to the corresponding communication control board through its bound serial communication port, so that each communication control board writes the received program data into its connected optical module.
7. The method according to claim 6, characterized in that, The configuration and addressing include: Hardware connection and address configuration operations: For each communication control board, perform the following operations: (a) Connect it to a serial communication port of the host computer via a physical serial communication cable; (b) Connect it to an optical module to be programmed via an I2C communication cable; (c) Manually set the DIP switch on it to a specific state so that the communication control board generates a unique hardware address code; The hardware address code is used to be recognized by the download management software in the subsequent software mapping and loading steps, and associated with the serial communication port connected to the communication control board to update the address mapping table.
8. The method according to claim 6, characterized in that, The software mapping and loading includes the address mapping table establishment sub-step, specifically including: The serial port configuration module of the download management software enumerates the available serial communication ports on the main control computer and performs a communication handshake with each communication control board to read its hardware address code. Subsequently, the serial port configuration module creates a record in the address mapping table for each communication control board that successfully communicates. This record binds the hardware address code of the communication control board to the identifier of the serial communication port it is actually connected to.
9. The method according to claim 6, characterized in that, The parallel download execution includes task execution and data transmission sub-steps: S31. Instantiation and Port Binding: The download management software instantiates a corresponding task execution instance for each communication control board recorded in the address mapping table, and binds each task execution instance to the serial communication port corresponding to the communication control board. S32. Concurrent Data Push: Each of the task execution instances concurrently performs the following operations: (i) Initiate a communication session with the corresponding communication control board through its bound serial communication port; (ii) Read data blocks from the imported program files; (iii) Encapsulate the data block into a message conforming to the serial communication protocol format and send it to the corresponding communication control board through the serial communication port; S33. Download Status Synchronization: After completing the data transfer of its associated program file, each task execution instance reports its download status to the download management software.
10. The method according to claim 9, characterized in that, In the concurrent data push sub-step, the operations performed by the task execution instance include: The data block is encapsulated according to a predefined communication protocol format to form an application data frame. The frame structure of the application data frame includes fields for indicating the I2C device address, register address, and valid program data payload.