Master-slave pixel current focusing readout circuit and method

Abstract

This invention relates to the fields of photoelectric sensing and CMOS integrated circuit technology, and in particular to a readout circuit for master-slave pixel current convergence, comprising at least one pixel merging unit. Each pixel merging unit includes a master pixel and at least one slave pixel. Each slave pixel includes a first gating switch and a second gating switch. The first switch connects the photoelectric detection module of the slave pixel to the integration module of the master pixel, and the second switch connects the photoelectric detection module of the slave pixel to its own integration module. When a first control signal is valid, the first switch is turned on, and the photocurrent of the slave pixel converges to the master pixel, which is the pixel merging mode. When a second control signal is valid, the second switch is turned on, and the photocurrent flows to its own integration module, which is the pixel independent mode. This invention also includes a method. This invention avoids the frame rate limitation problem caused by column-level row-by-row processing, directly improves the effective output signal amplitude under low-light conditions, thereby improving the weak signal detection capability, and also meets the implementation requirements of pixel-level merging readout.

Description

Technical Field

[0001] This invention relates to the fields of photoelectric sensing and CMOS integrated circuit technology, and in particular to a readout circuit and method for master-slave pixel current convergence. Background Technology

[0002] Photodetector arrays and CMOS readout circuits are evolving towards higher sensitivity, higher dynamic range, and higher frame rates, and pixel combining technology has become an important means to improve detection performance. Existing combining methods have gradually expanded from traditional digital domain summation to the current domain, voltage domain, and charge domain.

[0003] In existing technologies, one approach involves current combining of multiple pixel signals at the column level in a rolling mode readout circuit to improve the output signal amplitude and detection sensitivity under low-light conditions. However, this method relies on row-by-row readout and column-level timing control, which can easily limit the frame rate. Another approach involves increasing the full-well capacity in a snapshot-type infrared focal plane readout circuit by combining integrating capacitors or switching different integrating capacitors, thereby extending the dynamic range under high-light conditions. However, this approach is mainly geared towards strong signal input scenarios.

[0004] The aforementioned existing technologies have proposed solutions for improving sensitivity in low light and expanding dynamic range in high light, but they still suffer from limitations in frame rate or lack of low-light detection capabilities. Summary of the Invention

[0005] The purpose of this invention is to provide a readout circuit and method for master-slave pixel current convergence, mainly addressing the problems existing in the prior art. It establishes a master-slave pixel relationship within adjacent pixel units, achieving direct merging and readout of multiple pixel photocurrents through pixel-level front-end current convergence, thereby improving the effective output signal amplitude and detection sensitivity under weak light signals. Simultaneously, this invention aims to achieve a coordinated design of pixel merging functionality and the readout circuit without significantly increasing pixel structural complexity, area overhead, and control difficulty, thus balancing circuit feasibility and array integration application requirements.

[0006] To achieve the above objectives, the technical solution adopted by the present invention is to provide a readout circuit for master-slave pixel current convergence, characterized in that it includes at least one pixel merging unit; each pixel merging unit is composed of multiple pixels; each pixel includes a photoelectric detection module, an integration module and a readout module;

[0007] In each of the pixel merging units, a plurality of pixels are configured as a master pixel and at least one slave pixel; each slave pixel further includes a first gating switch and a second gating switch; the first gating switch is connected to the photoelectric detection module of the slave pixel and the integration module of the master pixel, and is controlled by a first control signal; the second gating switch is connected to the photoelectric detection module of the slave pixel and the integration module of the slave pixel, and is controlled by a second control signal; the first control signal and the second control signal are complementary signals;

[0008] When the first control signal is active, the first gating switch is turned on and the second gating switch is turned off. The photocurrent generated by the photoelectric detection module of the pixel flows through the first gating switch to the integration module of the main pixel. The integration module and the readout module of the main pixel complete the integration and output to form a pixel merging mode.

[0009] When the second control signal is active, the second gating switch is turned on and the first gating switch is turned off. The photocurrent generated by the photoelectric detection module of the slave pixel flows through the second gating switch to the integration module of the slave pixel. The integration and output are completed by the integration module and the readout module of the slave pixel itself, forming a pixel independent mode.

[0010] Furthermore, it includes a mode control unit for generating the first control signal and the second control signal; when the circuit operates in the pixel merging mode, the mode control unit controls the first gating switch to be turned on and the second gating switch to be turned off; when the circuit operates in the pixel independent mode, the mode control unit controls the second gating switch to be turned on and the first gating switch to be turned off.

[0011] Furthermore, it also includes a two-layer pixel merging unit; the two-layer pixel merging unit is composed of multiple pixel merging units; the multiple pixel merging units have the same circuit structure; one of the pixel merging units is configured as a two-layer master unit, and the remaining pixel merging units are configured as two-layer slave units;

[0012] Each of the two-layer slave units further includes a third gating switch and a fourth gating switch; the third gating switch connects the output terminal of the photoelectric detection module of the main pixel in the two-layer slave unit to the integration module of the main pixel in the two-layer master unit, and is controlled by a third control signal; the fourth gating switch connects the output terminal of the photoelectric detection module of the main pixel in the two-layer slave unit to the integration module of the main pixel in the two-layer slave unit, and is controlled by a fourth control signal; the third control signal and the fourth control signal are complementary signals;

[0013] When the third control signal is active, the third gating switch is active and the fourth gating switch is closed. The current that has accumulated in the second-layer slave unit flows through the third gating switch to the integration module of the main pixel in the second-layer master unit. The main pixel in the second-layer master unit completes the integration and output, forming the unit merging mode. When the fourth control signal is active, the fourth gating switch is active and the third gating switch is closed. The current that has accumulated in the second-layer slave unit flows through the fourth gating switch to the integration module of the main pixel in the second-layer slave unit. The second-layer slave unit itself completes the integration and output, forming the pixel merging mode.

[0014] Furthermore, the mode control unit also generates the third control signal and the fourth control signal; when the circuit operates in the cell merging mode, the mode control unit controls the third gating switch to be turned on and the fourth gating switch to be turned off; when the circuit operates in the pixel merging mode, the mode control unit controls the fourth gating switch to be turned on and the third gating switch to be turned off.

[0015] Furthermore, when the first gating switch or the third gating switch is turned on, they both operate in the linear region to avoid compressing the dynamic range of the circuit.

[0016] The present invention also provides a pixel merging method based on the above-described readout circuit, characterized by comprising the following steps:

[0017] Step S101: Provide at least one of the pixel merging units; each pixel merging unit contains a plurality of the pixels; in one pixel merging unit, the plurality of pixels are configured as a master pixel and at least one slave pixel;

[0018] Step S102: Provide complementary first control signal and second control signal to the slave pixel; the first control signal controls the first gating switch, and the second control signal controls the second gating switch;

[0019] Step S103: When it is necessary to enter the pixel merging mode, proceed to step S104; when it is necessary to enter the pixel independent mode, proceed to step S105.

[0020] Step S104: Make the first control signal active and the second control signal inactive, so that the photocurrent from the pixel flows into the integration module of the main pixel through the first gating switch, and the integration and output are completed by the integration module and the readout module of the main pixel; proceed to step S106;

[0021] Step S105: Make the second control signal active and the first control signal inactive, so that the photocurrent from the pixel flows to the integration module of the pixel, and the integration and output are completed by the integration module and the readout module of the pixel; proceed to step S106;

[0022] Step S106, End.

[0023] Further, in step S104, the integration module and the readout module of the main pixel complete the integration and output, and the output process further includes:

[0024] Step S1041: Only enable the row selection signal of the row where the main pixel is located;

[0025] Step S1042: Only enable the column selection signal for the column where the main pixel is located;

[0026] Step S1043: Skip rows and skip columns to read, and output the merged signal in one go as the output of the pixel merging unit.

[0027] The present invention also provides another pixel merging method based on the above-described readout circuit, characterized by comprising the following steps:

[0028] Step S201: Provide at least one of the two-layer pixel merging units; the two-layer pixel merging unit includes a plurality of the pixel merging units;

[0029] Step S202: In each of the two-layer pixel merging units, one pixel merging unit is configured as one two-layer master unit and at least one two-layer slave unit; in each of the pixel merging units, multiple pixels are configured as one master pixel and at least one slave pixel;

[0030] Step S203: Provide complementary third and fourth control signals to the second-layer slave unit; the third control signal controls the third gating switch, and the fourth control signal controls the fourth gating switch; provide complementary first and second control signals to the slave pixel, the first control signal controls the first gating switch, and the second control signal controls the second gating switch;

[0031] Step S204: When it is necessary to enter the unit merging mode, proceed to step S205; when it is necessary to enter the pixel merging mode, proceed to step S206; when it is necessary to enter the pixel independent mode, proceed to step S207.

[0032] Step S205: Perform the second layer merging. Through the complementary third and fourth control signals, the photocurrent of the main pixel in the second layer unit is further converged to the integration module of the main pixel in the second layer main unit via the third gating switch. The main pixel in the second layer main unit completes the integration of all pixels in the second layer pixel merging unit and outputs the result.

[0033] Step S206: Perform the first layer of merging. Within each pixel merging unit, the photocurrent from the pixel is converged to the integration module of the main pixel in the pixel merging unit by the first control signal and the second control signal. The main pixel completes the integration of all pixels in the pixel merging unit and outputs the result. Proceed to step S208.

[0034] Step S207: Through the first control signal, the second control signal, the third control signal, and the fourth control signal, the photocurrent of the slave pixel flows to the integration module of the slave pixel, and the slave pixel completes the integration and output.

[0035] Step S208, End.

[0036] Further, in step S205, the main pixel in the second-layer main unit completes the integration of all pixels in the second-layer pixel merging unit and outputs the result. The output process further includes:

[0037] Step S2051: Only enable the row selection signal of the row where the main pixel is located in the second-layer main unit;

[0038] Step S2052: Only enable the column selection signal of the column where the main pixel is located in the second-layer main unit;

[0039] Step S2053: Skip multiple rows and columns to read, and output the merged signal in one go as the output of the two-layer pixel merging unit.

[0040] Furthermore, it also includes adaptive selection of merging modes, specifically comprising the following steps:

[0041] Step S301: Detect ambient illuminance;

[0042] Step S302: When the readout circuit includes the two-layer pixel merging unit, and when the ambient illuminance is lower than the first preset threshold, the control signal is automatically switched to a state where the first gating switch is turned on, the second gating switch is turned off, the third gating switch is turned on, and the fourth gating switch is turned off, and the unit merging mode is entered.

[0043] Step S303: When the ambient illuminance is between the first preset threshold and the second preset threshold, the control signal is automatically switched to a state in which the first gating switch is turned on, the second gating switch is turned off, the third gating switch is turned off, and the fourth gating switch is turned on, and the pixel merging mode is entered.

[0044] Step S304: When the ambient illuminance is higher than the second preset threshold, the control signal is automatically switched to a state in which the second gating switch is turned on, the first gating switch is turned off, the third gating switch is turned off, and the fourth gating switch is turned on, and the pixel independent mode is executed.

[0045] In view of the above technical features, this invention adopts a front-end current convergence design to establish a master-slave pixel relationship within multiple adjacent pixels, and further constructs a two-layer pixel master-slave merging. Pixel-level signal merging is achieved through the convergence and readout of the photocurrent from the master pixel to the slave pixel. Compared with existing technologies, it has the following significant advantages:

[0046] 1. This invention moves the merging position to the front of the pixel, which helps to reduce the dependence on the rolling readout timing and avoids the frame rate limitation problem caused by column-level row-by-row processing.

[0047] 2. This invention can directly increase the effective output signal amplitude under low light conditions, thereby improving the weak signal detection capability.

[0048] 3. Theoretical analysis and simulation results show that, under the 2×2 pixel and 4×4 pixel merging modes, the equivalent input signal can achieve multi-pixel superposition, the output signal amplitude is significantly improved, and the detection sensitivity under low illumination conditions is improved. Under the same readout link conditions, this scheme helps to improve the detectability of weak light signals and also meets the requirements for pixel-level merging readout.

[0049] 4. The circuit structure adopted in this invention is relatively simple and easy to integrate into existing CMOS readout circuits. Therefore, it has good engineering application value and can be used in fields such as low-light imaging, infrared detection, and high-sensitivity sensing. It has certain technical effects and application promotion value. Attached Figure Description

[0050] Figure 1 This is a schematic diagram of a preferred embodiment (2×2 pixel merging unit) of the readout circuit for master-slave pixel current convergence of the present invention;

[0051] Figure 2 This is a circuit diagram of a preferred embodiment (2×2 pixel merging unit) of the readout circuit for master-slave pixel current convergence of the present invention;

[0052] Figure 3This is a schematic diagram of another preferred embodiment of the readout circuit for master-slave pixel current convergence of the present invention (4×4 two-layer pixel merging unit);

[0053] Figure 4 This is a circuit diagram of another preferred embodiment of the readout circuit for master-slave pixel current convergence of the present invention (4×4 two-layer pixel merging unit);

[0054] Figure 5 This is a circuit diagram of the slave unit in another preferred embodiment of the readout circuit for master-slave pixel current convergence of the present invention (4×4 two-layer pixel merging unit);

[0055] Figure 6 This is a flowchart of a preferred embodiment of the readout method for master-slave pixel current convergence of the present invention (2×2 pixel merging unit);

[0056] Figure 7 This is a schematic diagram of the readout unit in the pixel merging mode of a preferred embodiment (2×2 pixel merging unit) of the readout method for master-slave pixel current convergence of the present invention.

[0057] Figure 8 This is a readout timing diagram in the pixel merging mode of a preferred embodiment (2×2 pixel merging unit) of the readout method for master-slave pixel current convergence of the present invention;

[0058] Figure 9 This is a readout timing diagram in pixel-independent mode of a preferred embodiment (2×2 pixel merging unit) of the readout method for master-slave pixel current convergence of the present invention;

[0059] Figure 10 This is a flowchart of another preferred embodiment of the readout method for master-slave pixel current convergence of the present invention (4×4 two-layer pixel merging unit);

[0060] Figure 11 This is a schematic diagram of the readout cell in the unit merging mode of another preferred embodiment of the readout method of master-slave pixel current convergence of the present invention (4×4 two-layer pixel merging unit);

[0061] Figure 12 This is a readout timing diagram in the unit merging mode of another preferred embodiment of the readout method for master-slave pixel current convergence of the present invention (4×4 two-layer pixel merging unit);

[0062] Figure 13 This is a flowchart of the adaptive selection of merging mode method in two preferred embodiments of the readout method for master-slave pixel current convergence of the present invention.

[0063] Figure 14 These are simulation results of several preferred embodiments of the readout method for master-slave pixel current convergence of the present invention.

[0064] In the image: 11 - first pixel, 12 - second pixel, 13 - third pixel, 14 - fourth pixel. Detailed Implementation

[0065] The present invention will be further described below with reference to specific embodiments. It should be understood that these embodiments are for illustrative purposes only and are not intended to limit the scope of the invention. Furthermore, it should be understood that after reading the teachings of this invention, those skilled in the art can make various alterations or modifications to the invention, and these equivalent forms also fall within the scope defined by the appended claims.

[0066] Example 1: 2×2 pixel merging unit.

[0067] Please see Figure 1 and Figure 2 This invention discloses a readout circuit for master-slave pixel current convergence. A preferred embodiment includes at least one 2×2 pixel merging unit, adapted to a p-on-n type photovoltaic detector. Each pixel merging unit consists of four pixels: a first pixel 11, a second pixel 12, a third pixel 13, and a fourth pixel 14. Each pixel includes a photodetector module, an integration module, and a readout module.

[0068] In this embodiment, the first pixel 11 is configured as the master pixel, and the second pixel 12, the third pixel 13, and the fourth pixel 14 are configured as slave pixels. The master and slave pixels have the same circuit structure. The power supply signal for the pixel is VDDA with a voltage of 5V, and the ground signal is VSSA. In other embodiments, the selection of the master pixel is not limited to the first pixel 11; for example, the position of the master pixel can be determined based on layout routing, column-level interface direction, or control logic convenience.

[0069] Each slave pixel also includes a first gating switch and a second gating switch. The first gating switch is MOSFETs M10, M19, and M28, which connects the output of the slave pixel's photodetector module to the integration node (point A) of the master pixel, and its gate is connected to the first control signal (BINA2). The second gating switch is MOSFETs M11, M20, and M29, which connect the output of the slave pixel's photodetector module to the slave pixel's own integration module, and its gate is connected to the second control signal (BINN2). BINA2 and BINN2 are complementary signals, with a high level of 5V and a low level of ground. The first and second gating switches must not be allowed to enter the saturation region during the pixel's integration process; otherwise, the dynamic range of the circuit will be reduced, thus affecting the full charge capacity. This principle also applies to the readout circuit of a n-on-p type detector with opposite polarities. In other embodiments, the first and second gating switches can also be implemented as transmission gates.

[0070] Both master and slave pixels are equipped with integration modules, including integrators, integrating capacitors, reset transistors, and anti-halo transistors. The gates of the integrators (M1, M9, M18, M27) ​​are connected to the integration bias voltage VBINT (4.2V), operating in the subthreshold region, and are used to direct the photocurrent generated by the photodetector module to the integration node. The integrating capacitor (Cint) is connected between the integration node and ground to accumulate charge. The gates of the reset transistors (M4, M13, M22, M31) receive the integration reset signal INTRST (high level 5V) to reset the integrating capacitor. The gates of the anti-halo transistors (M3, M12, M21, M30) receive the anti-halo bias voltage ABLM (4.2V) to discharge oversaturated charge under strong light.

[0071] Both master and slave pixels are equipped with readout modules, including related dual sampling circuits and row selection readout circuits. Specifically, the gate of the sampling reset transistor (M6, M15, M24, M33) receives the sampling reset signal SHRST (high level is 5V, low level is ground) to reset the sampling capacitor. The gate of the sampling switch (M5, M14, M23, M32) receives the sampling strobe signal SHS (high level is 5V, low level is ground) to sample the integrated voltage to the sampling capacitor. The sample-and-hold capacitor (Csh) is used to store the sampled voltage. The source follower (M7, M16, M25, M34) is used to convert the sampled voltage into a current or voltage signal. The gate of the row selection switch (M8, M17, M26, M35) receives the row selection signal (RSEL[0], RSEL[1]) to output the signal to the column bus (OUTN[0], OUTN[1], OUTP[0], OUTP[1]).

[0072] When the pixel merging unit operates in pixel merging mode, the photocurrents collected by the photodetector modules in the first pixel 11, second pixel 12, third pixel 13, and fourth pixel 14 all converge at the integration node (point A) of the first pixel 11, where they are processed by the integration module and readout module of the first pixel 11. At this time, BINA2 is low (active state) and BINN2 is high (inactive state), thus turning on the first gating switch (M10, M19, M28) and turning off the second gating switch (M11, M20, M29). The photocurrents generated by the photodetector modules of the pixels (second pixel 12, third pixel 13, and fourth pixel 14) do not flow to their own integration modules, but instead converge at the integration node (point A) of the main pixel (first pixel 11) via the first gating switch, where they are integrated by the integrating capacitor (Cint) of the main pixel. After integration, the readout module of the main pixel outputs the signal. In this mode, the row selection signal only activates the row containing the main pixel (e.g., RSEL[0]), and the column selection signal only activates the column containing the main pixel (e.g., OUTN[0]), enabling skipping rows and columns for reading. In this way, a 4x increase in weak signal detection capability is achieved by balancing the pixel array resolution.

[0073] When the pixel merging unit operates in pixel-independent mode, the first pixel 11, the second pixel 12, the third pixel 13, and the fourth pixel 14 each process the photocurrent independently. At this time, when BINA2 is high (invalid state) and BINN2 is low (valid state), the second gating switches (M11, M20, M29) are turned on, and the first gating switches (M10, M19, M28) are turned off. In this mode, the photocurrent of each pixel flows to its own integration module, and each readout module independently completes the integration and output. Row selection signals and column selection signals are sequentially activated to ensure orderly readout of each pixel.

[0074] In this embodiment, the first selection switches (M10, M19, M28) are all in the linear region to avoid compressing the dynamic range of the circuit, thereby ensuring that the photocurrent flows into the main pixel without loss.

[0075] Example 2: 4×4 two-layer pixel merging unit.

[0076] Please see Figures 2 to 5This invention discloses a readout circuit for master-slave pixel current convergence. A preferred embodiment includes at least one two-layer pixel merging unit. The two-layer pixel merging unit consists of four 2×2 pixel merging units as shown in Embodiment 1. The four 2×2 pixel merging units have the same circuit structure, each including a first pixel 11, a second pixel 12, a third pixel 13, and a fourth pixel 14. One 2×2 pixel merging unit is configured as a two-layer master unit, and the remaining three 2×2 pixel merging units are configured as two-layer slave units. In other embodiments, the master unit's location can be determined based on layout routing, column-level interface direction, or control logic convenience.

[0077] Each second-layer slave cell further includes a third gating switch and a fourth gating switch. The third gating switch (M2) connects the output terminal of the photodetector module of the main pixel in the second-layer slave cell (i.e., the node where current has been collected in the 2×2 cell, point B) to the integration module of the main pixel in the second-layer master cell (point C), and its gate is connected to the third control signal (BINA4). The fourth gating switch (M3) connects the output terminal of the photodetector module of the main pixel in the second-layer slave cell (point B) to the integration module of the main pixel in the second-layer slave cell, and its gate is connected to the fourth control signal (BINN4). BINA4 and BINN4 are complementary signals, with a high level of 5V and a low level of ground. The third and fourth gating switches must not be allowed to enter the saturation region during pixel integration, otherwise the dynamic range of the circuit will be reduced, thus affecting the full charge capacity. This principle also applies to the readout circuit of the n-on-p type detector with opposite polarity. In other embodiments, the third and fourth gating switches can also be implemented as transmission gates.

[0078] The current convergence in this embodiment is divided into two levels: The first level (within a 2×2 unit) is where the photocurrent from the pixel is converged to the integration node (point B) of the main pixel of that unit through the first gating switch (controlled by BINA2) within each 2×2 pixel merging unit. The second level (between 4×4 units) involves further converging the current already converged within the unit (located at the output of the photodetector module of the main pixel of that unit, point B) to the integration node (point C) of the main pixel within the second-level main unit through the third gating switch (controlled by BINA4).

[0079] Because it features two levels of convergence, the circuit configuring the two-layer pixel merging unit has three operating modes. In unit merging mode (4×4 full merging), BINA2 is low, BINN2 is high (enabling the first layer of merging), and BINA4 is low, BINN4 is high (enabling the second layer of merging). In this mode, all the slave pixel currents within the four 2×2 units first converge to the master pixel of their respective units, and then further converge to the master pixel of the second-layer master unit. Finally, the master pixel of the second-layer master unit completes the integration and output of all 16 pixels. In this mode, the row selection signal only activates the row containing the master pixel in the second-layer master unit, and the column selection signal only activates the column containing it, enabling skipping three rows and three columns for reading.

[0080] In the pixel merging mode (2×2 partial merging), the two-layer pixel merging unit operates as four independent pixel merging units. Specifically, BINA2 is low, BINN2 is high (enabling the first layer of merging), and BINA4 is high, BINN4 is low (disabling the second layer of merging and enabling the fourth gating switch). At this time, each 2×2 pixel merging unit independently completes the merging of its four pixels, and the 2×2 merged result is output by the main pixel of each pixel merging unit. The row selection signal only activates the row containing the main pixel in the pixel merging unit, and the column selection signal only activates the column containing the main pixel, enabling reading by skipping one row and one column.

[0081] In cell-independent mode, each cell operates independently, meaning BINA2 is high, BINN2 is low (disabling first-layer merging), and BINA4 is high while BINN4 is low. In this mode, all cells operate independently, each outputting its own signal.

[0082] In this embodiment, both the first and third gating switches operate in the linear region to avoid compressing the dynamic range of the circuit.

[0083] Please see Figure 14 The simulation results for Embodiment 1 and Embodiment 2 are presented. It can be seen that when the pixels are not combined, the currents of the first pixel 11 (00), the second pixel 12 (01), the third pixel 13 (10), and the fourth pixel 14 (11) are 3nA, 6nA, 9nA, and 12nA, respectively. In the 2×2 pixel combining mode, the total current is 30nA. In the 4×4 cell combining mode, the total current is 120nA.

[0084] Furthermore, in array-level applications, multiple 2×2 master-slave pixels and 4×4 master-slave pixels can be periodically arranged to form a pixel array. Each 2×2 or 4×4 cell independently performs master-slave current aggregation, and each cell outputs the merged readout result. For large-scale arrays, the operating states of multiple 2×2 or 4×4 cells can be uniformly managed through row control signals, column control signals, and mode control signals. This implementation method facilitates the extension of the invention to large-area photodetectors or CMOS image sensors, enhancing low-light detection capabilities without significantly increasing peripheral readout complexity.

[0085] Example 3: A merging method based on 2×2 pixel merging units.

[0086] Please see Figure 6 The present invention also discloses a pixel merging method based on the readout circuit described in Embodiment 1. A preferred embodiment of this method includes the following steps:

[0087] Step S101: Provide a 2×2 pixel merging unit.

[0088] At least one 2×2 cell merging unit is provided, i.e., each cell merging unit contains four cells. In a cell merging unit, the first cell is configured as the master cell, and the remaining three cells are configured as slave cells.

[0089] Step S102: Provide complementary control signals.

[0090] Complementary control signals are provided to each pixel merging unit. Specifically, a complementary first control signal BINA2 and a second control signal BINN2 are provided to each pixel in the pixel merging unit. BINA2 controls a first gating switch, and BINN2 controls a second gating switch.

[0091] Step S103: Select the working mode.

[0092] Select the operating mode according to the application scenario. When it is necessary to improve the detection sensitivity under low light conditions, proceed to step S104, which is the pixel merging mode. When it is necessary to maintain high spatial resolution, proceed to step S105, which is the pixel independence mode.

[0093] Step S104, Pixel merging mode.

[0094] In pixel merging mode, BINA2 is low (active) and BINN2 is high (inactive). At this time, the first gating switch is on, and the second gating switch is off. The photocurrent generated from the photodetector module of the pixel flows through the first gating switch into the integration node (point A) of the main pixel, where it is integrated by the integrating capacitor of the main pixel. The photocurrent of the main pixel is superimposed with the photocurrent flowing from the pixel, and the total current is the sum of the photocurrents of the four pixels. After integration, the signal is output by the readout circuit of the main pixel. Then, proceed to step S106.

[0095] Please see Figure 7 and Figure 8 In pixel-merging mode, because the photocurrent from the pixel is converged to the main pixel for unified processing, only the output signal of the main pixel needs to be sampled when outputting the signal. Specifically, this further includes:

[0096] Step S1041: Only enable the row selection signal for the row where the main pixel is located.

[0097] Step S1042: Only enable the column selection signal for the column containing the main pixel.

[0098] Step S1043: Read the output of the pixel merging unit.

[0099] Skip rows and columns to ignore secondary pixels and only read the merged signal from the primary pixel at once, which is then used as the output of the 2×2 pixel merging unit.

[0100] Step S105, Pixel Independent Mode.

[0101] In pixel-independent mode, BINN2 is low (active) and BINA2 is high (inactive). At this time, the second gating switch is on, and the first gating switch is off. The photocurrent flowing from each pixel to its own integrating capacitor is integrated and output independently by its respective readout circuit. The main pixel also operates independently. Then, proceed to step S106.

[0102] Please see Figure 9 In cell-independent mode, the row selection signal and column selection signal sequentially traverse each cell, and four output signals are read out respectively.

[0103] Step S106: End this operation.

[0104] Example 4: 4×4 two-layer pixel merging method.

[0105] Please see Figure 10 The present invention also provides a pixel merging method based on the readout circuit described in Embodiment 2. One embodiment of this method includes the following steps:

[0106] Step S201: Provide a two-layer pixel merging unit.

[0107] At least one two-layer cell merging unit (i.e., a 4×4 cell array) is provided. Each two-layer cell merging unit consists of four 2×2 cell merging units.

[0108] Step S202: Configure the two-layer pixel merging unit.

[0109] In each two-layer pixel merging unit, one 2×2 pixel merging unit is configured as the two-layer master unit, and the other three are configured as two-layer slave units. Within each 2×2 pixel merging unit, one pixel is configured as the master pixel, and the other three are configured as slave pixels.

[0110] Step S203: Provide two sets of complementary control signals.

[0111] Complementary third control signal BINA4 and fourth control signal BINN4 are provided to the second-layer slave cells. BINA4 controls the third gating switch, and BINN4 controls the fourth gating switch. Simultaneously, complementary first control signal BINA2 and second control signal BINN2 are provided to each slave cell. BINA2 controls the first gating switch, and BINN2 controls the second gating switch.

[0112] Step S204: Select the working mode.

[0113] Select the operating mode based on ambient light and application requirements. When high sensitivity is required and lower resolution is acceptable (e.g., in extremely low light environments), enter the cell merging mode (step S205). When medium sensitivity is required and medium resolution is acceptable, enter the pixel merging mode (step S206). When the highest resolution is required (e.g., in strong light environments), enter the pixel independence mode (step S207).

[0114] Step S205, Unit merging mode.

[0115] In the cell merging mode, all 16 pixels in a two-layer cell merging unit are merged together. First, the second-layer merging is performed. BINA4 is set to low (active state) and BINN4 is set to high (inactive state), which turns on the third gating switch and turns off the fourth gating switch. After the second-layer merging is enabled, all the main pixels in the three cell merging units that are slave pixels are further converged to the integration module of the main pixel through the third gating switch. Then, step S206 is performed to execute the first-layer merging.

[0116] Please see Figure 11 and Figure 12In cell merging mode, the integration and output of all 16 pixels are completed by the main pixels in the two-layer main cell. Therefore, when outputting the signal, it is only necessary to sample the output signal of the main pixels in the main cell. The output process further includes:

[0117] Step S2051: Only enable the row selection signal of the row where the main pixel is located in the second-layer main unit;

[0118] Step S2052: Only enable the column selection signal of the column where the main pixel is located in the second-layer main unit;

[0119] Step S2053: Read the output of the two-layer pixel merging unit.

[0120] Skip multiple rows and columns to read (for 4×4, merge into skip three rows and skip three columns) to skip all pixels in the slave unit and slave pixels in the master unit, and use the merged signal of the master pixel in the master unit as the output of the second-layer pixel merging unit.

[0121] Step S206, Pixel merging mode.

[0122] In cell merging mode, or as the second stage of unit merging mode, the first layer of merging is performed. At this time, BINA2 is low and BINN2 is high. Each 2×2 cell merging unit then completes the current convergence of the four cells within the unit.

[0123] In the pixel merging mode, after circuit initialization, BINA4 is at a high level and BINN4 is at a low level. At this time, each 2×2 pixel merging unit independently completes the current convergence of the four pixels within the unit, and the main pixel of each unit completes the integration and outputs the 2×2 merging result. Then, proceed to step S208.

[0124] In the cell merging mode, as the second stage, after the first-layer merging and the second-layer merging are combined, BINA4 is low and BINN4 is high (configured in step S205). At this time, the four cell merging units in the second-layer main unit first converge the photocurrent of their own four pixels, and then converge it to the main pixel of the main unit, which completes the integration of all 16 pixels and outputs the result. Then, the process proceeds to step S208.

[0125] Step S207, Pixel Independent Mode.

[0126] In pixel-independent mode, BINN2 is low and BINA2 is high (disabling first-layer merging), while BINA4 is high and BINN4 is low (disabling second-layer merging). In this mode, the photocurrent of all pixels flows to their respective integrating capacitors, and each pixel's readout circuit independently performs integration and output.

[0127] Step S208: End this operation.

[0128] Example 5: Adaptive selection of merging mode.

[0129] Please see Figure 13 The present invention also provides an adaptive selection merging mode method based on the pixel merging method described in Embodiment 3 or Embodiment 4, corresponding to steps S103 and S204, including the following steps:

[0130] Step S301: Detect ambient illuminance.

[0131] The ambient illuminance is detected by an on-chip or external light sensor. The ambient illuminance can be quantified as a digital value or analog voltage for comparison with a preset threshold.

[0132] Step S302: Determine whether to enter the cell merging mode.

[0133] If the readout circuit does not contain a two-layer pixel merging unit, proceed to step S303.

[0134] Otherwise, the first preset threshold is further determined. When the ambient illuminance is lower than the first preset threshold (i.e., low light environment), the control signal is automatically switched to the following states: the first gating switch is on, the second gating switch is off (BINA2 is low level, BINN2 is high level); the third gating switch is on, the fourth gating switch is off (BINA4 is low level, BINN4 is high level).

[0135] In this state, the readout circuit enters the cell merging mode (i.e., 4×4 full merging mode). The photocurrent of all 16 pixels in a two-layer pixel merging unit is first converged through the first layer merging to the main pixel of its respective 2×2 unit, and then further converged through the second layer merging to the main pixel of the second-layer main unit. The main pixel of the second-layer main unit completes the integration and output. This mode is suitable for extremely low-light scenes to maximize the signal-to-noise ratio and detection sensitivity.

[0136] Step S303: Determine whether to enter pixel merging mode.

[0137] When the ambient illuminance is between the first preset threshold and the second preset threshold (i.e., a medium illuminance environment), the control signal is automatically switched to the following state: the first gating switch is turned on and the second gating switch is turned off (BINA2 is low level and BINN2 is high level); when the two-layer pixel merging unit exists, the third gating switch is further turned off and the fourth gating switch is turned on (BINA4 is high level and BINN4 is low level).

[0138] In this state, the readout circuit enters pixel merging mode (i.e., 2×2 partial merging mode). Each 2×2 pixel merging unit independently completes the current convergence of the four pixels within the unit, and the main pixel of each unit completes the integration and outputs the 2×2 merging result. This mode is suitable for medium illumination scenes, achieving a balance between sensitivity and resolution.

[0139] Step S304: Enter pixel-independent mode.

[0140] When the ambient illuminance is higher than the second preset threshold (i.e., strong light environment), the control signal will be automatically switched to the following states: the second gating switch is on and the first gating switch is off (BINA2 is high level and BINN2 is low level); the third gating switch is off and the fourth gating switch is on (BINA4 is high level and BINN4 is low level).

[0141] In this state, the readout circuit executes the pixel-independent mode. The photocurrent of each pixel flows to its respective integrating capacitor, and each readout circuit independently performs integration and output. This mode is suitable for high-illuminance scenes to preserve the highest spatial resolution.

[0142] The first and second preset thresholds can be configured according to specific application scenarios and sensor characteristics. For example, the first preset threshold can be set to 10 lux, corresponding to low-light environments. The second preset threshold can be set to 1000 lux, corresponding to normal indoor lighting or outdoor cloudy environments.

[0143] The above description is merely a preferred embodiment of the present invention and does not limit the patent scope of the present invention. Any equivalent structural or procedural transformations made based on the content of the present invention's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of the present invention.

Claims

1. A readout circuit for master-slave pixel current convergence, characterized in that, It includes at least one pixel merging unit; each pixel merging unit consists of multiple pixels; each pixel includes a photoelectric detection module, an integration module, and a readout module; In each of the pixel merging units, a plurality of pixels are configured as a master pixel and at least one slave pixel; each slave pixel further includes a first gating switch and a second gating switch; the first gating switch is connected to the photoelectric detection module of the slave pixel and the integration module of the master pixel, and is controlled by a first control signal; the second gating switch is connected to the photoelectric detection module of the slave pixel and the integration module of the slave pixel, and is controlled by a second control signal; the first control signal and the second control signal are complementary signals; When the first control signal is active, the first gating switch is turned on and the second gating switch is turned off. The photocurrent generated by the photoelectric detection module of the pixel flows through the first gating switch to the integration module of the main pixel. The integration module and the readout module of the main pixel complete the integration and output to form a pixel merging mode. When the second control signal is active, the second gating switch is turned on and the first gating switch is turned off. The photocurrent generated by the photoelectric detection module of the slave pixel flows through the second gating switch to the integration module of the slave pixel. The integration and output are completed by the integration module and the readout module of the slave pixel itself, forming a pixel independent mode.

2. The readout circuit according to claim 1, characterized in that, It also includes a mode control unit for generating the first control signal and the second control signal; when the circuit operates in the pixel merging mode, the mode control unit controls the first gating switch to be turned on and the second gating switch to be turned off; when the circuit operates in the pixel independent mode, the mode control unit controls the second gating switch to be turned on and the first gating switch to be turned off.

3. The readout circuit according to claim 1, characterized in that, It also includes a two-layer pixel merging unit; the two-layer pixel merging unit is composed of multiple pixel merging units; the multiple pixel merging units have the same circuit structure; one of the pixel merging units is configured as a two-layer master unit, and the remaining pixel merging units are configured as two-layer slave units; Each of the two-layer slave units further includes a third gating switch and a fourth gating switch; the third gating switch connects the output terminal of the photoelectric detection module of the main pixel in the two-layer slave unit to the integration module of the main pixel in the two-layer master unit, and is controlled by a third control signal; the fourth gating switch connects the output terminal of the photoelectric detection module of the main pixel in the two-layer slave unit to the integration module of the main pixel in the two-layer slave unit, and is controlled by a fourth control signal; the third control signal and the fourth control signal are complementary signals; When the third control signal is active, the third gating switch is turned on and the fourth gating switch is turned off. The current that has been gathered in the second-layer unit flows through the third gating switch to the integration module of the main pixel in the second-layer main unit. The main pixel in the second-layer main unit completes the integration and output, forming a unit merging mode. When the fourth control signal is active, the fourth gating switch is turned on and the third gating switch is turned off. The current that has been gathered in the second-layer slave unit flows through the fourth gating switch to the integration module of the main pixel in the second-layer slave unit. The second-layer slave unit itself completes the integration and output, thus forming the pixel merging mode.

4. The readout circuit according to claim 3, characterized in that, The mode control unit also generates the third control signal and the fourth control signal; when the circuit operates in the cell merging mode, the mode control unit controls the third gating switch to be turned on and the fourth gating switch to be turned off; when the circuit operates in the pixel merging mode, the mode control unit controls the fourth gating switch to be turned on and the third gating switch to be turned off.

5. The readout circuit according to any one of claims 1 or 3, characterized in that, When the first or third gating switch is turned on, they both operate in the linear region to avoid the dynamic range of the compression circuit.

6. A pixel merging method based on the readout circuit of claim 1, characterized in that, Includes the following steps: Step S101: Provide at least one of the pixel merging units; each pixel merging unit contains a plurality of the pixels; in one pixel merging unit, the plurality of pixels are configured as a master pixel and at least one slave pixel; Step S102: Provide complementary first control signal and second control signal to the slave pixel; the first control signal controls the first gating switch, and the second control signal controls the second gating switch; Step S103: When it is necessary to enter the pixel merging mode, proceed to step S104; when it is necessary to enter the pixel independent mode, proceed to step S105. Step S104: Make the first control signal active and the second control signal inactive, so that the photocurrent from the pixel flows into the integration module of the main pixel through the first gating switch, and the integration and output are completed by the integration module and the readout module of the main pixel; proceed to step S106; Step S105: Make the second control signal active and the first control signal inactive, so that the photocurrent from the pixel flows to the integration module of the pixel, and the integration and output are completed by the integration module and the readout module of the pixel; proceed to step S106; Step S106, End.

7. The pixel merging method according to claim 6, characterized in that, In step S104, the integration module and the readout module of the main pixel complete the integration and output, and the output process further includes: Step S1041: Only enable the row selection signal of the row where the main pixel is located; Step S1042: Only enable the column selection signal for the column where the main pixel is located; Step S1043: Skip rows and skip columns to read, and output the merged signal in one go as the output of the pixel merging unit.

8. A pixel merging method based on the readout circuit of claim 3, characterized in that, Includes the following steps: Step S201: Provide at least one of the two-layer pixel merging units; the two-layer pixel merging unit includes a plurality of the pixel merging units; Step S202: In each of the two-layer cell merging units, one of the cell merging units is configured as a two-layer master unit and at least one two-layer slave unit; In each of the pixel merging units, a plurality of the pixels are configured as a master pixel and at least one slave pixel; Step S203: Provide complementary third and fourth control signals to the second-layer slave unit; the third control signal controls the third gating switch, and the fourth control signal controls the fourth gating switch; provide complementary first and second control signals to the slave pixel, the first control signal controls the first gating switch, and the second control signal controls the second gating switch; Step S204: When it is necessary to enter the unit merging mode, proceed to step S205; when it is necessary to enter the pixel merging mode, proceed to step S206; when it is necessary to enter the pixel independent mode, proceed to step S207. Step S205: Perform the second layer merging. Through the complementary third and fourth control signals, the photocurrent of the main pixel in the second layer unit is further converged to the integration module of the main pixel in the second layer main unit via the third gating switch. The main pixel in the second layer main unit completes the integration of all pixels in the second layer pixel merging unit and outputs the result. Step S206: Perform the first layer of merging. Within each pixel merging unit, the photocurrent from the pixel is converged to the integration module of the main pixel in the pixel merging unit by the first control signal and the second control signal. The main pixel completes the integration of all pixels in the pixel merging unit and outputs the result. Proceed to step S208. Step S207: Through the first control signal, the second control signal, the third control signal, and the fourth control signal, the photocurrent of the slave pixel flows to the integration module of the slave pixel, and the slave pixel completes the integration and output. Step S208, End.

9. The pixel merging method according to claim 8, characterized in that, In step S205, the main pixel in the second-layer main unit completes the integration of all pixels in the second-layer pixel merging unit and outputs the result. The output process further includes: Step S2051: Only enable the row selection signal of the row where the main pixel is located in the second-layer main unit; Step S2052: Only enable the column selection signal of the column where the main pixel is located in the second-layer main unit; Step S2053: Skip multiple rows and columns to read, and output the merged signal in one go as the output of the two-layer pixel merging unit.

10. The pixel merging method according to any one of claims 6 or 8, characterized in that, It also includes adaptive selection of merging mode, specifically comprising the following steps: Step S301: Detect ambient illuminance; Step S302: When the readout circuit includes the two-layer pixel merging unit, and when the ambient illuminance is lower than the first preset threshold, the control signal is automatically switched to a state where the first gating switch is turned on, the second gating switch is turned off, the third gating switch is turned on, and the fourth gating switch is turned off, and the unit merging mode is entered. Step S303: When the ambient illuminance is between the first preset threshold and the second preset threshold, the control signal is automatically switched to a state in which the first gating switch is turned on, the second gating switch is turned off, the third gating switch is turned off, and the fourth gating switch is turned on, and the pixel merging mode is entered. Step S304: When the ambient illuminance is higher than the second preset threshold, the control signal is automatically switched to a state in which the second gating switch is turned on, the first gating switch is turned off, the third gating switch is turned off, and the fourth gating switch is turned on, and the pixel independent mode is executed.

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