A method and apparatus for optical signal transmission

Abstract

This application discloses an optical signal transmission method and apparatus for maximizing bandwidth utilization while reducing processing complexity. OPUk multiplexed frames with bit rates greater than 1.25 Gbps are constructed using the structure of OPU0 multiplexed frames, allowing the structure of the OPUk multiplexed frames to reuse the structure of the OPU0 multiplexed frames, thus aligning with the structure of the OPU0 multiplexed frames. The OPUk multiplexed frames consist of integer multiples of OPUk frames, maintaining boundary alignment between the OPUk multiplexed frames and the OPUk frames. Therefore, when mapping OSU frames, the OTN device can map OSU frames into OPUk multiplexed frames based on the reused OPU0 multiplexed frame structure, quickly obtaining the payload block position in each transmission cycle, thereby reducing processing complexity.

Description

[0001] This application is a divisional application. The original application has the application number 202111340909.8 and the original application date is November 12, 2021. The entire contents of the original application are incorporated herein by reference. Technical Field

[0002] This application relates to the field of optical communication technology, and in particular to an optical signal transmission method and apparatus. Background Technology

[0003] Optical transport network (OTN), as a core technology of next-generation transport networks, features high bandwidth, large capacity, high reliability, and low latency. Currently, OTN technology is further expanding into access networks. To enable OTN technology to achieve transmission capabilities as low as a few megabits per second, optical service unit (OSU) frames can be used to provide transmission containers with rates as low as 2.6 Mbps. Specifically, OSU frames carrying service data can be mapped to optical data units (ODUs) for k / flex transmission. However, how to specifically partition ODUs k / flex to maximize bandwidth utilization while reducing processing complexity remains to be discussed. Summary of the Invention

[0004] This application provides an optical signal transmission method and apparatus to reduce processing complexity while maximizing bandwidth utilization.

[0005] In a first aspect, embodiments of this application provide an optical signal transmission method. The method includes: mapping an OSU frame to an Optical Payload Unit (OPUk) multiplexed frame, wherein the bit rate of the OPUk multiplexed frame is greater than 1.25 Gbps. The OPUk multiplexed frame includes M1. There are N OPUk frames, and the payload area of ​​each OPUk multiplexed frame includes P payload blocks, where P is N times P0. Here, P0 is the number of payload blocks included in the OPU0 multiplexed frame, and the OPU0 multiplexed frame includes M1 OPU0 frames. Alternatively, P0 is 1 / M² of the number of payload blocks included in the OPU0 multiplexed frame, and the OPU0 multiplexed frame consists of M1... It consists of M2 OPU0 frames. N is an integer greater than 1, M1 is an integer greater than or equal to 1, and M2 is an integer greater than 1. Further, M1... N OPUk frames are mapped one by one to M1 N ODUk frames; send M1 N ODUk frames.

[0006] In this embodiment, OPUk multiplexed frames with a bit rate greater than 1.25Gbps are constructed using the structure of the OPU0 multiplexed frame. This ensures that the structure of the OPUk multiplexed frame reuses the structure of the OPU0 multiplexed frame, thus aligning them. The OPUk multiplexed frame consists of integer multiples of OPUk frames, maintaining boundary alignment between the OPUk multiplexed frame and the OPUk frame. Furthermore, when mapping OSU frames, the OTN device can map OSU frames to OPUk multiplexed frames based on the structure of the reused OPU0 multiplexed frame. This allows for faster acquisition of the payload block position for each transmission cycle, thereby reducing processing complexity.

[0007] In one possible design, the number P of payload blocks included in the OPUk multiplexed frame satisfies the following formula: .

[0008] in, This indicates the number of payload blocks included in the OPU0 multiplexed frame. Indicates rounding down. This represents the bit rate of the payload region of the OPUk, where x represents the frequency offset. It represents one part per million. This represents the base rate of the payload block. In the above design, the denominator directly uses the payload bit rate of OPU0. It is simple to implement.

[0009] In one possible design, the number of payload blocks included in the OPUk multiplexed frame satisfies the following formula: ; in, This indicates the number of payload blocks included in the OPU0 multiplexed frame. Indicates rounding down. This represents the bit rate of the payload region of the OPUk, where x and y both represent frequency offset. It represents one part per million. This represents the reference rate of the net charge block. In the above design, the frequency offset y ppm is considered in the denominator to further improve the calculation accuracy and make the calculated P value more accurate. Here, x is the frequency offset of OPUk, and y is the frequency offset of the reference rate.

[0010] In one possible design, the It is 2.6 Mbit / s.

[0011] In one possible design, the number of payload blocks included in the OPUk multiplexing frame satisfies the following formula: .

[0012] in, This indicates the number of payload blocks included in the OPU0 multiplexed frame. Indicates rounding down. This indicates the bit rate of the payload region of the OPUk. The value represents the bit rate of the payload region of OPU0, and x represents the frequency offset. In the above design, the denominator uses... This can further improve bandwidth utilization efficiency.

[0013] In one possible design, the number of payload blocks included in the OPUk multiplexing frame satisfies the following formula: ; in, This indicates the number of payload blocks included in the OPU0 multiplexed frame. Indicates rounding down. This indicates the bit rate of the payload region of the OPUk. Let x represent the bit rate of the payload region of OPU0, and y represent the frequency offset. In the above design, the frequency offset y ppm is considered in the denominator to further improve the calculation accuracy and make the calculated P value more accurate.

[0014] In one possible design, the number of payload blocks included in the OPUk multiplexing frame satisfies the following: .

[0015] in, This represents 1 / M², which is the number of payload blocks included in the OPU0 multiplexed frame. Indicates rounding down. This indicates the bit rate of the payload region of the OPUk. Let x represent the bit rate of the payload region of OPU0, and let x represent the frequency offset. In the above design, the denominator directly uses the bit rate of the payload region of OPU0. and It is simple to implement.

[0016] In one possible design, the number of payload blocks included in the OPUk multiplexing frame satisfies the following formula: ; in, This represents 1 / M², which is the number of payload blocks included in the OPU0 multiplexed frame. Indicates rounding down. This indicates the bit rate of the payload region of the OPUk. Let x represent the bit rate of the payload region of OPU0, and y represent the frequency offset. In the above design, the frequency offset y ppm is considered in the denominator to further improve the calculation accuracy and make the calculated P value more accurate.

[0017] In one possible design, the M1 The overhead regions of the N ODUk frames each include a multiframe indicator, where M1 N multiframes indirectly (or implicitly) indicate the M1. The bit positions of the payload blocks included in the payload area of ​​each of the N OPUk frames; or, the M1 The overhead regions of the N OPUk frames each include the multiframe indication. In the above design, the multiframe indication, in addition to indicating the location of the OPUk frame, also indirectly indicates the M1. The payload area of ​​each of the N OPUk frames contains the bit positions of the payload block. This can reduce other bit overhead.

[0018] In one possible design, the M1 The overhead regions of the N OPUk frames each include a first multiframe indicator and a second multiframe indicator. Among them, M1... N OPUk frames comprise N OPUk groups, and each OPUk group comprises M1 consecutive OPUk frames. The M1 first multiframes within each OPUk group indirectly indicate the bit position of the payload block included in each OPUk frame within that OPUk group. The second multiframes within each OPUk frame within that OPUk group indicate the position of the OPUk group within the N OPUk groups. Alternatively, the M1... The overhead regions of the N ODUk frames each include the first multiframe indication and the second multiframe indication. In the above design, the two-level multiframe indication indirectly indicates the M1 in addition to indicating the location of the ODUk frame. The payload area of ​​each of the N OPUk frames contains the bit positions of the payload block. This can reduce other bit overhead.

[0019] In one possible design, the OPUk is OPU2, OPU2e, OPU3, OPU4, OPU25, OPU25u, OPU50, OPU50u, OPUUCn, or OPUflex.

[0020] In one possible design, P0 is the number of payload blocks included in the OPU0 multiplexed frame, where P0 = 476.

[0021] In one possible design, P0 is 1 / M2 of the number of payload blocks included in the OPU0 multiplexed frame, where P0 = 238.

[0022] Secondly, embodiments of this application provide an optical signal transmission device. The device includes a processor and a memory, wherein: the memory is used to store program code; the processor is used to read and execute the program code stored in the memory to implement the method described in the first aspect or any design of the first aspect.

[0023] Thirdly, embodiments of this application provide an optical signal transmission apparatus. The apparatus includes a processor and an optical transceiver. The processor and the optical transceiver are connected via a line and are used to perform the method described in the first aspect or any design of the first aspect. The processor can transmit OTN frames via the optical transceiver.

[0024] Fourthly, this application also provides a computer storage medium. The storage medium stores a software program that, when read and executed by one or more processors, can implement any of the methods provided in the first aspect.

[0025] Fifthly, embodiments of this application provide a computer program product containing instructions that, when run on a computer, cause the computer to perform the method provided in any of the designs of the first aspect described above.

[0026] Sixthly, embodiments of this application provide a chip including a communication interface and a processor. The processor and the communication interface are connected via a line and are used to execute the method provided in any of the designs of the first aspect.

[0027] In one possible design, the chip is connected to a memory for reading and executing software programs stored in the memory to implement the method provided by any of the designs in the first aspect.

[0028] In one possible design, the chip can also be connected to an optical transceiver, through which the chip transmits and receives OTN frames.

[0029] Seventhly, embodiments of this application provide an OPUk multiplexed frame, wherein the bit rate of the OPUk multiplexed frame is greater than 1.25 Gbps, and the OPUk multiplexed frame is generated by M1. The OPU0 multiplexed frame consists of N OPUk frames, and the payload area of ​​the OPUk multiplexed frame includes P payload blocks, where P is N times P0; wherein, P0 is the number of payload blocks included in the OPU0 multiplexed frame, and the OPU0 multiplexed frame consists of M1 OPU0 frames; or, P0 is 1 / M2 of the number of payload blocks included in the OPU0 multiplexed frame, and the OPU0 multiplexed frame consists of M1 It consists of M2 OPU0 frames, where N is an integer greater than 1, M1 is an integer greater than or equal to 1, and M2 is an integer greater than 1.

[0030] It should be understood that the second to seventh aspects of this application are the same as or similar to the technical solutions of the first aspect of this application, and the beneficial effects achieved by each aspect and the corresponding feasible implementation are similar, so they will not be described again. Attached Figure Description

[0031] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below.

[0032] Figure 1 This is a schematic diagram of a network architecture according to this application; Figure 2 This is a schematic diagram of the hardware structure of an OTN device according to this application; Figure 3 This is a schematic diagram of the frame structure of an OPUk frame; Figure 4 This is a schematic diagram of the structure of an OPUk multiplexed frame; Figure 5 This is a schematic diagram illustrating the structural relationship between OPU0 multiplexed frames and OPUk multiplexed frames provided in an embodiment of this application. Figure 6 This is a schematic diagram of the OPU0 multiplexed frame structure in an embodiment of this application; Figure 7 This is a schematic diagram of an OPUk multiplexing frame structure in an embodiment of this application; Figure 8 This is a schematic diagram of another OPUk multiplexed frame structure provided in an embodiment of this application; Figure 9 This is a schematic diagram of another OPUk multiplexing frame structure provided in an embodiment of this application; Figure 10 This is a schematic flowchart of the optical signal transmission method provided in the embodiments of this application; Figure 11 This is a schematic diagram of the structure of an optical signal transmission device provided in an embodiment of this application; Figure 12 This is a schematic diagram of another optical signal transmission device provided in an embodiment of this application. Detailed Implementation

[0033] The technical solutions in the embodiments of this application will now be described with reference to the accompanying drawings.

[0034] The network architecture and service scenarios described in the embodiments of this application are for the purpose of more clearly illustrating the technical solutions of the embodiments of this application, and do not constitute a limitation on the technical solutions provided in the embodiments of this application. Those skilled in the art will understand that, with the evolution of network architecture and the emergence of new service scenarios, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems.

[0035] The technical solutions provided in this application are applicable to optical networks, such as OTN. An OTN is typically composed of multiple OTN devices connected by optical fibers, and can be configured into different topologies such as linear, ring, and mesh according to specific needs.

[0036] Figure 1 The diagram shown is a schematic representation of a network architecture according to this application. Figure 1 The OTN shown includes two OTN networks (OTN Network 1 and OTN Network 2). Each OTN network includes a certain number of OTN devices. Figure 1 In an OTN network (represented by N), links between devices within the same network are intra-domain links, while links between devices across different OTN networks are inter-domain links. Depending on actual needs, an OTN device may possess one or more functions. Generally, OTN devices are categorized into optical layer devices, electrical layer devices, and hybrid optoelectronic devices. Optical layer devices are those capable of processing optical layer signals, such as optical amplifiers (OA). Electrical layer devices are those capable of processing electrical layer signals, such as devices capable of processing ODU signals. Hybrid optoelectronic devices are those capable of processing both optical and electrical layer signals. It should be noted that, depending on specific integration requirements, a single OTN device can integrate multiple different functions. The technical solutions provided in this application are applicable to OTN devices of different forms and levels of integration. See also... Figure 1 As shown, the OTN network can also connect client devices, such as... Figure 1 The client devices connected to N1 and N5 in the OTN network are described. The number of client devices connected to the OTN network is not specifically limited in this embodiment. OTN devices in the OTN network are used to transmit service data from client devices. For example, an OTN device can receive service data from client devices, then map the service data into an OSU frame, further map the OSU frame into an OTN frame, and send it to other OTN devices. For example, the service data can be data from constant bit rate (CBR) services, packet (PKT) type services, or synchronous transport module-N (STM-N) services. Exemplarily, the client device can be a router, switch, or synchronous digital hierarchy (SDH) device; this application does not specifically limit this.

[0037] Figure 2The diagram shows a hardware structure of an OTN device according to this application. Specifically, an OTN device includes a power supply, a fan, auxiliary boards, and may also include tributary boards, line boards, cross-connect boards, and system control and communication boards. The line boards may also include optical layer processing boards. It should be noted that the specific types and numbers of boards included in each device may vary depending on specific needs. For example, a network device acting as a core node may not have tributary boards. A network device acting as an edge node may have multiple tributary boards. The power supply is used to power the OTN device and may include primary and backup power supplies. The fan is used for heat dissipation. Auxiliary boards are used to provide auxiliary functions such as external alarms or access to external clocks. Tributary boards, cross-connect boards, and line boards are mainly used to process the electrical layer signals of the OTN (hereinafter referred to as OTN frames). The tributary boards are used to receive and transmit various customer services, such as Synchronous Digital Hierarchy (SDH) services, packet services, Ethernet services, and fronthaul services. Furthermore, the tributary board can be divided into customer-side optical modules and signal processors. The customer-side optical module can be an optical transceiver used to receive and / or transmit customer signals. The signal processor is used to perform mapping and demapping of customer signals to OTN frames. The cross-connect board is used to switch OTN frames, completing the switching of one or more types of OTN frames. The line board mainly implements the processing of line-side OTN frames. Specifically, the line board can be divided into a line-side optical module and a signal processor. The line-side optical module can be a line-side optical transceiver used to receive and / or transmit OTN frames. The signal processor is used to perform multiplexing and demultiplexing, or mapping and demapping, of line-side OTN frames. System control and communication boards are used to implement system control and communication. Specifically, information can be collected from different boards through the backplane, or control commands can be sent to the corresponding boards. Unless otherwise specified, a specific component (e.g., a tributary board) can be one or more, and this application does not impose any limitations. It should be noted that the embodiments of this application do not limit the types of boards included in the device, or the specific functional design and quantity of the boards.

[0038] The following is a brief introduction to some of the terms and techniques used in the embodiments of this application.

[0039] (1) OTN frame: At the electrical layer, OTN frames processed by OTN devices can adopt frame formats defined by the International Telecommunication Union (ITU-T) Telecommunication Standards Sector. For example, standards such as G.709 and G.709.1 are used to achieve interoperability between devices. Existing standards have defined various OTN frame rates, such as OPUk, ODUk, and OTUk frames. Here, k = 0, 1, 2, 2e, 3, 4, 25, 25u, 50, 50u, Cn, and flex. See Table 1 for examples illustrating the corresponding OPU payload bit rates (kbit / s) for different k values. Furthermore, when k = Cn, the OPU payload bit rate is approximately n... At 100 Gbit / s and k = flex, the net payload bit rate of the OPU is approximately n. 1.25 Gbit / s. It should be understood that the net payload bit rate of ODUk is the same as that of OPUk; for example, the net payload bit rate of ODU2 is the same as that of OPU2.

[0040] Table 1

[0041] Figure 3 The diagram shows the frame structure of an OTUk frame, where k ≠ Cn. An OTUk frame has 4 lines. 4080 columns. The OPUk payload area and the OPUk overhead area (i.e., OPUk OH) constitute an OPUk frame, the OPUk frame and the ODUk overhead area (i.e., ODUk OH) constitute an ODUk frame, and the ODUk frame, the OTUk overhead area (i.e., OTUk OH), the frame alignment signal (FAS), and the forward error correction (FEC) check area constitute an OTUk frame. Specifically, columns 1-7 of the first row of the OTUk frame are the FAS and the multiframe alignment signal (MFAS); columns 8-14 of the first row are the OTUk OH; columns 1-14 of the second to fourth rows are the ODUk OH; columns 15-16 of the first to fourth rows are the OPUk OH; columns 17-3824 of the first to fourth rows are the OPUk payload area; and columns 3825-4080 of the first to fourth rows are the FEC check area. Among them, OPUk OH and OPUk net charge region constitute the frame structure of OPUk.

[0042] For the case where k=Cn, an OTUCn frame consists of n OTUC instance frames, where C represents a bit rate of 100 Gbit / s. OTUC instance frames do not include the FEC check area. OTUCn frames include OPUCn frames (i.e., columns 15 to 3824 in an OTUCn frame), which are composed of n OPUC instance frames (i.e., columns 15 to 3824 in a single OTUC instance frame). The payload area of ​​an OPUCn frame can be formed by interleaving the payload areas of n OPUC instance frames with a certain number of bytes. It should be noted that an OTUC instance frame refers to the basic frame unit constituting an OTUCn frame, and can also be called an OTUC base frame or other names; this application does not impose any limitations on this.

[0043] (2) Net load block: A payload block, located in the payload area of ​​an OPUk frame, consists of one byte or a series of consecutive bytes, or a series of consecutive bits. Specifically, the size of a payload block can be an integer multiple of bytes or 8 bytes, such as 16 bytes, 32 bytes, 64 bytes, 128 bytes, 192 bytes, or 256 bytes. Optionally, different payload blocks can be of equal size; the specific examples below will all use this as an example. The payload block can also be called a time slot (or tributary slot), time slot block (or tributary slot block), time slice (or tributary slice), logical time slot (or logical tributary slot), or other names, which are not limited in this application.

[0044] The two consecutive bytes mentioned in this application can be two adjacent bytes in the same line of the payload area of ​​an OPUk frame. Alternatively, they can be the last byte in a line of the payload area of ​​an OPUk frame and the first byte in the next line. Or, they can be the last byte in the payload area of ​​an OPUk frame and the first byte in the payload area of ​​the next OPUk frame. "Byte" can be replaced with "bit". That is, a payload block can be located in the same line of the payload area of ​​an OPUk frame, or it can span lines; it can also span the payload area of ​​OPUk frames.

[0045] (3) Multiplexing frame: A transmission cycle may include P consecutive payload blocks. These P consecutive payload blocks may be located within the payload areas of multiple OPUk frames. In some embodiments, these multiple OPUk frames may be called OPUk multiplexing frames or OPUk transmission frames, or other names such as time slot multiplexing frames, transmission period frames, or P-frames. This application does not specifically limit these names. In other embodiments, the P consecutive payload blocks may be called OPUk multiplexing frames or OPUk transmission frames, or other names. In this application, the transmission cycle may also be called a bearer cycle, transmission cycle, mapping cycle, etc. In some embodiments, the number of payload blocks included in each transmission cycle is the same. For ease of description, in this application, the payload block numbers (or indices) in each OPUk multiplexing frame are used from 1 to P. These are labeled #1 to #P in the accompanying drawings for illustration; this will be consistently applied here and will not be repeated below.

[0046] (4) In this embodiment, the OSU frame can be used to carry service data so that the sending end can process and send the service data. For example, the OSU frame may include an overhead area and a payload area. The overhead area can be used to carry service-related identifiers. The payload area of ​​the OSU frame can be used to carry service data. For example, the payload area can provide storage space of 8 bytes, 16 bytes, 32 bytes, 64 bytes, 128 bytes, 196 bytes, 240 bytes, 256 bytes, or 512 bytes to store service data. In some embodiments, the size of the OSU can be an integer multiple of the payload block size.

[0047] (5) Sender and receiver: In this embodiment, the sending end refers to the device in the OTN that transmits service data, and the receiving end refers to the device in the OTN that receives service data. Both the sending end and the receiving end can be the OTN devices described above.

[0048] (6) In the embodiments of this application, "multiple" refers to two or more. The term "at least one" in the embodiments of this application includes one or more. "Multiple" refers to two or more. For example, at least one of A, B and C includes: A existing alone, B existing alone, A and B existing simultaneously, A and C existing simultaneously, B and C existing simultaneously, and A, B and C existing simultaneously. In the description of this application, unless otherwise stated, " / " means "or", for example, A / B can mean A or B. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can mean: A existing alone, A and B existing simultaneously, and B existing alone. In addition, it should be understood that in the description of this application, words such as "first" and "second" are only used for the purpose of distinguishing descriptions and should not be construed as indicating or implying relative importance or order. The mathematical symbols involved in the embodiments of this application are " The symbol "" represents multiplication. In this application, "floor" indicates rounding down, which can also be represented by the data symbol "". To express it.

[0049] To maximize bandwidth utilization, one possible approach is to determine the number of payload blocks included in the OPUk multiplexed frame based on the payload rate of the OPU and the base rate of the payload blocks. For example, the number of payload blocks P included in the OPUk multiplexed frame can be determined using the following formula (1).

[0050] Formula (1)

[0051] in, This indicates the net payload bit rate of OPUk. This indicates the frequency offset of OPUk. This represents the base rate of the payload block. ppm represents parts per million. When calculating the P-value, a positive frequency offset of 1000 ppm is reserved for the base rate of the payload block. This ensures that the rate of the payload block on the line is higher than the base rate of the payload block, guaranteeing that the line has sufficient redundant bandwidth to meet service carrying requirements. The value is + / -20 ppm.

[0052] Based on the above formula (1), the calculated P values ​​for different values ​​of k can be found in Table 1.

[0053] Table 1

[0054] Figure 4 The diagram shown illustrates an OPUk multiplexing frame structure. Figure 4It can be seen that, due to the lack of rules regarding the P-values ​​between different OPUk multiplexed frames, for example... Figure 4 In the example with the black box, the position of payload block #1 in the OPUk multiplexed frame is different from the position of payload block #1 in the adjacent OPUk multiplexed frame. This results in a messy OPUk multiplexed frame structure, and the layout of payload blocks in the multiplexed frames cannot be reused, thus increasing the additional processing complexity.

[0055] This application provides another structure for OPUk multiplexed frames where k≠0. k≠0 means the bit rate of the OPUk payload area is greater than 1.25 Gbps. This application constructs an OPUk multiplexed frame structure with a bit rate greater than 1.25 Gbps based on the OPU0 multiplexed frame for carrying OSU frames. The structural rules of this OPUk multiplexed frame can be aligned with the structure of the OPU0 multiplexed frame, reusing the OPU0 multiplexed frame structure and reducing implementation complexity.

[0056] An OPUk multiplexed frame can be constructed by combining the complete structure of the OPU0 multiplexed frame. The OPUk multiplexed frame is constructed from M1. Taking N OPUk frames as an example, the payload area of ​​an OPUk multiplexed frame includes P payload blocks, where P is N times P0. P0 = ((the least common multiple of the OPUk frame payload area size and the payload block size) / payload block size) is an integer multiple of P0. For example, the payload block size is an integer multiple of bytes, or an integer multiple of 8 bytes, such as 16 bytes, 32 bytes, 64 bytes, 128 bytes, 192 bytes, 256 bytes, etc. For example, the OPUk frame payload area size is 15232 bytes. Taking a payload block size of 192 bytes as an example, the least common multiple of 15232 and 192 is 45696. According to the aforementioned formula, P0 can be a multiple of 238, such as 238 or 476.

[0057] One possible approach is to construct an OPUk multiplexed frame by combining the complete structure of the OPU0 multiplexed frame. The OPUk multiplexed frame is then constructed using M1. Taking N OPUk frames as an example, the payload area of ​​an OPUk multiplexed frame includes P payload blocks, where P is N times P0. To distinguish it from P in the previous formula (1), P is referred to here as... P0 is the number of payload blocks included in the OPU0 multiplexed frame. For ease of distinction, P0 will be referred to as P when describing the first possible approach. 0-1 An OPU0 multiplexed frame consists of M1 OPU0 frames or an OPU0 multiplexed frame consists of a payload area of ​​M1 OPU0 frames. N is an integer greater than 1, and M1 is an integer greater than or equal to 1.

[0058] The second possible approach is to construct an OPUk multiplexed frame by combining parts of the OPU0 multiplexed frame's structure. For example, if an OPU0 multiplexed frame can be divided into multiple parts with the same structure, then these parts can be combined to construct an OPUk multiplexed frame. Let's assume the OPUk multiplexed frame is constructed from M1... Taking N OPUk frames as an example, the payload area of ​​an OPUk multiplexed frame includes... For each net load block, then It is N times P0. P0 is 1 / M² of the number of payload blocks included in the OPU0 multiplexed frame. To distinguish it from P0 in the first possible approach, P0 will be referred to as P here. 0-2 The OPU0 multiplexed frame includes M1. There are M2 OPU0 frames, where N is an integer greater than 1, M1 is an integer greater than or equal to 1, and M2 is an integer greater than 1. In some embodiments, the OPU0 multiplexed frame can be divided into M2 parts, all of which have the same structure and contain the same number of payload blocks.

[0059] The first possible approach will now be described with reference to the accompanying drawings.

[0060] Figure 5 The diagram shown is a structural schematic of an OPUk multiplexed frame provided in an embodiment of this application. Figure 5 As shown, the OPU0 multiplexed frame consists of M1 OPU0 frames, namely OPU0 frames #1 to #M1. The number of payload blocks included in the OPU0 multiplexed frame is P. 0-1 OPUk multiplexed frames are generated by M1 It consists of N OPUk frames, namely OPUk frames #1-#M1. N. The payload area of ​​the OPUk multiplexed frame includes P1 payload blocks, then P1 = N. P 0-1 The payload blocks included in the OPUk multiplexed frame are #1-#N. P 0-1 .

[0061] In some embodiments, the number of payload blocks included in an OPUk multiplexed frame can be determined in any of the following ways.

[0062] In Method 1, the number of payload blocks included in the OPUk multiplexed frame satisfies the condition shown in Formula (2) below.

[0063] Formula (2)

[0064] in, This indicates the number of payload blocks included in the OPU0 multiplexed frame. Indicates rounding down. This indicates the bit rate of the payload area of ​​OPUk. This represents the bit rate of the payload area of ​​OPU0, where x represents the frequency offset. For example, x can take values ​​of 0, 20, or 100. In Method 1, the denominator directly uses the bit rate of the payload area of ​​OPU0. The calculation is simple.

[0065] For example, N is determined based on method one. .

[0066] Method 2: The number of payload blocks included in the OPUk multiplexed frame satisfies the condition shown in formula (3) below.

[0067] Formula (3)

[0068] in, This indicates the number of payload blocks included in the OPU0 multiplexed frame. Indicates rounding down. This indicates the bit rate of the payload area of ​​OPUk. The bit rate of the payload region of OPU0 is represented by x, and both y represent frequency offset. For example, x can take values ​​of 0, 20, or 100. In some embodiments, y is a set value that can represent the frequency offset of the reference rate. In Method 2, the frequency offset y ppm is considered in the denominator to further increase the calculation accuracy. The calculation result... The value is more accurate.

[0069] For example, N is determined based on method two. .

[0070] Method 3: The number of payload blocks included in the OPUk multiplexed frame satisfies the condition shown in the following formula (4).

[0071] Formula (4)

[0072] in, This indicates the number of payload blocks included in the OPU0 multiplexed frame. Indicates rounding down. This represents the bit rate of the payload region of OPUk, where x represents the frequency offset. This represents the reference rate of the net load block. As an example, The speed is 2.6 Mbit / s. The denominator in Method 3 uses... Compared to method one, this method can further improve bandwidth utilization efficiency.

[0073] For example, N is determined based on method three. .

[0074] Method 4: The number of payload blocks included in the OPUk multiplexed frame satisfies the condition shown in the following formula (5).

[0075] Formula (5)

[0076] in, This indicates the number of payload blocks included in the OPU0 multiplexed frame. Indicates rounding down. y represents the bit rate of the payload region of OPUk, where x and y both represent frequency offset. This represents the reference rate of the net load block. As an example, The speed is 2.6 Mbit / s. In Method 4, the denominator considers the frequency offset y ppm, further increasing the calculation accuracy. The calculation result... The value is more accurate.

[0077] For example, N is determined based on method four. .

[0078] In this embodiment of the application, in order to complete the M1 included in the OPUk multiplexing frame... The indications for N OPUk frames can define a multiframe indication overhead. In some embodiments, the multiframe indication overhead can be located in the overhead region of the ODUk frame; when mapping OPUk frames to ODUk frames, a multiframe indication is added to the overhead region of the ODUk frame. M1 N OPUk frames are mapped one by one to M1 In N ODUk frames, M1 A multiframe indicator is added to the overhead region of each of the N ODUk frames. The multiframe indicator not only indicates the position of the ODUk frame within the ODUk multiplexing frame, but also indirectly (or implicitly) indicates the M1. The bit positions of the payload blocks included in the payload area of ​​each of the N ODUk frames. The ODUk frames can be counted sequentially from 0 to M1 based on the multiframe indication of the overhead area of ​​each ODUk frame. N-1, or counting from 1 to M1 N.

[0079] In other embodiments, the multiframe indicator overhead may also be located in the overhead area of ​​the OPUk frame, specifically in column 15 or 16 of the OTUk frame. M1 Each of the N OPUk frames includes a multiframe indicator in its overhead region. The multiframe indicator not only indicates the position of the OPUk frame within the OPUk multiplexing frame, but also indirectly (or implicitly) indicates the M1. The bit positions of the payload blocks included in the payload area of ​​each of the N OPUk frames. The OPUk frames can be counted sequentially from 0 to M1 based on the multiframe indication of the overhead area of ​​each OPUk frame. N-1, or counting from 1 to M1 N.

[0080] The aforementioned multiframe indication overhead can also be located in the overhead area of ​​OTUk, or it can be constructed using the existing MFAS in the OTN frame.

[0081] In some embodiments, the bit positions of the payload blocks included in the payload area of ​​each OPUk frame can be indicated using a two-level multiframe indication. For ease of description, the two-level multiframe indications will be referred to as the first multiframe indication and the second multiframe indication, respectively. M1 The overhead regions of the N OPUk frames each include a first multiframe indicator and a second multiframe indicator. M1 In a group of N OPUk frames, every M1 consecutive OPUk frames constitute an OPUk group. An OPUk group can be called an OPUk multiframe, or other names such as "M1-frame multiframe," and this application does not specifically limit its usage. M1 The N OPUk frames comprise N OPUk groups. Each OPUk group includes M1 first multiframe indicators, which not only indicate the M1 OPUk frames but also indirectly indicate the bit position of the payload block within each OPUk frame in the OPUk group. Each OPUk frame in the OPUk group includes a second multiframe indicator, which indicates the position of the OPUk group within the N OPUk groups. The second multiframe indicator is used to accumulate and count the OPUk groups, for example, starting from 0 and counting sequentially to N-1.

[0082] For example, the two-level multiframe indications can both be located in the overhead region of the OPUk frame, or in the overhead region of the ODUk frame, or they can be constructed using the existing MFAS in the OTN frame. Alternatively, one level of the multiframe indication can be located in the overhead region of the OPUk frame, and the other level of the multiframe indication can be located in the overhead region of the ODUk frame. For instance, the first multiframe indication is located in the overhead region of the OPUk frame, and the second multiframe indication is located in the overhead region of the ODUk frame.

[0083] As an example, let's take a payload block size of 192 bytes. An OPU0 multiplexed frame consists of 6 OPU0 frames. The number of payload blocks included in an OPU0 multiplexed frame... =476. Figure 6 The diagram shown is a schematic representation of the OPU0 multiplexed frame structure in an embodiment of this application. See also... Figure 6 As shown, the payload area of ​​the OPU0 multiplexed frame consists of 476 payload blocks of 192 bytes each. At this point, M1 can be understood as 6.

[0084] Figure 7 The diagram shown is a schematic of the OPUk multiplexed frame structure in an embodiment of this application. An OPUk multiplexed frame consists of 6N OPUk frames. For example, every six consecutive OPUk frames can be understood as an OPUk group, so an OPUk multiplexed frame includes N OPUk groups. An OPUk group can also be understood as a multiframe composed of six OPUk frames, or simply an OPUk multiframe or a 6-frame OPUk multiframe. The payload area of ​​each OPUk multiframe is divided into 476 192-byte payload blocks. See also... Figure 7 As shown, starting from the first payload block of the first frame OPUk, they are sequentially labeled as payload block #1, payload block #2, ..., payload block #P1, where the payload block size is 192 bytes.

[0085] As an example, see Table 2, which shows the values ​​of P1 in the OPUk multiplexed frame when k takes different values. Table 2 uses a payload block size of 192 bytes as an example. Table 2 also uses an x ​​value of 20 ppm as an example.

[0086] Table 2

[0087] The second possible approach will now be described with reference to the accompanying drawings.

[0088] Figure 8 The diagram shown is a structural schematic of another OPUk multiplexed frame provided in an embodiment of this application. Figure 8 As shown, the OPU0 multiplexed frame is composed of M1 It consists of M2 OPU0 frames, namely OPU0 frame #1 to #M1. M2. The number of payload blocks included in the OPU0 multiplexed frame is 1 / M2 via P. 0-2 This indicates that the number of payload blocks included in the OPU0 multiplexed frame can be M2. P 0-2 OPUk multiplexed frames are generated by M1 It consists of N OPUk frames, namely OPUk frames #1-#M1. N. The payload area of ​​the OPUk multiplexed frame includes P1 payload blocks, then P1 = N. P 0-2 .

[0089] In some embodiments, the number of payload blocks included in an OPUk multiplexed frame can be determined in any of the following ways.

[0090] In the first method, the number of payload blocks included in the OPUk multiplexed frame satisfies the condition shown in the following formula (6).

[0091] Formula (6)

[0092] in, This represents 1 / M² of the number of payload blocks included in the OPU0 multiplexed frame. Indicates rounding down. This indicates the bit rate of the payload area of ​​the OPUk frame. This represents the bit rate of the payload area of ​​the OPU0 frame, where x represents the frequency offset. For example, x can take values ​​of 0, 20, or 100.

[0093] For example, N is determined based on the first method. .

[0094] In the second method, the number of payload blocks included in the OPUk multiplexed frame satisfies the condition shown in the following formula (7).

[0095] Formula (7)

[0096] in, This represents 1 / M² of the number of payload blocks included in the OPU0 multiplexed frame. Indicates rounding down. This indicates the bit rate of the payload area of ​​the OPUk frame. The bit rate of the payload area of ​​the OPU0 frame is represented by x and y, where x and y both represent frequency offsets. For example, x can take values ​​of 0, 20, or 100. In some embodiments, y is a set value that can represent the frequency offset of the reference rate.

[0097] In the second possible approach, the configuration of the multiframe indication overhead is similar to that in the first possible approach, and will not be repeated here.

[0098] As an example, let's take a payload block size of 192 bytes. An OPU0 multiplexed frame consists of 6 OPU0 frames. The total number of payload blocks in an OPU0 multiplexed frame is 476. (The rest of the text appears to be unrelated and possibly machine-generated.) Figure 6 As shown, the OPU0 multiplexed frame consists of 6 OPU0 frames, with each 3 frames comprising 238 payload blocks. An OPUk multiplexed frame can be constructed based on these 238 payload blocks. Therefore, in this example... =238, M2=2, M1=3.

[0099] Figure 9 The diagram shows another OPUk multiplexed frame structure provided in this application embodiment. An OPUk multiplexed frame consists of 3N OPUk frames. For example, every three consecutive OPUk frames can be understood as an OPUk group, so an OPUk multiplexed frame includes N OPUk groups. An OPUk group can also be understood as a multiframe composed of three OPUk frames, or simply an OPUk multiframe or a 3-frame OPUk multiframe. The payload area of ​​each OPUk multiframe is divided into 238 192-byte payload blocks. Therefore, an OPUk multiplexed frame consists of a total of N... It consists of 238 net load blocks. See also Figure 9 As shown, starting from the first payload block of the first frame OPUk, they are sequentially labeled as payload block #1, payload block #2, ..., payload block #P1, where the payload block size is 192 bytes.

[0100] In the OPUk multiplexed frame determined by the second possible method described above, when k takes different values, the value of P1 is the same as the value of P1 determined by the first possible method. As an example, taking a payload block size of 192 bytes as an example, the value of P1 in the OPUk multiplexed frame when k takes different values ​​can be seen in Table 3 above.

[0101] Based on this, embodiments of this application provide an optical signal transmission method and apparatus. By constructing OPUk multiplexed frames with bit rates greater than 1.25 Gbps using the structure of OPU0 multiplexed frames, the structure of the OPUk multiplexed frames reuses the structure of the OPU0 multiplexed frames, achieving alignment with the structure of the OPU0 multiplexed frames. Furthermore, the OPUk multiplexed frames consist of integer multiples of OPUk frames, thereby reducing processing complexity. The method and apparatus are based on the same inventive concept. Since the principles by which the method and apparatus solve problems are similar, their implementations can be mutually referenced, and repeated details will not be elaborated upon.

[0102] Figure 10 The diagram shown is a schematic flowchart of an optical signal transmission method provided in an embodiment of this application. The optical signal transmission method can be executed by an OTN device, for example, by... Figure 2 This is implemented using tributary boards and / or circuit boards in the OTN device shown. It can also be executed by a processing module located within the OTN device, or by a processing chip.

[0103] 1001. The OTN device maps OSU frames to OPUk multiplexed frames. The bit rate of the OPUk multiplexed frames is greater than 1.25Gbps. The OPUk multiplexed frames are generated by M1. It consists of N OPUk frames. The payload area of ​​an OPUk multiplexed frame includes P payload blocks, where P is N times P0. The value of P0 is as described above and will not be repeated here.

[0104] 1002, the OTN device will M1 N OPUk frames are mapped one by one to M1 N ODUk frames.

[0105] 1003, OTN device sends M1 N ODUk frames.

[0106] In this embodiment, an OPUk multiplexed frame with a bit rate greater than 1.25Gbps is constructed using the structure of the OPU0 multiplexed frame. This ensures that the structure of the OPUk multiplexed frame reuses the structure of the OPU0 multiplexed frame, thus aligning them. The OPUk multiplexed frame comprises integer multiples of OPUk frames, maintaining boundary alignment between the OPUk multiplexed frame and the OPUk frame. Furthermore, when mapping OSUs, the OTN device can map OSUs to OPUk multiplexed frames based on the reused OPU0 multiplexed frame structure. This allows for faster acquisition of the payload block location for each transmission cycle, thereby reducing processing complexity.

[0107] This application also provides an optical signal transmission device. The method, device, and system are based on the same inventive concept. Since the principles by which the method, device, and system solve the problem are similar, embodiments of the device and method can be referred to interchangeably, and repeated details will not be repeated. This device can be used in OTN equipment, and specifically, it can be a processor, chip, chip system, or a module within a processor in the OTN equipment. This device can be... Figure 2 Implemented in the branch board and / or circuit board. Figure 11 This is a schematic diagram of the structure of a possible optical signal transmission device according to an embodiment of this application. Figure 11 As shown, the device includes a processing unit 1101 and a sending unit 1102. The processing unit 1101 is used to execute steps 1001 and 1002, and the sending unit 1102 is used to execute step 1003.

[0108] Optionally, the two units may also perform other related optional steps performed by the OTN device mentioned in any of the foregoing embodiments, which will not be repeated here.

[0109] The unit division in this embodiment is illustrative and represents only one logical functional division; in actual implementation, other division methods may be used. Furthermore, the functional units in the various embodiments of this application can be integrated into a single processor, exist as separate physical units, or be integrated into a single unit. The integrated units described above can be implemented in hardware or as software functional units.

[0110] Figure 12 This is a schematic diagram of another possible optical signal transmission device according to an embodiment of this application. Figure 12 As shown, device 1200 includes a communication interface 1210 and a processor 1220. Device 1200 can be applied to OTN devices. Device 1200 may also include a memory 1230.

[0111] Figure 12Both the processing unit 1201 and the sending unit 1202 shown can be implemented by the processor 1220. For example, the processor 1202 can be... Figure 2 The signal processor in the circuit board and / or the signal processor in the branch board shown. Processor 1220 sends OTN frames (e.g., OTUk frames or ODUk frames mentioned in the foregoing embodiments) through communication interface 1210 to implement... Figure 10 The method executed by the OTN device in the process. During implementation, each step of the processing flow can be completed through integrated logic circuits in the hardware of the processor 1220 or through software instructions. Figure 10 The method executed by the OTN device in the process.

[0112] The communication interface 1210 can be a circuit, bus, transceiver, or any other device that can be used for information exchange. For example, this other device can be a device connected to the device 1200, such as a client device or other OTN device.

[0113] Processor 1220 can be a general-purpose processor, digital signal processor, application-specific integrated circuit, field-programmable gate array or other programmable logic device, discrete gate or transistor logic device, or discrete hardware component. A general-purpose processor can be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this application can be directly embodied in the execution of hardware processors, or executed by a combination of hardware and software units in the processor. The program code executed by processor 1220 to implement the above methods can be stored in memory 1230. Memory 1230 and processor 1220 are coupled. The coupling in the embodiments of this application is an indirect coupling or communication connection between devices, units, or modules, which can be electrical, mechanical, or other forms, used for information interaction between devices, units, or modules. Processor 1220 may operate in conjunction with memory 1230. Memory 1230 can be non-volatile memory, such as a hard disk drive (HDD) or solid-state drive (SSD), or it can be volatile memory, such as random-access memory (RAM). The memory 1230 is any other medium capable of carrying or storing program code in the form of instructions or data structures that can be accessed by a computer, but is not limited thereto.

[0114] This application embodiment does not limit the specific connection medium between the communication interface 1210, processor 1220, and memory 1230. This application embodiment... Figure 12 The memory 1230, processor 1220, and communication interface 1210 are connected via a bus. The bus is... Figure 12 The connections between other components are shown in bold and are for illustrative purposes only, not as limiting information. The bus can be divided into address bus, data bus, control bus, etc. For ease of illustration, Figure 12 The bus is represented by a single thick line, but this does not mean that there is only one bus or one type of bus.

[0115] Based on the above embodiments, this application also provides a computer storage medium storing a software program. When read and executed by one or more processors, the software program can implement the methods provided in any one or more of the above embodiments. The computer storage medium may include various media capable of storing program code, such as a USB flash drive, a portable hard drive, a read-only memory, and a random access memory.

[0116] Based on the above embodiments, this application also provides a chip. The chip includes a processor for implementing the functions involved in any one or more of the above embodiments, such as acquiring or processing OPUk frames or ODUk frames involved in the above methods. Optionally, the chip further includes a memory for storing necessary program instructions and data executed by the processor. The chip can be composed of a single chip or may include chips and other discrete devices.

[0117] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0118] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0119] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0120] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0121] Obviously, those skilled in the art can make various modifications and variations to the embodiments of this application without departing from the scope of the embodiments of this application. Therefore, if these modifications and variations to the embodiments of this application fall within the scope of the claims of this application and their equivalents, this application also intends to include these modifications and variations.

Claims

1. A cross plate, characterized in that, The cross plate is used for: Optical service unit frames are mapped to optical payload unit (OPUk) multiplexed frames, where the bit rate of the OPUk multiplexed frames is greater than 1.25 Gbps, and the OPUk multiplexed frames are generated by M1. It consists of N OPUk frames, and the payload area of ​​the OPUk multiplexed frame includes P payload blocks, where P is N times P0 and k is not equal to 0. Wherein, P0 is the number of payload blocks included in the OPU0 multiplexed frame, N is an integer greater than 1, and M1 is an integer greater than or equal to 1; M1 N OPUk frames are mapped one by one to M1 N optical data units (ODUk frames).

2. The cross plate as described in claim 1, characterized in that, The OPU0 multiplexed frame includes M1 OPU0 frames.

3. The cross plate as described in claim 1 or 2, characterized in that, The cross plate is also used for: Send the M1 N ODUk frames.

4. The cross plate as described in claim 1, characterized in that, The number of payload blocks included in the OPUk multiplexed frame satisfies the following formula: ;or, ； in, This indicates the number of payload blocks included in the OPU0 multiplexed frame. Indicates rounding down. This indicates the bit rate of the payload region of the OPUk. The bit rate of the payload region of OPU0 is represented by x and y, where x and y both represent frequency offset.

5. The cross plate as described in any one of claims 1-4, characterized in that, The M1 The overhead regions of the N ODUk frames each include a multiframe indicator, where M1 N multiframes indirectly indicate the M1 The bit positions of the payload blocks included in the payload area of ​​each of the N OPUk frames; or... The M1 The overhead regions of the N OPUk each include the multiframe indication.

6. The cross plate as described in any one of claims 1-4, characterized in that, The M1 The overhead regions of the N OPUk frames each include a first multiframe indicator and a second multiframe indicator, wherein M1 N OPUk frames comprise N OPUk groups, each OPUk group comprising M1 consecutive OPUk frames. The M1 first multiframes within each OPUk group indirectly indicate the bit position of the payload block within each OPUk frame of that OPUk group. The second multiframes within each OPUk frame of that OPUk group indicate the position of that OPUk group within the N OPUk groups; or... The M1 The overhead regions of the N ODUk frames each include the first multiframe indicator and the second multiframe indicator.

7. The cross plate as described in any one of claims 1-6, characterized in that, The OPUk can be OPU1, OPU2, OPU2e, OPU3, OPU4, OPU25, OPU25u, OPU50, OPU50u, OPUUCn, or OPUflex.

8. The cross plate as described in any one of claims 1-7, characterized in that, P0 is the number of payload blocks included in the OPU0 multiplexed frame, and P0 = 476.

9. The cross plate as described in any one of claims 1-7, characterized in that, P0 is the number of payload blocks included in the OPU0 multiplexed frame, and the value of P0 is an integer multiple of 238.

10. The cross plate as described in any one of claims 1-9, characterized in that, The payload block is 16 bytes in size.

11. A signal processing method, characterized in that, The signal processing method is executed by the cross-connect board, and the method includes: Optical service unit frames are mapped to optical payload unit (OPUk) multiplexed frames, where the bit rate of the OPUk multiplexed frames is greater than 1.25 Gbps, and the OPUk multiplexed frames are generated by M1. It consists of N OPUk frames, and the payload area of ​​the OPUk multiplexed frame includes P payload blocks, where P is N times P0 and k is not equal to 0. Wherein, P0 is the number of payload blocks included in the OPU0 multiplexed frame, N is an integer greater than 1, and M1 is an integer greater than or equal to 1; M1 N OPUk frames are mapped one by one to M1 N optical data units (ODUk frames).

12. The method as described in claim 11, characterized in that, The OPU0 multiplexed frame includes M1 OPU0 frames.

13. The method as described in claim 11 or 12, characterized in that, The method further includes: Send the M1 N ODUk frames.

14. The method as described in claim 11, characterized in that, The number of payload blocks included in the OPUk multiplexed frame satisfies the following formula: ;or, ； in, This indicates the number of payload blocks included in the OPU0 multiplexed frame. Indicates rounding down. This indicates the bit rate of the payload region of the OPUk. The bit rate of the payload region of OPU0 is represented by x and y, where x and y both represent frequency offset.

15. The method according to any one of claims 11-14, characterized in that, The M1 The overhead regions of the N ODUk frames each include a multiframe indicator, where M1 N multiframes indirectly indicate the M1 The bit positions of the payload blocks included in the payload area of ​​each of the N OPUk frames; or... The M1 The overhead regions of the N OPUk each include the multiframe indication.

16. The method according to any one of claims 11-14, characterized in that, The M1 The overhead regions of the N OPUk frames each include a first multiframe indicator and a second multiframe indicator, wherein M1 N OPUk frames comprise N OPUk groups, each OPUk group comprising M1 consecutive OPUk frames. The M1 first multiframes within each OPUk group indirectly indicate the bit position of the payload block within each OPUk frame of that OPUk group. The second multiframes within each OPUk frame of that OPUk group indicate the position of that OPUk group within the N OPUk groups; or... The M1 The overhead regions of the N ODUk frames each include the first multiframe indicator and the second multiframe indicator.

17. The method according to any one of claims 11-16, characterized in that, The OPUk can be OPU1, OPU2, OPU2e, OPU3, OPU4, OPU25, OPU25u, OPU50, OPU50u, OPUUCn, or OPUflex.

18. The method according to any one of claims 11-17, characterized in that, P0 is the number of payload blocks included in the OPU0 multiplexed frame, and P0 = 476.

19. The method according to any one of claims 11-17, characterized in that, P0 is the number of payload blocks included in the OPU0 multiplexed frame, and the value of P0 is an integer multiple of 238.

20. The method according to any one of claims 11-19, characterized in that, The payload block is 16 bytes in size.

Images