Circuit board step manufacturing method, circuit board and manufacturing method thereof
Patent Information
- Application Number
- CN202610704702.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-05-20
- Publication Date
- 2026-08-18
AI Technical Summary
[0005]本发明所要解决的技术问题是:针对现有的工艺方案均无法兼顾产品质量与高密度连接要求的问题,提供一种电路板的台阶制作方法、电路板及其制造方法
[0016] The step manufacturing method provided in this invention abandons the traditional solder mask as the insulating medium and selects a cover film suitable for more stringent processing conditions as the insulating protective layer. This fundamentally replaces the easily peeling and whitening solder mask layer, eliminating the problem of solder mask peeling and providing reliable protection for subsequent high-temperature pressing and chemical treatment, thus increasing the reliability of product use. Simultaneously, laser ablation is used to replace the inner layer windowing process. The ablation process of the inner layer circuitry is placed after the outer layer step is formed. The cover film in the preset step area where the inner layer pattern needs to be exposed is no longer opened during the inner layer stage, but rather after the outer layer is opened, and then the inner layer pattern is exposed by laser. This effectively solves the problem of residual adhesive on the solder pads at the bottom of the step, making repair difficult, and significantly improves the insulation reliability, welding stability, and product yield of the high-density circuitry at the bottom of the step, meeting the high-density connection and high-reliability usage requirements of customers.
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Figure CN122602399A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of circuit board manufacturing technology, and in particular relates to a method for making steps on a circuit board, a circuit board and a method for manufacturing the same. Background Technology
[0002] With the increasing integration and lightweighting of product structures, stepped processes are being widely used. The bottom pattern of the stepped process needs to meet the requirements of wire bonding and soldering. During soldering, it is necessary to isolate the flow of solder paste on the same network pattern and to insulate different networks. Currently, these requirements are achieved through solder resist.
[0003] When the bottom of the step is coated with inner silkscreen solder resist, the solder resist is prone to peeling and whitening after high temperature pressing, which makes the product unable to meet the usage requirements. When the outer sprayed solder resist is used, the width of the green oil bridge is limited, which is a great limitation and cannot meet the high-density connection requirements at the bottom of the step.
[0004] Neither of the above two process solutions can simultaneously meet the requirements of product quality and high-density connection. Summary of the Invention
[0005] The technical problem to be solved by the present invention is: to address the issue that existing process solutions cannot simultaneously meet the requirements of product quality and high-density interconnection, and to provide a method for making steps on a circuit board, a circuit board and a method for manufacturing the same.
[0006] To address the aforementioned technical problems, one aspect of this invention provides a method for fabricating steps on a circuit board, comprising: Obtain a core board and fabricate inner layer circuitry on the core board; At the predetermined step area of the core board, the cover film is pasted onto the inner layer circuit; At least one additional layer is pressed onto the core board to form a multilayer board, and controlled-depth drilling is performed on the multilayer board around the preset step area to form a step contour groove. The portion of the multilayer board surrounding the stepped contour groove is removed to form a stepped groove, and the cover film is exposed in the stepped groove. The cover film is laser-ablated to expose the inner layer circuitry.
[0007] Optionally, the method for fabricating the steps on the circuit board further includes: Cover the cover film with the adhesive-resistant layer; Remove the portion of the multilayer board surrounding the stepped contour groove to form a stepped groove, so that the adhesive resist layer is exposed in the stepped groove; Remove the adhesive layer to expose the cover film.
[0008] Optionally, the core board includes a substrate and metal layers disposed on both sides of the substrate in the thickness direction; The process of obtaining the core board and fabricating inner layer circuitry on the core board includes: A first dry film is adhered to one of the metal layers and a windowing process is performed. The opening positions of the first dry film are etched to remove the first dry film and form the inner layer circuitry.
[0009] Optionally, the added layers include a first added layer and a second added layer. The step of pressing at least one added layer onto the core board to form a multilayer board, and performing controlled-depth drilling around the preset step area on the multilayer board to form a step contour groove, includes: At least one of the first extension layers is pressed onto a first side in the thickness direction of the core board, and at least one of the second extension layers is pressed onto a second side in the thickness direction of the core board; A first outer layer circuit is fabricated on the outermost first add-on layer, and a second outer layer circuit is fabricated on the outermost second add-on layer. Around the outline of the preset step area, controlled-depth drilling is performed from the outermost first layer toward the cover film to form the step outline groove.
[0010] Optionally, the step of laminating at least one of the first extension layers to a first side in the thickness direction of the core board and laminating at least one of the second extension layers to a second side in the thickness direction of the core board includes: Multiple first added layers are pressed together one by one on the first side of the core board in the thickness direction; Drill holes in the first layer and perform metallization; Multiple second additional layers are pressed one by one onto the second side of the core board in the thickness direction; Drill holes in the second layer and perform metallization.
[0011] Optionally, the step of laminating at least one of the first extension layers to a first side in the thickness direction of the core board and laminating at least one of the second extension layers to a second side in the thickness direction of the core board includes: Multiple first add-layers are laminated to form a first sub-multilayer board, and holes are drilled and metallized in the first add-layers. Multiple second add-layers are laminated to form a second sub-multilayer board, and holes are drilled and metallized in the second add-layers; The first sub-multilayer board, the core board, and the second sub-multilayer board are pressed together to form the multilayer board.
[0012] Optionally, the cover film is a polyimide film coated with epoxy resin or acrylic resin to adhere the cover film to the core board.
[0013] Optionally, the laser ablation of the cover film to expose the inner layer circuitry includes: A second dry film is pasted onto the covering film and a window opening is made; Laser ablation is performed on the windowed area of the second dry film to expose the inner layer circuitry at the target location, after which the second dry film is removed.
[0014] On the other hand, embodiments of the present invention provide a method for manufacturing a circuit board, including a method for manufacturing steps on a circuit board as described in any of the preceding claims.
[0015] In another aspect, embodiments of the present invention provide a circuit board, which is prepared by the circuit board manufacturing method described above.
[0016] The step manufacturing method provided in this invention abandons the traditional solder mask as the insulating medium and selects a cover film suitable for more stringent processing conditions as the insulating protective layer. This fundamentally replaces the easily peeling and whitening solder mask layer, eliminating the problem of solder mask peeling and providing reliable protection for subsequent high-temperature pressing and chemical treatment, thus increasing the reliability of product use. Simultaneously, laser ablation is used to replace the inner layer windowing process. The ablation process of the inner layer circuitry is placed after the outer layer step is formed. The cover film in the preset step area where the inner layer pattern needs to be exposed is no longer opened during the inner layer stage, but rather after the outer layer is opened, and then the inner layer pattern is exposed by laser. This effectively solves the problem of residual adhesive on the solder pads at the bottom of the step, making repair difficult, and significantly improves the insulation reliability, welding stability, and product yield of the high-density circuitry at the bottom of the step, meeting the high-density connection and high-reliability usage requirements of customers. Attached Figure Description
[0017] Figure 1 This is a flowchart of a step manufacturing method provided in an embodiment of the present invention; Figure 2-6 This is a schematic diagram of the various steps of a step manufacturing method provided in an embodiment of the present invention.
[0018] The reference numerals in the accompanying drawings are as follows: 1. Core board; 11. Substrate; 12. Metal layer; 121. Inner layer circuitry; 2. Cover film; 3. Addition layer; 31. Dielectric layer; 32. Copper layer; 4. Step contour groove; 5. Step groove; 6. First outer layer circuitry; 7. Second outer layer circuitry. Detailed Implementation
[0019] To make the technical problems solved, the technical solutions, and the beneficial effects of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
[0020] In the production of high-density interconnect printed circuit boards (PCBs), the stepped structure is a key structure for achieving embedded component mounting. There are two existing PCB processing methods: the first is to screen print solder mask in the stepped area after the inner layer pattern is processed, and then expose the inner layer pattern and the solder mask at the bottom of the step after opening the cover; the second is to spray solder mask at the bottom of the step after the outer layer step is exposed by opening the cover.
[0021] Using inner layer screen printing solder mask can achieve high-density pattern insulation or isolation with the same pattern network. However, after the inner layer is processed, some products will undergo multiple high-temperature and long-term pressing. Under high-temperature conditions, the solder mask will age and fall off and turn white. At the same time, the step position needs to be resisted. When the outer layer is used to remove the resist with alkaline solution, the weak alkaline solution will further attack the green solder mask at the bottom of the step, aggravating the problem of the green solder mask falling off and turning white at the bottom of the step. Moreover, if there is residual adhesive on the solder pad at the bottom of the step, it is very difficult to deal with, which may cause the product to fail to meet the customer's requirements due to quality problems. When the method of exposing the bottom pattern of the step on the outer layer and then processing the solder resist is adopted, the pretreatment effect is not as good as that on the surface. In addition, the width of the green oil bridge exposed by the solder resist is much larger than that of the green oil bridge on the surface. Furthermore, the spraying process has limitations on the type of ink, which makes this solution very limited and unable to meet the high-density connection requirements at the bottom of the step.
[0022] The two aforementioned process solutions have quality problems or limitations. Therefore, this application provides a process method to solve the insulation of high-density patterns at the bottom of steps and the isolation of the same network, so as to meet the client's high-density connection requirements at the bottom of steps.
[0023] like Figures 1 to 6 As shown, an embodiment of the present invention provides a method for fabricating steps on a circuit board, comprising the following steps: S1. Obtain core board 1 and fabricate inner layer circuitry 121 on core board 1; S2. At the preset step area of the core board 1, the cover film 2 is pasted onto the inner layer circuit 121; before pressing, the inner layer circuit 121 in the preset step area is covered by the cover film 2, replacing the traditional solder mask as an insulating protective layer, thereby protecting the inner layer circuit 121 in the preset step area.
[0024] S3. Press at least one additional layer 3 onto the core board 1 to form a multilayer board. Perform controlled-depth drilling around the preset step area on the multilayer board to form a step contour groove 4. One or more uplayers 3 are laminated onto the core board 1 with the cover film 2 attached using a lamination process, bonding the core board 1 and the uplayers 3 together to form a multilayer board that meets the design thickness requirements. The inner layer circuitry 121 is then embedded inside the multilayer board. Subsequently, controlled-depth drilling is performed according to the outline of the preset step area. The controlled-depth drilling process allows for precise control of the drilling depth, extending from the topmost uplayer 3 to the upper surface of the cover film 2, providing a precise outline reference for subsequent step formation.
[0025] The controlled-depth drilling process in this step is an existing technology and will not be described in detail here.
[0026] S4. Remove the multilayer board surrounding the step contour groove 4 to form the step groove 5, and expose the step groove 5 with the covering film 2. The cover is opened to remove the portion of the multi-layer board surrounding the groove 4 of the stepped contour, forming the stepped groove 5. At this time, the covering film 2 of the preset stepped area is directly exposed as the stepped groove 5 is formed.
[0027] S5. Laser ablation is performed on the cover film 2 to expose the inner layer circuitry 121. Using laser ablation technology, the cover film 2 exposed in the stepped groove 5 is precisely ablated locally to remove the cover film 2 corresponding to the circuit areas that need to be connected, soldered, or bonded, thus exposing the inner layer circuitry 121 that needs to be electrically connected. The cover film 2 is retained in the remaining areas to ensure that the insulation performance is not affected.
[0028] The above-mentioned step manufacturing method is based on the inner layer circuit 121 of the core board 1. Before pressing, the inner layer circuit 121 of the preset step area is covered and protected by the cover film 2. After pressing and adding the layer 3, the step outline is defined by controlling the depth of the drilling. After opening the cover, the cover film 2 is exposed. Finally, the cover film 2 is precisely ablated by laser to expose only the inner layer circuit 121 of the target area. The cover film 2 is retained in the non-target area to achieve insulation.
[0029] In this embodiment, instead of using traditional solder resist as the insulating medium, a cover film 2 suitable for more stringent processing conditions is selected as the insulating protective layer. This fundamentally replaces the easily detached and whitening solder resist layer, eliminating the problem of solder resist detachment and providing reliable protection for subsequent high-temperature pressing and chemical treatment, thus increasing the reliability of the product. Simultaneously, laser ablation is used instead of the inner layer windowing process. The ablation process of the inner layer circuit 121 is placed after the outer layer step is formed. The cover film 2, where the inner layer pattern needs to be exposed in the pre-defined step area, is no longer windowed during the inner layer stage. Instead, the inner layer pattern is exposed by laser after the outer layer is opened. This effectively solves the problem of residual adhesive on the solder pads at the bottom of the step, making repair difficult. It significantly improves the insulation reliability, welding stability, and product yield of the high-density circuits at the bottom of the step, meeting the client's requirements for high-density connections and high reliability.
[0030] In one embodiment, the stepped profile groove 4 can be, but is not limited to, square.
[0031] In one embodiment, the addendum layer 3 includes a dielectric layer 31 and a copper layer 32. The dielectric layer 31 is disposed between the core board 1 and the copper layer 32. During depth control processing, the processing direction is to drill from the copper layer 32 toward the cover film 2 until the bottom of the step. The dielectric layer 31 is a PP layer.
[0032] In one embodiment, the method for fabricating the steps on the circuit board further includes: The adhesive resist layer is placed on the cover film 2. After the cover film 2 is attached to the inner layer circuit 121 in the preset step area of the core board 1, the adhesive resist layer is completely covered on the surface of the cover film 2, so that the adhesive resist layer is flat and attached to the cover film 2, so that it forms a physical barrier during the pressing process, effectively preventing the molten medium from flowing and sticking to the surface of the cover film 2 during the high temperature pressing process.
[0033] Remove the portion of the multilayer board surrounding the stepped contour groove 4 to form a stepped groove 5, so that the adhesive barrier layer is exposed in the stepped groove 5; after the multilayer board is opened to form the stepped groove 5, the adhesive barrier layer is directly exposed as the stepped groove 5 is formed.
[0034] The resist layer is removed to expose the cover film 2. The resist layer is then removed using an alkaline solution, allowing the cover film 2 to be fully exposed. Since no opening is made in the cover film 2 during the inner layer process, no resist residue will remain at the bottom of the step or on the solder pads after the resist layer is removed. It is understood that in this embodiment, the drilling depth is controlled to extend from the uppermost layer 3 to the upper surface of the resist layer during the depth control process. After opening the cover and removing the resist layer, the cover film 2 will be exposed in the step groove 5.
[0035] In this embodiment, by adding a resist layer on the outside of the cover film 2, the molten resin can be prevented from adhering to the cover film 2 during high-temperature pressing. The resist layer is removed after the step is opened, and the inner layer does not open windows in the cover film 2. From a process perspective, this avoids residual adhesive on the circuit or solder pads at the bottom of the step, reducing circuit board quality problems.
[0036] The adhesive barrier layer can be made from existing materials.
[0037] In one embodiment, the cover film 2 is resistant to high temperature (high temperature > 200°C) and weak alkali. This ensures that the structure remains stable and does not age during the high-temperature pressing process, and also effectively resists the erosion of the adhesive layer when using alkaline solutions to remove it, thus fundamentally avoiding the problems of easy damage and detachment of traditional solder resist layers. This ensures that the cover film 2 remains intact during subsequent processing and use, continuously playing its role in insulation and protection, and guaranteeing the structural stability and reliability of the product.
[0038] In one embodiment, the cover film 2 is a polyimide film coated with epoxy resin or acrylic resin to adhere the cover film 2 to the core board 1. During adhesion, the cover film 2 is adhered using epoxy resin or acrylic resin, and this adhesive layer provides good filling properties, effectively filling the gaps between the inner layer lines 121 in the preset step area.
[0039] In one embodiment, such as Figure 2 As shown, the core board 1 includes a substrate 11 and metal layers 12 disposed on both sides of the substrate 11 in the thickness direction; the step S1 of obtaining the core board 1 and fabricating inner layer circuitry 121 on the core board 1 includes: S11. A first dry film is pasted onto one of the metal layers 12 and a window opening is performed; S12. The window positions of the first dry film are etched to remove the first dry film and form the inner layer circuit 121.
[0040] When fabricating the inner layer circuit 121, a first dry film is completely attached to the surface of the metal layer 12 on one side of the core board 1. The first dry film is then exposed by exposure and development processes to expose the metal layer 12 in the area where the circuit is to be formed, while the remaining area is covered and protected by the first dry film. Subsequently, the metal layer 12 at the exposed location is etched to remove the exposed portion of the metal layer 12, so that the substrate 11 is exposed from the exposed location. Finally, the first dry film is removed to form the inner layer circuit 121.
[0041] In this embodiment, the inner layer circuit 121 is fabricated by dry film windowing combined with etching, which can precisely control the outline and dimensional accuracy of the circuit and ensure that the circuit pattern is consistent with the design.
[0042] In one embodiment, the metal layer 12 is a copper layer.
[0043] In one embodiment, the added layer 3 includes a first added layer and a second added layer, such as... Figure 3 , Figure 4 As shown, step S3, which involves pressing at least one additional layer 3 onto the core board 1 to form a multilayer board, and performing controlled-depth drilling around a predetermined step area on the multilayer board to form a step contour groove 4, includes: S31, such as Figure 3 As shown, at least one first augmentation layer is pressed onto the first side of the core board 1 in the thickness direction, and at least one second augmentation layer is pressed onto the second side of the core board 1 in the thickness direction. Based on the core board 1 having the cover film 2 already attached, at least one first augmentation layer is pressed onto the first side of the core board 1, with the first augmentation layer pressed onto the cover film 2. The cover film 2 and the first augmentation layer are disposed on the upper side of the core board 1, and the second augmentation layer is disposed on the lower side of the core board 1. The inner layer circuit 121 and the cover film 2 at the preset step area are covered under the first augmentation layer.
[0044] The first addendum layer includes a first dielectric layer and a first copper layer. The first copper layer is disposed on the side of the first dielectric layer away from the core board 1. When multiple first addendum layers are laminated onto the core board 1, the first dielectric layer and the first copper layer are alternately disposed from bottom to top. The second addendum layer includes a second dielectric layer and a second copper layer. The second copper layer is disposed on the side of the second dielectric layer away from the core board 1. When multiple second addendum layers are laminated onto the core board 1, the second dielectric layer and the second copper layer are alternately disposed from top to bottom.
[0045] S32. After lamination is completed, the first outer layer circuit 6 is fabricated on the outermost first layer, and the second outer layer circuit 7 is fabricated on the outermost second layer. On the outermost first augmentation layer, that is, on the topmost first augmentation layer, the first outer layer circuit 6 is formed on the first copper layer through operations such as film application, exposure, development, etching, and film removal. Similarly, on the outermost second augmentation layer, that is, on the bottommost second augmentation layer, the second outer layer circuit 7 is formed on the second copper layer through operations such as film application, exposure, development, etching, and film removal.
[0046] like Figure 3 As shown, a first augmentation layer is laminated on the first side of the core board 1 in the thickness direction, and a first outer layer circuit 6 is formed on the first augmentation layer. A second augmentation layer is laminated on the second side of the core board 1 in the thickness direction, and a second outer layer circuit 7 is formed on the second augmentation layer.
[0047] S33, such as Figure 4 , Figure 5 As shown, around the outline of the preset step area, controlled-depth drilling is performed from the outermost first layer toward the cover film 2 to form a step contour groove 4. Controlled-depth drilling is then performed from the uppermost first layer toward the cover film 2, with the drilling depth controlled to extend from the upper surface of the uppermost first layer to the upper surface of the resist layer. After the multilayer board is opened, a step groove 5 of a certain depth is formed. After the resist layer is removed, the cover film 2 is exposed from the step groove 5 for subsequent laser ablation operations.
[0048] In this embodiment, by pressing the core board 1 from both sides, a multi-layered and integrated design of the circuit board is achieved, providing a stable and reliable structural foundation for subsequent multi-layer board opening, circuit exposure and soldering.
[0049] In one embodiment, step S31, which involves laminating at least one first layer onto a first side in the thickness direction of the core board 1 and laminating at least one second layer onto a second side in the thickness direction of the core board 1, includes: S311. Press multiple first layers one by one onto the first side of the core board 1 in the thickness direction; S312. Drill holes in the first layer and perform metallization treatment; After the first overlay is laminated on top of the core board 1, blind holes are machined from the upper surface of the first copper layer toward the core board 1. An electroplated copper layer 32 is formed on the inner wall of the blind holes and the upper surface of the first copper layer through an electroplating process, so that the blind holes can achieve interlayer conduction through metallization. Then, the blind holes are plugged to completely fill them, so as to form a stable interlayer interconnection structure inside the multilayer board.
[0050] After the via plugging is completed, the first copper layer and the electroplated copper layer 32 are patterned and etched sequentially through the processes of film application, exposure, development, and etching, so that the first patterned circuit is formed on the first add-on layer. Finally, the film is removed. It should be noted that in the above operation steps, the above drilling, electroplating, via plugging, and patterned circuit fabrication process is repeated for each first add-on layer added above the core board 1. After the topmost first add-on layer is laminated, the subsequent step S32 is performed.
[0051] S313. Multiple second layers are pressed one by one onto the second side of the core board 1 in the thickness direction; S314. Drill holes in the second layer and perform metallization.
[0052] The process of the second add-in layer is roughly the same as that of the first add-in layer. Specifically, the second add-in layer is pressed under the core board 1, and blind holes are processed from the upper surface of the second copper layer toward the core board 1. An electroplated copper layer 32 is formed on the inner wall of the blind hole and the upper surface of the second copper layer through an electroplating process, so that the blind hole achieves interlayer conduction through metallization. Then, the blind hole is plugged to completely fill the blind hole, so as to form a stable interlayer interconnection structure inside the multilayer board.
[0053] After the via plugging is completed, the second copper layer and the electroplated copper layer 32 are patterned and etched sequentially through the processes of film application, exposure, development, and etching, so that the second patterned circuit is formed on the second add-on layer. Finally, the film is removed. It should be noted that in the above operation steps, the above drilling, electroplating, via plugging, and patterned circuit fabrication process is repeated for each second add-on layer added below the core board 1. After the topmost second add-on layer is laminated, the subsequent step S32 is performed.
[0054] In another embodiment, step S31, which involves laminating at least one first layer onto a first side in the thickness direction of the core board 1 and laminating at least one second layer onto a second side in the thickness direction of the core board 1, includes: S311. Multiple first add-on layers are laminated to form a first sub-multilayer board. Holes are drilled in the first add-on layers and metallized. The first add-on layers are subjected to drilling, electroplating, hole plugging, and pattern circuit fabrication processes to form a first circuit pattern on the first add-on layers. Afterward, the above drilling, electroplating, hole plugging, and pattern circuit fabrication processes are repeated for each new add-on layer 3 superimposed on the previous first add-on layer. After the topmost first add-on layer is laminated, the subsequent step S32 is executed.
[0055] S312. Multiple second add-on layers are laminated to form a second sub-multilayer board. Holes are drilled in the second add-on layers and metallized. The second add-on layers are subjected to drilling, electroplating, hole plugging, and pattern circuit fabrication processes to form a first circuit pattern on the first add-on layer. Afterward, the above drilling, electroplating, hole plugging, and pattern circuit fabrication processes are repeated for each new add-on layer 3 superimposed on the previous first add-on layer. After the top first add-on layer is laminated, the subsequent step S32 is continued.
[0056] S313. Press the first sub-multilayer board, core board 1 and the second sub-multilayer board together to form a multilayer board.
[0057] In this embodiment, multiple first add-on layers are pre-pressed to form a first sub-multilayer board, and drilling and metallization are performed on the first sub-multilayer board to achieve electrical conductivity between the layers of the first add-on layer. Multiple second add-on layers are pre-pressed to form a second sub-multilayer board, and drilling and metallization are performed on the second sub-multilayer board to achieve electrical conductivity between the layers of the second add-on layer. Then, the first sub-multilayer board, core board 1, and second sub-multilayer board, which have completed internal processing, are finally pressed together. Only the reliable bonding between the sub-board and the core board 1 needs to be achieved, which greatly reduces the processing difficulty of the overall multilayer board.
[0058] In one embodiment, the step S32 of fabricating a first outer layer circuit 6 on the outermost first augmentation layer and fabricating a second outer layer circuit 7 on the outermost second augmentation layer includes: Drilling is performed on the outermost first layer. After electroplating, the pattern circuit fabrication process can be carried out directly, so that the first outer layer circuit 6 is formed on the outermost first layer.
[0059] Drilling is performed on the outermost second layer. After electroplating, the pattern circuit fabrication process can be carried out directly, so that the second outer layer circuit 7 is formed on the outermost second layer.
[0060] In one embodiment, such as Figure 6 As shown, step S5, which involves laser ablation of the cover film 2 to expose the inner layer circuitry 121, includes: A second dry film is pasted onto the covering film 2 and a window opening is made; Laser ablation is performed on the windowed area of the second dry film to expose the inner layer circuit 121 at the target location, and then the second dry film is removed.
[0061] The second dry film is windowed through exposure and development processes to expose the cover film 2 in the area to be ablated, while the remaining areas are still covered and protected by the second dry film. Subsequently, the cover film 2 at the windowed location is ablated to remove the exposed portion of the cover film 2, allowing the inner layer circuitry 121 to be exposed from the windowed location. Finally, the second dry film is removed.
[0062] In this embodiment, after the multilayer board is opened, the inner layer circuit 121 at the target location is exposed by laser ablation, thereby achieving insulation protection of the bottom pattern of the step.
[0063] On the other hand, embodiments of the present invention provide a circuit board manufacturing method, including a step manufacturing method for the circuit board according to any of the above embodiments.
[0064] The above-mentioned step manufacturing method can significantly improve the insulation reliability, welding stability and product yield of high-density lines at the bottom of the step, meeting the client's requirements for high-density connection and high-reliability use.
[0065] In another aspect, embodiments of the present invention provide a circuit board prepared by the circuit board manufacturing method described above.
[0066] The above-described embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.
Claims
1. A method for manufacturing steps on a circuit board, characterized in that, include: Obtain a core board and fabricate inner layer circuitry on the core board; At the predetermined step area of the core board, the cover film is pasted onto the inner layer circuit; At least one additional layer is pressed onto the core board to form a multilayer board, and controlled-depth drilling is performed on the multilayer board around the preset step area to form a step contour groove. The portion of the multilayer board surrounding the stepped contour groove is removed to form a stepped groove, and the cover film is exposed in the stepped groove. The cover film is laser-ablated to expose the inner layer circuitry.
2. The method for fabricating steps on a circuit board according to claim 1, characterized in that, The method for fabricating the steps on the circuit board also includes: Cover the cover film with the adhesive-resistant layer; Remove the portion of the multilayer board surrounding the stepped contour groove to form a stepped groove, so that the adhesive resist layer is exposed in the stepped groove; Remove the adhesive layer to expose the cover film.
3. The method for fabricating steps on a circuit board according to claim 1, characterized in that, The core board includes a substrate and metal layers disposed on both sides of the substrate in the thickness direction; The process of obtaining the core board and fabricating inner layer circuitry on the core board includes: A first dry film is adhered to one of the metal layers and a windowing process is performed. The opening positions of the first dry film are etched to remove the first dry film and form the inner layer circuitry.
4. The method for fabricating steps on a circuit board according to claim 1, characterized in that, The added layers include a first added layer and a second added layer. At least one added layer is pressed onto the core board to form a multilayer board. Controlled-depth drilling is performed on the multilayer board around the predetermined step area to form a step contour groove, including: At least one of the first extension layers is pressed onto a first side in the thickness direction of the core board, and at least one of the second extension layers is pressed onto a second side in the thickness direction of the core board; A first outer layer circuit is fabricated on the outermost first add-on layer, and a second outer layer circuit is fabricated on the outermost second add-on layer. Around the outline of the preset step area, controlled-depth drilling is performed from the outermost first layer toward the cover film to form the step outline groove.
5. The method for fabricating steps on a circuit board according to claim 4, characterized in that, The step of pressing at least one of the first extension layers onto a first side in the thickness direction of the core board, and pressing at least one of the second extension layers onto a second side in the thickness direction of the core board, includes: Multiple first added layers are pressed together one by one on the first side of the core board in the thickness direction; Drill holes in the first layer and perform metallization; Multiple second additional layers are pressed one by one onto the second side of the core board in the thickness direction; Drill holes in the second layer and perform metallization.
6. The method for fabricating steps on a circuit board according to claim 4, characterized in that, The step of pressing at least one of the first extension layers onto a first side in the thickness direction of the core board, and pressing at least one of the second extension layers onto a second side in the thickness direction of the core board, includes: Multiple first add-layers are laminated to form a first sub-multilayer board, and holes are drilled and metallized in the first add-layers. Multiple second add-layers are laminated to form a second sub-multilayer board, and holes are drilled and metallized in the second add-layers; The first sub-multilayer board, the core board, and the second sub-multilayer board are pressed together to form the multilayer board.
7. The method for fabricating steps on a circuit board according to claim 1, characterized in that, The cover film is a polyimide film, and the polyimide film is coated with epoxy resin or acrylic resin to adhere the cover film to the core board.
8. The method for fabricating steps on a circuit board according to claim 1, characterized in that, The step of laser ablation of the cover film to expose the inner layer circuitry includes: A second dry film is pasted onto the covering film and a window opening is made; Laser ablation is performed on the windowed area of the second dry film to expose the inner layer circuitry at the target location, after which the second dry film is removed.
9. A method for manufacturing a circuit board, characterized in that, The method for manufacturing steps of a circuit board as described in any one of claims 1-8.
10. A circuit board, characterized in that, It is prepared by the circuit board manufacturing method of claim 9.