Bidirectional HEMT device and electronic device
Patent Information
- Application Number
- CN202610837749.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-06-10
- Publication Date
- 2026-08-18
AI Technical Summary
[0003]本申请针对相关技术的缺点,提出一种双向HEMT器件和电子设备,用以解决相关技术中双向HEMT器件米勒比较大的问题
本实施例中,通过设置电位管理电路,使场板与第一电极、第二电极中处于较低电位的一者连通,也即,本实施例中的场板为源场板,则本实施例提供的器件中,栅源电容Cgs具体包括本征栅源电容C(G-S)和场板到源极的寄生电容C(FP-S)。栅漏电容Cgd仅包括本征栅漏电容C(G-D),由于场板与源极的电位相同,场板在第一栅极和漏极之间形成静电屏蔽层,场板到漏极的耦合被计入漏源电容Cds的一部分,而非栅漏电容Cgd,因此栅漏电容Cgd不包括场板-漏电容C(FP-D)。也即,相对于栅场板而言,本实施例中的场板为源场板,栅漏电容Cgd减小,对应的,栅漏电容Cgd与栅源电容Cgs之间的比值可减小,也即,可降低米勒比,进一步可优化开关速度,降低开关损耗和误导通风险。
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Figure CN122602536A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor device technology, specifically to a bidirectional HEMT device and electronic device. Background Technology
[0002] High electron mobility transistors (HEMTs), with their high breakdown electric field, high electron saturation velocity, and excellent high-frequency characteristics, have become the core of next-generation wide-bandgap power semiconductor devices. Traditional HEMTs are unidirectional conductors, which cannot meet the requirements of modern power electronic systems for bidirectional energy flow. Therefore, bidirectional HEMTs have emerged, which achieve controllable switching of current in both directions through symmetrical structural designs (such as dual-gate, dual-source, or common-drain topologies). For single-gate bidirectional HEMTs, a gate field plate is typically used to adjust the electric field distribution; however, the gate field plate simultaneously affects the gate-source capacitance C. gs and gate-drain capacitance C gd This results in a large Miller ratio, increasing switching losses and limiting switching speed. Summary of the Invention
[0003] This application addresses the shortcomings of related technologies by proposing a bidirectional HEMT device and electronic device to solve the problem of large Miller ratio in bidirectional HEMT devices in related technologies.
[0004] This application provides a semiconductor device, including: Substrate; A channel layer is located on one side of the substrate; A barrier layer is located on the side of the channel layer away from the barrier layer; A first electrode, a second electrode, and a first gate are located on the side of the barrier layer away from the channel layer; the first gate is located between the first electrode and the second electrode; the bidirectional HEMT device has a forward operating mode and a reverse operating mode. In the forward operating mode, the potential of the first electrode is lower than the potential of the second electrode, and the first electrode is the source and the second electrode is the drain; in the reverse operating mode, the potential of the first electrode is higher than the potential of the second electrode, and the first electrode is the drain and the second electrode is the source. A field plate is located on the same side of the barrier layer as the first electrode, the second electrode, and the first gate, and the field plate is located between the first electrode and the second electrode. A potential management circuit is connected to the first electrode, the second electrode, and the field plate. The potential management circuit is configured to connect the first electrode and the second electrode, which are at a lower potential, to the field plate.
[0005] In some embodiments, the field plate is located on the side of the first gate away from the barrier layer, and the orthographic projection of the field plate on the substrate overlaps with the orthographic projection of the first gate on the substrate; in the direction from the first electrode to the second electrode, the orthographic projection of the field plate on the substrate is spaced apart from the orthographic projections of the first electrode and the second electrode on the substrate.
[0006] In some embodiments, the field plate includes a first field plate and a second field plate, the first field plate being located between the first gate and the first electrode, the second field plate being located between the first gate and the second electrode, the first field plate and the second field plate being spaced apart, and both the first field plate and the second field plate being connected to the potential management circuit.
[0007] In some embodiments, at least a portion of the orthographic projection of the first gate onto the substrate does not overlap with the orthographic projections of the first field plate onto the substrate or the second field plate onto the substrate.
[0008] In some embodiments, the orthographic projection of the first gate on the substrate does not overlap with the orthographic projections of the first field plate and the second field plate on the substrate.
[0009] In some embodiments, the bidirectional HEMT device has a control node, a first power / load node, a second power / load node, and a reference potential node. The first electrode of the bidirectional HEMT device is connected to the first power / load node, the second electrode is connected to the second power / load node, and the first gate is connected to the control node. The potential management circuit includes: The first potential stabilizing element includes a first conductive terminal, a second conductive terminal, and a control terminal. The first conductive terminal of the first potential stabilizing element is connected to the first power / load node, the second conductive terminal is connected to the field plate, and the control terminal is connected to the control node. A second potential stabilizing element is connected to the reference potential node, which is connected to the field plate. When a high-level voltage is applied to the control node, the resistance of the first potential stabilizing element is less than the resistance of the second potential stabilizing element, such that the potential of the field plate is substantially equal to the lower of the potentials of the first power / load node and the second power / load node. When a low-level voltage is applied to the control node, the resistance of the first potential stabilizing element is greater than the resistance of the second potential stabilizing element, such that the potential of the field plate is substantially equal to the ground potential.
[0010] In some embodiments, the potential management circuit further includes: The third potential stabilizing element includes a third conductive terminal, a fourth conductive terminal, and a second control terminal. The third conductive terminal is connected to the second power / load node, the fourth conductive terminal is connected to the field plate, and the second control terminal is connected to the control node. When a high-level voltage is applied to the control node, the resistances of the first and second potential stabilizing elements are both less than the resistance of the third potential stabilizing element, such that the potential of the field plate is substantially equal to the lower of the potentials of the first power / load node and the second power / load node; when a low-level voltage is applied to the control node, the resistances of the first and second potential stabilizing elements are both greater than the resistance of the third potential stabilizing element, such that the potential of the field plate is substantially equal to the ground potential.
[0011] In some embodiments, the first potential stabilizing element includes a first transistor, wherein the first conductive terminal, the second conductive terminal, and the control terminal are respectively the third electrode, the fourth electrode, and the second gate of the first transistor; The second potential stabilizing element includes a resistor, a diode, or a rectifier transistor; The third potential stabilizing element includes a second transistor, and the third conductive terminal, the fourth conductive terminal, and the second control terminal are respectively the fifth electrode, the sixth electrode, and the third gate of the second transistor.
[0012] In some embodiments, the bidirectional HEMT device further includes a first passivation layer, a second passivation layer, and a metal layer sequentially located on the side of the first gate away from the substrate, the field plate being located between the first passivation layer and the second passivation layer, and the potential management circuit further includes a first metal trace located within the metal layer, the first metal trace being connected to the fourth electrode of the first transistor, the sixth electrode of the second transistor, and the reference potential node; The bidirectional HEMT device also has a first through-hole, at least a portion of which penetrates the second passivation layer. The first through-hole is filled with a conductive material, and the field plate is connected to the first metal trace through the conductive material in the first through-hole.
[0013] In some embodiments, the bidirectional HEMT device further includes a first passivation layer, a second passivation layer, and a metal layer sequentially located on the side of the first gate away from the substrate, the field plate being located between the first passivation layer and the second passivation layer, and the potential management circuit further includes a first metal trace located in the metal layer, the first metal trace being connected to the fourth electrode of the first transistor, the sixth electrode of the second transistor, the reference potential node, and the substrate. The bidirectional HEMT device also has a second via that sequentially penetrates the first passivation layer, the barrier layer and the channel layer. The second via is filled with a conductive material, and the field plate is connected to the substrate through the conductive material in the second via.
[0014] In some embodiments, the bidirectional HEMT device has a control node, a first power / load node, and a second power / load node. The first electrode of the bidirectional HEMT device is connected to the first power / load node, the second electrode is connected to the second power / load node, and the first gate is connected to the control node. The potential management circuit includes: The first potential stabilizing element includes a first conductive terminal, a second conductive terminal, and a control terminal. The first conductive terminal of the first potential stabilizing element is connected to the first power / load node, the second conductive terminal is connected to the field plate, and the control terminal is connected to the control node. The second potential stabilizing element includes a third conductive terminal and a fourth conductive terminal, wherein the third conductive terminal is connected to the field plate and the fourth conductive terminal is connected to the control node; When a high-level voltage is applied to the control node, the resistance of the first potential stabilizing element is less than the resistance of the second potential stabilizing element, such that the potential of the field plate is substantially equal to the lower of the potentials of the first power / load node and the second power / load node.
[0015] In some embodiments, the first potential stabilizing element includes a first transistor, wherein the first conductive terminal, the second conductive terminal, and the control terminal are respectively the third electrode, the fourth electrode, and the second gate of the first transistor; the second potential stabilizing element includes a diode having a positive terminal connected to the field plate and a negative terminal connected to the control node.
[0016] In some embodiments, the diode is formed by a rectifier transistor having a third gate and a fifth electrode, both connected to the field plate to act as the positive terminal of the diode, and a sixth electrode connected to a control node to act as the negative terminal of the diode.
[0017] In some embodiments, the bidirectional HEMT device further includes a first passivation layer, a second passivation layer, and a metal layer sequentially located on the side of the first gate away from the substrate, the field plate being located between the first passivation layer and the second passivation layer, and the potential management circuit further includes a first metal trace located within the metal layer, the first metal trace being connected to the fourth electrode of the first transistor and the third gate of the rectifier transistor; The bidirectional HEMT device also has a first through-hole, at least a portion of which penetrates the second passivation layer. The first through-hole is filled with a conductive material, and the field plate is connected to the first metal trace through the conductive material in the first through-hole.
[0018] In some embodiments, the bidirectional HEMT device further includes a first passivation layer, a second passivation layer, and a metal layer sequentially located on the side of the first gate away from the substrate, the field plate being located between the first passivation layer and the second passivation layer, and the potential management circuit further includes a first metal trace located in the metal layer, the first metal trace being connected to the fourth electrode of the first transistor, the third gate of the rectifier transistor, and the substrate; The bidirectional HEMT device also has a second via that sequentially penetrates the second passivation layer, the barrier layer and the channel layer. The second via is filled with a conductive material, and the field plate is connected to the substrate through the conductive material in the second via.
[0019] This application also provides an electronic device, including the aforementioned bidirectional HEMT device.
[0020] The beneficial effects of this application include: In this embodiment, by setting a potential management circuit, the field plate is connected to the one of the first and second electrodes that is at the lower potential. That is, the field plate in this embodiment is the source field plate. Therefore, in the device provided in this embodiment, the gate-source capacitance C gs Specifically, this includes the intrinsic gate-source capacitance C (GS) and the parasitic capacitance C from the field plate to the source (FP-S). Gate-drain capacitance C gd Only the intrinsic gate-drain capacitance C (GD) is included. Since the field plate and source are at the same potential, the field plate forms an electrostatic shielding layer between the first gate and drain. The coupling from the field plate to the drain is included in the drain-source capacitance C. ds Part of, not the gate-drain capacitance C gd Therefore, the gate-drain capacitance C gd Excluding the field plate-drain capacitance C (FP-D). That is, in this embodiment, the field plate is the source field plate relative to the gate field plate, and the gate-drain capacitance C... gd Decrease, correspondingly, gate-drain capacitance C gd With gate-source capacitance C gs The ratio between them can be reduced, that is, the Miller ratio can be reduced, which can further optimize the switching speed, reduce switching losses and the risk of false turn-on.
[0021] Additional aspects and advantages of this application will be set forth in part in the description which follows, and will become apparent from the description or may be learned by practice of this application. Attached Figure Description
[0022] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.
[0023] Figure 1 The diagram shown is a structural schematic of a bidirectional HEMT device in the related art; Figure 2 The figure shown is a schematic diagram of the planar structure of a bidirectional HEMT device provided in an exemplary embodiment of this application; Figure 3a As shown Figure 2 A schematic diagram of the cross-sectional structure cut along section line A1A1; Figure 3b As shown Figure 2 A schematic diagram of the cross-sectional structure cut along section line B1B1. Figure 3c As shown Figure 2 A schematic diagram of the cross-sectional structure cut along section line C1C1. Figure 3d As shown Figure 2 A schematic diagram of the cross-sectional structure cut along section line D1D1. Figure 3e As shown Figure 2 A schematic diagram of the cross-sectional structure cut along section line E1E1. Figure 4 As shown Figure 2 The circuit block diagram corresponding to the bidirectional HEMT device in the diagram; Figure 5 As shown Figure 4 The specific circuit structure topology corresponding to the circuit block diagram; Figure 6 The diagram shown is a planar structure schematic of a bidirectional HEMT device provided in another exemplary embodiment of this application; Figure 7a As shown Figure 6 A schematic diagram of the cross-sectional structure cut along section line A2A2; Figure 7b As shown Figure 6 A schematic diagram of the cross-sectional structure cut along section line B2B2. Figure 7c As shown Figure 6 A schematic diagram of the cross-sectional structure cut along section line C2C2; Figure 7d As shown Figure 6 A schematic diagram of the cross-sectional structure cut along section line D2D2; Figure 7e As shown Figure 6 A schematic diagram of the cross-sectional structure cut along section line E2E2; Figure 8 The diagram shown is a planar structure schematic of a bidirectional HEMT device provided in another exemplary embodiment of this application; Figure 9a As shown Figure 8 A schematic diagram of the cross-sectional structure cut along section line A3A3; Figure 9b As shown Figure 8 Central section line B 31 B 31 A schematic diagram of the cross-sectional structure. Figure 9c As shown Figure 8 Central section line B 32 B 32 A schematic diagram of the cross-sectional structure. Figure 9d As shown Figure 8 A schematic diagram of the cross-sectional structure cut along section line C3C3; Figure 9e As shown Figure 8 A schematic diagram of the cross-sectional structure cut along section line D3D3. Figure 9f As shown Figure 8 A schematic diagram of the cross-sectional structure cut along section line E3E3. Figure 10 As shown Figure 8 , Figures 9a-9f The circuit topology diagram corresponding to the bidirectional HEMT device in the diagram; Figure 11 The diagram shown is a planar structure schematic of a bidirectional HEMT device provided in another exemplary embodiment of this application; Figure 12a As shown Figure 11 A schematic diagram of the cross-sectional structure cut along section line A4A4; Figure 12b As shown Figure 11 A schematic diagram of the cross-sectional structure cut along section line B4B4. Figure 12c As shown Figure 11 A schematic diagram of the cross-sectional structure cut along section line C4C4; Figure 12d As shown Figure 11 A schematic diagram of the cross-sectional structure cut along section line D4D4. Figure 12e As shown Figure 11 A schematic diagram of the cross-sectional structure cut along section line E4E4. Figure 13 As shown Figure 11 The circuit block diagram corresponding to the bidirectional HEMT device in the diagram; Figure 14 As shown Figure 13 The specific circuit structure topology corresponding to the circuit block diagram; Figure 15 The diagram shown is a planar structure schematic of a bidirectional HEMT device provided in another exemplary embodiment of this application; Figure 16a As shown Figure 15 A schematic diagram of the cross-sectional structure cut along section line A5A5; Figure 16b As shown Figure 15 A schematic diagram of the cross-sectional structure cut along section line B5B5. Figure 16c As shown Figure 15 A schematic diagram of the cross-sectional structure cut along section line C5C5; Figure 16d As shown Figure 15 A schematic diagram of the cross-sectional structure cut along section line D5D5. Figure 16e As shown Figure 15 A schematic diagram of the cross-sectional structure cut along section line E5E5. Figure 17 As shown Figure 15 The circuit block diagram corresponding to the bidirectional HEMT device in the diagram; Figures 18-20 As shown Figure 17 The specific circuit structure topology corresponding to the circuit block diagram.
[0024] In the figure: 10-substrate; 20-channel layer; 30-barrier layer; 41-first electrode; 42-second electrode; 43-third electrode; 44-fourth electrode; 45-fifth electrode; 46-sixth electrode; 51-first gate; 52-second gate; 53-third gate; 60-field plate; 61-first field plate; 62-second field plate; 60a-clear area; 71-first cap layer; 72-second cap layer; 73-third cap layer; 81-first passivation layer; 82-second passivation layer; 83-third passivation layer; 90-metal layer; 91-first metal layer; 92 - Second metal layer; 84 - Protective layer; 110 - First metal trace; 120 - Second metal trace; 130 - Third metal trace; 140 - Fourth metal trace; 210 - First auxiliary metal trace; 220 - Second auxiliary metal trace; 230 - Third auxiliary metal trace; 240 - Fourth auxiliary trace; Q m- Bidirectional transistor; Q1 - First transistor; Q2 - Second transistor; Q3 - Rectifier transistor; D1 - Diode; P / L1 - First power load node; P / L2 - Second power / load node; CTRL - Control node; REF - Reference potential node; TH0 - Interconnect via; TH1 - First via; TH2 - Second via; TH3 - Third via; TH4 - Fourth via; TH5 - Fifth via; TH6 - Sixth via; TH7 - Seventh via; TH8 - Eighth via; TH9 - Ninth via; TH 10 -Tenth through hole; TH 11 - Eleventh through hole; CC - Central axis; F1 - First potential stabilizing element; F2 - Second potential stabilizing element; F3 - Third potential stabilizing element. Detailed Implementation
[0025] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numerals in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.
[0026] The terminology used in this application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The singular forms “a,” “the,” and “the” used in this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used herein refers to and includes any or all possible combinations of one or more of the associated listed items.
[0027] It should be understood that when describing the structure of a component, when referring to a layer or region as being "above" or "on top of" another layer or region, it can mean that it is directly above the other layer or region, or that it contains other layers or regions between it and the other layer or region. Furthermore, if the component is flipped over, that layer or region will be located "below" or "under" the other layer or region.
[0028] The bidirectional HEMT device and electronic device in the embodiments of this application will be described in detail below with reference to the accompanying drawings. Unless otherwise specified, the features in the following embodiments may complement or combine with each other.
[0029] In bidirectional HEMT devices, the positions of the two electrodes symmetrically positioned on opposite sides of the gate can be interchanged when the device operates bidirectionally. However, if a source field plate is designed, it needs to be connected to the source. Since the position of the electrode acting as the source changes according to the device's operating state, the design of the source field plate is quite difficult. Therefore, as... Figure 1 As shown, in bidirectional HEMT devices, a gate field plate G-FP is typically symmetrically arranged about the central axis CC of the gate G to control the electric field distribution. A bidirectional HEMT device includes a substrate 10, a channel layer 20, and a barrier layer 30 stacked sequentially. The source S, drain D, and gate G are all located on the side of the barrier layer away from the substrate 10. In normally-off devices, a cap layer 70 is also provided below the gate G. The gate field plate G-FP is located on the side of the gate G away from the substrate 10. The gate field plate G-FP is separated from the gate G by a passivation layer 80. The passivation layer 80 has a via TH, which is filled with conductive material. The gate field plate can communicate with the gate G through the via TH in the passivation layer 80. When a potential difference is generated between the gate field plate G-FP and the source S / drain D, a new parasitic capacitance is introduced. Therefore, the actual gate-source capacitance C... gs Specifically, this includes the intrinsic gate-source capacitance C(GS) and the parasitic capacitance C(FP-S) from the gate field plate G-FP to the source S. Gate-drain capacitance C gd Specifically, this includes the intrinsic gate-drain capacitance C(GD) and the parasitic capacitance C(FP-D) from the gate field plate G-FP to the drain D. When the gate-drain capacitance C... gd With gate-source capacitance C gs A large ratio between the two, i.e. a large Miller ratio, can lead to a decrease in switching speed, an increase in switching losses, or a risk of false turn-on.
[0030] The bidirectional HEMT device and electronic device provided in this application are intended to solve or improve the above-mentioned technical problems.
[0031] This application provides a bidirectional HEMT device. Figure 2 The figure shown is a schematic diagram of the planar structure of a bidirectional HEMT device provided in an exemplary embodiment of this application; Figure 3a As shown Figure 2 A schematic diagram of the cross-sectional structure cut along section line A1A1; Figure 3b As shown Figure 2 A schematic diagram of the cross-sectional structure cut along section line B1B1. Figure 3c As shown Figure 2 A schematic diagram of the cross-sectional structure cut along the CC section line; Figure 3d As shown Figure 2 A schematic diagram of the cross-sectional structure cut along the section line DD. Figure 3e As shown Figure 2 A schematic diagram of the cross-sectional structure cut along the section line EE. Figure 4As shown Figure 2 The circuit block diagram corresponding to the bidirectional HEMT device in the diagram; Figure 5 As shown Figure 4 The specific circuit structure topology corresponding to the circuit block diagram.
[0032] like Figure 2 , Figures 3a-3e , Figure 4 as well as Figure 5 As shown, it includes a substrate 10, a channel layer 20, a barrier layer 30, a first electrode 41, a second electrode 42, a first gate 51, a field plate 60, and a potential management circuit (exemplarily, the potential management circuit includes a first potential stabilizing element F1, a second potential stabilizing element F2, and a third potential stabilizing element F3).
[0033] The channel layer 20 is located on one side of the substrate 10. The barrier layer 30 is located on the side of the channel layer 20 away from the barrier layer 30.
[0034] The first electrode 41, the second electrode 42, and the first gate 51 are all located on the side of the barrier layer 30 away from the channel layer 20; the first gate 51 is located between the first electrode 41 and the second electrode 42; the bidirectional HEMT device has a forward operating mode and a reverse operating mode. In the forward operating mode, the potential of the first electrode 41 is lower than the potential of the second electrode 42. At this time, the first electrode 41 is the source and the second electrode 42 is the drain. In the reverse operating mode, the potential of the first electrode 41 is higher than the potential of the second electrode 42. At this time, the first electrode 41 is the drain and the second electrode 42 is the source.
[0035] The field plate 60 is located on the same side of the barrier layer 30 as the first electrode 41, the second electrode 42 and the first gate 51, and the field plate 60 is located between the first electrode 41 and the second electrode 42.
[0036] The potential management circuit is connected to the first electrode 41, the second electrode 42 and the field plate 60. The potential management circuit is configured to connect the first electrode 41 and the second electrode 42, which are at a lower potential, to the field plate 60.
[0037] In this embodiment, by setting a potential management circuit, the field plate 60 is connected to the one of the first electrode 41 and the second electrode 42 that is at the lower potential. That is, the field plate 60 in this embodiment is the source field plate 60. Therefore, in the device provided in this embodiment, the gate-source capacitance C gs Specifically, this includes the intrinsic gate-source capacitance C (GS) and the parasitic capacitance C (FP-S) from the field plate 60 to the source. Gate-drain capacitance C gd Including only the intrinsic gate-drain capacitance C (GD), since the field plate 60 and the source are at the same potential, the field plate 60 forms an electrostatic shielding layer between the first gate 51 and the drain. The coupling from the field plate 60 to the drain is included in the drain-source capacitance C. dsPart of, not the gate-drain capacitance C gd Therefore, the gate-drain capacitance C gd Excluding the field plate 60-drain capacitance C (FP-D). That is, relative to the gate field plate 60, the field plate 60 in this embodiment is the source field plate 60, and the gate-drain capacitance C... gd Decrease, correspondingly, gate-drain capacitance C gd With gate-source capacitance C gs The ratio between them can be reduced, that is, the Miller ratio can be reduced, which can further optimize the switching speed, reduce switching losses and the risk of false turn-on.
[0038] In some embodiments, the substrate 10 may comprise silicon (Si), doped Si, silicon carbide (SiC), germanium silicide (SiGe), gallium arsenide (GaAs) or other semiconductor materials, and may also comprise sapphire, silicon-on-insulator (SOI) or other suitable materials.
[0039] In some embodiments, the channel layer 20 can be a material with high electron mobility, such as gallium nitride (GaN), aluminum nitride (AlN), gallium arsenide (GaAs), indium phosphide (InP), or indium gallium arsenide (In). x Ga 1-x As, where 0 < x < 1, aluminum gallium nitride (Al x Ga 1-x N, where 0 < x < 1, etc. Preferably, the channel layer 20 can be gallium nitride (GaN), and the bandgap of GaN is about 3.4 eV.
[0040] In some embodiments, a buffer layer (not shown) is further provided between the channel layer 20 and the substrate 10. The buffer layer is used to reduce the lattice mismatch between the substrate 10 and the channel layer 20. The material of the buffer layer may be the same as that of the channel layer 20.
[0041] In some embodiments, the barrier layer 30 may be a wide-bandgap semiconductor material, including group III-V compounds, such as aluminum gallium nitride (Al₂O₃). x Ga 1-x N, where x≤1), AlGaAs, InAlGaNi (In a Al b Ga 1-a-b N, where a+b≤1), aluminum indium phosphide (AlInP), aluminum gallium nitride (Al x Ga 1-x N, where x≤1), indium aluminum nitrogen (In x Al 1-x N, where x < 1). The bandgap width of the barrier layer 30 can be greater than the bandgap width of the channel layer 20. Preferably, the barrier layer 30 can be aluminum gallium nitride (Al₂O₃). x Ga 1-x N, where x≤1), Al x Ga 1-x The band gap of N is approximately 3.4 to 6.2 eV.
[0042] It should be noted that due to the band difference between the channel layer 20 and the barrier layer 30, the barrier layer 30 can form a potential well for electrons, which restricts the movement of electrons in the direction perpendicular to the barrier layer 30, while allowing them to move freely in the plane of the barrier layer 30. This results in the formation of a two-dimensional electron gas (2DEG) region near the surface of the channel layer 20 on the side closest to the barrier layer 30.
[0043] In some embodiments, the first electrode 41 may include a conductive material, which may include a metal, alloy, doped semiconductor material (e.g., doped crystalline silicon) or other suitable conductive material, such as Ti, Al, Ni, Cu, Au, Pt, Pd, W, TiN or other suitable materials.
[0044] In some embodiments, the second electrode 42 may include a conductive material, which may include a metal, alloy, doped semiconductor material (e.g., doped crystalline silicon) or other suitable conductive material, such as Ti, Al, Ni, Cu, Au, Pt, Pd, W, TiN or other suitable materials.
[0045] In some embodiments, the first gate 51 may include a conductive material, which may include a metal, alloy, doped semiconductor material (e.g., doped crystalline silicon), or other suitable conductive materials such as Ti, Al, Ni, Cu, Au, Pt, Pd, W, TiN, or other suitable materials. The first electrode 41, the second electrode 42, and the first gate 51 together constitute a bidirectional transistor Q. m .
[0046] In some embodiments, combined with Figure 3a As shown, the bidirectional HEMT device also includes a first cap layer 71, which is located between the barrier layer 30 and the first gate 51. In this case, the bidirectional HEMT device can be a normally-off HEMT device, in which case, when no gate voltage is applied, the 2DEG below the first gate 51 is depleted. In other embodiments, the bidirectional HEMT device can also be a weakly normally-on HEMT device, in which case, when no gate voltage is applied, only a partial consumption of the 2DEG below the first gate 51.
[0047] In some embodiments, the first cap layer 71 can be made of p-GaN. The p-GaN in the first cap layer 71 can form a local pn junction with the 2DEG between the barrier layer 30 and the channel layer 20, thereby enabling the consumption of the 2DEG below the first gate 51.
[0048] In some embodiments, combined with Figure 2 and Figure 3a As shown, the field plate 60 is located on the side of the first gate 51 away from the barrier layer 30. The orthographic projection of the field plate 60 on the substrate 10 overlaps with the orthographic projection of the first gate 51 on the substrate 10. In the direction from the first electrode 41 to the second electrode 42, the orthographic projection of the field plate 60 on the substrate 10 is spaced apart from the orthographic projections of the first electrode 41 and the second electrode 42 on the substrate 10. Therefore, the field plate 60 can adjust the electric field distribution, pushing the electric field peak at the edge of the first gate 51 into the drift region between the gate and drain, thereby maximizing the breakdown voltage of the device.
[0049] In some embodiments, the first electrode 41 and the second electrode 42 are symmetrically arranged about the first gate 51 perpendicular to the central axis CC of the substrate 10, and the field plate 60 is symmetrically arranged about the first gate 51 perpendicular to the central axis CC of the substrate 10. That is, in the direction from the first electrode 41 to the second electrode 42, the distance between the field plate 60 and the first electrode 41 is substantially equal to the distance between the field plate 60 and the second electrode 42.
[0050] In some embodiments, such as Figure 2 As shown, the bidirectional HEMT device has a control node CTRL, a first power / load node P / L1, a second power / load node P / L2, and a reference potential node REF. The first electrode 41 of the bidirectional HEMT device is connected to the first power / load node P / L1, the second electrode 42 is connected to the second power / load node P / L2, and the first gate 51 is connected to the control node CTRL.
[0051] In some embodiments, such as Figure 4 As shown, the potential management circuit includes a first potential stabilizing element F1, a second potential stabilizing element F2, and a third potential stabilizing element F3.
[0052] The first potential stabilizing element F1 includes a first conductive terminal, a second conductive terminal, and a control terminal. The first conductive terminal of the first potential stabilizing element F1 is connected to the first power / load node P / L1, the second conductive terminal is connected to the field board 60, and the control terminal is connected to the control node CTRL.
[0053] The second potential stabilizing element F2 is connected to the reference potential node REF, and the reference potential node REF is connected to the field board 60. The potential management circuit also includes a third potential stabilizing element F3, which includes a third conductive terminal, a fourth conductive terminal, and a second control terminal. The third conductive terminal is connected to the second power / load node P / L2, the fourth conductive terminal is connected to the field board 60, and the second control terminal is connected to the control node CTRL.
[0054] Therefore, when a high-level voltage is applied to the control node CTRL, the resistances of the first potential stabilizing element F1 and the second potential stabilizing element F2 are both less than the resistance of the third potential stabilizing element F3, making the potential of the field plate 60 essentially equal to the lower of the potentials of the first power / load node P / L1 and the second power / load node P / L2; when a low-level voltage is applied to the control node CTRL, the resistances of the first potential stabilizing element F1 and the second potential stabilizing element F2 are both greater than the resistance of the third potential stabilizing element F3, making the potential of the field plate 60 essentially equal to the ground potential.
[0055] In this embodiment, the potential management circuit, the first potential stabilizing element F1 and the third potential stabilizing element F3 can be used as synchronous switches to provide a low-impedance path to the field plate 60 for the low-potential electrodes in the first electrode 41 and the second electrode 42 when the device is turned on.
[0056] Specifically, when the first power / load node P / L1 is connected to a high potential V H The second power / load node P / L2 is connected to a low potential V. L When the device is turned on, the current path is the same as the path from the first power / load node P / L1 to the on-resistance of the first potential stabilizing element F1, then to the field plate 60, and finally to the on-resistance of the third potential stabilizing element F3. The potential of the field plate 60 is affected by these two extremely small on-resistances on V. H and V L Voltage division is performed. Since the resistances of the first potential stabilizing element F1 and the third potential stabilizing element F3 are both very small, the potential of the field plate 60 will stabilize at close to V. L At that level, that is, the field plate 60 will be automatically connected to the low potential V. L When the device is turned off, both the first potential stabilizing element F1 and the third potential stabilizing element F3 are turned off to prevent the high-potential electrodes in the first electrode 41 and the second electrode 42 from affecting the field plate 60. At this time, the field plate 60 is only connected to the reference potential node REF through the second potential stabilizing element F2. The reference potential node REF can be further connected to the control node CTRL or grounded.
[0057] In some embodiments, the first potential stabilizing element F1 includes a first transistor Q1, with a first conductive terminal, a second conductive terminal, and a control terminal being the third electrode 43, a fourth electrode 44, and a second gate 52 of the first transistor Q1, respectively; the second potential stabilizing element F2 includes a resistor R, a diode, or a rectifier transistor; the third potential stabilizing element F3 includes a second transistor Q2, with a third conductive terminal, a fourth conductive terminal, and a second control terminal being the fifth electrode 45, a sixth electrode 46, and a third gate 53 of the second transistor Q2, respectively. Thus, the first transistor Q1 and the second transistor Q2 can be used as synchronous switches for a bidirectional HEMT device. The third potential stabilizing element F3 serves as a discharge / reset path, discharging or clamping the charge on the field plate 60 to a known reference potential when the device is turned off, preventing it from entering a high-resistance floating state.
[0058] In some embodiments, combined with Figures 3a-3e As shown, the first electrode 41 is reused as the third electrode 43 of the first transistor Q1, and the second electrode 42 is reused as the fifth electrode 45 of the second transistor Q2. This optimizes the device layout and reduces the overall device size.
[0059] In some embodiments, the third electrode 43 of the first transistor Q1 can be one of the source and the drain, and the fourth electrode 44 can be the other of the source and the drain.
[0060] The fifth electrode 45 of the second transistor Q2 can be one of the source and the drain, and the sixth electrode 46 can be the other of the source and the drain.
[0061] It should be noted that the materials of the third electrode 43 and the fourth electrode 44 of the first transistor Q1 and the fifth electrode 45 and the sixth electrode 46 of the second transistor Q2 are the same as those of the first electrode 41 and the second electrode 42, and will not be repeated here.
[0062] In some embodiments, the first transistor Q1 further includes a second cap layer 72 located between the barrier layer 30 and the second gate 52, and the second transistor Q2 further includes a third cap layer 73 located between the barrier layer 30 and the third gate 53. The materials of the second cap layer 72 and the third cap layer 73 are the same as those of the first cap layer 71, and will not be described again here.
[0063] It should be noted that the bidirectional transistor Q m The first transistor Q1 and the second transistor Q2 may not have the first cap layer 71, the second cap layer 72 and the third cap layer 73. They can be flexibly designed according to the actual situation.
[0064] In some embodiments, combined with Figure 2 and Figure 3a , Figure 3bAs shown, the bidirectional HEMT device further includes a first passivation layer 81, a second passivation layer 82, and a metal layer 90 sequentially located on the side of the first gate 51 away from the substrate 10. A field plate 60 is located between the first passivation layer 81 and the second passivation layer 82. The potential management circuit also includes a first metal trace 110 located within the metal layer 90. The first metal trace 110 is connected to the fourth electrode 44 of the first transistor Q1, the sixth electrode 46 of the second transistor Q2, and the reference potential node REF. The bidirectional HEMT device also has a first via VH1, at least a portion of which penetrates the second passivation layer 82. The first via VH1 is filled with a conductive material, and the field plate 60 is connected to the first metal trace 110 through the conductive material within the first via VH1.
[0065] In some embodiments, the metal layer 90 includes a first metal layer 91 and a second metal layer 92 sequentially away from the substrate 10, with a third passivation layer 83 disposed between the first metal layer 91 and the second metal layer 92. A first metal trace 110 is located in the second metal layer 92, and in this case, a first via VH1 penetrates the second passivation layer 82 and the third passivation layer 83. Figure 3b As shown, the third passivation layer 83 has multiple third vias VH3, which are filled with conductive material. The bidirectional HEMT device also has multiple fourth vias VH4, which penetrate the first passivation layer 81 and the second passivation layer 82. The first metal layer 91 also has a first auxiliary metal trace 210, which is electrically connected to the first auxiliary metal trace 210 through the fourth vias VH4. The first auxiliary trace is further connected to the fourth electrode 44 of the first transistor Q1 and the sixth electrode 46 of the second transistor Q2 through the third vias VH3.
[0066] In some embodiments, the first metal trace 110 may also be located in the first metal layer 91. The trace can be flexibly designed accordingly, which will not be described in detail here.
[0067] In some embodiments, see Figure 2 and Figure 3cThe potential management circuit also includes a second metal trace 120 located in the first metal layer 91. The bidirectional HEMT device also has multiple fifth vias VH5, each of which penetrates the first passivation layer 81 and the second passivation layer 85. The fifth vias VH5 are filled with conductive material. The second metal trace 120 is connected to the first gate 51, the second gate 52 of the first transistor Q1, and the third gate 53 of the third transistor through the fifth vias VH5, respectively. The potential management circuit also includes a second auxiliary metal trace 220 located in the second metal layer 92. The third passivation layer 83 has multiple sixth vias VH6, each of which is filled with conductive material. The second metal trace 120 is electrically connected to the second auxiliary metal trace 220 through the sixth vias VH6. The second auxiliary metal trace 220 is connected to the control node CTRL.
[0068] Furthermore, to avoid the formation of an electrical connection between the conductive material within the fifth via VH5 used for connection with the first gate 51 and the field plate, see [reference needed]. Figure 2 The field plate 60 is provided with a cutout area 60a, so that the orthogonal projection of the fifth through hole VH5, which is connected to the first gate 51, falls into the orthogonal projection of the cutout area 60a on the substrate 10. This can prevent the conductive material in the fifth through hole VH5 from contacting the field plate 60, thereby preventing the control node CTRL from mistakenly forming a gate field plate when connected to the field plate 60.
[0069] Furthermore, the edge of the cutout region 60a of the field plate 60 can be designed as a smooth transition surface. For example, the orthographic projection of the cutout region 60a on the substrate 10 can be a rounded rectangle, an ellipse, a circle, or an oblong hole. This reduces the probability of electric field spikes forming in the cutout region 60a and improves device quality.
[0070] In some embodiments, the field plate 60 may also be provided with multiple hollow areas 60a, which are evenly distributed on the field plate 60 to reduce the weight of the field plate and at the same time uniformly regulate the electric field distribution.
[0071] In some embodiments, a floating metal structure may be provided above the hollowed-out area 60a to avoid the formation of electric field spikes.
[0072] In some embodiments, see Figure 2 and Figure 3dThe potential management circuit also includes a third metal trace 130, which is located in the first metal layer 91. The bidirectional HEMT device has at least one seventh via VH7, which penetrates the first passivation layer 81 and the second passivation layer 82. The seventh via VH7 is filled with conductive material. The third metal trace 130 is connected to the third electrode 43 of the first transistor Q1 through the seventh via VH7. The potential management circuit also includes a third auxiliary metal trace 230, which is located in the second metal layer 92. The third passivation layer 83 also has multiple eighth vias VH8, each of which is filled with conductive material. The third metal trace 130 is connected to the third auxiliary metal trace 230 through the eighth via VH8. The third auxiliary metal trace 230 is connected to the first power / load node P / L1.
[0073] In some embodiments, see Figure 2 and Figure 3e The potential management circuit also includes a fourth metal trace 140, which is also located in the first metal layer 91. The bidirectional HEMT device has at least one ninth via VH9, which penetrates the first passivation layer 81 and the second passivation layer 82. The ninth via VH9 is filled with conductive material, and the fourth metal trace 140 is connected to the fifth electrode 45 of the second transistor Q2 through the ninth via VH9. The potential management circuit also includes a fourth auxiliary metal trace 240, which is located in the second metal layer 92. The third passivation layer 83 also has multiple tenth vias VH. 10 Each tenth through hole VH 10 The interior is filled with conductive material, and the fourth metal trace 140 passes through the tenth via VH. 10 It is connected to the fourth auxiliary metal trace 240, which is connected to the second power / load node P / L2.
[0074] Figure 6 The diagram shown is a planar structure schematic of a bidirectional HEMT device provided in another exemplary embodiment of this application; Figure 7a As shown Figure 6 A schematic diagram of the cross-sectional structure cut along section line A2A2; Figure 7b As shown Figure 6 A schematic diagram of the cross-sectional structure cut along section line B2B2. Figure 7c As shown Figure 6 A schematic diagram of the cross-sectional structure cut along section line C2C2; Figure 7d As shown Figure 6 A schematic diagram of the cross-sectional structure cut along section line D2D2; Figure 7e As shown Figure 6 A schematic diagram of the cross-sectional structure cut along section line E2E2.
[0075] Combination Figure 6 and Figure 7a , Figure 7b As shown, the field plate 60 includes a first field plate 61 and a second field plate 62. The first field plate 61 is located between the first gate 51 and the first electrode 41, and the second field plate 62 is located between the first gate 51 and the second electrode 42. The first field plate 61 and the second field plate 62 are spaced apart, and both the first field plate 61 and the second field plate 62 are connected to a potential management circuit. Therefore, both the first field plate 61 and the second field plate 62 can adjust the electric field distribution between the source and the drain to improve the withstand voltage.
[0076] Furthermore, the first field plate 61 and the second field plate 62 are symmetrically arranged about the central axis CC of the first gate 51 perpendicular to the substrate 10. That is, in the direction from the first electrode 41 to the second electrode 42, the distance between the first field plate 61 and the first gate 51 is basically equal to the distance between the second field plate 62 and the first gate 51.
[0077] In some embodiments, at least a portion of the orthographic projection of the first gate 51 onto the substrate 10 does not overlap with the orthographic projections of the first field plate 61 and the second field plate 62 onto the substrate 10. This reduces the gate charge Q of the first gate 51. g This reduces switching losses and speeds up switching.
[0078] Preferably, the orthogonal projection of the first gate 51 onto the substrate 10 completely does not overlap with the orthogonal projections of the first field plate 61 and the second field plate 62 onto the substrate 10. This maximizes the reduction of the gate charge Q of the first gate 51. g Optimize device performance.
[0079] Figures 7c-7e The cross-sectional view shown is structural and Figures 3c-3e The cross-sectional view shown is similar in structure, so it will not be described again here.
[0080] Figure 8 The diagram shown is a planar structure schematic of a bidirectional HEMT device provided in another exemplary embodiment of this application; Figure 9a As shown Figure 8 A schematic diagram of the cross-sectional structure cut along section line A3A3; Figure 9b As shown Figure 8 Central section line B 31 B 31 A schematic diagram of the cross-sectional structure. Figure 9c As shown Figure 8 Central section line B 32 B 32 A schematic diagram of the cross-sectional structure. Figure 9d As shown Figure 8 A schematic diagram of the cross-sectional structure cut along section line C3C3; Figure 9e As shown Figure 8 A schematic diagram of the cross-sectional structure cut along section line D3D3. Figure 9f As shown Figure 8 A schematic diagram of the cross-sectional structure cut along section line E3E3. Figure 10 As shown Figure 8 , Figures 9a-9f The circuit topology diagram corresponding to the bidirectional HEMT device.
[0081] In this embodiment, see details. Figure 8 and Figure 9a , Figure 9c The bidirectional HEMT device further includes a first passivation layer 81, a second passivation layer 82, and a metal layer 90 sequentially located on the side of the first gate 51 away from the substrate 10. A field plate 60 is located between the first passivation layer 81 and the second passivation layer 82. The potential management circuit also includes a first metal trace 110 located within the metal layer 90. The first metal trace 110 is connected to the fourth electrode 44 of the first transistor Q1, the sixth electrode 46 of the second transistor Q2, the reference potential node REF, and the substrate 10. The bidirectional HEMT device also has a second via VH2 sequentially penetrating the first passivation layer 81, the barrier layer 30, and the channel layer 20. The second via VH2 is filled with a conductive material, and the field plate 60 is connected to the substrate 10 through the conductive material in the second via VH2. In this embodiment, when the potential management circuit is connected to the substrate 10, the potential of the substrate 10 and the source electrode can be kept at the same potential, thereby avoiding the negative impact of substrate 10 potential fluctuations on the device's performance and reliability. Furthermore, by connecting the field plate 60 to the substrate 10, the field plate 60 and the substrate 10 can be made to be at the same low potential, that is, the field plate 60 is connected to the source to achieve the control of the electric field distribution.
[0082] In some embodiments, such as Figure 9b As shown, the bidirectional HEMT device has interconnect vias VH0 that sequentially pass through the second passivation layer 82, the first passivation layer 81, the barrier layer 30 and the channel layer 20. The first metal trace 110 is connected to the substrate 10 through the interconnect vias VH0.
[0083] For example, the metal layer 90 includes a first metal layer 91 and a second metal layer 92 that are sequentially located away from the substrate 10, with the first metal trace 110 and the field plate 60 both located in the second metal layer 92. In other examples, the first metal trace 110 may also be located in the first metal layer 91, and the specific design can be flexibly adapted to the actual situation.
[0084] In some embodiments, referring to any of the cross-sectional views, the bidirectional HEMT device further includes a protective layer 84 located on the side of the second metal layer 92 away from the substrate 10, the protective layer 84 exposing a portion of the second metal layer 92 to establish electrical connections with the respective nodes.
[0085] Figure 11 The diagram shown is a planar structure schematic of a bidirectional HEMT device provided in another exemplary embodiment of this application; Figure 12a As shown Figure 11 A schematic diagram of the cross-sectional structure cut along section line A4A4; Figure 12b As shown Figure 11 A schematic diagram of the cross-sectional structure cut along section line B4B4. Figure 12c As shown Figure 11 A schematic diagram of the cross-sectional structure cut along section line C4C4; Figure 12d As shown Figure 11 A schematic diagram of the cross-sectional structure cut along section line D4D4. Figure 12e As shown Figure 11 A schematic diagram of the cross-sectional structure cut along section line E4E4. Figure 13 As shown Figure 11 The circuit block diagram corresponding to the bidirectional HEMT device in the diagram; Figure 14 As shown Figure 13 The specific circuit structure topology corresponding to the circuit block diagram.
[0086] In some embodiments, see Figure 11 , Figures 12a-12e As shown, the potential management circuit may also include only the first potential stabilizing element F1 and the second potential stabilizing element F2. In this case, the potential management circuit does not include the third potential stabilizing element F3. The other parts are the same as in the previous embodiment, and will not be described again here.
[0087] At this time, when a high-level voltage is applied to the control node CTRL, the resistance of the first potential stabilizing element F1 is less than the resistance of the second potential stabilizing element F2, so that the potential of the field plate 60 is basically equal to the lower of the potentials of the first power / load node P / L1 and the second power / load node P / L2; when a low-level voltage is applied to the control node CTRL, the resistance of the first potential stabilizing element F1 is greater than the resistance of the second potential stabilizing element F2, so that the potential of the field plate 60 is basically equal to the ground potential.
[0088] Therefore, the potential management circuit provided in this embodiment, when the first power / load node P / L1 is connected to a high potential V H The second power / load node P / L2 is connected to a low potential V. LWhen the device is turned on, because the resistance of the first potential stabilizing element F1 is less than the resistance of the second potential stabilizing element F2, according to the voltage divider formula, the voltage of the field plate 60 after voltage division is close to the lower potential of the first electrode 41 and the second electrode 42. When the device is turned off, the potential of the field plate 60 is close to the ground potential. When the first power / load node P / L1 is connected to the low potential V... L The second power / load node P / L2 is connected to a high potential V. H Similarly, the answer can be obtained from the partial pressure formula, which will not be elaborated here.
[0089] In some embodiments, combined with Figure 13 and Figure 14 As shown, the first potential stabilizing element F1 includes a first transistor Q1, and the first conducting terminal, the second conducting terminal, and the control terminal are the third electrode 43, the fourth electrode 44, and the second gate 52 of the first transistor Q1, respectively; the second potential stabilizing element F2 includes a resistor R, a diode, or a rectifier transistor. For example, the second potential stabilizing element F2 can be a resistor R.
[0090] In some embodiments, combined with Figures 12a-12e As shown, bidirectional transistor Q m The first electrode 41 is reused as the third electrode 43 of the first transistor Q1.
[0091] Figure 15 The diagram shown is a planar structure schematic of a bidirectional HEMT device provided in another exemplary embodiment of this application; Figure 16a As shown Figure 15 A schematic diagram of the cross-sectional structure cut along section line A5A5; Figure 16b As shown Figure 15 A schematic diagram of the cross-sectional structure cut along section line B5B5. Figure 16c As shown Figure 15 A schematic diagram of the cross-sectional structure cut along section line C5C5; Figure 16d As shown Figure 15 A schematic diagram of the cross-sectional structure cut along section line D5D5. Figure 16e As shown Figure 15 A schematic diagram of the cross-sectional structure cut along section line E5E5. Figure 17 As shown Figure 15 The circuit block diagram corresponding to the bidirectional HEMT device in the diagram; Figures 18-20 As shown Figure 17 The specific circuit structure topology corresponding to the circuit block diagram.
[0092] The potential management circuit may also include only a first potential stabilizing element F1 and a second potential stabilizing element F2, without a third potential stabilizing element F3 and a reference potential node REF. Furthermore, the second potential stabilizing element F2 includes a third conductive terminal and a fourth conductive terminal; the third conductive terminal is connected to the field plate 60, and the fourth conductive terminal is connected to the control node CTRL. Other parts are the same as in the aforementioned embodiment and will not be described again here.
[0093] At this time, when a high-level voltage is applied to the control node CTRL, the resistance of the first potential stabilizing element F1 is less than the resistance of the second potential stabilizing element F2, so that the potential of the field plate 60 is basically equal to the lower of the potentials of the first power / load node P / L1 and the second power / load node P / L2; when a low-level voltage is applied to the control node CTRL, the resistance of the first potential stabilizing element F1 is greater than the resistance of the second potential stabilizing element F2, so that the potential of the field plate 60 is basically equal to the ground potential.
[0094] Therefore, the potential management circuit provided in this embodiment, when the first power / load node P / L1 is connected to a high potential V H The second power / load node P / L2 is connected to a low potential V. L When the device is turned on, because the resistance of the first potential stabilizing element F1 is less than the resistance of the second potential stabilizing element F2, according to the voltage divider formula, the voltage of the field plate 60 after voltage division is close to the lower potential of the first electrode 41 and the second electrode 42. When the device is turned off, the potential of the field plate 60 is close to the ground potential. When the first power / load node P / L1 is connected to the low potential V... L The second power / load node P / L2 is connected to a high potential V. H Similarly, the answer can be obtained from the partial pressure formula, which will not be elaborated here.
[0095] In some embodiments, combined with Figure 18 As shown, the first potential stabilizing element F1 includes a first transistor Q1, and the first conductive terminal, the second conductive terminal, and the control terminal are the third electrode 43, the fourth electrode 44, and the second gate 52 of the first transistor Q1, respectively; the second potential stabilizing element F2 includes a diode D1, which has a positive terminal connected to the field plate 60 and a negative terminal connected to the control node CTRL.
[0096] In some embodiments, further combined Figure 19As shown, diode D1 is formed by rectifier transistor Q3, which has a third gate 53 and a fifth electrode 45 both connected to the field plate 60 to serve as the positive terminal of diode D1, and a sixth electrode 46 connected to the control node CTRL to serve as the negative terminal of diode D1. That is, the third gate 53 and the fifth electrode 45 can be electrically short-circuited to form the positive terminal of diode D1.
[0097] In some embodiments, combined with Figure 15 as well as Figures 16a-16e As shown, the bidirectional HEMT device also includes a first passivation layer 81, a second passivation layer 82, and a metal layer 90, which are sequentially located on the side of the first gate 51 away from the substrate 10. The field plate 60 is located between the first passivation layer 81 and the second passivation layer 82. The potential management circuit also includes a first metal trace 110 located in the metal layer 90. The first metal trace 110 is connected to the fourth electrode 44 of the first transistor Q1 and the third gate 53 of the rectifier transistor Q3.
[0098] Further, see Figure 16b Similar to the aforementioned embodiments, the bidirectional HEMT device also includes a first via VH1, at least a portion of which penetrates the second passivation layer 82. The first via VH1 is filled with a conductive material, and the field plate 60 is connected to the first metal trace 110 through the conductive material within the first via VH1. The beneficial effects of this embodiment are the same as those of the aforementioned embodiments, and will not be repeated here.
[0099] In some embodiments, the bidirectional HEMT device further includes a first passivation layer 81, a second passivation layer 82, and a metal layer 90 sequentially located on the side of the first gate 51 away from the substrate 10. The potential management circuit further includes a first metal trace 110, which is connected to the fourth electrode 44 of the first transistor Q1, the third gate 53 of the rectifier transistor Q3, and the substrate 10. The circuit topology diagram in this embodiment can be found in [reference needed]. Figure 17 .
[0100] Furthermore, similar to the aforementioned embodiments, refer to... Figure 9c The field plate 60 is located in the metal layer 90. The bidirectional HEMT device also has a second via VH2 that sequentially penetrates the second passivation layer 82, the barrier layer 30 and the channel layer 20. The second via VH2 is filled with conductive material, and the field plate 60 is connected to the substrate 10 through the conductive material in the second via VH2.
[0101] In some embodiments, reference Figure 9b The bidirectional HEMT device is provided with interconnect vias VH0 that sequentially pass through the second passivation layer 82, the first passivation layer 81, the barrier layer 30 and the channel layer 20. The first metal trace 110 is connected to the substrate 10 through the interconnect vias VH0.
[0102] Based on the same inventive concept, this application also provides an electronic device, including the bidirectional HEMT device provided in the foregoing embodiments. This electronic device can be a USB fast charger, an appliance controller, a voltage converter in an energy storage system, a battery management system, a robot joint drive device, etc.
[0103] It should be noted that the dimensions of layers and regions may be exaggerated in the accompanying drawings for clarity. Furthermore, it is understood that when an element or layer is referred to as being "on" another element or layer, it can be directly on the other element, or there may be intermediate layers. Additionally, it is understood that when an element or layer is referred to as being "below" another element or layer, it can be directly below the other element, or there may be more than one intermediate layer or element. Furthermore, it is also understood that when a layer or element is referred to as being "between" two layers or two elements, it can be the only layer between the two layers or two elements, or there may be more than one intermediate layer or element. Similar reference numerals throughout indicate similar elements.
[0104] The terms “center,” “upper,” “lower,” “front,” “back,” “left,” “right,” “vertical,” “horizontal,” “top,” “bottom,” “inner,” and “outer,” etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.
[0105] The terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, unless otherwise stated, "a plurality of" means two or more.
[0106] Other embodiments of this application will readily occur to those skilled in the art upon consideration of the specification and practice of the disclosure herein. This application is intended to cover any variations, uses, or adaptations of this application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this application are indicated by the claims.
[0107] It should be understood that this application is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this application is limited only by the appended claims.
Claims
1. A bidirectional HEMT device, characterized by, include: Substrate; A channel layer is located on one side of the substrate; A barrier layer is located on the side of the channel layer away from the barrier layer; A first electrode, a second electrode, and a first gate are located on the side of the barrier layer away from the channel layer; the first gate is located between the first electrode and the second electrode; the bidirectional HEMT device has a forward operating mode and a reverse operating mode. In the forward operating mode, the potential of the first electrode is lower than the potential of the second electrode, and the first electrode is the source and the second electrode is the drain; in the reverse operating mode, the potential of the first electrode is higher than the potential of the second electrode, and the first electrode is the drain and the second electrode is the source. A field plate is located on the same side of the barrier layer as the first electrode, the second electrode, and the first gate, and the field plate is located between the first electrode and the second electrode. A potential management circuit is connected to the first electrode, the second electrode, and the field plate. The potential management circuit is configured to connect the first electrode and the second electrode, which are at a lower potential, to the field plate.
2. The bidirectional HEMT device according to claim 1, characterized in that, The field plate is located on the side of the first gate away from the barrier layer, and the orthographic projection of the field plate on the substrate overlaps with the orthographic projection of the first gate on the substrate; in the direction from the first electrode to the second electrode, the orthographic projection of the field plate on the substrate is spaced apart from the orthographic projections of the first electrode and the second electrode on the substrate.
3. The bidirectional HEMT device according to claim 1, characterized in that, The field plate includes a first field plate and a second field plate. The first field plate is located between the first gate and the first electrode, and the second field plate is located between the first gate and the second electrode. The first field plate and the second field plate are spaced apart, and both the first field plate and the second field plate are connected to the potential management circuit.
4. The bidirectional HEMT device according to claim 3, characterized in that, At least a portion of the orthographic projection of the first gate onto the substrate does not overlap with the orthographic projections of the first field plate onto the substrate or the second field plate onto the substrate.
5. The bidirectional HEMT device according to claim 4, characterized in that, The orthographic projection of the first gate on the substrate does not overlap with the orthographic projections of the first field plate and the second field plate on the substrate.
6. The bidirectional HEMT device according to any one of claims 1 to 5, characterized in that, The bidirectional HEMT device has a control node, a first power / load node, a second power / load node, and a reference potential node. The first electrode of the bidirectional HEMT device is connected to the first power / load node, the second electrode is connected to the second power / load node, and the first gate is connected to the control node. The potential management circuit includes: The first potential stabilizing element includes a first conductive terminal, a second conductive terminal, and a control terminal. The first conductive terminal of the first potential stabilizing element is connected to the first power / load node, the second conductive terminal is connected to the field plate, and the control terminal is connected to the control node. A second potential stabilizing element is connected to the reference potential node, which is connected to the field plate. When a high-level voltage is applied to the control node, the resistance of the first potential stabilizing element is less than the resistance of the second potential stabilizing element, such that the potential of the field plate is substantially equal to the lower of the potentials of the first power / load node and the second power / load node. When a low-level voltage is applied to the control node, the resistance of the first potential stabilizing element is greater than the resistance of the second potential stabilizing element, such that the potential of the field plate is substantially equal to the ground potential.
7. The bidirectional HEMT device according to claim 6, characterized in that, The potential management circuit also includes: The third potential stabilizing element includes a third conductive terminal, a fourth conductive terminal, and a second control terminal. The third conductive terminal is connected to the second power / load node, the fourth conductive terminal is connected to the field plate, and the second control terminal is connected to the control node. When a high-level voltage is applied to the control node, the resistances of the first and second potential stabilizing elements are both less than the resistance of the third potential stabilizing element, such that the potential of the field plate is substantially equal to the lower of the potentials of the first power / load node and the second power / load node; when a low-level voltage is applied to the control node, the resistances of the first and second potential stabilizing elements are both greater than the resistance of the third potential stabilizing element, such that the potential of the field plate is substantially equal to the ground potential.
8. The bidirectional HEMT device according to claim 7, characterized in that, The first potential stabilizing element includes a first transistor, wherein the first conductive terminal, the second conductive terminal, and the control terminal are respectively the third electrode, the fourth electrode, and the second gate of the first transistor; The second potential stabilizing element includes a resistor, a diode, or a rectifier transistor; The third potential stabilizing element includes a second transistor, and the third conductive terminal, the fourth conductive terminal, and the second control terminal are respectively the fifth electrode, the sixth electrode, and the third gate of the second transistor.
9. The bidirectional HEMT device according to claim 8, characterized in that, The bidirectional HEMT device further includes a first passivation layer, a second passivation layer, and a metal layer located sequentially on the side of the first gate away from the substrate. The field plate is located between the first passivation layer and the second passivation layer. The potential management circuit further includes a first metal trace located within the metal layer. The first metal trace is connected to the fourth electrode of the first transistor, the sixth electrode of the second transistor, and the reference potential node. The bidirectional HEMT device also has a first through-hole, at least a portion of which penetrates the second passivation layer. The first through-hole is filled with a conductive material, and the field plate is connected to the first metal trace through the conductive material in the first through-hole.
10. The bidirectional HEMT device according to claim 8, characterized in that, The bidirectional HEMT device further includes a first passivation layer, a second passivation layer, and a metal layer located sequentially on the side of the first gate away from the substrate. The field plate is located between the first passivation layer and the second passivation layer. The potential management circuit further includes a first metal trace located in the metal layer. The first metal trace is connected to the fourth electrode of the first transistor, the sixth electrode of the second transistor, the reference potential node, and the substrate. The bidirectional HEMT device also has a second via that sequentially penetrates the first passivation layer, the barrier layer and the channel layer. The second via is filled with a conductive material, and the field plate is connected to the substrate through the conductive material in the second via.
11. The bidirectional HEMT device according to any one of claims 1 to 5, characterized in that, The bidirectional HEMT device has a control node, a first power / load node, and a second power / load node. The first electrode of the bidirectional HEMT device is connected to the first power / load node, the second electrode is connected to the second power / load node, and the first gate is connected to the control node. The potential management circuit includes: The first potential stabilizing element includes a first conductive terminal, a second conductive terminal, and a control terminal. The first conductive terminal of the first potential stabilizing element is connected to the first power / load node, the second conductive terminal is connected to the field plate, and the control terminal is connected to the control node. The second potential stabilizing element includes a third conductive terminal and a fourth conductive terminal, wherein the third conductive terminal is connected to the field plate and the fourth conductive terminal is connected to the control node; When a high-level voltage is applied to the control node, the resistance of the first potential stabilizing element is less than the resistance of the second potential stabilizing element, such that the potential of the field plate is substantially equal to the lower of the potentials of the first power / load node and the second power / load node.
12. The bidirectional HEMT device according to claim 11, characterized in that, The first potential stabilizing element includes a first transistor, wherein the first conductive terminal, the second conductive terminal, and the control terminal are respectively the third electrode, the fourth electrode, and the second gate of the first transistor; The second potential stabilizing element includes a diode having a positive terminal connected to the field plate and a negative terminal connected to the control node.
13. The bidirectional HEMT device according to claim 12, characterized in that, The diode is formed by a rectifier transistor having a third gate and a fifth electrode, both connected to the field plate to act as the positive terminal of the diode, and a sixth electrode connected to a control node to act as the negative terminal of the diode.
14. The bidirectional HEMT device according to claim 13, characterized in that, The bidirectional HEMT device further includes a first passivation layer, a second passivation layer, and a metal layer located sequentially on the side of the first gate away from the substrate. The field plate is located between the first passivation layer and the second passivation layer. The potential management circuit further includes a first metal trace located within the metal layer. The first metal trace is connected to the fourth electrode of the first transistor and the third gate of the rectifier transistor. The bidirectional HEMT device also has a first through-hole, at least a portion of which penetrates the second passivation layer. The first through-hole is filled with a conductive material, and the field plate is connected to the first metal trace through the conductive material in the first through-hole.
15. The bidirectional HEMT device according to claim 13, characterized in that, The bidirectional HEMT device further includes a first passivation layer, a second passivation layer, and a metal layer located sequentially on the side of the first gate away from the substrate. The field plate is located between the first passivation layer and the second passivation layer. The potential management circuit further includes a first metal trace located in the metal layer. The first metal trace is connected to the fourth electrode of the first transistor, the third gate of the rectifier transistor, and the substrate. The bidirectional HEMT device also has a second via that sequentially penetrates the second passivation layer, the barrier layer and the channel layer. The second via is filled with a conductive material, and the field plate is connected to the substrate through the conductive material in the second via.
16. An electronic device, characterized in that, Includes the bidirectional HEMT device as described in any one of claims 1 to 15.