Method for optimizing the filling and the breakdown voltage window of a graded concentration super junction product

Abstract

The application provides a method for optimizing the filling and breakdown voltage window of a graded concentration super junction product. The method comprises: growing a first doped epitaxial layer with a first concentration on a semiconductor substrate with a trench; etching by introducing an etching gas; and growing a second doped epitaxial layer with a second concentration. The concentrations of the two layers are different. The application introduces an etching process with edge enhancement characteristics in the concentration gradient switching gap, increases the opening at the top of the trench to expand the filling window, and solves the problem of early sealing. At the same time, by using the characteristic that the edge etching rate is greater than the center rate, the equivalent doping concentration of the edge region is specifically reduced, and the charge imbalance caused by the edge structure deviation is corrected. The application can effectively eliminate the epitaxial filling void, significantly optimize the breakdown voltage distribution of the wafer edge, greatly widen the breakdown voltage window of the super junction product, and improve the overall performance and manufacturing yield of the power device.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a method for optimizing the filling and breakdown voltage window of gradient concentration superjunction products. Background Technology

[0002] Power semiconductors are core components in power systems such as switching power supplies, smart cars, and smart grids. Superjunction (SJ) technology, with its lower power consumption, is highly compatible with the needs of current high-power fast charging power supplies, LED lighting power supplies, and other fields.

[0003] In the fabrication process of superjunction devices, deep trench etching and epitaxial filling are the core steps. The quality of the filling and the concentration matching of the PN junction are key reasons for ensuring the high breakdown voltage and low on-resistance of the superjunction product. In practical applications, to reduce the difficulty of trench etching and epitaxial filling, or to match the substrate concentration, doped epitaxial filling often employs a bottom-to-up gradient epitaxial filling process, typically involving two or more concentration gradients. For example... Figure 2 As shown, taking the filling of a P-type epitaxial layer (PEI) in the deep trench of an N-type epitaxial layer (N EPI) as an example, the doping concentration of the P-type epitaxial layer usually exhibits a gradient distribution with "dense" at the bottom and "light" at the top, generally containing two or more concentration gradients.

[0004] However, with the continuous improvement of superjunction product performance, the aspect ratio of the trenches has increased significantly, which poses two major challenges to existing gradient concentration epitaxial processes:

[0005] First, the high aspect ratio leads to "premature sealing" and void filling issues. During epitaxial growth, reactive gases deposit not only at the bottom of the trench but also on the sidewalls and at the top opening. Due to the large aspect ratio, reactive gases cannot fully reach the bottom of the trench, resulting in a faster growth rate at the top opening than at the bottom. This easily leads to "premature sealing" at the top of the trench, causing the trench to be sealed before it is fully filled, thus forming microscopic voids inside the superjunction pillar. These voids severely degrade device reliability and result in a significantly insufficient process window for epitaxial filling.

[0006] Second, the "charge imbalance" caused by wafer edge trench size deviation and the resulting drop in edge breakdown voltage (BV) is a significant issue. The high breakdown voltage of superjunction devices heavily relies on precise charge matching between the P-pillars (epitaxy fill layer) and N-pillars (substrate mesa). However, in actual production, due to the influence of front-end deep trench etching processes (such as uneven plasma distribution and micro-loading effects), the critical trench size (CD, i.e., trench opening width) in the wafer edge region is often larger. Under the same gradient epitaxial growth conditions, a wider trench in the edge region can accommodate a larger volume of P-type epitaxial material. This increase in volume directly leads to an excess of the total P-type charge in the edge region, resulting in an "overly concentrated" equivalent P-type epitaxial fill concentration, thus disrupting the original PN charge balance. This PN matching failure in the edge region causes the electric field to concentrate prematurely at the edge, leading to a significant drop in the breakdown voltage (BV) in the wafer edge region. This phenomenon of low edge BV severely limits the breakdown voltage window and yield of the entire wafer superjunction product.

[0007] Therefore, how to combine gradient concentration epitaxy to optimize the edge breakdown voltage window while ensuring filling quality has become an urgent technical problem to be solved in the manufacturing of superjunction devices. Summary of the Invention

[0008] This application aims to solve the technical problems of premature epitaxial sealing caused by the large depth-to-width ratio during the deep trench filling process of superjunction devices, and low edge breakdown voltage and limited breakdown voltage window caused by the size deviation of the wafer edge trench.

[0009] A method for optimizing the filling and breakdown voltage window of a gradient concentration superjunction product includes:

[0010] Step 1: Grow a first doped epitaxial layer on a semiconductor substrate with trenches, the first doped epitaxial layer having a first doping concentration;

[0011] Step 2: Etching the first doped epitaxial layer by introducing etching gas;

[0012] Step 3: Grow a second doped epitaxial layer on the etched first doped epitaxial layer. The second doped epitaxial layer has a second doping concentration.

[0013] The first doping concentration is different from the second doping concentration.

[0014] Preferably, in steps one and three, both the first doped epitaxial layer and the second doped epitaxial layer are P-type doped epitaxial layers.

[0015] Preferably, in steps one and three, both the first doped epitaxial layer and the second doped epitaxial layer are N-type doped epitaxial layers.

[0016] Preferably, in steps one and three, the first doping concentration is greater than the second doping concentration.

[0017] Preferably, in step two, the etching gas contains chlorine-containing gas.

[0018] Preferably, in step two, the chlorine-containing gas is selected from at least one of hydrogen chloride, chlorine, and dichlorosilane.

[0019] Preferably, in step two, a carrier gas is introduced simultaneously with the chlorine-containing gas.

[0020] Preferably, in step two, the carrier gas is selected from at least one of hydrogen, argon, helium, and nitrogen.

[0021] Preferably, in step two, the opening size at the top of the trench is increased by using etching gas to expand the filling window, and the etching rate of the etching gas at the edge region of the semiconductor substrate is greater than that at the center region to reduce the equivalent doping concentration at the edge region of the semiconductor substrate.

[0022] Preferably, in step two, the etching time is 5-60 seconds.

[0023] Preferably, in step two, the flow rate of the etching gas is 300-2000 sccm.

[0024] Preferably, after step three, the process further includes repeating step two and the growth step to form a gradient concentration structure with N concentration gradients, where N is an integer greater than or equal to 3.

[0025] As described above, the method for optimizing the filling and breakdown voltage window of gradient concentration superjunction products of the present invention has the following beneficial effects:

[0026] By introducing a micro-etching process with edge-enhancing properties during the switching stage of gradient concentration epitaxial growth, the problem of premature sealing in high aspect ratio trench filling is effectively solved, significantly improving the filling quality. Simultaneously, by utilizing the physical property that the etching rate naturally increases at the wafer edge, excess doping caused by structural deviations in the edge region is precisely reduced, achieving consistent charge balance across the entire wafer and overcoming the defect of low breakdown voltage at the edges. This method, while ensuring high breakdown voltage and low on-resistance, widens the breakdown voltage window of the product, improving the production yield and performance reliability of power devices. Attached Figure Description

[0027] Figure 1 The diagram shows a flow chart of a method for optimizing the filling and breakdown voltage window of a gradient concentration superjunction product according to the present invention.

[0028] Figure 2The diagram shows a cross-sectional view of the concentration variation of the gradient epitaxial filler in the deep trench of the superjunction device of the present invention.

[0029] Figure 3 The graph shows the distribution of etching rates (ETCH RATE) in different regions of the wafer during the epitaxial etching process of this invention. Detailed Implementation

[0030] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0031] Please refer to Figure 1 , Figure 1 This document presents a process flow diagram illustrating a method for optimizing the filling and breakdown voltage window of a gradient concentration superjunction product according to an embodiment of the present invention. The invention will now be described in detail with reference to the accompanying drawings and specific embodiments.

[0032] A method for optimizing the filling and breakdown voltage window of a gradient concentration superjunction product includes the following steps:

[0033] Step 1: Grow a first doped epitaxial layer on a trench semiconductor substrate. The first doped epitaxial layer has a first doping concentration.

[0034] In some embodiments, in step one, the semiconductor substrate serves as the physical support for growing the first doped epitaxial layer. The semiconductor substrate may be a bulk silicon substrate, a single-crystal silicon wafer, or a silicon substrate with (100), (111), or (110) crystal orientations. Depending on the device's electrical requirements, the semiconductor substrate may also be a silicon-on-insulator substrate or a silicon-germanium alloy layer grown on the surface of a silicon substrate. For high-frequency or extremely high voltage withstand requirements, the semiconductor substrate may also use wide-bandgap semiconductor materials such as silicon carbide or gallium nitride, or a gallium nitride epitaxial layer grown on a silicon substrate. Regarding doping characteristics, the semiconductor substrate may be pre-doped with different types of impurities; for example, for N-type substrates, phosphorus, arsenic, antimony, or combinations thereof may be doped; for P-type substrates, boron, aluminum, gallium, indium, or combinations thereof may be doped. Furthermore, the semiconductor substrate may also contain various types of pre-formed electronic components, heavily doped buried layers, or doped well regions that have undergone ion implantation.

[0035] In some embodiments, in step one, the trench is formed as follows: First, a hard mask layer is formed on the upper surface of the semiconductor substrate by chemical vapor deposition or physical vapor deposition. The hard mask layer can be silicon dioxide, silicon nitride, silicon oxynitride, or a metal mask. Next, a trench pattern is defined using photolithography, followed by vertical downward etching of the semiconductor substrate in a high-density plasma environment using inductively coupled plasma etching or reactive ion etching. The etching process can employ Bosch processes or continuous etching processes, alternating the introduction of etching gases and passivation gases to obtain a high aspect ratio structure with flat sidewalls. After etching, residual polymer is removed by ashing and wet cleaning, and high-temperature hydrogen annealing can be used to eliminate etching stress and round the top corners of the trench.

[0036] In some embodiments, in step one, the first doped epitaxial layer is a P-type doped epitaxial layer. By filling a trench semiconductor substrate with P-type epitaxial material, a P-type conductive pillar required for a superjunction device can be constructed within an N-type substrate. The growth process can be vacuum chemical vapor deposition, in which a silicon source gas and a dopant gas are introduced into the reaction chamber. The silicon source gas may include trichlorosilane, dichlorosilane, silane, or ethoxysilane.

[0037] In some embodiments, in step one, the first doped epitaxial layer is an N-type doped epitaxial layer. This approach is suitable for constructing an N-type charge-balanced region on a P-type substrate, thereby enabling complementary superjunction logic design.

[0038] Step 2: Etching gas is introduced to etch the first doped epitaxial layer.

[0039] In some embodiments, the etching gas in step two is a chlorine-containing gas. By inserting this etching step during the gradual concentration switching stage, the microstructure of the trench opening and the wafer surface can be dynamically adjusted, effectively overcoming the sealing effect generated during the filling process of the heavily doped epitaxial layer.

[0040] In some embodiments, in step two, the chlorine-containing gas is selected from at least one of hydrogen chloride, chlorine, and dichlorosilane, preferably hydrogen chloride. At a certain process temperature, the chlorine free radicals separated from the chlorine-containing group react with silicon atoms on the surface of the first doped epitaxial layer to generate volatile silicon chloride-like substances, thereby achieving selective reduction of the epitaxial material.

[0041] In some embodiments, in step two, a carrier gas is introduced simultaneously with the chlorine-containing gas. The carrier gas is used to precisely adjust the partial pressure of the etching gas, ensuring that the etching reaction maintains good uniformity across the entire wafer surface and deep within the trenches.

[0042] In some embodiments, in step two, the carrier gas is selected from at least one of hydrogen, argon, helium, and nitrogen.

[0043] In some embodiments, in step two, the opening size at the top of the trench is increased by using etching gas to enlarge the filling window, and the etching rate of the etching gas at the edge region of the semiconductor substrate is greater than that at the center region, thereby reducing the equivalent doping concentration at the edge region of the semiconductor substrate. Specifically, as... Figure 3 As shown in the epitaxial etching rate distribution curve, the inventors discovered that when etching gas (such as chlorine-containing gas) is introduced into the reaction chamber, the etching rate in the wafer edge region exhibits significantly higher physical characteristics than that in the wafer center region due to the influence of hydrodynamics and temperature field distribution (i.e., the curve shows a distinct U-shaped rise at both ends). Addressing the phenomenon in actual production where the critical size of the trench in the wafer edge region is too large (leading to a larger volume of filled P-type epitaxial material and a higher equivalent concentration), this invention cleverly utilizes this edge-enhanced etching effect to perform micro-etching during the concentration gradient switching gap, enabling targeted removal of excessive doped material in the edge region. By reducing the total amount of epitaxial material in the edge region, it effectively compensates for the charge imbalance caused by deviations in the previous etching process, achieving consistency in charge balance between the edge and center regions. This concentration fine-tuning mechanism fundamentally solves the problem of low breakdown voltage in the wafer edge region, significantly widening the breakdown voltage window of superjunction products. In addition, this etching step cleans up excess material at the trench opening, ensuring that subsequent epitaxial deposition components can smoothly enter the deep trench, effectively preventing the formation of internal voids.

[0044] In some embodiments, the etching time in step two is 5-60 seconds. This short etching time (on the order of seconds) allows for precise correction of the epitaxial layer thickness and local doping levels without compromising lattice quality.

[0045] In some embodiments, in step two, the flow rate of the etching gas is 300-2000 sccm. This flow rate configuration can establish a stable etching gradient and, together with the pressure control of the reaction chamber, achieve efficient re-etching operations.

[0046] Step 3: Grow a second doped epitaxial layer on the etched first doped epitaxial layer. The second doped epitaxial layer has a second doping concentration. The first doping concentration is different from the second doping concentration.

[0047] In some embodiments, in step three, the second doped epitaxial layer is a P-type doped epitaxial layer. When the first doped epitaxial layer is P-type, the second doped epitaxial layer is also P-type doped to ensure the continuity of the electrical properties of the conductive pillars. The second doped epitaxial layer continues to grow in the open space after etching modification, which can better fit the surface of the first doped epitaxial layer and form a dense dislocation-free interface.

[0048] In some embodiments, in step three, the second doped epitaxial layer is an N-type doped epitaxial layer. When the first doped epitaxial layer is N-type, the second doped epitaxial layer is also N-type doped. By controlling the dopant flow rate, a gradient difference is formed between the second doping concentration and the first doping concentration, thereby effectively buffering the electric field concentration effect.

[0049] In some embodiments, in steps one and three, the first doping concentration is greater than the second doping concentration. This stepwise concentration arrangement from bottom to top, from dense to light, not only conforms to the vertical electrolysis optimization logic under device off-state, making the electric field distribution in the vertical direction flatter; but also, at the physical growth level, the lower concentration of the subsequent growth layer is more conducive to maintaining the openness of the trench opening, further improving the filling quality in conjunction with the previous etching steps.

[0050] In some embodiments, after step three, steps two and growth are repeated to form a gradient concentration structure with N concentration gradients, where N is an integer greater than or equal to 3. For trench structures with greater depth, multiple "growth-etching-growth" cycles, with an etching step inserted between each concentration switch, enable fine control of the doping concentration curve, ensuring dense filling at extremely high aspect ratios and further improving the surge current carrying capacity of the device.

[0051] In some embodiments, after the growth of all gradient concentration epitaxial layers is completed, a chemical mechanical planarization process can be performed to remove excess epitaxial material from the substrate surface, making the top surface of the filling material in the trench flush with the semiconductor substrate surface. Finally, a thermal annealing process can be performed to utilize the thermal diffusion effect to promote the smoothing of the distribution of doped atoms between each gradient layer, eliminate local electric field concentration caused by abrupt concentration changes, thereby constructing a superjunction structure with good charge balance and improving the overall performance of the power device.

[0052] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the drawings only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0053] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A method of optimizing the fill and breakdown voltage window of a graded concentration super junction product, comprising: At least including: ​ Step 1: Grow a first doped epitaxial layer on a semiconductor substrate with trenches, wherein the first doped epitaxial layer has a first doping concentration; Step 2: Etching gas is introduced to etch the first doped epitaxial layer. The etching gas increases the opening size at the top of the trench to enlarge the filling window. The etching gas also utilizes the characteristic that the etching rate of the edge region of the semiconductor substrate is greater than that of the center region to reduce the equivalent doping concentration of the edge region of the semiconductor substrate. Step 3: Grow a second doped epitaxial layer on the etched first doped epitaxial layer, the second doped epitaxial layer having a second doping concentration; The first doping concentration is different from the second doping concentration.

2. The method for optimizing the filling and breakdown voltage window of gradient concentration superjunction products according to claim 1, characterized in that: In steps one and three, both the first doped epitaxial layer and the second doped epitaxial layer are P-type doped epitaxial layers.

3. The method for optimizing the filling and breakdown voltage window of gradient concentration superjunction products according to claim 1, characterized in that: In steps one and three, both the first doped epitaxial layer and the second doped epitaxial layer are N-type doped epitaxial layers.

4. The method for optimizing the filling and breakdown voltage window of gradient concentration superjunction products according to claim 1, characterized in that: In steps one and three, the first doping concentration is greater than the second doping concentration.

5. The method for optimizing the filling and breakdown voltage window of gradient concentration superjunction products according to claim 1, characterized in that: In step two, the etching gas contains chlorine-containing gas.

6. The method for optimizing the filling and breakdown voltage window of gradient concentration superjunction products according to claim 5, characterized in that: In step two, the chlorine-containing gas is selected from at least one of hydrogen chloride, chlorine, and dichlorosilane.

7. The method for optimizing the filling and breakdown voltage window of gradient concentration superjunction products according to claim 5, characterized in that: In step two, a carrier gas is introduced simultaneously with the chlorine-containing gas.

8. The method for optimizing the filling and breakdown voltage window of gradient concentration superjunction products according to claim 7, characterized in that: In step two, the carrier gas is selected from at least one of hydrogen, argon, helium, and nitrogen.

9. The method for optimizing the filling and breakdown voltage window of gradient concentration superjunction products according to claim 1, characterized in that: In step two, the etching time is 5-60 seconds.

10. The method for optimizing the filling and breakdown voltage window of gradient concentration superjunction products according to claim 1, characterized in that: In step two, the flow rate of the etching gas is 300-2000 sccm.

11. The method for optimizing the filling and breakdown voltage window of gradient concentration superjunction products according to claim 1, characterized in that: Following step three, the process further includes repeating step two and the growth step to form a gradient concentration structure with N concentration gradients, where N is an integer greater than or equal to 3.

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