A method for manufacturing a semiconductor device

Abstract

This disclosure provides a method for fabricating a semiconductor device, comprising: forming a substrate, the substrate including a first region and a second region, wherein the second region separates the first region, and one region is doped with a first dopant of a first conductivity type, a second dopant of a second conductivity type, and a barrier dopant, wherein the doping concentration difference between the first and second dopants is less than 1e15 / cm. 3 Another region contains intrinsic material or is doped with a third dopant, the third dopant being either the first or second dopant, and the third doping concentration of the third dopant is less than 5% of the first or second doping concentration; and diffusion, allowing unimpeded dopant to diffuse from the high-concentration region to the low-concentration region. In the semiconductor device fabrication method disclosed herein, the concentration difference between the first and second dopant throughout the substrate is less than 1e15 / cm². 3 By utilizing the diffusion of dopants, the charges in the first and second regions increase or decrease simultaneously, thereby achieving charge balance between the two regions.

Description

Technical Field

[0001] This disclosure relates to the field of methods for fabricating semiconductor devices, and more particularly to a method for fabricating trench-type superjunction structures. Background Technology

[0002] Transistors with superjunctions are advanced semiconductor power devices that enable lower power consumption and higher efficiency in high-voltage applications.

[0003] A superjunction transistor is a vertical transistor that differs from a conventional transistor in that its body region includes multiple pillar-like structures with opposite electrical polarities, forming a PN junction to achieve high breakdown voltage and low on-resistance. Currently, these pillar-like structures are mainly formed in two ways: epitaxial growth and trench filling. For superjunction transistors, increasing the breakdown voltage becomes increasingly difficult as the pitch decreases and the doping concentration increases. Summary of the Invention

[0004] To address the aforementioned problems, this disclosure provides a method for fabricating a semiconductor device, comprising: forming a substrate including a first region and a second region, the second region separating the first region; doping one of the first and second regions with a first dopant having a first conductivity type, a second dopant having a second conductivity type, and a blocking dopant, the first dopant having a first doping concentration, the second dopant having a second doping concentration, and the concentration difference between the first and second dopant being less than 1e15 / cm². 3 The first region and the second region each contain an intrinsic material or a third dopant, which is either the first dopant or the second dopant, and has a third doping concentration less than 5% of the first or second doping concentration; and diffusion, allowing unimpeded dopant in the first or second region to diffuse from a region with a high doping concentration to a region with a low doping concentration. In the semiconductor device fabrication method disclosed herein, the concentration difference between the first and second dopant throughout the substrate is controlled at 1e15 / cm². 3 Within this range, the diffusion of dopant causes the charge in the first and second regions to increase or decrease simultaneously, achieving charge balance between the two regions. This charge balance helps to improve the breakdown voltage of the device.

[0005] This disclosure provides a method for fabricating a semiconductor device, comprising: forming a substrate including a first region and a second region, the second region separating the first region; the material of one of the first and second regions comprising a first dopant having a first conductivity type, a second dopant having a second conductivity type, and a barrier dopant, the first dopant having a first doping concentration, the second dopant having a second doping concentration, and the difference between the first and second doping concentrations being less than 1e15 / cm. 3 The hindering dopant is used to hinder the diffusion of one of the first dopant and the second dopant, the material of the other region contains intrinsic material or a third dopant, the third dopant being one of the first dopant or the second dopant, the third dopant having a third doping concentration less than 5% of the first doping concentration or the second doping concentration; and diffusion is carried out so that the unhindered dopant in the first region or the second region diffuses from the region with a high doping concentration to the region with a low doping concentration.

[0006] In some embodiments, the substrate formation process includes: A substrate is provided, the substrate material being an N-type doped semiconductor material or a P-type doped semiconductor material, for epitaxial growth; a first material layer is epitaxially grown on the substrate, the first material layer being divided into a first region and a second region, the second region separating the first region; the first material layer is doped with a first dopant, a second dopant, and a barrier dopant; the first material layer corresponding to the second region is etched to form a first trench; a second material layer is completely filled in the trench, the second material layer being an intrinsic material or doped with a third dopant.

[0007] In some embodiments, the substrate formation process further includes: A substrate is provided, the substrate material being an N-type doped semiconductor material or a P-type doped semiconductor material, for epitaxial growth; a third material layer is epitaxially grown on the substrate, the third material layer being divided into a first region and a second region, the second region separating the first region; the third material layer is an intrinsic material or doped with a third dopant; the third material layer corresponding to the second region is etched to form a second trench; a fourth material layer is completely filled in the trench, the fourth material layer being doped with a first dopant, a second dopant, and a barrier dopant.

[0008] In some embodiments, the difference between the first doping concentration and the second doping concentration is less than 1e15 / cm². 3 Concentration range: 1e16 / cm 3 ~3e17 / cm 3 The third doping concentration is less than 5% of the first or second doping concentration. The doping concentration of the hindering dopant is between 5e19 / cm.3 ~2e20 / cm 3 between.

[0009] In some embodiments, the first dopant may be As or Sb; the second dopant may be B; and the blocking dopant may be C or F.

[0010] In some embodiments, the diffusion is carried out through a furnace tube at a temperature of 1150°C-1200°C for a time of 120-300 minutes.

[0011] Another method for fabricating a semiconductor device disclosed herein includes: forming a substrate comprising a first region and a second region, the second region separating the first region; the material of one of the first and second regions comprising a first dopant having a first conductivity type and a second dopant having a second conductivity type, the first dopant having a first doping concentration and the second dopant having a second doping concentration, the difference between the first doping concentration and the second doping concentration being less than 1e15 / cm 3 The first region and the second region each contain an intrinsic material or a third dopant, the third dopant being one of the first dopant or the second dopant, the third dopant having a third doping concentration less than 5% of the first doping concentration or the second doping concentration; the first region further includes a first sub-region and a third sub-region adjacent to the second region, the materials of the first sub-region and the third sub-region containing a barrier dopant, the barrier dopant being used to block the diffusion of one of the first dopant and the second dopant; and to allow diffusion, such that unblocked dopant in the first region or the second region diffuses from the region with a high concentration to the region with a low concentration.

[0012] In some embodiments, the substrate formation process includes: A substrate is provided, the substrate material being an N-type doped semiconductor material or a P-type doped semiconductor material, for epitaxial growth. A fifth material layer is epitaxially grown on the substrate, the fifth material layer being divided into a first region, a second region, a first sub-region, and a third sub-region. The second region separates the first region, and the first region is further divided into a first sub-region and a third sub-region on both sides. The fifth material layer is doped with a first dopant and a second dopant, the first dopant having a first doping concentration and the second dopant having a second doping concentration, the difference between the first doping concentration and the second doping concentration being less than 1e15 / cm. 3The fifth material layer corresponding to the second region, the first sub-region, and the third sub-region is etched to form a third trench; a seventh material layer is grown at the corresponding positions of the first sub-region and the third sub-region, and the seventh material layer is doped with a barrier dopant; a sixth material layer is completely filled at the corresponding position of the second region, and the sixth material layer is an intrinsic material or doped with a third dopant, the third dopant being one of the first dopant or the second dopant, the third dopant having a third doping concentration, and the third doping concentration being less than 5% of the first doping concentration or the second doping concentration.

[0013] In some embodiments, the substrate formation process further includes: A substrate is provided, the substrate material being an N-type doped semiconductor material or a P-type doped semiconductor material, for epitaxial growth. An eighth material layer is epitaxially grown on the substrate, the eighth material layer being divided into a first region, a second region, a first sub-region, and a third sub-region. The second region separates the first region, and there are also first and third sub-regions on both sides of the first region. The eighth material layer is doped with a first dopant, the eighth material layer being either an intrinsic material or doped with a third dopant, the third dopant being one of the first dopant or the second dopant, the third dopant having a third doping concentration less than 5% of the first or second doping concentration. The eighth material layer corresponding to the second region, the first sub-region, and the third sub-region is etched to form a fourth trench. A tenth material layer is grown at the corresponding positions of the first and third sub-regions, the tenth material layer being doped with a barrier dopant. A ninth material layer is completely filled at the corresponding position of the second region, the ninth material layer being doped with a first dopant and a second dopant, the first dopant having a first doping concentration and the second dopant having a second doping concentration, the difference between the first doping concentration and the second doping concentration being less than 1e15 / cm. 3 .

[0014] In some embodiments, the thickness of the first sub-region and the third sub-region is 80 nm to 120 nm.

[0015] In some embodiments, the difference between the first doping concentration and the second doping concentration is less than 1e15 / cm². 3 Concentration range: 1e16 / cm 3 ~3e17 / cm 3 The third doping concentration is less than 5% of the first or second doping concentration. The doping concentration of the hindering dopant is between 5e19 / cm. 3 ~2e20 / cm 3 between.

[0016] In some embodiments, the first dopant may be As or Sb; the second dopant may be B; and the blocking dopant may be C or F.

[0017] In some embodiments, the diffusion is carried out through a furnace tube at a temperature of 1150°C-1200°C for a time of 120-300 minutes.

[0018] According to the embodiments provided in this disclosure, the dopants in the first region and the second region increase or decrease simultaneously during the diffusion process, so that the first region and the second region acquire equal amounts of charge but opposite charge properties, thereby achieving charge balance between the first region and the second region.

[0019] To more clearly illustrate the technical solution of this disclosure, the disclosure will be further described below in conjunction with the accompanying drawings. Attached Figure Description

[0020] Figure 1 This is a schematic flowchart of a method for manufacturing a semiconductor device disclosed herein.

[0021] Figures 2-6 This is a schematic cross-sectional view of an intermediate process in the fabrication method of a semiconductor device disclosed herein.

[0022] Figures 7-11 This is a schematic cross-sectional view of an intermediate process in the fabrication method of a semiconductor device disclosed herein.

[0023] Figure 12 This is a schematic flowchart of another method for manufacturing a semiconductor device according to the present disclosure.

[0024] Figures 13-18 This is a schematic cross-sectional view of an intermediate process in another method for fabricating a semiconductor device according to the present disclosure.

[0025] Figures 19-24 This is a schematic cross-sectional view of an intermediate process in another method for fabricating a semiconductor device according to the present disclosure. Detailed Implementation

[0026] As mentioned earlier, superjunction transistors have alternating N-type and P-type columnar structures. When the columnar structures inside the device are electrically neutral, that is, when the positive and negative charges are balanced, the device can achieve the optimal balance between on-resistance and breakdown voltage.

[0027] The technical solutions of this disclosure will now be clearly and completely described with reference to the accompanying drawings. The described embodiments are only some, not all, of the embodiments of this disclosure. Based on the embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.

[0028] Figure 1 This is a schematic flowchart illustrating a method for fabricating a semiconductor device disclosed herein. Figure 1 As shown, this disclosure provides a method for fabricating a semiconductor device, which includes the following steps: 101. Provide a substrate, the substrate material being an N-type doped semiconductor material or a P-type doped semiconductor material, for epitaxial growth; 102. Epitaxially grow a first material layer on the substrate, the first material layer being divided into a first region and a second region, the second region separating the first region; 103. Etch the first material layer within the second region to form a trench; 104. Completely fill the trench with a second material layer, the first material layer and the second material layer being semiconductor materials with different doping concentrations; 105. Perform diffusion, diffusing the dopant from the region with high doping concentration to the region with low concentration.

[0029] The following is combined with Figures 2 to 6 A schematic diagram of the cross-section of the intermediate process, with detailed explanation. Figure 1 Each step in the described manufacturing method.

[0030] like Figure 2 As shown, a first material layer 202 is epitaxially grown on a substrate 201. The first material layer 202 divides a first region 21 and a second region 22, with the second region 22 separating the first region 21.

[0031] The first material layer 202 is doped with a first dopant 221 having a first conductivity type, a second dopant 222 having a second conductivity type, and a barrier dopant 223. The first dopant 221, the second dopant 222, and the barrier dopant 223 are incorporated during epitaxial growth. The barrier dopant 223 hinders the diffusion of the first dopant 221 or the second dopant 222.

[0032] Within the first material layer 202, the difference between the first doping concentration of the first dopant 221 and the doping concentration of the second dopant 222 is less than 1e15 / cm. 3 The dopant concentration ranges from 1e16 / cm². 3 ~3e17 / cm 3 The doping concentration of the barrier dopant 223 is between 5e19 / cm. 3 ~2e20 / cm 3 between.

[0033] like Figure 3 As shown, a first trench 203 is etched into the second region 22 of the first material layer 202.

[0034] like Figure 4As shown, a second material layer 204 is filled in the first trench 203. The second material layer 204 is an intrinsic material or a third dopant. The third dopant is one of the first dopant 221 or the second dopant 222. The third dopant has a third doping concentration, which is less than 5% of the first doping concentration or the second doping concentration.

[0035] In some embodiments, the first doping concentration of the first dopant 221 is 5e16 / cm. 3 The doping concentration of the second dopant 222 is 5e16 / cm. 3 The third dopant is the first dopant, with a concentration of 1e15 / cm. 3 Within. The doping of the hindering dopant 223 is 1e20 / cm. 3 .

[0036] like Figure 5 As shown, annealing is performed. Specifically, high temperatures are applied to the substrate 201, the first region 21, and the second region 22. Under these high-temperature conditions, the first dopant 221 or the second dopant 222, which is not hindered by the dopant 223, diffuses from the high-concentration region to the low-concentration region. The diffusion is carried out through a furnace tube at a temperature of 1150℃-1200℃ for a time of 120 minutes-300 minutes.

[0037] In some embodiments, the diffusion temperature is 1150°C and the diffusion time is 180 minutes.

[0038] like Figure 6 As shown, in this embodiment, the first dopant 221 diffuses from the first region 21 into the second region 22 without being hindered by the hindering dopant 223. The second region 22 receives the first dopant 221, thereby acquiring the first charge carried by the first dopant 221. Simultaneously, the first region 21 loses the first dopant 221, meaning the concentration of the second dopant 222 in the first region 21 exceeds the concentration of the first dopant 221, thereby acquiring the second charge carried by the second dopant 222. The final charge quantities in the first region 21 and the second region 22 are equal, but their charge properties are opposite, achieving charge balance.

[0039] In this embodiment, the first dopant 221 can be As or Sb; the second dopant 222 can be B; and the blocking dopant 223 can be C or F.

[0040] In the above embodiments, the first material layer 202 within the first region 21 is doped with a first dopant 221, a second dopant 222, and a blocking dopant 223. The first dopant 221 has a first doping concentration, and the second dopant 222 has a second doping concentration. The second material layer 204 within the second region 22 is an intrinsic material or doped with a third dopant, which has the third doping concentration. Both the first and second doping concentrations are greater than the third doping concentration.

[0041] According to the above embodiments, the materials in the first and second regions can be changed as follows, in combination with... Figures 7 to 11 As shown: A third material layer 302 is epitaxially grown within the first region 31. This third material layer 302 is either an intrinsic material or doped with a third dopant, and the third dopant has the third doping concentration. A fourth material layer 304 filled within the second region 32 is doped with a first dopant 321, a second dopant 322, and a barrier dopant 323. The first dopant 321 within the fourth material layer 304 has a first doping concentration, and the second dopant 322 has a second doping concentration. Both the first and second doping concentrations are greater than the third doping concentration. The fabrication process is similar to the above embodiment and will not be repeated here.

[0042] Figure 12 This is a schematic flowchart of another method for fabricating a semiconductor device disclosed herein, including the following steps: 401. Provide a substrate, the substrate material being an N-type doped semiconductor material or a P-type doped semiconductor material, for epitaxial growth; 402. Epitaxially grow a fifth material layer on the substrate, the fifth material layer being divided into a first region, a second region, a first sub-region, and a third sub-region, the second region separating the first region, and the first region having a first sub-region and a third sub-region on either side of the first region; 403. Etch the fifth material layer within the second region, the first sub-region, and the third sub-region to form trenches; 404. Grow a seventh material layer within the first sub-region and the third sub-region; 405. Completely fill the second region with a sixth material layer, the fifth material layer and the sixth material layer being semiconductor materials with different doping concentrations; 406. Perform diffusion, diffusing the dopant from the region with a high doping concentration to the region with a low concentration.

[0043] The following is combined with Figures 13 to 18 A schematic diagram of the cross-section of the intermediate process, with detailed explanation. Figure 12 Each step in the described manufacturing method.

[0044] like Figure 13As shown, a fifth material layer 502 is epitaxially grown on a substrate 501. The fifth material layer 502 is divided into a first region 51, a second region 52, a first sub-region 511, and a third sub-region 512. The second region 52 separates the first region 51, and there are also a first sub-region 511 and a third sub-region 512 on both sides of the first region 51.

[0045] The fifth material layer 502 is doped with a first dopant 521 having a first conductivity type and a second dopant 522 having a second conductivity type. The first dopant 521 and the second dopant 522 are incorporated during the epitaxial growth process.

[0046] Within the fifth material layer 502, the difference between the first doping concentration of the first dopant 521 and the doping concentration of the second dopant 522 is less than 1e15 / cm. 3 The dopant concentration ranges from 1e16 / cm². 3 ~3e17 / cm 3 between.

[0047] like Figure 14 As shown, a third trench 503 is etched at the corresponding positions of the second region 52, the first sub-region 511 and the third sub-region 512 of the fifth material layer 502.

[0048] like Figure 15 As shown, a seventh material layer 504, doped with barrier dopant 223, is grown at corresponding positions in the first sub-region 511 and the third sub-region 512. The doping concentration of the barrier dopant 223 is 5e19 / cm². 3 ~2e20 / cm 3 between.

[0049] The thickness of the seventh material layer 504 is 80-120 nanometers, and the seventh material layer 504 does not completely fill the third trench 503.

[0050] like Figure 16 As shown, the sixth material layer 505 is completely filled at the corresponding position of the second region 52. The sixth material layer 505 is an intrinsic material or a third dopant 523. The third dopant 523 is one of the first dopant 521 or the second dopant 522. The third dopant has a third doping concentration, which is less than 5% of the first doping concentration or the second doping concentration.

[0051] In some embodiments, the first doping concentration of the first dopant 521 is 5e16 / cm. 3 The doping concentration of the second dopant 522 is 5e16 / cm. 3The third dopant is the first dopant, with a concentration less than 1e15 / cm³. 3 The doping of the hindering dopant 523 is 1e20 / cm. 3 .

[0052] like Figure 17 As shown, annealing is performed. Specifically, high temperatures are applied to the substrate 501, the first region 51, the second region 52, the first sub-region 511, and the third sub-region 512. Under these high-temperature conditions, the first dopant 521 or the second dopant 522, which is not hindered by the hindering dopant 523, diffuses from the high-concentration region to the low-concentration region. The diffusion is carried out through a furnace tube at a temperature of 1150℃-1200℃ for a time of 120-300 minutes.

[0053] In some embodiments, the diffusion temperature is 1150°C and the diffusion time is 180 minutes.

[0054] like Figure 18 As shown, in this embodiment, the first dopant 521 diffuses from the first region 51 into the second region 52 without being hindered by the hindering dopant 523. The second region 52 receives the first dopant 521, thereby acquiring the first charge carried by the first dopant 521. Simultaneously, the first region 51 loses the first dopant 521, meaning the concentration of the second dopant 522 in the first region 51 exceeds the concentration of the first dopant 521, thereby acquiring the second charge carried by the second dopant 522. The first region 51 and the second region 52 ultimately achieve charge balance with equal charge quantities and opposite charge properties.

[0055] In this embodiment, the first dopant 521 can be As or Sb; the second dopant 522 can be B; and the blocking dopant 523 can be C or F.

[0056] In the above embodiment, the fifth material layer 502 within the first region 51 is doped with a first dopant 521 and a second dopant 522, where the first dopant 521 has a first doping concentration and the second dopant 522 has a second doping concentration. The sixth material layer within the second region 52 is an intrinsic material or doped with a third dopant, where the third dopant has a third doping concentration. Both the first and second doping concentrations are greater than the third doping concentration.

[0057] According to the above embodiments, the materials in the first and second regions can be changed as follows, in combination with... Figures 19 to 24As shown: An eighth material layer 602 is epitaxially grown within the first region 61. This eighth material layer 602 is either intrinsic material or doped with a third dopant, which has the third doping concentration. A ninth material layer 605 filled within the second region 62 is doped with a first dopant 621 and a second dopant 622. The first dopant 621 in the ninth material layer 605 has a first doping concentration, and the second dopant 622 has a second doping concentration. Both the first and second doping concentrations are greater than the third doping concentration. The fabrication process is similar to the above embodiment and will not be repeated here.

[0058] According to the embodiments provided in this disclosure, the concentration difference between the first dopant and the second dopant is controlled at 1e15 / cm² throughout the substrate. 3 Within this region, the diffusion of the dopant causes the charge in the first and second regions to increase or decrease simultaneously, thus achieving charge balance between the two regions.

[0059] The various specific embodiments described above and shown in the accompanying drawings are for illustrative purposes only and do not represent the entirety of the invention. Any modifications made by those skilled in the art within the scope of the basic technical concept of this invention are within the protection scope of this invention.

Claims

1. A method for fabricating a semiconductor device, characterized in that, include: A substrate is formed, the substrate including a first region and a second region, the second region separating the first region; The material of one of the first and second regions contains a first dopant having a first charge, a second dopant having a second charge, and a barrier dopant. The first dopant has a first doping concentration, the second dopant has a second doping concentration, and the barrier dopant is used to hinder the diffusion of one of the first and second dopants. The material of the other region of the first and second regions contains an intrinsic material or a third dopant. The third dopant is one of the first and second dopants and has a third doping concentration that is lower than both the first and second doping concentrations. as well as Diffusion occurs, allowing unobstructed dopant in the first or second region to diffuse from the region with high doping concentration to the region with low doping concentration.

2. The method for fabricating a semiconductor device according to claim 1, characterized in that, The first dopant, the second dopant, and the barrier dopant are incorporated during the epitaxial process.

3. The method for fabricating a semiconductor device according to claim 2, characterized in that, The substrate formation includes: Provide a base; A first material layer is epitaxially grown on the substrate, and the first material layer is doped with the first dopant, the second dopant, and the barrier dopant. The first material layer corresponding to the second region is etched to form a first trench; The first trench is completely filled with a second material layer, which is doped with intrinsic material or the third dopant.

4. The method for manufacturing a semiconductor device according to claim 2, characterized in that, The substrate formation includes: Provide a base; A third material layer is epitaxially grown on the substrate, and the third material layer is doped with an intrinsic material or the third dopant. The third material layer corresponding to the second region portion is etched to form a second trench; The second trench is completely filled with a fourth material layer, which is doped with the first dopant, the second dopant, and the barrier dopant.

5. The method for fabricating a semiconductor device according to claim 3 or 4, characterized in that, The concentration ranges of the first doping concentration and the second doping concentration are 1e16 / cm². 3 ~3e17 / cm 3 The concentration difference between them is less than 1e15 / cm. 3 .

6. The method for fabricating a semiconductor device according to claim 3 or 4, characterized in that, The third doping concentration is less than 5% of the first doping concentration or the second doping concentration.

7. The method for fabricating a semiconductor device according to claim 3 or 4, characterized in that... The doping concentration of the barrier dopant is 5e19 / cm. 3 ~2e20 / cm 3 between.

8. The method for fabricating a semiconductor device according to claim 3 or 4, characterized in that, The first dopant can be As or Sb; the second dopant can be B; and the blocking dopant can be C or F.

9. The method for fabricating a semiconductor device according to claim 3 or 4, characterized in that, The diffusion is carried out through a furnace tube at a temperature of 1150℃-1200℃ for a time of 120-300 minutes.

10. A method for fabricating a semiconductor device, characterized in that, include: A substrate is formed, the substrate including a first region and a second region, the second region separating the first region; The material of one of the first and second regions contains a first dopant having a first conductivity type and a second dopant having a second conductivity type, the first dopant having a first doping concentration and the second dopant having a second doping concentration; the material of the other region of the first and second regions contains intrinsic material or a third dopant, the third dopant being one of the first and second dopant types, the third dopant having a third doping concentration lower than the first and second doping concentrations; the first region further includes a first sub-region and a third sub-region adjacent to the second region, the material of the first sub-region and the third sub-region containing a barrier dopant, the barrier dopant being used to hinder the diffusion of one of the first and second dopants; as well as Diffusion occurs, allowing unobstructed dopant in the first or second region to diffuse from regions of high concentration to regions of low concentration.

11. The method for fabricating a semiconductor device according to claim 10, characterized in that, The substrate formation includes: Provide a base; A fifth material layer is epitaxially grown on the substrate, and the fifth material layer is doped with the first dopant and the second dopant, wherein the first dopant has the first doping concentration and the second dopant has the second doping concentration; The fifth material layer corresponding to portions of the first sub-region, the second region, and the third sub-region is etched to form a third trench; A seventh material layer is epitaxially grown in the third trench corresponding to the first sub-region and the third sub-region, and the seventh material layer is doped with the barrier dopant. The remaining third trench is completely filled with a sixth material layer, which is doped with intrinsic material or the third dopant, and the third dopant has the third doping concentration.

12. The method for manufacturing a semiconductor device according to claim 10, characterized in that, The substrate formation includes: Provide a base; An eighth material layer is epitaxially grown on the substrate, and the eighth material layer is doped with an intrinsic material or the third dopant, wherein the third dopant has the third doping concentration. The eighth material layer corresponding to portions of the first sub-region, the second region, and the third sub-region is etched to form a fourth trench; A tenth material layer is epitaxially grown in the fourth trench, corresponding to the first sub-region and the third sub-region, and the tenth material layer is doped with the barrier dopant. The remaining fourth trench is completely filled with a ninth material layer, which is doped with the first dopant and the second dopant, the first dopant having the first doping concentration and the second dopant having the second doping concentration.

13. The method for fabricating a semiconductor device according to claim 11 or 12, characterized in that, The thickness of the first sub-region and the third sub-region is 80nm~120nm.

14. The method for fabricating a semiconductor device according to claim 11 or 12, characterized in that, The concentration ranges of the first doping concentration and the second doping concentration are 1e16 / cm². 3 ~3e17 / cm 3 The concentration difference between them is less than 1e15 / cm. 3 .

15. The method for fabricating a semiconductor device according to claim 11 or 12, characterized in that, The third doping concentration is less than 5% of the first doping concentration or the second doping concentration.

16. The method for fabricating a semiconductor device according to claim 11 or 12, characterized in that, The doping concentration of the barrier dopant is 5e19 / cm. 3 ~2e20 / cm 3 between.

17. The method for fabricating a semiconductor device according to claim 11 or 12, characterized in that, The first dopant can be As or Sb; the second dopant can be B; and the blocking dopant can be C or F.

18. The method for fabricating a semiconductor device according to claim 11 or 12, characterized in that, The diffusion is carried out through a furnace tube at a temperature of 1150℃-1200℃ for a time of 120-300 minutes.

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