A solar cell and a preparation method thereof, a photovoltaic module, and a photovoltaic system

Abstract

This application discloses a solar cell and its fabrication method, a photovoltaic module, and a photovoltaic system. The solar cell includes: a front side and a back side disposed opposite to each other; at least one side has N grooves, where N≥1, for accommodating a cutting path that divides the solar cell into sub-cells, and the width of the grooves is such that the cutting path falls completely within the groove's range; the depth of the grooves penetrates the PN junction but does not exceed the thickness of the silicon substrate; the surface of the grooves is covered with a first film layer, the ratio of the thickness of the first film layer to the depth of the grooves being 1:(40-350). This application constructs grooves on at least one side of the solar cell and forms a first film layer on the surface of the grooves. With the synergistic cooperation of the first film layer and the grooves, the crystalline silicon solar cell can effectively reduce mechanical damage and thermal impact during subsequent dicing and cutting, thereby minimizing cell efficiency loss.

Description

Technical Field

[0001] This application relates to the field of photovoltaic cell technology, and more specifically, to a solar cell and its preparation method, a photovoltaic module and a photovoltaic system. Background Technology

[0002] As the photovoltaic industry iterates towards larger sizes, thinner wafers, and higher efficiency, the slab-slicing process of solar cells, as a key step connecting cell manufacturing and module packaging, is a necessary means to reduce series resistance loss, improve hot spot effect, and adapt to large silicon wafer packaging. Its processing quality has a decisive impact on the output power and long-term reliability of the final module.

[0003] Currently, the mainstream wafer slicing technologies include laser slicing and laser scribing. The former directly ablates and cuts through the cell, but the cut location contains a PN junction, and the exposed section forms a strong recombination center. The latter uses a laser to form shallow grooves on the surface, inducing thermal stress separation. The groove location does not involve the PN junction, but thermal effects still exist, leading to silicon wafer lattice distortion, edge chipping, and microcrack formation. This not only reduces the mechanical strength of the cell but also forms carrier recombination centers, causing a decrease in conversion efficiency. Especially with the large-scale mass production of solar cells, the thickness of silicon wafers is gradually decreasing. The superposition effect of laser thermal damage and mechanical damage under the trend of thinner wafers is further amplified, increasing the risk of microcracks and cell breakage in modules.

[0004] In summary, the damage caused by laser cutting during the dicing process of solar cells is becoming increasingly prominent, posing a key bottleneck to cell yield and reliability. Therefore, reducing dicing losses and efficiency degradation is a pressing technical challenge that needs to be addressed. Summary of the Invention

[0005] This application provides a solar cell and its fabrication method, a photovoltaic module, and a photovoltaic system. The solar cell has N grooves on at least one side to accommodate the cutting path used to divide it into sub-cells. A first film of a specific thickness is covered on the surface of the grooves, forming a complete and uniform first film before dicing. This first film can repair edge defects in the dicing area, suppress carrier recombination, and improve cell performance; it can form an insulating barrier to prevent edge leakage; it can reinforce the cell, reduce the risk of crack propagation, and improve the reliability of the cell in subsequent processing and use; simultaneously, since the first film is prepared before dicing, the process flow is simplified, and production efficiency is improved. Therefore, with the synergistic effect of the first film and the grooves, the solar cell can effectively reduce mechanical damage and thermal impact during subsequent dicing, thereby minimizing cell efficiency loss.

[0006] In a first aspect, a solar cell is provided, the solar cell comprising: a front side and a back side disposed opposite to each other, at least one side having N grooves, wherein N≥1, for accommodating a cutting path for dividing the solar cell into sub-cells, and the width of the grooves such that the cutting path falls completely within the groove body; the depth of the grooves penetrates the PN junction but does not exceed the thickness of the silicon substrate.

[0007] The surface of the groove is covered with a first film layer, and the ratio of the thickness of the first film layer to the depth of the groove is 1:(40-350).

[0008] This application provides N grooves on at least one side of a solar cell to accommodate the cutting path used to divide the solar cell into sub-cells. A first film of a specific thickness is covered on the surface of the grooves, thus forming a complete and uniform first film before dicing. This first film can repair edge defects in the dicing area, suppress carrier recombination, and improve cell performance; it can form an insulating barrier to prevent edge leakage; it can also provide reinforcement, reducing the risk of crack propagation and improving the reliability of the cell in subsequent processing and use. Furthermore, since the first film is prepared before dicing, the process flow is simplified, and production efficiency is improved. Therefore, with the synergistic effect of the first film and the grooves, the solar cell can effectively reduce mechanical damage and thermal impact during subsequent dicing, thereby minimizing cell efficiency loss.

[0009] In this application, the ratio of the thickness of the first film layer to the depth of the groove is 1:(40-350), for example, it can be 1:40, 1:50, 1:100, 1:150, 1:200, 1:250, 1:300, 1:350 or 1:400, etc.

[0010] In some embodiments, the width of the groove is 400-700μm, for example, it can be 400μm, 450μm, 500μm, 550μm, 600μm, 650μm or 700μm.

[0011] In some embodiments, the depth of the groove is 0.5-20 μm, for example, it can be 0.5 μm, 1 μm, 2 μm, 5 μm, 10 μm, 15 μm or 20 μm.

[0012] In some embodiments, the aspect ratio of the groove is 0.08-2.1%, for example, it can be 0.08%, 0.1%, 0.5%, 1.0%, 1.5%, 2.0% or 2.1%, etc.

[0013] In some embodiments, the area near the groove wall on at least one side of the groove bottom is a first protrusion area, and the first protrusion area is provided with a plurality of first protrusions.

[0014] In some embodiments, the bottom of the groove is provided with a plurality of tower base structures, and at least some of the tower base structures are stacked on the bottom of the groove.

[0015] In some embodiments, the bottom of the groove is provided with a plurality of second protrusions.

[0016] In some embodiments, the ratio of the width of the first protruding region to the width of the groove bottom is 5.8-12.5%, for example, it can be 5.8%, 6.0%, 7.0%, 8.0%, 9.0%, 10.0%, 11.0%, 12.0% or 12.5%, etc.

[0017] In some embodiments, the width of the first protrusion region is 35-60 μm, for example, it can be 35 μm, 40 μm, 45 μm, 50 μm, 55 μm or 60 μm.

[0018] In some embodiments, the dispersion density of the first protrusions in the first protrusion region is 15-45 per μm. 2 For example, it could be 15 per μm 2 20 cells / μm 2 25 cells / μm 2 30 cells / μm 2 35 cells / μm 2 40 cells / μm 2 Or 45 per μm 2 wait.

[0019] In some embodiments, the linear length of the one-dimensional dimension of the first protrusion is 0.5-2.5 μm, for example, it can be 0.5 μm, 1.0 μm, 1.5 μm, 2.0 μm or 2.5 μm.

[0020] In some embodiments, the area of ​​the first protrusion with a linear length of 1-2 μm in the first protrusion region accounts for 5-60%, for example, it can be 5%, 10%, 20%, 30%, 40%, 50% or 60%, etc.

[0021] In some embodiments, the linear length of the one-dimensional dimension of the tower base structure is 1-5 μm, for example, it can be 1 μm, 2 μm, 3 μm, 4 μm or 5 μm, etc.

[0022] In some embodiments, the dispersion density of the second protrusion is 1-5 protrusions / μm. 2 For example, it could be 1 / μm 2 2 per μm 2 3 per μm 2 4 per μm 2 Or 5 / μm2 wait.

[0023] In some embodiments, the diameter of the second protrusion is 5-10 μm, for example, it can be 5 μm, 6 μm, 7 μm, 8 μm, 9 μm or 10 μm.

[0024] In some embodiments, at least one sidewall of the groove has at least a portion of a serrated structure, the serrated structure being a plurality of protrusions arranged along the length of the sidewall, the protrusions protruding from the sidewall into the groove.

[0025] In some embodiments, the groove walls have a pyramidal structure.

[0026] In some embodiments, the groove wall has a tower base structure.

[0027] In some embodiments, the groove wall has a ribbed structure.

[0028] In some embodiments, the groove wall has a sloping structure, and the inclination angle of the sloping surface in the sloping structure is 91°-160°, for example, it can be 91°, 100°, 110°, 120°, 130°, 140°, 150° or 160°, etc.

[0029] In some embodiments, the first film layer includes a passivation layer with a thickness of 3-5 nm, such as 3 nm, 4 nm, or 5 nm.

[0030] In some embodiments, the first film layer further includes an antireflection layer, the thickness of which is 60-120 nm, for example, 60 nm, 80 nm, 100 nm or 120 nm.

[0031] In some embodiments, the solar cell includes any one of TOPCon cells, HJT cells, PERC cells, or BC cells.

[0032] In a second aspect, a method for preparing a solar cell as described in the first aspect is provided, the method comprising the following steps: A silicon substrate having a front and a back side arranged opposite to each other is provided, and a PN junction is formed on the silicon substrate.

[0033] N grooves are formed on at least one surface of the silicon substrate, where N≥1. The grooves are used to accommodate the cutting path for subsequent cutting to form sub-cells, and the width of the grooves is such that the cutting path falls completely within the groove body. The depth of the grooves penetrates the PN junction but does not exceed the thickness of the silicon substrate.

[0034] A first film layer is applied to the surface of the groove.

[0035] In some embodiments, the groove is formed by laser scribing, and the process parameters of the laser scribing satisfy the following: The laser power is 15-40W, for example, it can be 15W, 20W, 25W, 30W, 35W or 40W, etc.; the laser speed is 10-40m / s, for example, it can be 10m / s, 15m / s, 20m / s, 25m / s, 30m / s, 35m / s or 40m / s, etc.; the laser frequency is 300-700kHz, for example, it can be 300kHz, 350kHz, 400kHz, 450kHz, 500kHz, 550kHz, 600kHz, 650kHz or 700kHz, etc.

[0036] In some embodiments, the solar cell is a TOPCon cell, and the preparation method further includes: An oxide layer is formed by oxidizing a silicon substrate.

[0037] A doped layer is deposited on the side of the oxide layer away from the silicon substrate.

[0038] In some embodiments, the oxide layer comprises a silicon dioxide layer.

[0039] In some embodiments, the thickness of the oxide layer is ≤10nm, for example, it can be 10nm, 8nm, 6nm, 4nm or 2nm, etc.

[0040] Thirdly, a photovoltaic module is provided, the photovoltaic module including a cell string layer, the cell string layer being formed by connecting at least two sub-cells sequentially through connectors.

[0041] The at least two sub-cells are formed by cutting the solar cells described in the first aspect.

[0042] Fourthly, a photovoltaic system is provided, the photovoltaic system comprising the photovoltaic modules as described in the third aspect. Attached Figure Description

[0043] Figure 1 This is a cross-sectional SEM image of the groove provided in this application, magnified 150 times; Figure 2 This is a partial top-view SEM image of the groove provided in this application, magnified 700 times; Figure 3 This is a partial top-view SEM image of the groove wall provided in this application, magnified 3000 times; Figure 4 This is a cross-sectional SEM image of the groove provided in this application, magnified 100 times; Figure 5This is a partial SEM image of the groove bottom provided in this application, magnified 8000 times.

[0044] Figure 6 This is a schematic diagram of the TOPCon battery provided in Embodiment 1 of this application.

[0045] Figure 7 This is a top view of the photovoltaic module provided in this application.

[0046] Figure 8 This is a three-dimensional schematic diagram of the photovoltaic module provided in this application.

[0047] Figure 9 This is a schematic diagram of the photovoltaic system provided in this application.

[0048] The accompanying drawings are not drawn to scale.

[0049] Figure label: 1-Silicon substrate; 2-Groove; 3-Boron-doped polycrystalline silicon layer; 4-Front-side passivation layer; 5-Front-side anti-reflection layer; 6-Oxide layer; 7-Phosphorus-doped polycrystalline silicon layer; 8-Back-side anti-reflection layer; 9-Front electrode; 10-Back electrode; 11-Front panel glass; 12-Front layer encapsulant; 13-Cell string layer; 14-Back layer encapsulant; 15-Back panel glass; 16-Frame; 17-Gathering box; 18-Photovoltaic system; 19-Photovoltaic module. Detailed Implementation

[0050] The descriptions of specific structures or functions implemented according to the concept of this application disclosed in this specification are merely illustrative examples for explaining embodiments based on the concept of this application. Those skilled in the art will understand that embodiments based on the concept of this application can have various variations and forms, and are not limited to the embodiments described in this specification, but also include various modifications, equivalents, or substitutions made within the scope of the purpose, concept, and technology of this application.

[0051] In the description of this application, it should be understood that the use of terms such as "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", and "circumferential" indicates the relative orientation or positional relationship between different components, and is only for the convenience of describing this application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0052] Although the terms "first" or "second" may be used to describe various components or components, the components or components should not be limited by the terms. The terms above are used only for the purpose of distinguishing one component or component from another. For example, without departing from the scope of the claims according to the concept of this application, a first battery cell may be referred to as a second battery cell, and similarly, a second battery cell may be referred to as a first battery cell.

[0053] In this application, unless otherwise expressly specified and limited, the terms "connected," "fixed," "set," etc., should be interpreted broadly. For example, when one component is said to "connect" another component, it should be understood that it can be directly or indirectly connected to the other component, meaning that other components may also be present in between. Similarly, the terms "fixed" and "set" should be interpreted broadly in a similar way. Furthermore, the term "connected" can refer to a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances. In this application, unless otherwise expressly specified and limited, the description of "above" or "below" the second feature can mean that the first and second features are in direct contact, or that the first and second features are in indirect contact through an intermediate medium. Moreover, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. The first feature being "below", "under", or "below" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0054] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, the specific embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0055] Research by our technical personnel has revealed that traditional laser scribing employs a high-energy ablation method, which generates a significant heat-affected zone due to the instantaneous high temperature. This leads to silicon wafer lattice distortion, edge chipping, and microcrack formation, not only reducing the mechanical strength of the battery but also creating carrier recombination centers, resulting in a decrease in conversion efficiency. Therefore, minimizing the losses during scribing and cutting, and thus reducing efficiency loss, is a pressing technical challenge that needs to be addressed.

[0056] Based on this, this application provides a solar cell comprising: a front side and a back side disposed opposite to each other, at least one side having N grooves, wherein N≥1, for accommodating a cutting path for dividing the solar cell into sub-cells, and the width of the grooves such that the cutting path falls completely within the groove body; the depth of the grooves penetrates the PN junction but does not exceed the thickness of the silicon substrate.

[0057] The surface of the groove is covered with a first film layer, and the ratio of the thickness of the first film layer to the depth of the groove is 1:(40-350).

[0058] This application provides N grooves on at least one side of a solar cell to accommodate the cutting path used to divide the solar cell into sub-cells. A first film of a specific thickness is covered on the surface of the grooves, forming a complete and uniform first film before dicing. This has the following functions: it forms an insulating barrier to prevent edge leakage; it reinforces the cell, reducing the risk of crack propagation and improving the reliability of the cell in subsequent processing and use; and since the first film is prepared before dicing, it simplifies the process and improves production efficiency. Therefore, through the synergistic effect of the first film and the grooves, the solar cell can effectively reduce mechanical damage and thermal impact during subsequent dicing, thereby minimizing cell efficiency loss.

[0059] If the grooves are not designed to work in conjunction with the first film layer, the laser scribing process used to form the grooves will generate heat-affected zones and microcracks at the edge of the battery. Directly dividing the battery into sub-cells will have the following adverse effects: 1) Defects become carrier recombination centers, leading to a decrease in open-circuit voltage and fill factor; 2) Leakage channels may appear at the edges due to lack of passivation, reducing battery efficiency; 3) Cracks are prone to propagation, reducing the mechanical strength of the battery; 4) The surface condition at the edges is uneven, and the passivation layer coverage may be incomplete, affecting the passivation effect; 5) Additional steps are required to repair edge defects or re-passivate, increasing process complexity and cost.

[0060] In this invention, "N≥1" means that the number of grooves can be one, two or more. For example, when the battery only needs to be cut once (e.g., divided into two sub-battery pieces), a groove can be set on a preset cutting path to accommodate the cutting path; when the battery needs to be cut multiple times (e.g., divided into three or more sub-battery pieces, such as three-piece pieces, four-piece pieces, etc.), multiple grooves can be set on the corresponding multiple cutting paths, with the grooves spaced apart and arranged in parallel, and each groove corresponding to a cutting path.

[0061] In this application, the ratio of the thickness of the first film layer to the depth of the groove is 1:(40-350), for example, it can be 1:40, 1:50, 1:100, 1:150, 1:200, 1:250, 1:300, 1:350 or 1:400, etc.

[0062] This application limits the ratio of the thickness of the first film layer to the depth of the groove to a suitable range. If the ratio is too large, the passivation layer (especially SiNx and AlOx) will have poor light absorption and thermal conductivity, making it easy for the laser to melt and accumulate, resulting in edge burrs and bulging at the bottom of the groove, which will increase the number of microcracks in the silicon layer. In addition, if the passivation layer is too thick, the stress during the cleaving process cannot be concentrated along the groove, resulting in stress on the entire piece, leading to edge chipping, jagged edges, and cleaving displacement. This can easily cause EL microcracks and hot spots after the cells are laminated into modules. If the ratio is too small, laser grooving will inevitably result in a heat-affected zone (HAZ), microcracks, and lattice damage, which cannot be covered by thin passivation. These defects become recombination centers, resulting in severe edge leakage, reduced minority carrier lifetime, and decreased efficiency. Therefore, a suitable ratio can achieve the effects of clean laser grooving, less residue, stress concentration during cleaving, straight and easy separation, effective passivation of damaged areas, and low leakage.

[0063] Figure 1 A cross-sectional SEM diagram of the groove provided in this application is shown. Figure 2 A partial top-view SEM image of the groove provided in this application is shown, with a magnification of 700x; Figure 3 A partial top-view SEM image of the groove wall provided in this application is shown, with a magnification of 3000x; Figure 4 A cross-sectional SEM image of the groove provided in this application is shown, at a magnification of 100x; Figure 5 A partial SEM image of the groove bottom provided in this application is shown, with a magnification of 8000x.

[0064] In some embodiments, the width of the groove is 400-700 μm, for example, it can be 400 μm, 450 μm, 500 μm, 550 μm, 600 μm, 650 μm, or 700 μm. It should be noted that the width of the groove must sufficiently accommodate the cutting path that divides the crystalline silicon solar cell into sub-cells to avoid cutting damage to the cell caused by dicing.

[0065] It should be noted that "groove width" refers to the opening width of the groove.

[0066] In some embodiments, the depth of the groove is 0.5-20 μm, for example, it can be 0.5 μm, 1 μm, 2 μm, 5 μm, 10 μm, 15 μm or 20 μm.

[0067] Based on the consideration that the depth of the groove penetrates the PN junction but does not exceed the thickness of the silicon substrate, this application limits the groove depth to 0.5-20μm. If the groove depth is too deep, it is easy to cause excessive damage to the silicon wafer substrate, resulting in a surge in edge microcracks or microcracks. These microcracks are easily diffused during subsequent cell lamination and thermal cycling, leading to fragmentation and power attenuation. If the groove depth is too shallow, it is easy to cause insufficient grooving, resulting in uneven stress during the wafer dicing process, which can easily produce chipped or jagged edges, thus forming stress concentration points and further inducing microcracks. A suitable groove depth can reduce the occurrence of microcracks.

[0068] In some embodiments, the aspect ratio of the groove is 0.08-2.1%, for example, it can be 0.08%, 0.1%, 0.5%, 1.0%, 1.5%, 2.0%, or 2.1%. It should be noted that the height in the aspect ratio refers to the depth of the groove.

[0069] This application specifies that the aspect ratio of the groove must meet the above requirements. If the aspect ratio of the groove is too high, the resulting groove will be a narrow groove like a "deep well," making it difficult for laser heat and plasma to escape, leading to overheating, remelting, bulging, and residue accumulation at the bottom of the groove, which in turn causes severe edge lattice damage and an increase in microcracks. If the aspect ratio of the groove is too low, the shallow groove will not sufficiently reduce mechanical strength, resulting in excessive force during cleaving, uneven cleaving, misalignment, and silicon bonding, thus reducing yield. It will also easily lead to stress dispersion and uneven stress at the wide groove edges, causing edge chipping during cleaving, which can easily reduce the yield of the solar cell. In addition, the larger perimeter of the groove edge can easily lead to insufficient passivation coverage, resulting in severe cell leakage. Therefore, a suitable aspect ratio allows laser heat to be easily discharged during the laser cleaving process of the solar cell, while also making the groove shape regular, the bottom smooth, and reducing the number of microcracks in the cell. In addition, it ensures that the passivation layer is evenly and flatly covered in the groove, reducing the probability of cell leakage.

[0070] In some embodiments, at least one side of the groove bottom near the groove wall is a first raised region, and the first raised region is provided with a plurality of first raised protrusions. The presence of the first raised region helps to increase the roughness of the groove bottom, promotes the coverage of the passivation layer, and also promotes the light-trapping effect at this location.

[0071] It should be noted that the first protruding area can be a pyramid area, and the first protrusion can be a pyramid-shaped protrusion. "Several" refers to at least one pyramid protrusion, usually multiple, including but not limited to two, three, four, five, ten, dozens or more pyramid protrusions. The same applies below.

[0072] In some embodiments, the bottom of the groove has a plurality of tower base structures dispersed therefrom, and at least some of the tower base structures are stacked on the bottom of the groove. The presence of the tower base structures increases the roughness of the groove bottom, promotes the coverage of the passivation layer, and results in a more uniform passivation layer coverage while having better light absorption.

[0073] It should be noted that "tower base structure" refers to a polygonal structure that is recessed into the silicon substrate.

[0074] In some embodiments, the bottom of the groove is provided with a plurality of second protrusions. It should be noted that the second protrusions are hemispherical protrusions.

[0075] In some embodiments, the ratio of the width of the first protruding region to the width of the groove bottom is 5.8-12.5%, for example, it can be 5.8%, 6.0%, 7.0%, 8.0%, 9.0%, 10.0%, 11.0%, 12.0% or 12.5%, etc.

[0076] This application specifies that the ratio of the width of the first protrusion area to the width of the groove bottom meets the above requirements, ensuring that the passivation layer avoids local accumulation during the application process, or avoids excessively small groove bottom roughness that reduces light trapping effect.

[0077] In some embodiments, the width of the first protrusion region is 35-60 μm, for example, it can be 35 μm, 40 μm, 45 μm, 50 μm, 55 μm or 60 μm.

[0078] In some embodiments, the dispersion density of the first protrusions in the first protrusion region is 15-45 per μm. 2 For example, it could be 15 per μm 2 20 cells / μm 2 25 cells / μm 2 30 cells / μm 2 35 cells / μm 2 40 cells / μm 2 Or 45 per μm 2 wait.

[0079] Dispersion density refers to the number of protrusions per square micrometer per unit area. The method for calculating dispersion density is as follows: take 1μm×1μm areas at different locations within the unit area, calculate the number of protrusions in each 1μm×1μm area, and take the average value, which is the distribution density of the protrusions.

[0080] In some embodiments, the linear length of the one-dimensional dimension of the first protrusion is 0.5-2.5 μm, for example, it can be 0.5 μm, 1.0 μm, 1.5 μm, 2.0 μm or 2.5 μm.

[0081] It should be noted that "the linear length of the one-dimensional dimension of the first protrusion" refers to the maximum dimension of a single first protrusion projected onto the silicon substrate plane in one-dimensional linear length.

[0082] In some embodiments, the area ratio of the first protrusion with a size of 1-2 μm in the first protrusion region is 5-60%, for example, it can be 5%, 10%, 20%, 30%, 40%, 50%, or 60%. The first protrusion satisfying the above area ratio has a more uniform roughness at the bottom of the groove, thereby making the passivation layer coverage more uniform.

[0083] In some embodiments, the linear length of the one-dimensional dimension of the tower base structure is 1-5 μm, for example, it can be 1 μm, 2 μm, 3 μm, 4 μm or 5 μm, etc.

[0084] It should be noted that the linear length of the one-dimensional dimension here refers to the maximum dimension of a single tower base structure projected onto the silicon substrate plane in one-dimensional linear length.

[0085] In some embodiments, the dispersion density of the second protrusion is 1-5 protrusions / μm. 2 For example, it could be 1 / μm 2 2 per μm 2 3 per μm 2 4 per μm 2 Or 5 / μm 2 Etc. Dispersion density refers to the number of protrusions per square micrometer per unit area. The method for calculating dispersion density is as follows: take 1μm×1μm areas at different locations within the unit area, calculate the number of protrusions in each 1μm×1μm area, and take the average value, which is the distribution density of the protrusions.

[0086] In some embodiments, the diameter of the second protrusion is 5-10 μm, for example, it can be 5 μm, 6 μm, 7 μm, 8 μm, 9 μm or 10 μm.

[0087] In some embodiments, at least one sidewall of the groove has at least a portion of a serrated structure, the serrated structure being a plurality of protrusions arranged along the length of the sidewall, the protrusions protruding from the sidewall into the groove.

[0088] In some embodiments, the length of the protruding serrations in the serrated structure is 7-12 μm, for example, it can be 7 μm, 8 μm, 9 μm, 10 μm, 11 μm or 12 μm.

[0089] In some embodiments, the groove walls have a pyramidal structure.

[0090] In some embodiments, the groove wall has a tower base structure.

[0091] In some embodiments, the groove wall has a ribbed structure. It should be noted that "ribbed structure" refers to strip-shaped protrusions arranged along the height direction of the groove wall.

[0092] In the groove designed in this application, the groove wall has at least one of the above structures, which helps to increase the roughness of the groove wall, thereby helping to cover the passivation layer and preventing the passivation layer from accumulating at the bottom of the groove, causing uneven passivation layer coverage.

[0093] In some embodiments, the groove wall has a sloping structure, and the inclination angle of the sloping surface in the sloping structure is 91°-160°, for example, it can be 91°, 100°, 110°, 120°, 130°, 140°, 150° or 160°, etc.

[0094] It should be noted that "inclination angle" refers to the angle between the slope surface and the horizontal plane where the bottom of the groove is located.

[0095] In some embodiments, the first film layer includes a passivation layer with a thickness of 3-5 nm, such as 3 nm, 4 nm, or 5 nm. For example, it may be an aluminum oxide layer.

[0096] In some embodiments, the first film layer further includes an antireflection layer with a thickness of 60-120 nm, such as 60 nm, 80 nm, 100 nm, or 120 nm. For example, it may be at least one of a silicon nitride layer and a silicon oxynitride layer.

[0097] In some embodiments, the solar cell includes any one of TOPCon cells, HJT cells, PERC cells, or BC cells.

[0098] This application also provides a method for preparing a solar cell as described above, the method comprising the following steps: A silicon substrate having a front and a back side arranged opposite to each other is provided, and a PN junction is formed on the silicon substrate.

[0099] N grooves are formed on at least one surface of the silicon substrate, where N≥1. The grooves are used to accommodate the cutting path for subsequent cutting to form sub-cells, and the width of the grooves is such that the cutting path falls completely within the groove body. The depth of the grooves penetrates the PN junction but does not exceed the thickness of the silicon substrate.

[0100] A first film layer is applied to the surface of the groove.

[0101] The present invention forms N grooves on at least one surface of a silicon substrate, with the remaining processes unchanged. Then, a first film layer is formed on the surface of the grooves using normal processes to repair the groove damage, reduce carrier recombination, and improve the photoelectric conversion efficiency of the battery. Moreover, it does not require the use of special gases, does not require additional equipment, and has extremely low investment costs.

[0102] In some embodiments, the groove is formed by laser scribing, and the laser scribing process parameters satisfy the following: the laser power is 15-40W, for example, 15W, 20W, 25W, 30W, 35W or 40W; the laser speed is 10-40m / s, for example, 10m / s, 15m / s, 20m / s, 25m / s, 30m / s, 35m / s or 40m / s; the laser frequency is 300-700kHz, for example, 300kHz, 350kHz, 400kHz, 450kHz, 500kHz, 550kHz, 600kHz, 650kHz or 700kHz.

[0103] In some embodiments, the solar cell is a TOPCon cell, and the preparation method further includes: An oxide layer is formed by oxidizing a silicon substrate.

[0104] A doped layer is deposited on the side of the oxide layer away from the silicon substrate.

[0105] In some embodiments, the oxide layer comprises a silicon dioxide layer.

[0106] In some embodiments, the thickness of the oxide layer is ≤10nm, for example, it can be 10nm, 8nm, 6nm, 4nm or 2nm, etc.

[0107] In some embodiments, the method for forming the first film layer includes atomic layer deposition and / or plasma-enhanced chemical vapor deposition.

[0108] In some embodiments, when the solar cell is a TOPCon cell, the preparation method includes the following steps: (1) Provide N-type silicon wafers.

[0109] The N-type silicon wafer is texturized on the front side (purpose: to increase the light absorption path, reduce reflectivity, and increase short-circuit current) and boron expanded (purpose: to construct a PN junction and provide a built-in electric field for the photoelectric conversion of the battery) to obtain a silicon substrate with a selectively doped emitter on the front side.

[0110] The back side of the silicon substrate is oxidized (purpose: to achieve surface passivation, reduce surface recombination centers, reduce carrier recombination loss, and at the same time provide a protective or selective etching mask for subsequent processes, thereby improving the photoelectric conversion efficiency of the cell) to form a silicon dioxide layer with a thickness of ≤10nm.

[0111] (2) Perform laser scribing to form N grooves on at least one surface of the silicon substrate, where N≥1, the grooves are used to accommodate the cutting path for subsequent cutting to form sub-cells, and the width of the grooves is such that the cutting path falls completely within the groove body; the depth of the grooves penetrates the PN junction but does not exceed the thickness of the silicon substrate; the laser scribing process parameters satisfy: the laser power is 15-40W; the laser speed is 10-40m / s; the laser frequency is 300-700kHz.

[0112] (3) Perform BSG layer removal treatment and alkaline polishing treatment in sequence, and retain the front BSG layer (purpose: as a mask to prevent the front structure from being corroded).

[0113] (4) A phosphorus-doped polycrystalline silicon layer is formed on the back side of the silicon substrate (purpose: to enhance the back surface field (BSF) effect and improve electron collection efficiency), and then the PSG layer is removed and the RCA is cleaned in sequence.

[0114] (5) Deposit an aluminum oxide layer with a thickness of 3-5 nm (e.g., 3 nm, 4 nm or 5 nm) on the front side of the silicon substrate (purpose: to provide chemical passivation and field passivation, and reduce the surface recombination rate), and then deposit silicon nitride layers with a thickness of 60-120 nm on the front and back sides of the silicon substrate (purpose: to further reduce surface reflection and recombination).

[0115] (6) A front electrode and a back electrode are deposited on the front and back sides of the silicon substrate, respectively, to obtain the TOPCon cell.

[0116] This application also provides a photovoltaic module, which includes a battery string layer, wherein the battery string layer is formed by connecting at least two sub-cells sequentially through connectors.

[0117] The at least two sub-cells are formed by cutting the solar cells described above.

[0118] Preferably, the photovoltaic module includes a front glass panel, a front encapsulating film, the battery string layer, a rear encapsulating film, and a back glass panel, which are stacked sequentially.

[0119] It should be noted that a photovoltaic module is a device that directly converts light energy into electrical energy through the photoelectric effect or photochemical effect. In addition to the above structure, it also includes a frame surrounding the aforementioned laminated structure and a junction box located on one side of the back glass.

[0120] For example, the front glass may be made of a material with excellent light transmittance, impact resistance, corrosion resistance, and weather resistance, and may optionally include at least one of the following materials: tempered glass, plexiglass, transparent ceramics, organic fibers, or polymers. In some embodiments, the front glass may include at least one of an insulating barrier layer, a fluorinated weather-resistant layer, and a transition adhesive layer.

[0121] Backing glass typically needs to possess insulation, water resistance, aging resistance, weather resistance, and corrosion resistance. It can optionally include at least one of the following: tempered glass, acrylic glass, metal backing, or composite backing with PET film as the substrate. Among these, PET-based composite backing can be selected from various types, such as composite (e.g., TPT / KPK, TPE / KPE), coated (e.g., TPC, KPC, CPC), and co-extruded (e.g., PO), depending on the needs of different applications.

[0122] It is understandable that the choice of materials for the front and back glass does not affect each other, and the same or different materials can be selected depending on the different application scenarios of the components (such as residential photovoltaics and building-integrated photovoltaics).

[0123] The battery string layer includes multiple battery strings, which can be combined in series, parallel, or series-parallel configurations to achieve current convergence and output.

[0124] In some embodiments, at least a portion of the connector is electrically connected to the back electrode of a battery cell, and at least another portion of the connector is electrically connected to the front or back electrode of another battery cell to form a battery string. The connector may optionally include conductive elements such as solder strips, busbars, or metal clips. In some embodiments, to improve welding performance, oxidation resistance, and weather resistance, the connector may preferably be made of a highly conductive metal material, such as at least one of silver, copper, tin, and nickel, or an alloy thereof. In some embodiments, to balance conductivity and cost control, the connector may also be made of at least one of metal-clad composite materials such as silver-plated copper, copper-plated silver, copper-plated aluminum, aluminum-plated copper, tin-plated copper, or nickel-plated copper. The electrical connection may be selected from one of the following methods: laser welding, spot welding, bonding, ultrasonic welding, resistance welding, or brazing.

[0125] The frame surrounds the periphery of the stacked structure and is typically made of aluminum alloy or steel alloy. In some embodiments, the frame may also be a fiberglass frame or a plastic frame. The inner side of the frame usually has grooves for filling with sealant to achieve a sealed bond with the stacked components formed by the front glass, front adhesive film, battery string layers, rear adhesive film, and back glass, thereby blocking moisture and buffering external impacts. In some embodiments, the frame can be assembled using corner brackets.

[0126] The junction box is located on one side of the back glass panel and is electrically connected to the terminals of the bus electrodes in the battery string layer via a lead-out busbar for energy extraction. The junction box typically includes a housing and cover made of weather-resistant insulating material, conductive connecting tabs disposed within the housing, and one or more bypass diodes. The bypass diodes are connected in parallel with sub-units of the battery string. The electrical leads of the junction box include photovoltaic-specific connectors and cables. The cables preferably use tinned copper cores as conductive wires and cross-linked polyethylene as insulating sheaths. In some embodiments, the interior of the junction box may also be filled and encapsulated with potting compound to achieve insulation, thermal conductivity, moisture protection, and fixation.

[0127] This application also provides a photovoltaic system, the structural schematic diagram of which is shown below. Figure 9 As shown, the photovoltaic system 18 includes the photovoltaic module 19 as described above.

[0128] It should be noted that the photovoltaic system 18 can be applied in photovoltaic power plants, such as ground power plants, rooftop power plants, and water-based power plants, as well as in equipment or devices that use solar energy to generate electricity, such as user solar power supplies, solar streetlights, solar cars, solar buildings, etc.

[0129] It is understandable that the application scenarios of photovoltaic system 18 are not limited to this; that is to say, photovoltaic system 18 can be applied in all fields that require solar energy to generate electricity. Taking a photovoltaic power generation system as an example, photovoltaic system 18 may include a photovoltaic array, a combiner box, and an inverter. The photovoltaic array may be an array combination of multiple photovoltaic modules. For example, multiple photovoltaic modules can form multiple photovoltaic arrays. The photovoltaic array is connected to the combiner box, which can collect the current generated by the photovoltaic array. The collected current flows through the inverter and is converted into AC power required by the mains power grid before being connected to the mains power grid to realize solar power supply.

[0130] Example 1 This embodiment provides a TOPCon battery, the structural schematic diagram of which is shown below. Figure 6 As shown, it includes: A silicon substrate 1 has a front side and a back side; the front side has N grooves 2, where N≥1, for accommodating cutting paths that divide the TOPCon cell into sub-cells; the depth of the grooves 2 penetrates the PN junction but does not exceed the thickness of the silicon substrate 1; the surface of the grooves 2 is covered with a first film layer, the ratio of the thickness of the first film layer to the depth of the groove 2 is 1:200; the width of the groove 2 is 550μm; the depth of the groove 2 is 10μm; the aspect ratio of the groove 2 is 1.8%; the first film layer includes an aluminum oxide layer with a thickness of 4nm and a silicon nitride layer with a thickness of 70nm; the thickness of the first film layer is 74nm; the silicon substrate 1 comprises an N-type monocrystalline silicon wafer.

[0131] The front side of the silicon substrate 1 is provided with a boron-doped polycrystalline silicon layer 3, a front passivation layer 4, a front antireflection layer 5, and a front electrode 9 in sequence along the direction away from the silicon substrate 1; wherein, the front passivation layer 4 is an aluminum oxide layer with a thickness of 4 nm, the front antireflection layer 5 is a silicon nitride layer with a thickness of 70 nm, and the front electrode 9 is a silver electrode.

[0132] An oxide layer 6, a phosphorus-doped polycrystalline silicon layer 7, a back antireflection layer 8, and a back electrode 10 are sequentially disposed on the back side of the silicon substrate 1 in a direction away from the silicon substrate 1; wherein, the oxide layer 6 is a silicon dioxide layer with a thickness of 4 nm; the back antireflection layer 8 is a silicon nitride layer with a thickness of 70 nm; and the back electrode 10 is a silver electrode.

[0133] Specifically, the area near the wall of the groove bottom on one side of the groove 2 is a pyramid region, which is distributed with several pyramid-shaped protrusions; the ratio of the linear length of the one-dimensional dimension of the pyramid region to the width of the groove bottom of the groove 2 is 9.15%; the width of the pyramid region is 48 μm; and the dispersion density of the pyramid-shaped protrusions in the pyramid region is 30 per μm. 2 The linear length of the one-dimensional dimension of the pyramid-shaped protrusion is 0.5-2.5 μm; in the pyramid region, the area of ​​the pyramid-shaped protrusion with a dimension of 1.5 μm accounts for 30%; the bottom of the groove 2 is dispersed with a number of base structures, at least some of which are stacked on the bottom of the groove; the linear length of the one-dimensional dimension of the base structure is 1-5 μm; the bottom of the groove 2 is dispersed with a second protrusion; the dispersion density of the second protrusion is 3 per μm. 2 The diameter of the second protrusion is 5-10 μm.

[0134] Wherein, at least one side wall of the groove 2 has at least a portion of a serrated structure, the serrated structure being a plurality of protrusions arranged along the length of the side wall, the protrusions protruding from the side wall into the groove; the length of the protruding serrations is 7-12μm; the groove wall of the groove 2 has a slope structure, the inclination angle of the slope surface in the slope structure is 125°.

[0135] This embodiment also provides a method for preparing the above-mentioned TOPCon battery, the method comprising the following steps: (1) Provide N-type monocrystalline silicon wafers.

[0136] Pretreatment: The N-type monocrystalline silicon wafer is placed in a cleaning tank and immersed in a 1.5% sodium hydroxide solution at 65°C for 10 minutes to remove oil, dust and other impurities from the surface of the silicon wafer; then it is rinsed four times with deionized water to ensure that there is no residual cleaning solution on the surface.

[0137] Anisotropic etching of pretreated N-type monocrystalline silicon wafers was performed using sodium hydroxide solution to form a textured surface on the front side of the N-type monocrystalline silicon wafers.

[0138] At 1025℃, boron diffusion is performed on the front side of an N-type single-crystal silicon wafer using boron trichloride to form a boron-doped layer and a borosilicate glass layer (BSG layer), thereby constructing a PN junction and obtaining a silicon substrate with a selectively doped emitter on the front side.

[0139] The back side of the silicon substrate is oxidized to form a silicon dioxide layer with a thickness of 4 nm.

[0140] (2) Perform laser scribing to form N grooves on at least one surface of the silicon substrate, where N≥1, the grooves are used to accommodate the cutting path for subsequent cutting to form sub-cells, and the width of the grooves is such that the cutting path falls completely within the groove body; the depth of the grooves penetrates the PN junction but does not exceed the thickness of the silicon substrate; the laser scribing process parameters satisfy: the laser type is ultraviolet laser; the laser power is 25W; the laser speed is 25m / s; the laser frequency is 500kHz.

[0141] (3) Use hydrofluoric acid to remove the BSG on the back and edge of the silicon substrate, then polish the back with sodium hydroxide solution to remove the PN junction around the edge, and retain the front BSG layer as a mask.

[0142] (4) A phosphorus-doped polysilicon layer and a phosphorus-silicon glass layer (PSG layer) are formed on the back side of the silicon substrate. Then, the PSG on the front side and edge of the silicon substrate is removed with hydrofluoric acid. Then, metal impurities, residual polysilicon and front side BSG are removed by RCA cleaning (NH4OH / H2O2+HCl / H2O) to ensure surface cleanliness.

[0143] (5) An aluminum oxide layer with a thickness of 4 nm is deposited on the front side of the silicon substrate using atomic layer deposition method, and then a silicon nitride layer with a thickness of 46 nm is deposited on the front and back sides of the silicon substrate using plasma-enhanced chemical vapor deposition method.

[0144] (6) Using screen printing technology, silver paste is printed on the front and back sides of the silicon substrate to form an electrode pattern, including the main grid and the fine grid; then sintering is performed at 750°C to make good ohmic contact between the silver paste and the silicon substrate, while removing organic matter in the silver paste to complete the curing of the electrode, and then photoinjection is performed.

[0145] By combining laser irradiation with reverse bias, the contact area between the electrode and the silicon substrate is locally heated, causing the electrode to form an alloyed contact with the silicon, thus obtaining the TOPCon battery.

[0146] Example 2 This embodiment provides a TOPCon battery, the TOPCon battery comprising: A silicon substrate having opposing front and back sides; the front side having N grooves, where N≥1, for accommodating cutting paths that divide the TOPCon cell into sub-cells; the depth of the grooves penetrating the PN junction but not exceeding the thickness of the silicon substrate; the surface of the grooves being covered with a first film layer, the ratio of the thickness of the first film layer to the depth of the groove being 1:40; the width of the grooves being 400μm; the depth of the grooves being 0.5μm; the aspect ratio of the grooves being 0.13%; the first film layer comprising an aluminum oxide layer with a thickness of 3nm and a silicon nitride layer with a thickness of 60nm; the thickness of the first film layer being 63nm; the silicon substrate comprising an N-type monocrystalline silicon wafer.

[0147] The front side of the silicon substrate is provided with a boron-doped polycrystalline silicon layer, a front passivation layer, a front antireflection layer, and a front electrode in sequence along the direction away from the silicon substrate; wherein, the front passivation layer is an aluminum oxide layer with a thickness of 3 nm, the front antireflection layer is a silicon nitride layer with a thickness of 60 nm, and the front electrode is a silver electrode.

[0148] An oxide layer, a phosphorus-doped polycrystalline silicon layer, a back antireflection layer, and a back electrode are sequentially disposed on the back side of the silicon substrate along a direction away from the silicon substrate; wherein, the oxide layer is a silicon dioxide layer with a thickness of 4 nm; the back antireflection layer is a silicon nitride layer with a thickness of 60 nm; and the back electrode is a silver electrode.

[0149] The region near the bottom of the groove, close to the groove wall, is a pyramid region, containing several pyramid-shaped protrusions. The ratio of the linear length of the one-dimensional dimension of the pyramid region to the width of the groove bottom is 5.8%. The width of the pyramid region is 35 μm. The density of the pyramid-shaped protrusions in the pyramid region is 15 per μm. 2 The linear length of the one-dimensional dimension of the pyramid-shaped protrusion is 0.5-2.5 μm; the area of ​​the pyramid-shaped protrusion with a dimension of 1.5 μm accounts for 5% of the pyramid region; the bottom of the groove has a plurality of base structures dispersed therefrom, and at least some base structures are stacked on the bottom of the groove; the linear length of the one-dimensional dimension of the base structure is 1-5 μm; the bottom of the groove has a second protrusion dispersed therefrom; the dispersion density of the second protrusion is 1 protrusion / μm. 2 The diameter of the second protrusion is 5-10 μm.

[0150] The groove has at least one sidewall with a serrated structure, which consists of a plurality of protrusions arranged along the length of the sidewall and protruding from the sidewall into the groove. The length of the protruding serrations is 7-12 μm. The groove wall has a slope structure with an inclination angle of 91°.

[0151] This embodiment also provides a method for preparing the above-mentioned TOPCon battery, the method comprising the following steps: (1) Provide N-type monocrystalline silicon wafers.

[0152] Pretreatment: The N-type monocrystalline silicon wafer is placed in a cleaning tank and immersed in a 1.5% sodium hydroxide solution at 65°C for 10 minutes to remove oil, dust and other impurities from the surface of the silicon wafer; then it is rinsed four times with deionized water to ensure that there is no residual cleaning solution on the surface.

[0153] Anisotropic etching of pretreated N-type monocrystalline silicon wafers was performed using sodium hydroxide solution to form a textured surface on the front side of the N-type monocrystalline silicon wafers.

[0154] At 1025℃, boron diffusion is performed on the front side of an N-type single-crystal silicon wafer using boron trichloride to form a boron-doped layer and a borosilicate glass layer (BSG layer), thereby constructing a PN junction and obtaining a silicon substrate with a selectively doped emitter on the front side.

[0155] The back side of the silicon substrate is oxidized to form a silicon dioxide layer with a thickness of 4 nm.

[0156] (2) Perform laser scribing to form N grooves on at least one surface of the silicon substrate, where N≥1, the grooves are used to accommodate the cutting path for subsequent cutting to form sub-cells, and the width of the grooves is such that the cutting path falls completely within the groove body; the depth of the grooves penetrates the PN junction but does not exceed the thickness of the silicon substrate; the laser scribing process parameters satisfy: the laser type is ultraviolet laser; the laser power is 15W; the laser speed is 10m / s; the laser frequency is 300kHz.

[0157] (3) Use hydrofluoric acid to remove the BSG on the back and edge of the silicon substrate, then polish the back with sodium hydroxide solution to remove the PN junction around the edge, and retain the front BSG layer as a mask.

[0158] (4) A phosphorus-doped polysilicon layer and a phosphorus-silicon glass layer (PSG layer) are formed on the back side of the silicon substrate. Then, the PSG on the front side and edge of the silicon substrate is removed with hydrofluoric acid. Then, metal impurities, residual polysilicon and front side BSG are removed by RCA cleaning (NH4OH / H2O2+HCl / H2O) to ensure surface cleanliness.

[0159] (5) An aluminum oxide layer with a thickness of 3 nm is deposited on the front side of the silicon substrate using atomic layer deposition method, and then a silicon nitride layer with a thickness of 9.5 nm is deposited on the front and back sides of the silicon substrate using plasma-enhanced chemical vapor deposition method.

[0160] (6) Using screen printing technology, silver paste is printed on the front and back sides of the silicon substrate to form an electrode pattern, including the main gate and the fine gate; then sintering is performed at 600°C to make good ohmic contact between the silver paste and the silicon substrate, while removing organic matter in the silver paste to complete the curing of the electrode, and then photoinjection is performed.

[0161] By combining laser irradiation with reverse bias, the contact area between the electrode and the silicon substrate is locally heated, causing the electrode to form an alloyed contact with the silicon, thus obtaining the TOPCon battery.

[0162] Example 3 This embodiment provides a TOPCon battery, the TOPCon battery comprising: A silicon substrate having opposing front and back sides; the front side having N grooves, where N≥1, for accommodating cutting paths that divide the TOPCon cell into sub-cells; the depth of the grooves penetrating the PN junction but not exceeding the thickness of the silicon substrate; the surface of the grooves being covered with a first film layer, the ratio of the thickness of the first film layer to the depth of the groove being 1:350; the width of the grooves being 700μm; the depth of the grooves being 15μm; the aspect ratio of the grooves being 2.1%; the first film layer comprising an aluminum oxide layer with a thickness of 5nm and a silicon nitride layer with a thickness of 120nm; the thickness of the first film layer being 125nm; the silicon substrate comprising an N-type monocrystalline silicon wafer.

[0163] The front side of the silicon substrate is provided with a boron-doped polycrystalline silicon layer, a front passivation layer, a front antireflection layer, and a front electrode in sequence along the direction away from the silicon substrate; wherein, the front passivation layer is an aluminum oxide layer with a thickness of 5 nm, the front antireflection layer is a silicon nitride layer with a thickness of 120 nm, and the front electrode is a silver electrode.

[0164] The back side of the silicon substrate is provided with an oxide layer, a phosphorus-doped polycrystalline silicon layer, a back antireflection layer, and a back electrode in sequence along the direction away from the silicon substrate; wherein, the oxide layer is a silicon dioxide layer with a thickness of 4 nm; the back antireflection layer is a silicon nitride layer with a thickness of 120 nm; and the back electrode is a silver electrode.

[0165] The region near the bottom of the groove, close to the groove wall, is a pyramid region, containing several pyramid-shaped protrusions. The ratio of the linear length of the one-dimensional dimension of the pyramid region to the width of the groove bottom is 12.5%. The width of the pyramid region is 60 μm. The density of the pyramid-shaped protrusions in the pyramid region is 45 per μm. 2 The linear length of the one-dimensional dimension of the pyramid-shaped protrusion is 0.5-2.5 μm; in the pyramid region, the area of ​​the pyramid-shaped protrusion with a dimension of 1.5 μm accounts for 60%; the bottom of the groove has a plurality of base structures dispersed therefrom, and at least some base structures are stacked on the bottom of the groove; the linear length of the one-dimensional dimension of the base structure is 1-5 μm; the bottom of the groove has a second protrusion dispersed therefrom; the dispersion density of the second protrusion is 5 protrusions / μm. 2 The diameter of the second protrusion is 5-10 μm.

[0166] The groove has at least one sidewall with a serrated structure, which consists of a plurality of protrusions arranged along the length of the sidewall and protruding from the sidewall into the groove. The length of the protruding serrations is 7-12 μm. The groove wall has a slope structure with an inclination angle of 160°.

[0167] This embodiment also provides a method for preparing the above-mentioned TOPCon battery, the method comprising the following steps: (1) Provide N-type monocrystalline silicon wafers.

[0168] Pretreatment: The N-type monocrystalline silicon wafer is placed in a cleaning tank and immersed in a 1.5% sodium hydroxide solution at 65°C for 10 minutes to remove oil, dust and other impurities from the surface of the silicon wafer; then it is rinsed four times with deionized water to ensure that there is no residual cleaning solution on the surface.

[0169] Anisotropic etching of pretreated N-type monocrystalline silicon wafers was performed using sodium hydroxide solution to form a textured surface on the front side of the N-type monocrystalline silicon wafers.

[0170] At 1025℃, boron diffusion is performed on the front side of an N-type single-crystal silicon wafer using boron trichloride to form a boron-doped layer and a borosilicate glass layer (BSG layer), thereby constructing a PN junction and obtaining a silicon substrate with a selectively doped emitter on the front side.

[0171] The back side of the silicon substrate is oxidized to form a silicon dioxide layer with a thickness of 4 nm.

[0172] (2) Perform laser scribing to form N grooves on at least one surface of the silicon substrate, where N≥1, the grooves are used to accommodate the cutting path for subsequent cutting to form sub-cells, and the width of the grooves is such that the cutting path falls completely within the groove body; the depth of the grooves penetrates the PN junction but does not exceed the thickness of the silicon substrate; the laser scribing process parameters satisfy: the laser type is ultraviolet laser; the laser power is 40W; the laser speed is 40m / s; the laser frequency is 700kHz.

[0173] (3) Use hydrofluoric acid to remove the BSG on the back and edge of the silicon substrate, then polish the back with sodium hydroxide solution to remove the PN junction around the edge, and retain the front BSG layer as a mask.

[0174] (4) A phosphorus-doped polysilicon layer and a phosphorus-silicon glass layer (PSG layer) are formed on the back side of the silicon substrate. Then, the PSG on the front side and edge of the silicon substrate is removed with hydrofluoric acid. Then, metal impurities, residual polysilicon and front side BSG are removed by RCA cleaning (NH4OH / H2O2+HCl / H2O) to ensure surface cleanliness.

[0175] (5) An aluminum oxide layer with a thickness of 5 nm is deposited on the front side of the silicon substrate using atomic layer deposition method, and then a silicon nitride layer with a thickness of 38 nm is deposited on the front and back sides of the silicon substrate using plasma-enhanced chemical vapor deposition method.

[0176] (6) Using screen printing technology, silver paste is printed on the front and back sides of the silicon substrate to form an electrode pattern, including the main grid and the fine grid; then sintering is performed at 850°C to make good ohmic contact between the silver paste and the silicon substrate, while removing organic matter in the silver paste to complete the curing of the electrode, and then photoinjection is performed.

[0177] By combining laser irradiation with reverse bias, the contact area between the electrode and the silicon substrate is locally heated, causing the electrode to form an alloyed contact with the silicon, thus obtaining the TOPCon battery.

[0178] Comparative Example 1 The difference between this comparative example and Example 1 is that the ratio of the thickness of the first film layer to the depth of the groove is 1:20.

[0179] The remaining preparation methods and parameters are consistent with those in Example 1.

[0180] Comparative Example 2 The difference between this comparative example and Example 1 is that the depth of the groove or the thickness of the first film layer is adjusted so that the ratio of the thickness of the first film layer to the depth of the groove is 1:500.

[0181] The remaining preparation methods and parameters are consistent with those in Example 1.

[0182] Performance testing The TOPCon cells provided in the above embodiments and comparative examples are divided into at least two sub-cells and fabricated into photovoltaic modules 19, as shown in the top view and perspective view. Figure 7 and Figure 8 As shown, the photovoltaic module 19 includes a front glass panel 11, a front encapsulant film 12, a cell string layer 13, a rear encapsulant film 14, and a back glass panel 15 stacked in sequence; wherein, the cell string layer 13 is formed by connecting at least two sub-cells in sequence through connectors; the photovoltaic module 19 also includes a frame 16 arranged around the periphery of the above-mentioned stacked structure and a junction box 17 disposed on one side of the back glass panel 15.

[0183] Performance testing steps for photovoltaic modules: I. Preparatory work before testing 1. Visual inspection, including: Inspect the appearance of the photovoltaic modules for scratches, damage, cracks, or other defects.

[0184] 2. Surface cleaning, including: Wipe the component surface with ultrapure water, ethanol or isopropanol to remove fingerprints, dust and organic residues; After drying the components with nitrogen, let them stand for 10 minutes to avoid surface contamination affecting optical properties.

[0185] 3. Temperature equilibrium, including: The temperature of the components was stabilized at 25℃±0.5℃ using a constant temperature stage, and this temperature condition was maintained during the test.

[0186] 4. Equipment calibration, including: The light source spectrum was calibrated using a standard reference cell to conform to the AM1.5G standard spectral conditions, with a calibration wavelength range of 300 nm to 1200 nm. The irradiance uniformity deviation in the test area does not exceed ±2%, and the measurement error of the temperature sensor used is less than ±0.1℃.

[0187] II. Testing Equipment and Conditions 1. Core equipment IV tester: Keysight B2900A series, with a voltage resolution of 0.1mV and a current resolution of 0.1μA; Solar simulator: Class AAA compliant, with selectable pulsed or steady-state light source (Wacom WXS-200S-20 model). Temperature control console: Temperature regulation is achieved based on a thermoelectric cooling (TEC) module, with a control accuracy of ±0.2℃; Spectral response instrument: equipped with a quantum efficiency (QE) testing system (Bentham PVE300).

[0188] 2. Standard Test Conditions (STC) Irradiance: 1000W / m 2 (AM1.5G standard spectrum); Temperature: 25℃±1℃ (real-time monitoring via TEC module); Light spot uniformity: The uniformity of the light spot covering the effective area of ​​the battery is >95%.

[0189] III. Parameter Testing Procedures Conversion efficiency (Eta) and IV characteristics (Voc, Isc, FF) 1) Equipment: Solar simulator + IV tester + four-wire probe.

[0190] 2) Steps: a. Place the battery in the center of the simulator, covering the edges by 5mm to prevent light leakage from the edges; b. Apply from -0.5V to V oc A scan voltage of +0.5V and a step size of 10mV were used to record the IV curve. c. Extracting V from the curve oc (Voltage when current = 0), I sc (Current when voltage = 0); d. Calculate the maximum power point (P)max =V mpp ×I mpp ), fill factor FF=P max / (V oc ×I sc ); e. Efficiency Eta = (P max / Incident light power)×100% (Incident light power is calibrated by a standard cell).

[0191] The test results are shown in Table 1.

[0192] Table 1 analyze: As shown in Table 1, this application provides N grooves on at least one side of the solar cell to accommodate the cutting path for dividing the solar cell into sub-cells. A first film of a specific thickness is then applied to the surface of the grooves, forming a complete and uniform first film before dicing. This first film can repair edge defects in the dicing area, suppress carrier recombination, and improve cell performance; it can form an insulating barrier to prevent edge leakage; it can reinforce the cell, reducing the risk of crack propagation and improving its reliability in subsequent processing and use; and since the first film is prepared before dicing, the process flow is simplified, increasing production efficiency. Therefore, through the synergistic effect of the first film and the grooves, the solar cell can effectively reduce mechanical damage and thermal impact during subsequent dicing, thereby minimizing cell efficiency loss.

Claims

1. A solar cell, characterized in that, The solar cell includes: a front side and a back side disposed opposite to each other, at least one side having N grooves, where N≥1, for accommodating a cutting path that divides the solar cell into sub-cells, and the width of the grooves such that the cutting path falls completely within the groove body; the depth of the grooves penetrates the PN junction but does not exceed the thickness of the silicon substrate; The surface of the groove is covered with a first film layer, and the ratio of the thickness of the first film layer to the depth of the groove is 1:(40-350).

2. The solar cell according to claim 1, characterized in that, The width of the groove is 400-700μm.

3. The solar cell according to claim 1, characterized in that, The depth of the groove is 0.5-20μm.

4. The solar cell according to claim 1, characterized in that, The aspect ratio of the groove is 0.08-2.1%.

5. The solar cell according to claim 1, characterized in that, The bottom of the groove has at least one side of the area near the groove wall as a first protrusion area, and the first protrusion area is provided with a plurality of first protrusions. And / or, the bottom of the groove is provided with a plurality of tower base structures, and at least some of the tower base structures are stacked on the bottom of the groove; And / or, the bottom of the groove is provided with a plurality of second protrusions.

6. The solar cell according to claim 5, characterized in that, The ratio of the width of the first protruding area to the width of the bottom of the groove is 5.8-12.5%; And / or, the width of the first protrusion region is 35-60 μm; And / or, in the first raised region, the dispersion density of the first raised portion is 15-45 per μm. 2 ; And / or, in the first protrusion region, the linear length of the one-dimensional dimension of the first protrusion is 0.5-2.5 μm; And / or, in the first protrusion region, the area of ​​the first protrusion with a linear length of 1-2 μm in one dimension accounts for 5-60%.

7. The solar cell according to claim 5, characterized in that, The linear length of the one-dimensional dimension of the tower base structure is 1-5 μm; And / or, the dispersion density of the second protrusion is 1-5 per μm. 2 ; And / or, the diameter of the second protrusion is 5-10 μm.

8. The solar cell according to claim 1, characterized in that, The groove has at least a portion of a serrated structure on at least one side wall, the serrated structure being a plurality of protrusions arranged along the length of the side wall, the protrusions protruding from the side wall into the groove.

9. The solar cell according to claim 1, characterized in that, The groove walls have a pyramid structure; And / or, the groove wall has a tower base structure; And / or, the groove wall has a ribbed structure.

10. The solar cell according to claim 1, characterized in that, The groove wall has a sloping structure, and the inclination angle of the sloping surface in the sloping structure is 91°-160°.

11. The solar cell according to claim 1, characterized in that, The first film layer includes a passivation layer with a thickness of 3-5 nm.

12. The solar cell according to claim 11, characterized in that, The first film layer further includes an antireflection layer, the thickness of which is 60-120 nm.

13. The solar cell according to claim 1, characterized in that, The solar cell includes any one of TOPCon, HJT, PERC, or BC cells.

14. A method for preparing a solar cell as described in any one of claims 1-13, characterized in that, The preparation method includes the following steps: A silicon substrate having a front and a back side arranged opposite to each other is provided, and a PN junction is formed on the silicon substrate; N grooves are formed on at least one surface of the silicon substrate, where N≥1. The grooves are used to accommodate the cutting path for subsequent cutting to form sub-cells, and the width of the grooves is such that the cutting path falls completely within the groove body. The depth of the grooves penetrates the PN junction but does not exceed the thickness of the silicon substrate. A first film layer is applied to the surface of the groove.

15. The preparation method according to claim 14, characterized in that, The groove is formed by laser scribing, and the laser scribing process parameters are: laser power of 15-40W; laser speed of 10-40m / s; laser frequency of 300-700kHz.

16. The preparation method according to claim 14, characterized in that, The solar cell is a TOPCon cell, and the preparation method further includes: An oxidation process is performed on a silicon substrate to form an oxide layer; A doped layer is deposited on the side of the oxide layer away from the silicon substrate.

17. The preparation method according to claim 16, characterized in that, The oxide layer includes a silicon dioxide layer; And / or, the thickness of the oxide layer is ≤10nm.

18. A photovoltaic module, characterized in that, The photovoltaic module includes a battery string layer, which is formed by connecting at least two sub-cells sequentially through connectors. The at least two sub-cells are formed by cutting the solar cell according to any one of claims 1-13.

19. A photovoltaic system, characterized in that, The photovoltaic system includes the photovoltaic module as described in claim 18.

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