Battery piece preparation method, battery piece, and photovoltaic module

Abstract

The application relates to a battery piece preparation method, a battery piece and a photovoltaic module. The battery piece preparation method comprises the following steps: providing a battery piece body; depositing a seed layer on the surface of the battery piece body, the surface of the seed layer on the side away from the battery piece body is parallel to the surface of the battery piece body, the seed layer is electrically connected with the battery piece body; and printing a welding layer on the surface of the seed layer. The production cost of the battery piece preparation can be reduced, and the pollution to the environment can be reduced.

Description

Technical Field

[0001] This application relates to the field of solar cell technology, and in particular to a method for preparing solar cells, solar cells, and photovoltaic modules. Background Technology

[0002] With the development of solar cell technology, in order to reduce the power generation loss of solar cells, multiple solder strips are usually set on the surface of the cell to collect the photocurrent generated by the solar cell.

[0003] In related technologies, a seed layer is printed on the surface of the solar cell, and then fine conductive wires are soldered to the seed layer. Alternatively, after PVD deposition of the seed layer, solder ribbons are electroplated onto the surface of the seed layer.

[0004] However, the methods for preparing solar cells in related technologies suffer from high equipment costs and significant environmental pollution. Summary of the Invention

[0005] Based on this, the embodiments of this application provide a method for preparing solar cells, solar cells, and photovoltaic modules, which can reduce the production cost of solar cell preparation and help reduce environmental pollution.

[0006] On one hand, embodiments of this application provide a method for preparing a battery cell, including:

[0007] Provide the battery cell body;

[0008] A seed layer is deposited on the surface of the solar cell body. The surface of the seed layer on the side away from the solar cell body is parallel to the surface of the solar cell body, and the seed layer is electrically connected to the solar cell body.

[0009] A welding layer is printed on the surface of the seed layer; the welding layer is used to weld the solder strip.

[0010] In one implementation, the seed layer covers one side surface of the solar cell body; the method further includes:

[0011] The seed layer is graphically processed to remove the seed layer outside the area covered by the solder layer.

[0012] In one implementation, at least one surface of the solar cell body has a transparent conductive oxide layer, which covers the surface of the solar cell body; the step of depositing a seed layer on the surface of the solar cell body includes:

[0013] A seed layer is deposited on the side of the transparent conductive oxide layer facing away from the cell body to form a seed layer.

[0014] In one implementation, at least one side surface of the solar cell body has a first passivation layer, the first passivation layer covering the surface of the solar cell body; prior to the step of depositing and forming a seed layer on the surface of the solar cell body, the method further includes:

[0015] The first passivation layer is patterned to form multiple trenches on the first passivation layer, and the trenches penetrate the first passivation layer;

[0016] The step of depositing a seed layer on the surface of the solar cell body includes: depositing a seed layer on the side surface of the first segment layer opposite to the solar cell body and on the inner wall of the trench; wherein the seed layer located in the trench is electrically connected to the solar cell body.

[0017] In one implementation, the step of printing a solder layer on the surface of the seed layer includes:

[0018] A solder layer is formed by printing in the grooves, and the solder layer is connected to the seed layer in the grooves at least.

[0019] In one implementation, the projection of the welding layer onto the cell body covers the projection of the trench onto the cell body.

[0020] In one implementation, the maximum dimension of the weld layer along the width direction of the trench is greater than the width of the trench.

[0021] In one implementation, the seed layer comprises at least one of copper, nickel, and a copper-nickel alloy; the thickness of the seed layer is 50 nm to 300 nm.

[0022] And / or,

[0023] The solder layer includes solder paste, which contains tin, bismuth, and silver. The percentage content of tin is 35%-65%, the percentage content of bismuth is 5%-58%, and the percentage content of silver is 0.3%-1.0%. The maximum width of the solder layer is 20μm-100μm.

[0024] And / or,

[0025] The welding temperature for welding the welding strip in the welding layer is 140℃-220℃.

[0026] On the other hand, embodiments of this application provide a battery cell, including:

[0027] The battery cell itself;

[0028] A seed layer is located on at least one side of the solar cell body. The surface of the seed layer facing away from the solar cell body is parallel to the surface of the solar cell body, and the seed layer is electrically connected to the solar cell body.

[0029] The welding layer is located at least on the side of the seed layer away from the cell body; the welding layer is used to weld the solder strip.

[0030] Furthermore, embodiments of this application provide a photovoltaic module, including at least one solar cell provided in the foregoing embodiments of this application; and

[0031] Welding strips, welding strips to the welding layer of the battery cells.

[0032] The solar cell fabrication method, solar cell, and photovoltaic module provided in this application involve depositing a seed layer on the surface of the solar cell body. The surface of the seed layer facing away from the solar cell body is parallel to the surface of the solar cell body. The seed layer is electrically connected to the solar cell body. A solder layer is printed on the surface of the seed layer for soldering solder ribbons. This printing method of forming a solder layer on the surface of the seed layer offers several advantages. First, the solder layer exhibits good wettability on the seed layer. Compared to related technologies where solder ribbons are soldered onto the surface of the solar cell body using a solder layer, this method improves the wettability of the solder on the solar cell body surface, preventing the formation of solder balls, increasing the soldering force after soldering, preventing solder ribbon pull-off, and enhancing the stability of solder ribbon soldering. Second, printing the solder layer on the surface of the seed layer eliminates the need for electroplating and the use of masks, simplifying the solar cell manufacturing process, reducing environmental pollution, and lowering the production cost of the solar cell by eliminating the need for electroplating equipment. Attached Figure Description

[0033] Figure 1 This is a schematic diagram of the structure of a battery cell body provided in some embodiments of this application.

[0034] Figure 2 This is a schematic diagram of a battery cell fabrication method provided in some embodiments of this application.

[0035] Figure 3 This is a schematic diagram of another preparation process of the battery cell preparation method provided in some embodiments of this application.

[0036] Figure 4 This is a schematic diagram of another preparation process of the battery cell preparation method provided in some embodiments of this application.

[0037] Figure 5 This is a schematic diagram of another preparation process of the battery cell preparation method provided in some embodiments of this application.

[0038] Figure 6 This is a schematic diagram of the overall structure of the battery cell provided in some embodiments of this application.

[0039] Explanation of reference numerals in the attached figures:

[0040] 10 - Cell body; 20 - Seed layer; 30 - Welding layer; 40 - Welding strip;

[0041] 11-Transparent conductive oxide layer; 12-Substrate; 13-Second passivation layer; 14-Doped layer; 15-First passivation layer;

[0042] 151-Groove. Detailed Implementation

[0043] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific embodiments of this application are described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description to provide a thorough understanding of this application. However, this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0044] In the description of this application, it should be understood that if terms such as "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential" appear, these terms indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0045] Furthermore, where the terms "first" and "second" appear, these terms are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined with "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, where the term "multiple" appears, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0046] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0047] In this application, unless otherwise expressly specified and limited, the use of descriptions such as "above" or "below" the second feature indicates that the first and second features are in direct contact or indirect contact via an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. Similarly, "below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0048] It should be noted that if an element is referred to as being "fixed to" or "set on" another element, it can be directly on the other element or there may be an intervening element. If an element is considered to be "connected to" another element, it can be directly connected to the other element or there may be an intervening element. If so, the terms "vertical," "horizontal," "upper," "lower," "left," "right," and similar expressions used in this application are for illustrative purposes only and do not represent the only possible implementation.

[0049] Figure 1 This is a schematic diagram of the structure of a battery cell body provided in some embodiments of this application. Figure 2 This is a schematic diagram of a battery cell fabrication method provided in some embodiments of this application.

[0050] In response to the technical problems existing in the relevant technologies, refer to Figure 1 and Figure 2 As shown, this application provides a method for preparing a solar cell. The method for preparing a solar cell may include the following steps:

[0051] S201 provides a battery cell body 10.

[0052] In some examples, refer to Figure 1 As shown, the cell body 10 may include a substrate 12. The substrate 12 may be monocrystalline silicon. It is understood that the type of substrate 12 shown in this embodiment is only a specific example and is not intended to limit the specific type of substrate 12.

[0053] In some examples, refer to Figure 1 As shown, the cell body 10 may include a second passivation layer 13. The second passivation layer 13 may be located on at least one side surface of the substrate 12.

[0054] In some examples, refer to Figure 1 As shown, the second passivation layer 13 can be located on the surfaces of opposite sides of the substrate 12.

[0055] In some examples, the second passivation layer 13 may include intrinsic amorphous silicon. That is, the substrate 12 can be passivated with intrinsic amorphous silicon.

[0056] In some examples, the second passivation layer 13 may include a tunneling oxide layer. It is understood that the specific type of the second passivation layer 13 in the embodiments of this application is only shown as a specific example and is not intended to limit the specific type of the second passivation layer 13.

[0057] In some examples, refer to Figure 1 As shown, the cell body 10 may include a doped layer 14. The doped layer 14 may be located on the side of the second passivation layer 13 facing away from the substrate 12.

[0058] In some examples, the doped layer 14 may include a doped microcrystalline silicon layer; or, the doped layer 14 may include a doped amorphous silicon layer. It is understood that the specific type of the doped layer 14 in some examples of the embodiments of this application is only shown as specific examples and is not intended to limit the specific type of the doped layer 14.

[0059] s202, a seed layer 20 is deposited on the surface of the cell body 10 to form a seed layer 20.

[0060] In some examples, a seed layer 20 can be deposited on the surface of the cell body 10 using physical vapor deposition (PVD).

[0061] In some examples, the seed layer 20 can be made of Ni, Cu, or an alloy of Ni and Cu. The thickness of the seed layer 20 can be on the nanometer scale. It is understood that in some examples of the embodiments of this application, the specific material of the seed layer 20 is only shown as a specific example and is not intended to limit the material of the seed layer 20.

[0062] In some examples of embodiments of this application, a seed layer 20 is formed on at least one side surface of the cell body 10 by PVD deposition, such that the surface of the seed layer 20 facing away from the cell body 10 can be parallel to the surface of the cell body 10. In other words, compared with the method of forming the seed layer 20 by screen printing silver paste in related technologies, the flatness of the surface of the seed layer 20 can be ensured. Thus, in the subsequent welding process of the solder ribbon 40, the flat surface of the seed layer 20 is conducive to aligning the triangular solder ribbon 40, making it easier to use the triangular solder ribbon 40 to reflect the incident light to the surface of the cell, which is beneficial to the secondary utilization of the incident light.

[0063] In some examples, the seed layer 20 may be electrically connected to the cell body 10.

[0064] S203, a solder layer 30 is printed on the surface of the seed layer 20. The solder layer 30 may include solder paste.

[0065] In some examples, the weld layer 30 can be used to connect with the weld strip 40.

[0066] In some examples, the solder layer 30 can be formed on the surface of the seed layer 20 by screen printing.

[0067] In some examples, the solder layers 30 on the surface of the seed layer 20 can be arranged in a dotted pattern. For example, multiple solder layers 30 can be provided along the extension direction of the seed layer 20, and the multiple solder layers 30 are arranged in a dotted pattern at intervals along the extension direction of the seed layer 20.

[0068] In some examples, the solder layer 30 on the surface of the seed layer 20 can be linear. Multiple solder layers 30 can be provided along the extension direction of the seed layer 20, with the multiple linear solder layers 30 arranged at intervals.

[0069] In some examples, along the extension direction of the seed layer 20, the weld layer 30 may be a linear integral covering of the surface of the seed layer 20.

[0070] In some examples, reference is made to subsequent embodiments of this application. Figure 6 As shown, the solder ribbon 40 can be a triangular solder ribbon 40. In this embodiment, a welding layer 30 is formed by printing on the surface of the seed layer 20, and the welding layer 30 can be used to weld the solder ribbon 40. Thus, compared with the related technology of covering the surface of the seed layer 20 with a mask, patterning the mask to form slots, and then forming the solder ribbon 40 or grid lines on the surface of the seed layer 20 by electroplating, in this embodiment, welding the solder ribbon 40 by the welding layer 30 can eliminate the electroplating process, reduce environmental pollution, simplify the cell manufacturing process, and help save cell manufacturing costs.

[0071] In addition, a seed layer 20 is deposited on the surface of the cell body 10, and a welding layer 30 is printed on the surface of the seed layer 20. The welding layer 30 is used to weld the solder ribbon 40. In this way, the seed layer 20 can improve the wettability of the welding layer 30, which is beneficial to the leveling of the welding layer 30 during the low-temperature welding process. This makes it easier to align the triangular solder ribbon 40, thereby helping the triangular solder ribbon 40 to reflect the incident light to the surface of the cell for absorption, improving the secondary utilization rate of the incident light. In addition, the improved wettability of the seed layer 20 helps to increase the pull-out force between the solder ribbon 40 and the seed layer 20, thus improving the welding stability of the solder ribbon 40.

[0072] In addition, the solder layer 30 is printed on the seed layer 20; thus, when soldering the solder strip 40, it is not necessary to polish and tin one side of the triangular solder strip 40. The solder strip 40 can be soldered through the solder layer 30, which simplifies the production process of the solder strip 40 and helps to reduce the production cost of the solder strip 40.

[0073] The battery cell manufacturing method provided in this application involves depositing a seed layer 20 on the surface of the battery cell body 10. The surface of the seed layer 20 facing away from the battery cell body 10 is parallel to the surface of the battery cell body 10. The seed layer 20 is electrically connected to the battery cell body 10. A welding layer 30 is printed on the surface of the seed layer 20. The welding layer 30 is used to weld the welding strip 40. Thus, by printing a solder layer 30 onto the surface of the seed layer 20, the solder layer 30 exhibits good wettability on the seed layer 20. Compared to the method in related technologies where the solder ribbon 40 is soldered onto the surface of the cell body 10 using the solder layer 30, this improves the wettability of the solder on the surface of the cell body 10, prevents the formation of solder balls, enhances the welding strength of the solder ribbon 40 after soldering, prevents the solder ribbon 40 from being pulled off, and improves the stability of the solder ribbon 40 soldering. On the other hand, by printing the solder layer 30 onto the surface of the seed layer 20, compared to the method in related technologies where the solder ribbon 40 is formed by electroplating after covering the surface of the seed layer 20 with a mask, the electroplating process and the use of a mask are omitted, simplifying the cell manufacturing process, reducing environmental pollution, and eliminating the need for electroplating equipment, thereby reducing the production cost of cell manufacturing.

[0074] Figure 3 This is a schematic diagram of another preparation process of the battery cell preparation method provided in some embodiments of this application.

[0075] In some examples, refer to Figure 3 As shown, some examples of the embodiments of this application provide a method for preparing a battery cell, which may include the following steps:

[0076] S301 provides a battery cell body 10.

[0077] s302, a seed layer 20 is deposited on the surface of the cell body 10 to form a seed layer 20.

[0078] It is understood that in some examples of the embodiments of this application, s301 may be the same as, similar to or similar to s201 in the foregoing embodiments of this application, and s302 may be the same as, similar to or similar to s202 in the foregoing embodiments of this application. For details, please refer to the detailed description of the foregoing embodiments of this application. The embodiments of this application will not repeat the details here.

[0079] In some examples, the seed layer 20 may cover at least one side surface of the cell body 10.

[0080] s303, graphical processing of seed layer 20 to remove seed layer 20 outside the area covered by solder layer 30.

[0081] In some examples, the seed layer 20 can be acid-etched or laser-etched to remove the portion of the seed layer 20 outside the area covered by the solder layer 30. In other words, the seed layer 20 in the area where the solder layer 30 needs to be set can be retained, while the rest of the seed layer 20 can be removed.

[0082] S304, a solder layer 30 is formed by printing on the surface of the seed layer 20.

[0083] It is understood that s304 in the embodiments of this application may be the same as, similar to or similar to s203 in the foregoing embodiments of this application. For details, please refer to the detailed description of the foregoing embodiments of this application. The embodiments of this application will not repeat the details.

[0084] In other words, in some examples of embodiments of this application, the seed layer 20 can be patterned first, and then the solder layer 30 can be printed on the patterned seed layer 20. In this way, it can be ensured that the solder layer 30 can accurately cover the seed layer 20 of the area to be printed, which makes it easier to limit the position of the printing area of ​​the solder layer 30.

[0085] In some examples, refer to Figure 2 and Figure 3 As shown, at least one surface of the solar cell body 10 may have a transparent conductive oxide layer 11 (TCO). The transparent conductive oxide layer 11 may cover the surface of the solar cell body 10. For example, the transparent conductive oxide layer 11 may cover the surface of the doped layer 14 facing away from the substrate 12.

[0086] In some examples, the seed layer 20 can be electrically connected to the cell body 10 via the transparent conductive oxide layer 11. In this way, the photocurrent generated by the cell body 10 can be transmitted to the seed layer 20 via the transparent conductive oxide layer 11, and then to the solder strip 40 via the seed layer 20 and the solder layer 30, which facilitates the collection of the photocurrent generated by the cell.

[0087] In some examples of embodiments of this application, a transparent conductive oxide layer 11 is covered on at least one side of the surface of the solar cell body 10. This allows the good light transmittance of the transparent conductive oxide layer 11 to reduce shading of incident sunlight, enabling the solar cell body 10 to absorb more light and improving the solar cell's efficient utilization of light energy. Furthermore, the transparent conductive oxide layer 11 has good conductivity, enabling smooth conduction of photogenerated current and reducing resistance loss during current collection. Simultaneously, the transparent conductive oxide layer 11 can also serve as a passivation layer to enhance the passivation effect of the solar cell, reduce carrier recombination, and improve the photoelectric conversion efficiency of the solar cell.

[0088] Figure 4 This is a schematic diagram of another preparation process of the battery cell preparation method provided in some embodiments of this application.

[0089] In some examples, refer to Figure 4 As shown, some examples of battery cell fabrication methods provided in this application may include the following steps:

[0090] S401 provides a battery cell body 10.

[0091] s402, a seed layer 20 is deposited on the surface of the cell body 10 to form a seed layer 20.

[0092] S403, a welding layer 30 is formed by printing on the surface of the seed layer 20.

[0093] It is understood that in some examples of the embodiments of this application, s401-s403 may be the same as, similar to or similar to s201-s203 in the foregoing embodiments of this application. For details, please refer to the detailed description of the foregoing embodiments of this application. The embodiments of this application will not repeat the details here.

[0094] s404, graphically processes seed layer 20 to remove seed layer 20 outside the area covered by solder layer 30.

[0095] It is understood that in the embodiments of this application, the seed layer 20 can be acid-etched or laser-etched to remove the seed layer 20 outside the area covered by the welding layer 30.

[0096] In some examples of embodiments of this application, after printing the solder layer 30 on the surface of the seed layer 20, the seed layer 20 outside the area covered by the solder layer 30 is etched away. In this way, the seed layer 20 and flux overflow residue outside the solder layer coverage area can be removed, which can reduce the impact of the seed layer 20 and flux overflow residue on the light, which is beneficial to increase the amount of light irradiated to the surface of the cell and improve the utilization rate of light by the cell.

[0097] Figure 5 This is a schematic diagram of another preparation process of the battery cell preparation method provided in some embodiments of this application.

[0098] In some examples, at least one side surface of the cell body 10 may have a first passivation layer 15. The first passivation layer 15 may cover at least one side surface of the cell body 10.

[0099] In some examples, the first passivation layer 15 may include an aluminum oxide layer.

[0100] In some examples, the first passivation layer 15 may include a silicon nitride layer.

[0101] In some examples, the first passivation layer 15 may include an aluminum oxide layer and a silicon nitride layer.

[0102] In some examples, refer to Figure 5 As shown, some examples of battery cell fabrication methods provided in this application may include the following steps:

[0103] S501 provides a battery cell body 10.

[0104] s502, the first passivation layer 15 is patterned to form a plurality of trenches 151 on the first passivation layer 15, the trenches 151 penetrating the first passivation layer 15.

[0105] In some examples, the first passivation layer 15 can be patterned by laser etching to form multiple trenches 151 on the first passivation layer 15.

[0106] s503, a seed layer 20 is deposited on the surface of the first passivation layer 15 away from the cell body 10 and on the inner wall of the trench 151.

[0107] In some examples, the seed layer 20 located within the trench 151 is electrically connected to the cell body 10. For example, see reference... Figure 5 As shown, the seed layer 20 can cover the bottom wall, side walls, and surface of the first passivation layer 151 of the trench 151, thereby forming a continuous seed layer 20, so that the seed layer 20 located on the bottom wall of the trench 151 can be electrically connected to the solar cell body 10. In this way, it is convenient to conduct the photocurrent generated by the solar cell body 10.

[0108] In some examples of embodiments of this application, a first passivation layer 15 is formed on at least one side surface of the solar cell body 10. This allows for surface passivation of the solar cell body 10 using the first passivation layer 15, reducing carrier recombination and improving the photoelectric conversion efficiency of the solar cell. By patterning the first passivation layer 15, multiple trenches 151 are formed on the first passivation layer 15, penetrating the first passivation layer 15. A seed layer 20 is deposited on the bottom wall of the first passivation layer 15 and the trenches 151, and the seed layer 20 located within the trenches 151 is electrically connected to the solar cell body 10. This facilitates the extraction of the photocurrent generated by the solar cell body 10, which is beneficial for the collection of the photocurrent.

[0109] s504, a solder layer 30 is printed in the trench 151, and the solder layer 30 is connected to the seed layer 20 in the trench 151 at least.

[0110] It is understood that in the embodiments of this application, the method of printing the solder layer 30 may be the same as, similar to or similar to the foregoing embodiments of this application. For details, please refer to the detailed description of the foregoing embodiments of this application. The embodiments of this application will not repeat the details.

[0111] In some examples, when printing the solder layer 30, the mesh openings of the printing screen can correspond to the grooves 151. This facilitates printing the solder layer 30 into the grooves 151.

[0112] s505, graphically processes seed layer 20 to remove seed layer 20 outside the area covered by solder layer 30.

[0113] It is understood that embodiment s505 of this application may be the same as, similar to or similar to s404 in the foregoing embodiments of this application. For details, please refer to the detailed description of the foregoing embodiments of this application. This application will not repeat the details in this embodiment.

[0114] In some examples, the orthographic projection of the weld layer 30 onto the cell body 10 can cover the orthographic projection of the trench 151 onto the cell body 10. For example, the weld layer 30 can completely fill the trench 151. This increases the width of the weld layer 30, thereby reducing the resistance of the photocurrent transmitted outward from the cell body 10 and improving the collection efficiency of the photocurrent. In addition, during the welding process, the molten weld layer 30 can completely fill the trench 151, allowing the weld layer 30 to contact the sidewalls of the cell body 10 and the first passivation layer 15. This increases the contact area between the weld layer 30 and the cell, thereby increasing the welding stability between the weld layer 30 and the cell body 10, which is beneficial for improving the pull-out force of the solder strip 40 and enhancing the welding stability of the solder strip 40.

[0115] In some examples, refer to Figure 5 As shown, along the width direction of the trench 151, the maximum dimension of the welding layer 30 can be greater than the width of the trench 151. That is, when screen printing the welding layer 30, the width of the welding layer 30 can be greater than the width of the trench 151. This ensures that the welding layer 30 can completely fill the trench 151, thereby increasing the welding stability between the welding layer 30 and the battery cell body 10, which is beneficial for improving the pull-out force of the solder ribbon 40 and enhancing the welding stability of the solder ribbon 40.

[0116] In some examples, the surface of the solar cell can have a pyramidal textured surface. In some examples of embodiments of this application, the solder layer 30 can fill part of the pyramidal textured surface. For example, after forming a seed layer 20 on the surface of the solar cell body 10, since the overall thickness of the seed layer 20 is in the nanometer range, the surface morphology of the seed layer 20 can also be a pyramidal textured surface. Thus, when the solder layer 30 is screen-printed on the surface of the seed layer 20, the solder layer 30 can fill part of the pyramidal textured surface, thereby increasing the welding area between the solder layer 30 and the seed layer 20, which is beneficial to improving the pull-out force of the solder ribbon 40, preventing the solder ribbon 40 from being pulled out, and thus improving the stability of the welding between the solder ribbon 40 and the solar cell body.

[0117] In addition, in some examples of embodiments of this application, the solder layer 30 is formed by screen printing on the seed layer 20, so that there is no need to cover the surface of the solder strip 40 with a tin layer, which can reduce the production cost of the solder strip 40.

[0118] In some examples, the seed layer 20 may include at least one of copper, nickel, and a copper-nickel alloy. Thus, compared to the use of silver paste as the seed layer 20 in related technologies, the cost of the seed layer 20 can be reduced, thereby reducing the manufacturing cost of the solar cell.

[0119] In some examples, the thickness of the seed layer 20 can be 50nm-300nm. For example, the thickness of the seed layer 20 can be 50nm, 100nm, 150nm, 200nm, 250nm, or 300nm, etc.

[0120] It should be noted that the numerical values ​​and ranges involved in the embodiments of this application are approximate values. Due to the influence of the manufacturing process, there may be a certain range of errors, which can be considered negligible by those skilled in the art.

[0121] In some examples, solder layer 30 may include solder paste. Solder paste may include tin, bismuth, and silver.

[0122] In some examples, the solder paste contains 35%-65% tin, 5%-58% bismuth, and 0.3%-1.0% silver.

[0123] In some examples, the solder paste can contain 64.7% tin, 35% bismuth, and 0.3% silver. This reduces the silver content, which helps lower the manufacturing cost of the solar cells.

[0124] In some examples, the maximum width of the weld layer 30 is 20μm-100μm. For example, the maximum width of the weld layer 30 can be 20μm, 50μm, 75μm, or 100μm, etc.

[0125] In some examples, the welding temperature for welding the weld strip 40 to the weld layer 30 can be 140℃-220℃. For example, the welding temperature can be 140℃, 180℃, 200℃ or 220℃, etc.

[0126] Figure 6 This is a schematic diagram of the overall structure of the battery cell provided in some embodiments of this application.

[0127] In some examples, refer to Figure 6As shown, this application embodiment provides a battery cell. The battery cell may include a battery cell body 10. It is understood that the specific arrangement of the battery cell body 10 in this application embodiment may be the same as, similar to, or analogous to the arrangement of the battery cell body 10 in the foregoing embodiments of this application. For details, please refer to the detailed description of the foregoing embodiments of this application; this application embodiment will not repeat the details further.

[0128] In some examples, refer to Figure 6 As shown, the solar cell may include a seed layer 20. At least a portion of the seed layer 20 may be located on at least one side of the solar cell body 10. The seed layer 20 may be electrically connected to the solar cell body 10.

[0129] In some examples, refer to Figure 6 As shown, the solar cell may include a welding layer 30. The welding layer 30 may be located at least on the side of the seed layer 20 opposite to the solar cell. The welding layer 30 may be used to weld the solder strip 40.

[0130] In some examples, the weld layer 30 may cover the sidewalls of the seed layer 20. For instance, during the welding process, when the weld layer 30 is in a molten state, it may flow to the sidewalls of the seed layer 20. This increases the contact area between the weld layer 30 and the seed layer 20, which is beneficial for improving the stability of the welding of the weld strip 40.

[0131] It is understood that the battery cells provided in some examples of the embodiments of this application have the same or corresponding technical features as the battery cell preparation methods provided in the foregoing embodiments of this application; therefore, the battery cells provided in some embodiments of this application may have the same or similar technical effects as the battery cell preparation methods provided in the foregoing embodiments of this application. For details, please refer to the detailed description of the foregoing embodiments of this application. The embodiments of this application will not repeat the details here.

[0132] In some examples, embodiments of this application also provide a photovoltaic module. The photovoltaic module may include at least one solar cell provided in the foregoing embodiments of this application.

[0133] Reference Figure 6 As shown, the photovoltaic module may include solder ribbon 40. Solder ribbon 40 can be soldered to the solder layer 30 of the solar cell.

[0134] In some examples, the solder ribbon 40 may include a triangular solder ribbon 40. That is, the cross-sectional shape of the solder ribbon 40 can be triangular. In this embodiment, the welding layer 30 is formed by screen printing on the seed layer 20. During the welding process, the surface of the seed layer 20 is flat, and when the welding layer 30 is in a molten state, it is convenient to automatically align the triangular solder ribbon 40. This facilitates the reflection of incident light by the inclined surface of the triangular solder ribbon 40 to the solar cell for absorption and utilization, thereby improving the secondary utilization rate of incident light and improving the photoelectric conversion efficiency of the solar cell.

[0135] In some examples, the solder ribbon 40 may include a copper core. The surface of the solder ribbon 40 may be covered with a silver layer. That is, the silver layer may wrap around the surface of the copper core. In other words, all three surfaces of the triangular solder ribbon 40 may be covered with a silver layer. In this way, the incident light can be reflected by the silver layer, which can improve the utilization rate of the incident light. In addition, by forming the solder layer 30 by screen printing on the seed layer 20, it is not necessary to polish the silver layer on the surface of the triangular solder ribbon 40 and apply tin on one side, which facilitates the soldering of the triangular solder ribbon 40, improves the production efficiency of the solar cell, and reduces the production cost of the triangular solder ribbon 40.

[0136] In some examples, the thickness of the silver layer can be 100nm-500nm. For example, the thickness of the silver layer can be 100nm, 300nm, or 500nm.

[0137] In some examples, the maximum width of the solder strip 40 can be 80μm-200μm. For example, the maximum width of the solder strip 40 can be 80μm, 120μm, 160μm or 200μm.

[0138] In some examples, where a photovoltaic module comprises multiple cells, the solder strips 40 of adjacent cells can be connected to each other, thereby connecting multiple cells in series to form a photovoltaic module.

[0139] It is understood that the photovoltaic modules provided in some examples of the embodiments of this application may have the same or corresponding technical features as the cell preparation methods provided in the foregoing embodiments of this application; therefore, the photovoltaic modules provided in the embodiments of this application may have the same or similar technical effects as the cell preparation methods provided in the foregoing embodiments of this application. For details, please refer to the detailed description of the foregoing embodiments of this application, which will not be repeated in the embodiments of this application.

[0140] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0141] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A method for preparing a battery cell, characterized in that, include: Provide the battery cell body; A seed layer is deposited on the surface of the battery cell body, the surface of the seed layer facing away from the battery cell body is parallel to the surface of the battery cell body, and the seed layer is electrically connected to the battery cell body; A welding layer is printed on the surface of the seed layer; the welding layer is used to weld the solder strip.

2. The method for preparing a battery cell according to claim 1, characterized in that, The seed layer covers one side surface of the battery cell body; the method further includes: The seed layer is graphically processed to remove the seed layer outside the area covered by the solder layer.

3. The method for preparing a battery cell according to claim 1, characterized in that, At least one side surface of the battery cell body has a transparent conductive oxide layer, the transparent conductive oxide layer covering the surface of the battery cell body; the step of depositing and forming a seed layer on the surface of the battery cell body includes: The seed layer is deposited on the surface of the transparent conductive oxide layer opposite to the battery cell body.

4. The method for preparing a battery cell according to claim 1, characterized in that, At least one side surface of the battery cell body has a first passivation layer, the first passivation layer covering the surface of the battery cell body; prior to the step of depositing and forming a seed layer on the surface of the battery cell body, the method further includes: The first passivation layer is patterned to form a plurality of trenches on the first passivation layer, the trenches penetrating the first passivation layer; The step of depositing a seed layer on the surface of the battery cell body includes: depositing the seed layer on the side of the first passivation layer opposite to the battery cell body and on the inner wall of the trench; wherein the seed layer located in the trench is electrically connected to the battery cell body.

5. The method for preparing a battery cell according to claim 4, characterized in that, The step of printing a welding layer on the surface of the seed layer includes: The solder layer is formed by printing in the trench, and the solder layer is connected to at least the seed layer in the trench.

6. The method for preparing a battery cell according to claim 5, characterized in that, The projection of the weld layer onto the cell body covers the projection of the trench onto the cell body.

7. The method for preparing a battery cell according to claim 6, characterized in that, The maximum dimension of the weld layer along the width direction of the trench is greater than the width of the trench.

8. The method for preparing a battery cell according to any one of claims 1-7, characterized in that, The seed layer comprises at least one of copper, nickel, and copper-nickel alloy; the thickness of the seed layer is 50 nm to 300 nm. And / or, The solder layer includes solder paste, which comprises tin, bismuth, and silver, wherein the percentage content of tin is 35%-65%, the percentage content of bismuth is 5%-58%, and the percentage content of silver is 0.3%-1.0%; the maximum width of the solder layer is 20μm-100μm. And / or, The welding temperature for the welding strip in the welding layer is 140℃-220℃.

9. A battery cell, characterized in that, include: The battery cell itself; A seed layer is located on at least one side of the battery cell body, the surface of the seed layer facing away from the battery cell is parallel to the surface of the battery cell body, and the seed layer is electrically connected to the battery cell body. A welding layer, wherein the welding layer is located at least on the side of the seed layer opposite to the cell body; the welding layer is used for welding the solder strip.

10. A photovoltaic module, characterized in that, include: At least one battery cell as described in claim 9; as well as The welding strip is welded to the welding layer of the battery cell.

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