Micro light emitting diode chip and method of forming the same

Abstract

A micro light emitting diode chip and a forming method thereof, wherein the micro light emitting diode chip comprises: a first light emitting part, the first light emitting part comprises: a plurality of first pixel structures, each first pixel structure emits light of a first wavelength; a second light emitting part, the second light emitting part comprises: a plurality of second pixel structures, each second pixel structure emits light of a second wavelength, the first wavelength and the second wavelength are different; the first light emitting part and the second light emitting part are bonded and connected, the first pixel structure and the corresponding second pixel structure are oppositely arranged along the direction of the component stack. By integrating the light emitting pixel structures capable of emitting light of different wavelengths in the same chip, the stacking of pixel structures of different colors can be completed at the same chip end, thereby effectively reducing the volume when different color chips are used together.

Description

Technical Field

[0001] This invention relates to the field of microdisplay technology, and more particularly to a micro light-emitting diode chip and a method for forming the same. Background Technology

[0002] Inorganic micro-pixel light-emitting diodes, also known as micro LEDs or μ-LEDs, are a high-pixel-density LED planar display technology that uses micrometer-scale LEDs as pixels, assembled on a CMOS backplane at micrometer-scale intervals. The display principle involves thinning, miniaturizing, and arraying the LED structure, reducing its size to only a few to tens of micrometers. These micro-LED chips are then mass-produced and transferred onto a TFT or CMOS backplane. Micro LED displays possess excellent characteristics such as high luminous efficiency, high brightness, short response time, and high reliability, and are hailed by the industry as the next-generation display technology and the ultimate form of display.

[0003] However, existing miniature light-emitting diode chips still have many problems. Summary of the Invention

[0004] The technical problem solved by the present invention is to provide a miniature light-emitting diode chip and a method for forming the same, so as to reduce the size when chips of different colors are used together.

[0005] To address the aforementioned problems, the present invention provides a micro light-emitting diode chip, comprising: a first light-emitting part, the first light-emitting part comprising: a plurality of mutually discrete first pixel structures, each first pixel structure emitting light of a first wavelength; a second light-emitting part, the second light-emitting part comprising: a plurality of second pixel structures corresponding to the first pixel structures, each second pixel structure emitting light of a second wavelength, the first wavelength and the second wavelength being different; the first light-emitting part and the second light-emitting part are bonded together, and the first pixel structures and the corresponding second pixel structures are disposed opposite each other along the component stacking direction.

[0006] Optionally, the first light-emitting portion further includes: a first dielectric layer located on a plurality of first pixel structures, and the first dielectric layer covers the plurality of first pixel structures; the second light-emitting portion further includes: a second dielectric layer located on a plurality of second pixel structures, and the second dielectric layer covers the plurality of second pixel structures; the first dielectric layer and the second dielectric layer are bonded together, so that the first light-emitting portion and the second light-emitting portion are bonded together.

[0007] Optionally, along the direction of component stacking, the first pixel structure has a first projection area, and the second pixel structure corresponding to the first pixel structure has a second projection area, wherein the first projection area and the second projection area completely overlap or at least partially overlap.

[0008] Optionally, the first pixel structure includes: a first epitaxial layer, a second epitaxial layer, and a first multiple quantum well layer located between the first epitaxial layer and the second epitaxial layer; the first epitaxial layer has a first doped ion, the second epitaxial layer has a second doped ion, and the first doped ion and the second doped ion have different electrical types.

[0009] Optionally, the first light-emitting part further includes: a metal layer; the metal layer includes: a plurality of first metal strips arranged in parallel along a first direction and extending along a second direction, the first direction being perpendicular to the second direction; a first bus extending along the first direction, the plurality of first metal strips being electrically connected to the first bus respectively; a plurality of second metal strips arranged in parallel along the first direction and extending along the second direction, the plurality of first metal strips and the plurality of second metal strips being arranged at intervals; a second bus extending along the first direction, the plurality of second metal strips being electrically connected to the second bus respectively.

[0010] Optionally, the metal layer is a non-transparent metal material; non-transparent metal materials include: chromium, titanium, platinum, gold, tin, aluminum, nickel, copper or silver.

[0011] Optionally, a plurality of the first pixel structures are electrically connected to a plurality of the first metal strips, and the plurality of the first pixel structures are arranged in an array along the first direction and the second direction.

[0012] Optionally, the first epitaxial layers of a plurality of the first pixel structures are electrically connected to a plurality of the first metal strips.

[0013] Optionally, the first light-emitting part further includes: a first ohmic contact layer located on the first metal strip, the second metal strip, the first bus and the second bus; and a plurality of the first pixel structures are electrically connected to the first ohmic contact layer respectively.

[0014] Optionally, the first epitaxial layers of a plurality of first pixel structures are electrically connected to a plurality of first ohmic contact layers.

[0015] Optionally, the material of the first ohmic contact layer includes: a transparent metal material; the transparent metal material includes: indium tin oxide.

[0016] Optionally, the first light-emitting part further includes: a plurality of second ohmic contact layers arranged in parallel along the second direction and extending along the first direction, each of the second ohmic contact layers being electrically connected to a plurality of the first pixel structures arranged along the first direction.

[0017] Optionally, the first dielectric layer includes: a first sub-dielectric layer, the first sub-dielectric layer being located on a plurality of the first pixel structures, the first sub-dielectric layer covering the plurality of the first pixel structures, and the second ohmic contact layer being located on the first sub-dielectric layer.

[0018] Optionally, the first dielectric layer further includes a second sub-dielectric layer, which is located on the first sub-dielectric layer and covers the second ohmic contact layer.

[0019] Optionally, the material of the second ohmic contact layer includes: a transparent metal material; the transparent metal material includes: indium tin oxide.

[0020] Optionally, the second sub-dielectric layer is bonded to the second dielectric layer.

[0021] Optionally, the first light-emitting part further includes: a plurality of first conductive plugs, each of which is electrically connected to a plurality of second ohmic contact layers; a plurality of second conductive plugs, each of which is electrically connected to a plurality of second metal strips; a plurality of third conductive plugs, each of which is electrically connected to the first bus; and a plurality of fourth conductive plugs, each of which is electrically connected to the second bus.

[0022] Optionally, the second pixel structure includes: a third epitaxial layer, a fourth epitaxial layer, and a second multiple quantum well layer located between the third epitaxial layer and the fourth epitaxial layer; the third epitaxial layer contains the first doped ion, and the fourth epitaxial layer contains the second doped ion.

[0023] Optionally, the fourth epitaxial layers of several second pixel structures are interconnected.

[0024] Optionally, the second light-emitting part further includes: a plurality of third ohmic contact layers, each of the third ohmic contact layers being electrically connected to the corresponding second pixel structure.

[0025] Optionally, each of the third ohmic contact layers is electrically connected to the third epitaxial layer of the corresponding second pixel structure.

[0026] Optionally, the material of the third ohmic contact layer includes: a transparent metal material; the transparent metal material includes: indium tin oxide.

[0027] Optionally, the second dielectric layer may also cover a plurality of the third ohmic contact layers.

[0028] Optionally, the second light-emitting portion further includes: a plurality of fifth conductive plugs, each of which is electrically connected to the fourth epitaxial layer of the second pixel structure and bonded to a corresponding plurality of first conductive plugs; a plurality of sixth conductive plugs, each of which is electrically connected to a corresponding third ohmic contact layer and bonded to a corresponding plurality of second conductive plugs; a plurality of seventh conductive plugs, each of which is electrically connected to a corresponding plurality of third conductive plugs; and a plurality of eighth conductive plugs, each of which is electrically connected to a corresponding plurality of fourth conductive plugs.

[0029] Optionally, it further includes: a first electrode plate, which is electrically connected to a plurality of the fifth conductive plugs; a second electrode plate, which is electrically connected to a plurality of the seventh conductive plugs; and a third electrode plate, which is electrically connected to a plurality of the eighth conductive plugs.

[0030] Accordingly, the present invention also provides a method for forming a micro light-emitting diode chip, comprising: forming a first light-emitting portion, wherein forming the first light-emitting portion comprises: forming a plurality of mutually discrete first pixel structures, each of the first pixel structures emitting light of a first wavelength; forming a second light-emitting portion, wherein forming the second light-emitting portion comprises: forming a plurality of second pixel structures corresponding to the first pixel structures, each of the second pixel structures emitting light of a second wavelength, wherein the first wavelength and the second wavelength are different; bonding the first light-emitting portion and the second light-emitting portion such that the first pixel structure and the corresponding second pixel structure are disposed opposite to each other along the direction of component stacking.

[0031] Optionally, forming the first light-emitting portion further includes: forming a first dielectric layer on a plurality of first pixel structures, wherein the first dielectric layer covers the plurality of first pixel structures; forming the second light-emitting portion further includes: forming a second dielectric layer on a plurality of second pixel structures, wherein the second dielectric layer covers the plurality of second pixel structures; bonding the first dielectric layer and the second dielectric layer to bond the first light-emitting portion and the second light-emitting portion together.

[0032] Optionally, along the direction of component stacking, the first pixel structure has a first projection area, and the second pixel structure corresponding to the first pixel structure has a second projection area, wherein the first projection area and the second projection area completely overlap or at least partially overlap.

[0033] Optionally, forming the first pixel structure includes: forming a first epitaxial layer, a second epitaxial layer, and a first multiple quantum well layer located between the first epitaxial layer and the second epitaxial layer; the first epitaxial layer has a first doped ion, the second epitaxial layer has a second doped ion, and the first doped ion and the second doped ion have different electrical types.

[0034] Optionally, forming the first light-emitting portion further includes: forming a metal layer; forming the metal layer includes: forming a plurality of first metal strips arranged in parallel along a first direction and extending along a second direction, the first direction being perpendicular to the second direction; forming a first bus extending along the first direction, the plurality of first metal strips being electrically connected to the first bus respectively; forming a plurality of second metal strips arranged in parallel along the first direction and extending along the second direction, the plurality of first metal strips and the plurality of second metal strips being spaced apart; forming a second bus extending along the first direction, the plurality of second metal strips being electrically connected to the second bus respectively.

[0035] Optionally, the metal layer is a non-transparent metallic material.

[0036] Optionally, a plurality of the first pixel structures are electrically connected to a plurality of the first metal strips, and the plurality of the first pixel structures are arranged in an array along the first direction and the second direction.

[0037] Optionally, the first epitaxial layers of a plurality of the first pixel structures are electrically connected to a plurality of the first metal strips.

[0038] Optionally, forming the first light-emitting portion further includes: forming a first ohmic contact layer on the first metal strip, the second metal strip, the first bus and the second bus; and electrically connecting a plurality of the first pixel structures to the first ohmic contact layer respectively.

[0039] Optionally, the method for forming the metal layer and the first ohmic contact layer includes: forming a metal material layer; forming a first ohmic contact material layer on the metal material layer; and etching the metal material layer and the first ohmic contact material layer to form the metal layer and the first ohmic contact layer.

[0040] Optionally, the first epitaxial layers of a plurality of first pixel structures are electrically connected to a plurality of first ohmic contact layers.

[0041] Optionally, forming the first light-emitting portion further includes: forming a plurality of second ohmic contact layers arranged in parallel along the second direction and extending along the first direction, each of the second ohmic contact layers being electrically connected to a plurality of the first pixel structures arranged along the first direction.

[0042] Optionally, forming the first dielectric layer includes: forming a first sub-dielectric layer, the first sub-dielectric layer being located on a plurality of the first pixel structures, the first sub-dielectric layer covering the plurality of the first pixel structures, and the second ohmic contact layer being located on the first sub-dielectric layer.

[0043] Optionally, forming the first dielectric layer further includes: forming a second sub-dielectric layer, the second sub-dielectric layer being located on the first sub-dielectric layer, and the second sub-dielectric layer covering the second ohmic contact layer.

[0044] Optionally, after bonding the first light-emitting portion and the second light-emitting portion, the second sub-dielectric layer is connected to the second dielectric layer.

[0045] Optionally, forming the first light-emitting part further includes: forming a plurality of first conductive plugs, the plurality of first conductive plugs being electrically connected to a plurality of second ohmic contact layers respectively; forming a plurality of second conductive plugs, the plurality of second conductive plugs being electrically connected to a plurality of second metal strips respectively; forming a plurality of third conductive plugs, the plurality of third conductive plugs being electrically connected to the first bus respectively; and forming a plurality of fourth conductive plugs, the plurality of fourth conductive plugs being electrically connected to the second bus respectively.

[0046] Optionally, forming the second pixel structure includes: forming a third epitaxial layer, a fourth epitaxial layer, and a second multiple quantum well layer located between the third epitaxial layer and the fourth epitaxial layer; the third epitaxial layer contains the first doped ion, and the fourth epitaxial layer contains the second doped ion.

[0047] Optionally, the fourth epitaxial layers of several second pixel structures are interconnected.

[0048] Optionally, forming the second light-emitting portion further includes forming a plurality of third ohmic contact layers, each of the third ohmic contact layers being electrically connected to the corresponding second pixel structure.

[0049] Optionally, each of the third ohmic contact layers is electrically connected to the third epitaxial layer of the corresponding second pixel structure.

[0050] Optionally, the second dielectric layer may also cover a plurality of the third ohmic contact layers.

[0051] Optionally, forming the second light-emitting portion further includes: forming a plurality of fifth conductive plugs, the plurality of fifth conductive plugs being electrically connected to the fourth epitaxial layer of the second pixel structure respectively; forming a plurality of sixth conductive plugs, the plurality of sixth conductive plugs being electrically connected to the corresponding third ohmic contact layer respectively; forming a plurality of seventh conductive plugs; forming a plurality of eighth conductive plugs; after bonding the first light-emitting portion and the second light-emitting portion, the plurality of fifth conductive plugs are respectively bonded to the corresponding plurality of first conductive plugs; the plurality of sixth conductive plugs are respectively bonded to the corresponding plurality of second conductive plugs; the plurality of seventh conductive plugs are respectively electrically connected to the corresponding plurality of third conductive plugs; and the plurality of eighth conductive plugs are respectively electrically connected to the corresponding plurality of fourth conductive plugs.

[0052] Optionally, after bonding the first light-emitting portion and the second light-emitting portion, the method further includes: forming a first electrode plate, the first electrode plate being electrically connected to a plurality of the fifth conductive plugs; forming a second electrode plate, the second electrode plate being electrically connected to a plurality of the seventh conductive plugs; and forming a third electrode plate, the third electrode plate being electrically connected to a plurality of the eighth conductive plugs.

[0053] Compared with the prior art, the technical solution of the present invention has the following advantages:

[0054] The micro light-emitting diode chip of the present invention includes: a first light-emitting part, which includes a plurality of mutually discrete first pixel structures, each first pixel structure emitting light of a first wavelength; and a second light-emitting part, which includes a plurality of second pixel structures corresponding to the first pixel structures, each second pixel structure emitting light of a second wavelength, wherein the first wavelength and the second wavelength are different; the first light-emitting part and the second light-emitting part are bonded together. By integrating light-emitting pixel structures emitting different wavelengths of light into the same chip, pixel structures of different colors can be stacked on the same chip end, thereby effectively reducing the size when different color chips are used together.

[0055] Furthermore, the metal layer is made of a non-transparent metallic material. This non-transparent metallic material not only fulfills the design requirements for electrical connections between the first pixel structures, but also serves as a light reflector, directing the light emitted from the first and second pixel structures towards a predetermined light surface.

[0056] Furthermore, it also includes: a first electrode plate, which is electrically connected to a plurality of fifth conductive plugs; a second electrode plate, which is electrically connected to a plurality of seventh conductive plugs; and a third electrode plate, which is electrically connected to a plurality of eighth conductive plugs. By leading out three electrode plates, and with the first electrode plate serving as the common electrode for the same doped epitaxial layer in the first pixel structure and the second pixel structure, different combinations of power supply between the three electrode plates can achieve monochromatic emission of the first pixel structure, monochromatic emission of the second pixel structure, and mixed emission of the first pixel structure and the second pixel structure, thereby meeting the needs of various application scenarios.

[0057] The method for forming a micro light-emitting diode chip according to the technical solution of the present invention includes: forming a first light-emitting portion, the first light-emitting portion including a plurality of mutually discrete first pixel structures, each first pixel structure emitting light of a first wavelength; forming a second light-emitting portion, the second light-emitting portion including a plurality of second pixel structures corresponding to the first pixel structures, each second pixel structure emitting light of a second wavelength, wherein the first wavelength and the second wavelength are different; and bonding the first light-emitting portion and the second light-emitting portion. By integrating light-emitting pixel structures emitting different wavelengths of light into the same chip, pixel structures of different colors can be stacked on the same chip end, thereby effectively reducing the size when chips of different colors are used together.

[0058] Furthermore, the metal layer is made of a non-transparent metallic material. This non-transparent metallic material not only fulfills the design requirements for electrical connections between the first pixel structures, but also serves as a light reflector, directing the light emitted from the first and second pixel structures towards a predetermined light surface.

[0059] Furthermore, after bonding the first and second light-emitting portions, the method further includes: forming a first electrode plate, which is electrically connected to a plurality of fifth conductive plugs; forming a second electrode plate, which is electrically connected to a plurality of seventh conductive plugs; and forming a third electrode plate, which is electrically connected to a plurality of eighth conductive plugs. By leading out three electrode plates, and with the first electrode plate serving as the common electrode for the same doped epitaxial layer in the first and second pixel structures, different combinations of power supply between the three electrode plates can achieve monochromatic light emission from the first pixel structure, monochromatic light emission from the second pixel structure, and mixed light emission from the first and second pixel structures, thereby meeting the needs of various application scenarios. Attached Figure Description

[0060] Figures 1 to 34 This is a schematic diagram of the structure of each step in the method for forming a micro light-emitting diode chip according to an embodiment of the present invention. Detailed Implementation

[0061] As described in the background section, existing miniature light-emitting diode (LED) chips still have many problems. These will be explained in detail below.

[0062] Current micro LED chips all emit monochromatic light. When multiple monochromatic micro LED chips are used in combination, the overall size becomes larger, which is not conducive to integration into electronic products for practical applications.

[0063] Based on this, the present invention provides a micro light-emitting diode chip and a method for forming the same chip. By integrating light-emitting pixel structures of different colors into the same chip, the pixel structures of different colors can be stacked on the same chip end, thereby effectively reducing the size when different color chips are used together.

[0064] To make the above-mentioned objects, features, and advantages of the present invention more apparent and understandable, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0065] In the description of this invention, it should be understood that the terms "upper," "lower," "top surface," "bottom surface," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the indicated position or element must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations of the invention. Furthermore, the terms "first" and "second" are used only to distinguish an entity or operation from another entity or operation, and do not require or imply any actual relationship, order, or relative importance between these entities or operations.

[0066] Figures 1 to 34 This is a schematic diagram of the structure of each step in the method for forming a micro light-emitting diode chip according to an embodiment of the present invention.

[0067] The process of forming the first light-emitting part includes: forming a plurality of mutually discrete first pixel structures, each of which emits light of a first wavelength. For details on the process of forming the first light-emitting part, please refer to [link to documentation / reference]. Figures 1 to 20 .

[0068] Please refer to Figure 1 Substrate 100 is provided.

[0069] In this embodiment, the substrate 100 needs to be retained after the final formation of the micro light-emitting diode chip, and the substrate 100 serves as a base to support the subsequent formation of various component structures.

[0070] In this embodiment, the substrate 100 is made of silicon (Si).

[0071] Please refer to Figure 2 An insulating layer 101 is formed on a substrate 100; a first sub-metal material layer 102 is formed on the insulating layer 101.

[0072] In this embodiment, the first sub-metal material layer 102 is used to bond with the epitaxial portion that subsequently forms the first pixel structure.

[0073] In this embodiment, the insulating layer 101 is made of silicon dioxide (SiO2) or silicon nitride (SiN). x One or more of silicon oxynitride (SiON), titanium dioxide (TiO2), and aluminum oxide (Al2O3).

[0074] In this embodiment, the material of the first sub-metal material layer 102 is a non-transparent metal material, specifically chromium (Cr), titanium (Ti), platinum (Pt), gold (Au), tin (Sn), aluminum (Al), nickel (Ni), copper (Cu) or silver (Ag).

[0075] Please refer to Figure 3 A first epitaxial substrate 103 is provided.

[0076] In this embodiment, the first epitaxial substrate 103 serves as the substrate for the epitaxial portion forming the first light-emitting part, and it needs to be removed after the epitaxial portion is grown.

[0077] In this embodiment, the first epitaxial substrate 103 may be a silicon substrate or a sapphire substrate.

[0078] Please refer to Figure 4 A second epitaxial material layer 104, a first multi-quantum well material layer 105, a first epitaxial material layer 106, and a second sub-metal material layer 107 are sequentially formed on the first epitaxial substrate 103.

[0079] In this embodiment, a first multi-quantum well material layer 105 is formed between a first epitaxial material layer 106 and a second epitaxial material layer 104, and after subsequent pattern etching, a plurality of first pixel structures are formed.

[0080] In this embodiment, the materials of the first epitaxial material layer 106 and the second epitaxial material layer 104 can be gallium nitride (GaN), indium gallium nitride (InGaN), aluminum gallium indium phosphide (AlGaInP), or other III-V group semiconductor materials. The material of the first multi-quantum well material layer 105 can be gallium nitride, indium gallium nitride, aluminum indium phosphide (AlGaP), or gallium indium phosphide (GaInP), wherein gallium nitride and indium gallium nitride are used to generate blue or green light, and indium gallium nitride, aluminum indium phosphide, and gallium indium phosphide are used to generate red light.

[0081] In this embodiment, a first ohmic contact material layer 108 is also formed between the first epitaxial material layer 106 and the second sub-metal material layer 107. The first ohmic contact material layer 108 is used to reduce the contact resistance between the first epitaxial material layer 106 and the second sub-metal material layer 107.

[0082] In this embodiment, the first ohmic contact material layer 108 is made of a transparent conductive material, which includes a transparent metal material or a transparent conductive oxide material. The transparent conductive oxide material may be, but is not limited to, an N-type oxide semiconductor, and is preferably indium tin oxide (ITO).

[0083] In this embodiment, the material of the second sub-metal material layer 107 is a non-transparent metal material, specifically chromium, titanium, platinum, gold, tin, aluminum, nickel, copper or silver.

[0084] Please refer to Figure 5 The first sub-metal material layer 102 and the second sub-metal material layer 107 are bonded together.

[0085] In this embodiment, by bonding the first sub-metal material layer 102 and the second sub-metal material layer 107, the epitaxial portion forming the first light-emitting part is integrated with the substrate 100 into an integral structure.

[0086] In this embodiment, the bonding method of the first sub-metal material layer 102 and the second sub-metal material layer 107 adopts a hybrid bonding method.

[0087] In this embodiment, the bonded first sub-metal material layer 102 and the second sub-metal material layer 107 form a metal material layer 109.

[0088] In this embodiment, since the metal material layer 109 is formed by bonding the first sub-metal material layer 102 and the second sub-metal material layer 107 together, the material of the metal material layer 109 is the same as that of the first sub-metal material layer and the second sub-metal material layer.

[0089] Please refer to Figure 6 Remove the first epitaxial substrate 103.

[0090] In this embodiment, since the first epitaxial substrate 103 is only a temporary substrate for forming the epitaxial portion, it needs to be removed after the first sub-metal material layer 102 and the second sub-metal material layer 107 are bonded.

[0091] Please continue to refer to this. Figure 6 In this embodiment, after removing the first epitaxial substrate 103, the method further includes: etching the second epitaxial material layer 104; and after etching a portion of the second epitaxial material layer 104, forming a fourth ohmic contact material layer 110 on the second epitaxial material layer 104.

[0092] In this embodiment, the fourth ohmic contact material layer 110 is made of a transparent conductive material, which includes a transparent metal material or a transparent conductive oxide material. The transparent conductive oxide material may be, but is not limited to, an N-type oxide semiconductor, and is preferably indium tin oxide.

[0093] In this embodiment, since the surface of the second epitaxial material layer 104 will be oxidized after the first epitaxial substrate 103 is removed, the purpose of etching part of the second epitaxial material layer 104 is to remove the oxide layer.

[0094] In this embodiment, the fourth ohmic contact material layer 110 formed on the second epitaxial material layer 104 can be very thin. The function of the fourth ohmic contact material layer 110 is to test its electrical contact performance with the second epitaxial material layer 104.

[0095] Please refer to Figure 7 The second epitaxial material layer 104, the first multi-quantum well material layer 105, and the first epitaxial material layer 106 are patterned and etched until the first ohmic contact material layer 108 is exposed, forming a number of mutually discrete first pixel structures, each of which emits light of a first wavelength.

[0096] In this embodiment, forming the first pixel structure includes: forming a first epitaxial layer 106a, a second epitaxial layer 104a, and a first multi-quantum well layer 105a located between the first epitaxial layer 106a and the second epitaxial layer 104a; the first epitaxial layer 106a contains a first doped ion, and the second epitaxial layer 104a contains a second doped ion, the first doped ion and the second doped ion have different electrical types; wherein, the first epitaxial layer 106a is formed by patterning and etching the first epitaxial material layer 106; the first multi-quantum well layer 105a is formed by patterning and etching the first multi-quantum well material layer 105; and the second epitaxial layer 104a is formed by patterning and etching the second epitaxial material layer 104.

[0097] In this embodiment, since the first epitaxial layer 106a and the second epitaxial layer 104a are formed by patterning etching of the first epitaxial material layer 106 and the second epitaxial material layer 104, respectively, the first epitaxial layer 106a and the second epitaxial layer 104a are made of the same material as the first epitaxial material layer 106 and the second epitaxial material layer 104, respectively. The first multiple quantum well layer 105a is formed by patterning etching of the first multiple quantum well material layer 105, therefore the first multiple quantum well layer 105a and the first multiple quantum well material layer 105 are made of the same material.

[0098] In this embodiment, the first doped ion in the first epitaxial layer 106a is a P-type doped ion, and the second doped ion in the second epitaxial layer 104a is an N-type doped ion.

[0099] It should be noted that multiple quantum well layers can emit light of different colors mainly because they have specific physical properties that allow recombination of electrons and holes to occur between different energy levels, thereby emitting light of different wavelengths.

[0100] The technology behind multiple quantum well layers involves fundamental concepts in quantum physics, where the energy states of electrons and holes are confined to specific regions, resulting in discrete energy levels. When an electron transitions from a higher energy level to a lower energy level, it releases a photon, the energy of which depends on the energy difference between the levels. Because the structure of multiple quantum well layers allows for precise control over the positions of these energy levels, it is possible to precisely control the wavelength of the emitted light, i.e., its color.

[0101] Specifically, multiple quantum well layers are composed of alternating thin layers of two or more different semiconductor materials. The thickness and material selection of these layers determine the characteristics of the energy levels. By adjusting the thickness and material of these layers, the recombination process of electrons and holes can be precisely controlled, thereby controlling the wavelength of the emitted light and achieving the emission of different colors of light. For example, by adjusting the structural parameters of InGaAs / InGaAsP multiple quantum well layers, laser outputs with wavelengths of 1.3 micrometers and 1.5 micrometers can be obtained. These specific wavelengths of light correspond to different colors required in communication and display technologies.

[0102] Furthermore, the application of multiple quantum well layers is not limited to emitting light of a single color. By designing and adjusting the combination and structure of materials, it is possible to achieve the output of multiple colors, which is of great significance for fields such as display technology and optical communication. For example, quantum dot technology, by controlling the size and materials of quantum dots, can achieve full-color displays, which is widely used in modern display technology.

[0103] In this embodiment, the light of the first wavelength corresponds to the light of the first color, which includes red light, green light, or blue light.

[0104] Please continue to refer to this. Figure 7 In this embodiment, the patterning etching process also includes etching the fourth ohmic contact material layer 110 to form the fourth ohmic contact layer 110a on the second epitaxial layer 104a.

[0105] In this embodiment, the fourth ohmic contact layer 110a is formed by patterning and etching the fourth ohmic contact material layer 110. Therefore, the fourth ohmic contact layer 110a and the fourth ohmic contact material layer 110 are made of the same material. The purpose of using a transparent metal material for the fourth ohmic contact layer 110a is to reduce the obstruction of light emitted by the first pixel structure.

[0106] Please refer to Figures 8 to 10 , Figure 8 This is a top view showing the relative positions of the metal layer 109a and several first pixel structures after omitting some of their structures. Figure 9 yes Figure 8 Enlarged cross-section diagram along line AA. Figure 10 yes Figure 8 An enlarged cross-sectional view along the BB line shows that after forming several first pixel structures, the metal material layer 109 and the first ohmic contact material layer 108 are etched to form the metal layer 109a and the first ohmic contact layer 108a.

[0107] In this embodiment, forming the metal layer 109a includes: forming a plurality of first metal strips 1091 arranged in parallel along a first direction X and extending along a second direction Y, wherein the first direction X is perpendicular to the second direction Y; forming a first bus 1092 extending along the first direction X, wherein the plurality of first metal strips 1091 are electrically connected to the first bus 1092 respectively; forming a plurality of second metal strips 1093 arranged in parallel along the first direction X and extending along the second direction Y, wherein the plurality of first metal strips 1091 and the plurality of second metal strips 1093 are spaced apart; and forming a second bus 1094 extending along the first direction X, wherein the plurality of second metal strips 1093 are electrically connected to the second bus 1094 respectively.

[0108] In this embodiment, a first ohmic contact layer 108a is formed on a first metal strip 1091, a second metal strip 1093, a first bus 1092, and a second bus 1094; a plurality of first pixel structures are electrically connected to the first ohmic contact layer 108a.

[0109] In this embodiment, the first ohmic contact layer 108a is formed by patterning and etching the first ohmic contact material layer 108. Therefore, the materials of the first ohmic contact layer 108a and the first ohmic contact material layer 108 are the same. The purpose of using a transparent metal material for the first ohmic contact layer 108a is to reduce the obstruction of light emitted by the first pixel structure.

[0110] In this embodiment, the metal layer 109a is formed by patterning and etching the metal material layer 109, therefore the metal layer 109a and the metal material layer 109 are made of the same material. The metal layer 109a uses a non-transparent metal material, which not only fulfills the design requirements for electrical connections between the first pixel structures, but also serves as a light reflector, directing the light emitted from the first and second pixel structures toward a predetermined light-reflecting surface.

[0111] In this embodiment, a plurality of first pixel structures are electrically connected to a plurality of first metal strips 1091, and the plurality of first pixel structures are arranged in an array along the first direction X and the second direction Y.

[0112] In this embodiment, the first epitaxial layer 106a of a plurality of first pixel structures is electrically connected to a plurality of first metal strips 1091.

[0113] In this embodiment, the first epitaxial layers 106a of the plurality of first pixel structures are electrically connected to the plurality of first ohmic contact layers 108a. The first ohmic contact layers 108a can reduce the contact resistance between the first epitaxial layers 106a and the metal layer 109a.

[0114] Please refer to Figure 11 and Figure 12 , Figure 11 and Figure 9 The view orientation is consistent. Figure 12 and Figure 10 With the view orientation consistent, after forming the metal layer 109a and the first ohmic contact layer 108a, the first sub-dielectric layer 111a is formed.

[0115] In this embodiment, the first sub-dielectric layer 111a is located on a plurality of first pixel structures and covers a plurality of first pixel structures.

[0116] In this embodiment, the material of the first sub-dielectric layer 111a includes silicon dioxide, silicon nitride, or aluminum oxide.

[0117] Please continue to refer to this. Figure 11 and Figure 12 In this embodiment, before forming the first sub-dielectric layer 111a, the method further includes forming a first passivation layer 112 on the surface of the exposed first pixel structure, the surface of the metal layer 109a, the surface of the first ohmic contact layer 108a, and the surface of the fourth ohmic contact layer 110a.

[0118] In this embodiment, the material of the first passivation layer 112 includes silicon dioxide, silicon nitride, or aluminum oxide.

[0119] In this embodiment, the first sub-dielectric layer 111a is also covered by the first passivation layer 112.

[0120] Please refer to Figures 13 to 15 , Figure 13 This is a top view showing the relative positions of the metal layer 109a, several first pixel structures, and the second ohmic contact layer 113, with some structures omitted. Figure 14 yes Figure 13 Enlarged cross-section diagram along the CC line. Figure 15 yes Figure 13 An enlarged cross-sectional view along the DD line shows that several second ohmic contact layers 113 are arranged parallel to the second direction Y and extend along the first direction X. Each second ohmic contact layer 113 is electrically connected to several first pixel structures arranged along the first direction X.

[0121] It should be noted that, in this embodiment, in order to ensure that the formed second ohmic contact layer 113 can be electrically connected to the first pixel structure, the first sub-dielectric layer 111a and the first passivation layer 112 covering the first pixel structure need to be etched before the second ohmic contact layer 113 is formed, so as to expose the fourth ohmic contact layer 110a on each first pixel structure, thereby ensuring that the second ohmic contact layer 113 is electrically connected to the corresponding first pixel structure.

[0122] In this embodiment, the second ohmic contact layer 113 is electrically connected to the second epitaxial layer 104a of the first pixel structure.

[0123] In this embodiment, the second ohmic contact layer 113 is located on the first sub-dielectric layer 111a.

[0124] In this embodiment, the method for forming the second ohmic contact layer 113 includes: forming a second ohmic contact material layer (not shown); and performing patterned etching on the second ohmic contact material layer to form a plurality of second ohmic contact layers 113.

[0125] In this embodiment, the material of the second ohmic contact layer 113 is a transparent conductive material, which includes a transparent metal material or a transparent conductive oxide material. The transparent conductive oxide material can be, but is not limited to, an N-type oxide semiconductor, and is preferably indium tin oxide. The purpose of using a transparent metal material for the second ohmic contact layer 113 is to reduce the obstruction of light emitted by the first pixel structure.

[0126] Please refer to Figure 16 and Figure 17 , Figure 16 and Figure 14 The view orientation is consistent. Figure 17 and Figure 15With the view orientation consistent, after the second ohmic contact layer 113 is formed, a second sub-dielectric layer 111b is formed. The second sub-dielectric layer 111b is located on the first sub-dielectric layer 111a and covers the second ohmic contact layer 113.

[0127] In this embodiment, the first dielectric layer 111 is composed of the first sub-dielectric layer 111a and the second sub-dielectric layer 111b.

[0128] In this embodiment, the material of the second sub-dielectric layer 111b includes silicon dioxide, silicon nitride, or aluminum oxide.

[0129] Please refer to Figures 18 to 20 , Figure 18 This is a top view showing the relative positions of the metal layer 109a, several first pixel structures, the second ohmic contact layer 113, the first conductive plug 114, the second conductive plug 115, the third conductive plug 116, and the fourth conductive plug 117, excluding some of their structures. Figure 19 yes Figure 18 Enlarged cross-sectional view along the EE line. Figure 20 yes Figure 18 An enlarged cross-sectional view along the FF line shows that several first conductive plugs 114 are formed, each of which is electrically connected to several second ohmic contact layers 113; several second conductive plugs 115 are formed, each of which is electrically connected to several second metal strips 1093; several third conductive plugs 116 are formed, each of which is electrically connected to a first bus 1092; and several fourth conductive plugs 117 are formed, each of which is electrically connected to a second bus 1094.

[0130] In this embodiment, the surface of the second sub-dielectric layer 111b exposes a first conductive plug 114, a second conductive plug 115, a third conductive plug 116, and a fourth conductive plug 117; the first conductive plug 114 is formed only within the second sub-dielectric layer 111b, and the second conductive plug 115, the third conductive plug 116, and the fourth conductive plug 117 are formed only within the first sub-dielectric layer 111a and the second sub-dielectric layer 111b.

[0131] In this embodiment, the first conductive plug 114, the second conductive plug 115, the third conductive plug 116, and the fourth conductive plug 117 are made of copper.

[0132] With this, the manufacturing process of the first light-emitting part was completed.

[0133] After forming the first light-emitting part, the process further includes forming a second light-emitting part. Forming the second light-emitting part includes forming a plurality of second pixel structures corresponding to the first pixel structure, each second pixel structure emitting light of a second wavelength, the first wavelength being different from the second wavelength. For details on the formation process of the second light-emitting part, please refer to [link to documentation / reference]. Figures 21 to 31 .

[0134] Please refer to Figure 21 Provides a second epitaxial substrate 200.

[0135] In this embodiment, the second epitaxial substrate 200 serves as the substrate for the epitaxial portion forming the second light-emitting part, and it needs to be removed after the epitaxial portion is grown.

[0136] In this embodiment, the second epitaxial substrate 200 may be a silicon substrate or a sapphire substrate.

[0137] Please refer to Figure 22 A fourth epitaxial material layer 201, a second multi-quantum well material layer 202, and a third epitaxial material layer 203 are sequentially stacked on the second epitaxial substrate 200.

[0138] In this embodiment, the second multi-quantum well material layer 202 is formed between the third epitaxial material layer 203 and the fourth epitaxial material layer 201, and after subsequent pattern etching, a plurality of second pixel structures are formed.

[0139] In this embodiment, the materials of the third epitaxial material layer 203 and the fourth epitaxial material layer 201 can be gallium nitride, indium gallium nitride, aluminum gallium indium phosphide, or other III-V group semiconductor materials. The material of the second multi-quantum well material layer 202 can be gallium nitride, indium gallium nitride, aluminum indium phosphide, or gallium indium phosphide.

[0140] In this embodiment, a fifth ohmic contact material layer 204 is also formed on the third epitaxial material layer 203. The fifth ohmic contact material layer 204 formed on the third epitaxial material layer 203 can be very thin. The function of the fifth ohmic contact material layer 204 is to test its electrical contact performance with the third epitaxial material layer 203.

[0141] In this embodiment, the fifth ohmic contact material layer 204 is made of a transparent conductive material, which includes a transparent metal material or a transparent conductive oxide material. The transparent conductive oxide material may be, but is not limited to, an N-type oxide semiconductor, and is preferably indium tin oxide.

[0142] Please refer to Figure 23 The third epitaxial material layer 203, the second multi-quantum well material layer 202, and the fourth epitaxial material layer 201 are patterned and etched to form several second pixel structures.

[0143] In this embodiment, forming the second pixel structure includes: forming a third epitaxial layer 203a, a fourth epitaxial layer 201a, and a second multiple quantum well layer 202a located between the third epitaxial layer 203a and the fourth epitaxial layer 201a; the third epitaxial layer 203a contains a first doped ion, and the fourth epitaxial layer 201a contains a second doped ion. The third epitaxial layer 203a is formed by patterning etching of the third epitaxial material layer 203, the second multiple quantum well layer 202a is formed by patterning etching of the second multiple quantum well material layer 202, and the fourth epitaxial layer 201a is formed by patterning etching of the fourth epitaxial material layer 201.

[0144] In this embodiment, since the third epitaxial layer 203a and the fourth epitaxial layer 201a are formed by patterning etching of the third epitaxial material layer 203 and the fourth epitaxial material layer 201, respectively, the materials of the third epitaxial layer 203a and the fourth epitaxial material layer 201a are the same as those of the third epitaxial material layer 203 and the fourth epitaxial material layer 201, respectively. The second multiple quantum well layer 202a is formed by patterning etching of the second multiple quantum well material layer 202, therefore the materials of the second multiple quantum well layer 202a and the second multiple quantum well material layer 202 are the same.

[0145] In this embodiment, during the patterning etching process, the fourth epitaxial material layer 201 is not completely etched through, but a portion of the fourth epitaxial material layer 201 is retained so that the fourth epitaxial layers 201a of several second pixel structures are interconnected.

[0146] In this embodiment, the patterning etching process also includes etching the fifth ohmic contact material layer 204 to form the fifth ohmic contact layer 204a, which is electrically connected to the third epitaxial layer 203a of each second pixel structure.

[0147] In this embodiment, the fifth ohmic contact layer 204a is formed by patterning and etching the fifth ohmic contact material layer 204. Therefore, the fifth ohmic contact layer 204a and the fifth ohmic contact material layer 204 are made of the same material. The purpose of using a transparent metal material for the fifth ohmic contact layer 204a is to reduce the obstruction of light emitted by the second pixel structure.

[0148] In this embodiment, the light-emitting principle of the second pixel structure is the same as that of the first pixel structure, and will not be described again here. Please refer to [link / reference needed] for details. Figure 7 The explanation of the light emission principle of multiple quantum well layers.

[0149] In this embodiment, the second wavelength of light corresponds to the second color light, which includes red, green, or blue light. Different first and second wavelengths correspond to different first and second colors of light.

[0150] Please refer to Figure 24 After forming several second pixel structures, a second passivation layer 205 is formed on the surface of the exposed second pixel structures.

[0151] In this embodiment, the material of the second passivation layer 205 includes silicon dioxide, silicon nitride, or aluminum oxide.

[0152] In this embodiment, specifically, the second passivation layer 205 comprises three parts (not shown): a first part covers the surface of a plurality of second pixel structures, is located on the fifth ohmic contact layer 204a, and exposes a portion of the fifth ohmic contact layer 204a; a second part covers the side surfaces of the plurality of second pixel structures; and a third part covers the surface of the fourth epitaxial material layer 201 in the gap between adjacent second pixel structures. The first, second, and third parts of the second passivation layer 205 are interconnected.

[0153] In some modified embodiments, the second passivation layer 205 may consist only of the second and third portions described above, and the top of the second portion of the second passivation layer 205 may be flush with the top of the fifth ohmic contact layer 204a, or the top of the second portion may be slightly lower than the height of the top surface of the third epitaxial layer 203a.

[0154] Please refer to Figures 25 to 27 , Figure 25 This is a top view showing the relative positions of the third ohmic contact layer 206 (with some structural details omitted) and the corresponding second pixel structure. Figure 26 yes Figure 25 Enlarged cross-sectional view along line GG in the middle. Figure 27 yes Figure 25 An enlarged cross-sectional view along the HH line shows that after the second passivation layer 205 is formed, several third ohmic contact layers 206 are formed, and each third ohmic contact layer 206 is electrically connected to the corresponding second pixel structure.

[0155] It should be noted that, in this embodiment, in order to ensure that the formed third ohmic contact layer 206 can be electrically connected to the second pixel structure, the second passivation layer 205 covering the second pixel structure needs to be etched before the third ohmic contact layer 206 is formed, so as to expose the fifth ohmic contact layer 204a on each second pixel structure, thereby ensuring that the third ohmic contact layer 206 is electrically connected to the corresponding second pixel structure.

[0156] In this embodiment, the third ohmic contact layer 206 is electrically connected to the third epitaxial layer 203a of the second pixel structure.

[0157] In this embodiment, the method for forming the third ohmic contact layer 206 includes: forming a third ohmic contact material layer (not shown); and performing patterned etching on the third ohmic contact material layer to form a plurality of third ohmic contact layers 206.

[0158] In this embodiment, the material of the third ohmic contact layer 206 is a transparent conductive material, including a transparent metal material or a transparent conductive oxide material. The transparent conductive oxide material can be, but is not limited to, an N-type oxide semiconductor, and is preferably indium tin oxide (ITO). The purpose of using a transparent metal material for the third ohmic contact layer 206 is to reduce the obstruction of light emitted by the second pixel structure.

[0159] Please refer to Figure 28 and Figure 29 , Figure 28 and Figure 26 The view orientation is consistent. Figure 29 and Figure 27 With the view orientation consistent, after the formation of the third ohmic contact layer 206, the second dielectric layer 207 is formed.

[0160] In this embodiment, the second dielectric layer 207 covers a plurality of second pixel structures and a plurality of third ohmic contact layers 206.

[0161] In this embodiment, the material of the second dielectric layer 207 includes silicon dioxide, silicon nitride, or aluminum oxide.

[0162] Please refer to Figure 30 and Figure 31 , Figure 30 This is a top view showing the relative positions of the third ohmic contact layer 206, the second pixel structure, the fourth epitaxial material layer 201, the fifth conductive plug 208, the sixth conductive plug 209, the seventh conductive plug 210, and the eighth conductive plug 211, with some structures omitted. Figure 31 yes Figure 30 An enlarged cross-sectional view along line II shows that after the formation of the second dielectric layer 207, a plurality of fifth conductive plugs 208 are formed, and the plurality of fifth conductive plugs 208 are electrically connected to the fourth epitaxial layer 201a of the second pixel structure; a plurality of sixth conductive plugs 209 are formed, and the plurality of sixth conductive plugs 209 are electrically connected to the corresponding third ohmic contact layer 206; a plurality of seventh conductive plugs 210 are formed; and a plurality of eighth conductive plugs 211 are formed.

[0163] It should be noted that, in this embodiment, the formed fifth conductive plugs 208 need to penetrate the retained fourth epitaxial material layer 201 to ensure that the fifth conductive plugs 208 can be exposed after the second epitaxial layer 104a is removed, so that the fifth conductive plugs 208 can be electrically connected to the electrode plate formed later. The formed seventh conductive plugs 210 and eighth conductive plugs 211 are still electrically connected to the retained fourth epitaxial material layer 201 at this time. However, in subsequent processes, in order to ensure that the chip can emit monochromatic light, the fourth epitaxial material layer 201 electrically connected to the seventh conductive plugs 210 and eighth conductive plugs 211 needs to be removed.

[0164] In this embodiment, the second dielectric layer 207 exposes the surfaces of the fifth conductive plug 208, the sixth conductive plug 209, the seventh conductive plug 210, and the eighth conductive plug 211 to ensure that they can be electrically connected to the corresponding first conductive plug 114, the second conductive plug 115, the third conductive plug 116, and the fourth conductive plug 117 during subsequent bonding.

[0165] In this embodiment, the fifth conductive plug 208, the sixth conductive plug 209, the seventh conductive plug 210, and the eighth conductive plug 211 are made of copper.

[0166] With this, the manufacturing process of the second light-emitting part was completed.

[0167] Please refer to Figure 32 and Figure 33 , Figure 32 and Figure 19 The view orientation is consistent. Figure 33 and Figure 20 The first light-emitting part and the second light-emitting part are bonded in the same view direction, so that the first pixel structure and the corresponding second pixel structure are arranged opposite to each other along the component stacking direction, and the first dielectric layer 111 and the second dielectric layer 207 are connected.

[0168] By integrating light-emitting pixel structures that emit light of different wavelengths into the same chip, different color pixel structures can be stacked on the same chip, thereby effectively reducing the size when different color chips are used together.

[0169] In this embodiment, after bonding the first light-emitting part and the second light-emitting part, the second sub-dielectric layer 111b is connected to the second dielectric layer 207; a plurality of fifth conductive plugs 208 are respectively bonded to a plurality of corresponding first conductive plugs 114; a plurality of sixth conductive plugs 209 are respectively bonded to a plurality of corresponding second conductive plugs 115; a plurality of seventh conductive plugs 210 are respectively electrically connected to a plurality of corresponding third conductive plugs 116; and a plurality of eighth conductive plugs 211 are respectively electrically connected to a plurality of corresponding fourth conductive plugs 117.

[0170] In this embodiment, the bonding method of the first light-emitting part and the second light-emitting part adopts a hybrid bonding method.

[0171] Please continue to refer to this. Figure 32 and Figure 33 In this embodiment, after bonding the first light-emitting part and the second light-emitting part, the second epitaxial substrate 200 is removed.

[0172] In this embodiment, after removing the second epitaxial substrate 200, a portion of the remaining fourth epitaxial material layer 201 is etched to remove the oxidized portion on the surface of the fourth epitaxial material layer 201.

[0173] Please continue to refer to this. Figure 32 and Figure 33 After removing the second epitaxial substrate 200, a sixth ohmic contact material layer 212 is formed on the exposed fourth epitaxial material layer 201.

[0174] In this embodiment, the material of the sixth ohmic contact layer 212 is a transparent conductive material, including transparent metal materials or transparent conductive oxide materials. The transparent conductive oxide material can be, but is not limited to, an N-type oxide semiconductor, and is preferably indium tin oxide (ITO). The function of the sixth ohmic contact layer 212 is to reduce the contact resistance between the remaining device structures and the fourth epitaxial material layer 201.

[0175] Please continue to refer to this. Figure 33 In this embodiment, along the direction of component stacking, the first pixel structure has a first projection area, and the second pixel structure corresponding to the first pixel structure has a second projection area, with the first and second projection areas completely overlapping. This complete overlap of the first and second projection areas optimizes the mixing effect of the first and second color light.

[0176] In other embodiments, along the direction of component stacking, the first pixel structure has a first projection area, and the second pixel structure corresponding to the first pixel structure has a second projection area. The first projection area and the second projection area may also at least partially overlap.

[0177] Please refer to Figure 34 , Figure 34 This is a top view showing the relative positions of the fifth conductive plug 208, the seventh conductive plug 210, the eighth conductive plug 211, the first electrode plate 213, the second electrode plate 214, and the third electrode plate 215. After bonding the first light-emitting part and the second light-emitting part, the first electrode plate 213 is formed and electrically connected to the plurality of fifth conductive plugs 208; the second electrode plate 214 is formed and electrically connected to the plurality of seventh conductive plugs 210; and the third electrode plate 215 is formed and electrically connected to the plurality of eighth conductive plugs 211.

[0178] Please continue to refer to this. Figure 34 It should be noted that in this embodiment, since the seventh conductive plug 210 and the eighth conductive plug 211 are not exposed after bonding, and the seventh conductive plug 210 and the eighth conductive plug 211 are also electrically connected to the fourth epitaxial material layer 201, in order to separately expose the seventh conductive plug 210 and the eighth conductive plug 211 to ensure that the chip can emit monochromatic light, the fourth epitaxial material layer 201 and the sixth ohmic contact material layer 212, which are electrically connected to the seventh conductive plug 210 and the eighth conductive plug 211, need to be removed before forming the first electrode plate 213, the second electrode plate 214, and the third electrode plate 215. Simultaneously, after removing the corresponding sixth ohmic contact material layer 212, the sixth ohmic contact material layer 212 forms the sixth ohmic contact layer.

[0179] By leading out three electrode plates, with the first electrode plate 213 serving as the common electrode for the same doped epitaxial layer in the first pixel structure and the second pixel structure, different combinations of power supply between the three electrode plates can achieve monochromatic light emission of the first pixel structure, monochromatic light emission of the second pixel structure, and mixed light emission of the first pixel structure and the second pixel structure, thereby meeting the needs of various application scenarios.

[0180] In this embodiment, the method for forming the first electrode plate 213, the second electrode plate 214, and the third electrode plate 215 includes: forming an electrode plate material layer; performing patterned etching on the electrode plate material layer to form the first electrode plate 213, the second electrode plate 214, and the third electrode plate 215.

[0181] In this embodiment, the materials of the first electrode plate 213, the second electrode plate 214 and the third electrode plate 215 can be chromium, titanium, platinum, gold, tin, aluminum, nickel, copper or silver.

[0182] Accordingly, an embodiment of the present invention also provides a miniature light-emitting diode chip, please refer to the following: Figures 1 to 34 The device includes: a first light-emitting part, which includes: a plurality of mutually independent first pixel structures, each of which emits light of a first wavelength; and a second light-emitting part, which includes: a plurality of second pixel structures corresponding to the first pixel structures, each of which emits light of a second wavelength, wherein the first wavelength and the second wavelength are different; the first light-emitting part and the second light-emitting part are bonded together, and the first pixel structure and the corresponding second pixel structure are arranged opposite to each other along the direction of component stacking.

[0183] By integrating light-emitting pixel structures that emit light of different wavelengths into the same chip, different color pixel structures can be stacked on the same chip, thereby effectively reducing the size when different color chips are used together.

[0184] In this embodiment, the first light-emitting part further includes a first dielectric layer 111 located on a plurality of first pixel structures, and the first dielectric layer 111 covers the plurality of first pixel structures; the second light-emitting part further includes a second dielectric layer 207 located on a plurality of second pixel structures, and the second dielectric layer 207 covers the plurality of second pixel structures; the first dielectric layer 111 and the second dielectric layer 207 are bonded together, so that the first light-emitting part and the second light-emitting part are bonded together.

[0185] In this embodiment, along the direction of component stacking, the first pixel structure has a first projection area, and the second pixel structure corresponding to the first pixel structure has a second projection area, with the first and second projection areas completely overlapping. This complete overlap of the first and second projection areas optimizes the mixing effect of the first and second color light.

[0186] In other embodiments, along the direction of component stacking, the first pixel structure has a first projection area, and the second pixel structure corresponding to the first pixel structure has a second projection area. The first projection area and the second projection area may also at least partially overlap.

[0187] In this embodiment, the first pixel structure includes: a first epitaxial layer 106a, a second epitaxial layer 104a, and a first multiple quantum well layer 105a located between the first epitaxial layer 106a and the second epitaxial layer 104a; the first epitaxial layer 106a contains a first doped ion, and the second epitaxial layer 104a contains a second doped ion, wherein the first doped ion and the second doped ion have different electrical types.

[0188] In this embodiment, the first light-emitting part further includes: a metal layer 109a; the metal layer 109a includes: a plurality of first metal strips 1091 arranged in parallel along a first direction X and extending along a second direction Y, the first direction X being perpendicular to the second direction Y; a first bus 1092 extending along the first direction X, the plurality of first metal strips 1091 being electrically connected to the first bus 1092 respectively; a plurality of second metal strips 1093 arranged in parallel along the first direction X and extending along the second direction Y, the plurality of first metal strips 1091 and the plurality of second metal strips 1093 being arranged at intervals; a second bus 1094 extending along the first direction X, the plurality of second metal strips 1093 being electrically connected to the second bus 1094 respectively.

[0189] In this embodiment, the metal layer 109a is a non-transparent metal material; the non-transparent metal material includes: chromium, titanium, platinum, gold, tin, aluminum, nickel, copper, or silver. The use of a non-transparent metal material in the metal layer 109a not only fulfills the design requirements for electrical connections between the first pixel structures, but also allows the non-transparent metal material to reflect light, thereby directing the light emitted by the first and second pixel structures toward a predetermined light-reflecting surface.

[0190] In this embodiment, a plurality of first pixel structures are electrically connected to a plurality of first metal strips 1091, and the plurality of first pixel structures are arranged in an array along the first direction X and the second direction Y.

[0191] In this embodiment, the first epitaxial layer 106a of a plurality of first pixel structures is electrically connected to a plurality of first metal strips 1091.

[0192] In this embodiment, the first light-emitting part further includes: a first ohmic contact layer 108a located on the first metal strip 1091, the second metal strip 1093, the first bus 1092, and the second bus 1094; and a plurality of first pixel structures are electrically connected to the first ohmic contact layer 108a respectively.

[0193] In this embodiment, the first epitaxial layer 106a of a plurality of first pixel structures is electrically connected to a plurality of first ohmic contact layers 108a.

[0194] In this embodiment, the first ohmic contact layer 108a is made of a transparent conductive material, which includes a transparent metal material or a transparent conductive oxide material. The transparent conductive oxide material may be, but is not limited to, an N-type oxide semiconductor, and is preferably indium tin oxide (ITO).

[0195] In this embodiment, the first light-emitting part further includes: a plurality of second ohmic contact layers 113 arranged in parallel along the second direction Y and extending along the first direction X, each of the second ohmic contact layers 113 being electrically connected to a plurality of first pixel structures arranged along the first direction X.

[0196] In this embodiment, the first dielectric layer 111 includes: a first sub-dielectric layer 111a, the first sub-dielectric layer 111a is located on a plurality of first pixel structures, the first sub-dielectric layer 111a covers a plurality of first pixel structures, and a second ohmic contact layer 113 is located on the first sub-dielectric layer 111a.

[0197] In this embodiment, the first dielectric layer 111 further includes a second sub-dielectric layer 111b, which is located on the first sub-dielectric layer 111a and covers the second ohmic contact layer 113.

[0198] In this embodiment, the material of the second ohmic contact layer 113 is a transparent conductive material, which includes: a transparent metal material or a transparent conductive oxide material. The transparent conductive oxide material may be, but is not limited to, an N-type oxide semiconductor, and is preferably indium tin oxide.

[0199] In this embodiment, the second sub-dielectric layer 111b is bonded to the second dielectric layer 207.

[0200] In this embodiment, the first light-emitting part further includes: a plurality of first conductive plugs 114, which are electrically connected to a plurality of second ohmic contact layers 113; a plurality of second conductive plugs 115, which are electrically connected to a plurality of second metal strips 1093; a plurality of third conductive plugs 116, which are electrically connected to a first bus 1092; and a plurality of fourth conductive plugs 117, which are electrically connected to a second bus 1094.

[0201] In this embodiment, the second pixel structure includes: a third epitaxial layer 203a, a fourth epitaxial layer 201a, and a second multiple quantum well layer 202a located between the third epitaxial layer 203a and the fourth epitaxial layer 201a; the third epitaxial layer 203a contains a first doped ion, and the fourth epitaxial layer 201a contains a second doped ion.

[0202] In this embodiment, the fourth epitaxial layers 201a of several second pixel structures are interconnected.

[0203] In this embodiment, the second light-emitting part further includes: a plurality of third ohmic contact layers 206, each third ohmic contact layer 206 being electrically connected to the corresponding second pixel structure.

[0204] In this embodiment, each third ohmic contact layer 206 is electrically connected to the third epitaxial layer 203a of the corresponding second pixel structure.

[0205] In this embodiment, the third ohmic contact layer 206 is made of a transparent conductive material, which includes a transparent metal material or a transparent conductive oxide material. The transparent conductive oxide material may be, but is not limited to, an N-type oxide semiconductor, and is preferably indium tin oxide (ITO).

[0206] In this embodiment, the second dielectric layer 207 also covers a plurality of third ohmic contact layers 206.

[0207] In this embodiment, the second light-emitting part further includes: a plurality of fifth conductive plugs 208, each of which is electrically connected to the fourth epitaxial layer 201a of the second pixel structure, and is bonded to a plurality of corresponding first conductive plugs 114; a plurality of sixth conductive plugs 209, each of which is electrically connected to a corresponding third ohmic contact layer 206, and is bonded to a plurality of corresponding second conductive plugs 115; a plurality of seventh conductive plugs 210, each of which is electrically connected to a plurality of corresponding third conductive plugs 116; and a plurality of eighth conductive plugs 211, each of which is electrically connected to a plurality of corresponding fourth conductive plugs 117.

[0208] In this embodiment, it further includes: a first electrode plate 213, which is electrically connected to a plurality of fifth conductive plugs 208; a second electrode plate 214, which is electrically connected to a plurality of seventh conductive plugs 210; and a third electrode plate 215, which is electrically connected to a plurality of eighth conductive plugs 211.

[0209] By leading out three electrode plates, with the first electrode plate 213 serving as the common electrode for the same doped epitaxial layer in the first pixel structure and the second pixel structure, different combinations of power supply between the three electrode plates can achieve monochromatic light emission of the first pixel structure, monochromatic light emission of the second pixel structure, and mixed light emission of the first pixel structure and the second pixel structure, thereby meeting the needs of various application scenarios.

[0210] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A miniature light-emitting diode chip, characterized in that, include: A first light-emitting part, the first light-emitting part comprising: Several mutually independent first pixel structures, each of which emits light of a first wavelength; The second light-emitting part includes: A plurality of second pixel structures corresponding to the first pixel structure, each second pixel structure emitting light of a second wavelength, wherein the first wavelength and the second wavelength are different; The first light-emitting part and the second light-emitting part are bonded together, and the first pixel structure and the corresponding second pixel structure are arranged opposite each other along the direction of component stacking.

2. The micro light-emitting diode chip according to claim 1, characterized in that, The first light-emitting portion further includes: a first dielectric layer located on a plurality of first pixel structures, and the first dielectric layer covers the plurality of first pixel structures; the second light-emitting portion further includes: a second dielectric layer located on a plurality of second pixel structures, and the second dielectric layer covers the plurality of second pixel structures; the first dielectric layer and the second dielectric layer are bonded together, so that the first light-emitting portion and the second light-emitting portion are bonded together.

3. The miniature light-emitting diode chip according to claim 1, characterized in that, Along the direction of component stacking, the first pixel structure has a first projection area, and the second pixel structure corresponding to the first pixel structure has a second projection area. The first projection area and the second projection area completely overlap or at least partially overlap.

4. The micro light-emitting diode chip according to claim 2, characterized in that, The first pixel structure includes: a first epitaxial layer, a second epitaxial layer, and a first multiple quantum well layer located between the first epitaxial layer and the second epitaxial layer; the first epitaxial layer contains a first doped ion, and the second epitaxial layer contains a second doped ion, wherein the first doped ion and the second doped ion have different electrical types.

5. The micro light-emitting diode chip according to claim 4, characterized in that, The first light-emitting part further includes: a metal layer; the metal layer includes: a plurality of first metal strips arranged in parallel along a first direction and extending along a second direction, the first direction being perpendicular to the second direction; a first bus extending along the first direction, the plurality of first metal strips being electrically connected to the first bus respectively; a plurality of second metal strips arranged in parallel along the first direction and extending along the second direction, the plurality of first metal strips and the plurality of second metal strips being arranged at intervals; a second bus extending along the first direction, the plurality of second metal strips being electrically connected to the second bus respectively.

6. The miniature light-emitting diode chip according to claim 5, characterized in that, The metal layer is a non-transparent metal material; non-transparent metal materials include: chromium, titanium, platinum, gold, tin, aluminum, nickel, copper or silver.

7. The micro light-emitting diode chip according to claim 5, characterized in that, A plurality of the first pixel structures are electrically connected to a plurality of the first metal strips, and the plurality of the first pixel structures are arranged in an array along the first direction and the second direction.

8. The micro light-emitting diode chip according to claim 7, characterized in that, The first epitaxial layers of the first pixel structures are electrically connected to the first metal strips respectively.

9. The micro light-emitting diode chip according to claim 8, characterized in that, The first light-emitting part further includes: a first ohmic contact layer located on the first metal strip, the second metal strip, the first bus and the second bus; and a plurality of the first pixel structures are electrically connected to the first ohmic contact layer respectively.

10. The micro light-emitting diode chip according to claim 9, characterized in that, The first epitaxial layers of the first pixel structures are electrically connected to the first ohmic contact layers.

11. The micro light-emitting diode chip according to claim 9, characterized in that, The material of the first ohmic contact layer includes: a transparent metal material; the transparent metal material includes: indium tin oxide.

12. The micro light-emitting diode chip according to claim 5, characterized in that, The first light-emitting part further includes: a plurality of second ohmic contact layers arranged in parallel along the second direction and extending along the first direction, each of the second ohmic contact layers being electrically connected to a plurality of the first pixel structures arranged along the first direction.

13. The micro light-emitting diode chip according to claim 12, characterized in that, The first dielectric layer includes: a first sub-dielectric layer, the first sub-dielectric layer being located on a plurality of first pixel structures and covering a plurality of first pixel structures, and a second ohmic contact layer being located on the first sub-dielectric layer.

14. The micro light-emitting diode chip according to claim 13, characterized in that, The first dielectric layer further includes a second sub-dielectric layer, which is located on the first sub-dielectric layer and covers the second ohmic contact layer.

15. The micro light-emitting diode chip according to claim 12, characterized in that, The material of the second ohmic contact layer includes: a transparent metal material; the transparent metal material includes: indium tin oxide.

16. The micro light-emitting diode chip according to claim 14, characterized in that, The second sub-dielectric layer is bonded to the second dielectric layer.

17. The micro light-emitting diode chip according to claim 12, characterized in that, The first light-emitting part further includes: a plurality of first conductive plugs, each of which is electrically connected to a plurality of second ohmic contact layers; a plurality of second conductive plugs, each of which is electrically connected to a plurality of second metal strips; a plurality of third conductive plugs, each of which is electrically connected to the first bus; and a plurality of fourth conductive plugs, each of which is electrically connected to the second bus.

18. The micro light-emitting diode chip according to claim 17, characterized in that, The second pixel structure includes: a third epitaxial layer, a fourth epitaxial layer, and a second multiple quantum well layer located between the third epitaxial layer and the fourth epitaxial layer; the third epitaxial layer contains the first doped ion, and the fourth epitaxial layer contains the second doped ion.

19. The micro light-emitting diode chip according to claim 18, characterized in that, The fourth epitaxial layers of several second pixel structures are interconnected.

20. The miniature light-emitting diode chip according to claim 19, characterized in that, The second light-emitting part further includes: a plurality of third ohmic contact layers, each of the third ohmic contact layers being electrically connected to the corresponding second pixel structure.

21. The miniature light-emitting diode chip according to claim 20, characterized in that, Each of the third ohmic contact layers is electrically connected to the third epitaxial layer of the corresponding second pixel structure.

22. The micro light-emitting diode chip according to claim 20, characterized in that, The material of the third ohmic contact layer includes: a transparent metal material; the transparent metal material includes: indium tin oxide.

23. The miniature light-emitting diode chip according to claim 20, characterized in that, The second dielectric layer also covers several of the third ohmic contact layers.

24. The micro light-emitting diode chip according to claim 21, characterized in that, The second light-emitting part further includes: a plurality of fifth conductive plugs, each of which is electrically connected to the fourth epitaxial layer of the second pixel structure and is bonded to a corresponding plurality of first conductive plugs; a plurality of sixth conductive plugs, each of which is electrically connected to a corresponding third ohmic contact layer and is bonded to a corresponding plurality of second conductive plugs; a plurality of seventh conductive plugs, each of which is electrically connected to a corresponding plurality of third conductive plugs; and a plurality of eighth conductive plugs, each of which is electrically connected to a corresponding plurality of fourth conductive plugs.

25. The micro light-emitting diode chip according to claim 24, characterized in that, It also includes: a first electrode plate, which is electrically connected to a plurality of the fifth conductive plugs; a second electrode plate, which is electrically connected to a plurality of the seventh conductive plugs; and a third electrode plate, which is electrically connected to a plurality of the eighth conductive plugs.

26. A method for forming a miniature light-emitting diode chip, characterized in that, include: Forming a first light-emitting portion includes: Several mutually independent first pixel structures are formed, and each first pixel structure emits light of a first wavelength; Forming a second light-emitting portion includes: Several second pixel structures corresponding to the first pixel structure are formed, and each second pixel structure emits light of a second wavelength, wherein the first wavelength and the second wavelength are different; The first light-emitting part and the second light-emitting part are bonded together, such that the first pixel structure and the corresponding second pixel structure are arranged opposite to each other along the direction of component stacking.

27. The method for forming a micro light-emitting diode chip according to claim 26, characterized in that, The formation of the first light-emitting portion further includes: forming a first dielectric layer on a plurality of first pixel structures, wherein the first dielectric layer covers the plurality of first pixel structures; the formation of the second light-emitting portion further includes: forming a second dielectric layer on a plurality of second pixel structures, wherein the second dielectric layer covers the plurality of second pixel structures; and bonding the first dielectric layer and the second dielectric layer to bond the first light-emitting portion and the second light-emitting portion together.

28. The method for forming a micro light-emitting diode chip according to claim 26, characterized in that, Along the direction of component stacking, the first pixel structure has a first projection area, and the second pixel structure corresponding to the first pixel structure has a second projection area. The first projection area and the second projection area completely overlap or at least partially overlap.

29. The method for forming a micro light-emitting diode chip according to claim 27, characterized in that, Forming the first pixel structure includes: forming a first epitaxial layer, a second epitaxial layer, and a first multiple quantum well layer located between the first epitaxial layer and the second epitaxial layer; the first epitaxial layer contains a first doped ion, the second epitaxial layer contains a second doped ion, and the first doped ion and the second doped ion have different electrical types.

30. The method for forming a micro light-emitting diode chip according to claim 29, characterized in that, The formation of the first light-emitting portion further includes: forming a metal layer; forming the metal layer includes: forming a plurality of first metal strips arranged in parallel along a first direction and extending along a second direction, the first direction being perpendicular to the second direction; forming a first bus extending along the first direction, the plurality of first metal strips being electrically connected to the first bus respectively; forming a plurality of second metal strips arranged in parallel along the first direction and extending along the second direction, the plurality of first metal strips and the plurality of second metal strips being spaced apart; forming a second bus extending along the first direction, the plurality of second metal strips being electrically connected to the second bus respectively.

31. The method for forming a micro light-emitting diode chip according to claim 30, characterized in that, The metal layer is a non-transparent metallic material.

32. The method for forming a micro light-emitting diode chip according to claim 30, characterized in that, A plurality of the first pixel structures are electrically connected to a plurality of the first metal strips, and the plurality of the first pixel structures are arranged in an array along the first direction and the second direction.

33. The method for forming a micro light-emitting diode chip according to claim 32, characterized in that, The first epitaxial layers of the first pixel structures are electrically connected to the first metal strips respectively.

34. The method for forming a micro light-emitting diode chip according to claim 33, characterized in that, The formation of the first light-emitting part further includes: forming a first ohmic contact layer on the first metal strip, the second metal strip, the first bus and the second bus; and electrically connecting a plurality of the first pixel structures to the first ohmic contact layer.

35. The method for forming a micro light-emitting diode chip according to claim 34, characterized in that, The method for forming the metal layer and the first ohmic contact layer includes: forming a metal material layer; forming a first ohmic contact material layer on the metal material layer; and etching the metal material layer and the first ohmic contact material layer to form the metal layer and the first ohmic contact layer.

36. The method for forming a micro light-emitting diode chip according to claim 34, characterized in that, The first epitaxial layers of the first pixel structures are electrically connected to the first ohmic contact layers.

37. The method for forming a micro light-emitting diode chip according to claim 30, characterized in that, The formation of the first light-emitting portion further includes: forming a plurality of second ohmic contact layers arranged in parallel along the second direction and extending along the first direction, wherein each of the second ohmic contact layers is electrically connected to a plurality of the first pixel structures arranged along the first direction.

38. The method for forming a micro light-emitting diode chip according to claim 37, characterized in that, Forming the first dielectric layer includes: forming a first sub-dielectric layer, the first sub-dielectric layer being located on a plurality of first pixel structures, the first sub-dielectric layer covering a plurality of first pixel structures, and the second ohmic contact layer being located on the first sub-dielectric layer.

39. The method for forming a micro light-emitting diode chip according to claim 38, characterized in that, The formation of the first dielectric layer further includes: forming a second sub-dielectric layer, the second sub-dielectric layer being located on the first sub-dielectric layer and covering the second ohmic contact layer.

40. The method for forming a micro light-emitting diode chip according to claim 39, characterized in that, After bonding the first light-emitting part and the second light-emitting part, the second sub-dielectric layer is connected to the second dielectric layer.

41. The method for forming a micro light-emitting diode chip according to claim 37, characterized in that, The formation of the first light-emitting part further includes: forming a plurality of first conductive plugs, each of the plurality of first conductive plugs being electrically connected to a plurality of second ohmic contact layers; forming a plurality of second conductive plugs, each of the plurality of second conductive plugs being electrically connected to a plurality of second metal strips; forming a plurality of third conductive plugs, each of the plurality of third conductive plugs being electrically connected to the first bus; and forming a plurality of fourth conductive plugs, each of the plurality of fourth conductive plugs being electrically connected to the second bus.

42. The method for forming a micro light-emitting diode chip according to claim 41, characterized in that, Forming the second pixel structure includes: forming a third epitaxial layer, a fourth epitaxial layer, and a second multiple quantum well layer located between the third epitaxial layer and the fourth epitaxial layer; the third epitaxial layer contains the first doped ion, and the fourth epitaxial layer contains the second doped ion.

43. The method for forming a micro light-emitting diode chip according to claim 42, characterized in that, The fourth epitaxial layers of several second pixel structures are interconnected.

44. The method for forming a micro light-emitting diode chip according to claim 43, characterized in that, The formation of the second light-emitting part further includes: forming a plurality of third ohmic contact layers, each of the third ohmic contact layers being electrically connected to the corresponding second pixel structure.

45. The method for forming a micro light-emitting diode chip according to claim 44, characterized in that, Each of the third ohmic contact layers is electrically connected to the third epitaxial layer of the corresponding second pixel structure.

46. ​​The method for forming a micro light-emitting diode chip according to claim 44, characterized in that, The second dielectric layer also covers several of the third ohmic contact layers.

47. The method for forming a micro light-emitting diode chip according to claim 45, characterized in that, The formation of the second light-emitting portion further includes: forming a plurality of fifth conductive plugs, each of the plurality of fifth conductive plugs being electrically connected to the fourth epitaxial layer of the second pixel structure; forming a plurality of sixth conductive plugs, each of the plurality of sixth conductive plugs being electrically connected to the corresponding third ohmic contact layer; forming a plurality of seventh conductive plugs; forming a plurality of eighth conductive plugs; after bonding the first light-emitting portion and the second light-emitting portion, the plurality of fifth conductive plugs are respectively bonded to the corresponding plurality of first conductive plugs; the plurality of sixth conductive plugs are respectively bonded to the corresponding plurality of second conductive plugs; the plurality of seventh conductive plugs are respectively electrically connected to the corresponding plurality of third conductive plugs; and the plurality of eighth conductive plugs are respectively electrically connected to the corresponding plurality of fourth conductive plugs.

48. The method for forming a micro light-emitting diode chip according to claim 47, characterized in that, After bonding the first light-emitting portion and the second light-emitting portion, the method further includes: forming a first electrode plate, the first electrode plate being electrically connected to a plurality of the fifth conductive plugs; forming a second electrode plate, the second electrode plate being electrically connected to a plurality of the seventh conductive plugs; and forming a third electrode plate, the third electrode plate being electrically connected to a plurality of the eighth conductive plugs.

Images