Display panel, preparation method thereof and electronic device

Abstract

The application provides a display panel, a preparation method thereof and an electronic device. The display panel comprises a substrate, a pixel definition layer disposed on a surface of the substrate, the pixel definition layer comprising a plurality of first openings and a first groove, a first electrode at least partially exposed in the first openings, at least part of the first electrode at least partially overlapping a projection of the first groove on the substrate, a light-emitting layer disposed at least in the first openings and covering part of the first electrode, and a first part of a first trace electrically connected to the first electrode, the first part at least partially overlapping the projection of the first groove on the substrate. In the application, the first part of the first trace and the first electrode at least partially overlap the first groove, which overcomes the reduction of the panel yield caused by the first groove in the prior art, saves the horizontal arrangement space of the panel, and increases the resolution of the panel.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a display panel, a method for manufacturing the same, and an electronic device. Background Technology

[0002] OLED (Organic Light-Emitting Diode) technology has been widely used in mobile phone screens, computer monitors, and full-color televisions. OLED screens emit light through TFT (thin-film transistor) control voltage transmission to the anode, and the OLED emits light via the voltage difference between the anode and cathode.

[0003] Considering the space required for metal wiring, holes are typically drilled under the anode to connect to the lower TFT layer via metal wires, thereby enabling pixel voltage signal transmission. However, drilling holes under the anode occupies a certain area, reducing the pixel aperture ratio and limiting the resolution of the OLED screen. Furthermore, using traditional fine metal masks to pattern OLED pixels makes it difficult to meet the high-resolution requirements for the time being. Summary of the Invention

[0004] To address the aforementioned problems, a first aspect of the present invention provides a display panel. The display panel includes: The substrate includes the first trace; A pixel definition layer is disposed on the surface of the substrate, the pixel definition layer including a plurality of first openings and first grooves; A first electrode is at least partially exposed in the first opening, and at least a portion of the orthographic projection of the first electrode on the substrate overlaps with the orthographic projection of the first groove on the substrate. A light-emitting layer is disposed on the side of the first electrode opposite to the substrate, and the light-emitting layer is at least disposed in the first opening and covers a portion of the first electrode; The first portion of the first trace is electrically connected to the first electrode, and the orthographic projection of the first portion on the substrate at least partially overlaps with the orthographic projection of the first groove on the substrate. The first electrode and the first groove are spaced apart.

[0005] Furthermore, the orthographic projection of the first portion onto the substrate covers the orthographic projection of the first groove onto the substrate.

[0006] Furthermore, the first groove has a trapezoidal cross-section along the plane perpendicular to the substrate, and the light-emitting layer is broken at the first groove; Preferably, the display panel further includes a second electrode, which is disposed on the side of the light-emitting layer opposite to the substrate, and the second electrode is continuously disposed. Preferably, the orthographic projection of the second electrode onto the substrate covers the orthographic projection of the first opening onto the substrate and the orthographic projection of the first groove onto the substrate.

[0007] Furthermore, the display panel also includes: A planarization layer is disposed on the side of the first trace away from the substrate, and at least a portion of the first trace is exposed in the opening of the planarization layer; Preferably, the first trace has a trapezoidal cross-section along the plane perpendicular to the substrate, and the planarization layer covers the side surface and part of the top surface of the first trace; Preferably, the distance from the bottom surface of the first groove to the substrate is greater than the distance from the first opening to the substrate; Preferably, the thickness of the pixel definition layer between the bottom surface of the first groove and the top surface of the first electrode is greater than or equal to 50 angstroms.

[0008] Furthermore, the display panel includes a plurality of pixels arranged in an array, and the first groove is provided between two adjacent pixel columns, the first groove extending in a first direction along the direction of the pixel column; Preferably, the first groove is provided between two adjacent pixel rows, and the first groove extends along the direction of the pixel rows; Preferably, the display panel further includes a first signal line extending along the direction of the pixel row, and the second electrode overlaps with the first signal line; Preferably, the material of the first trace includes molybdenum, titanium-aluminum alloy, or molybdenum-titanium alloy.

[0009] A second aspect of the present invention provides a method for manufacturing a display panel, comprising: A substrate is prepared, the substrate including a first trace; A planarization layer is prepared on the substrate, the planarization layer covering the first trace, and the planarization layer is patterned such that at least a portion of the first trace is exposed; A first electrode is fabricated on the side of the planarization layer opposite to the substrate, and the first electrode is connected to a first portion of the first trace. A pixel definition layer is prepared on the side of the first electrode facing away from the substrate. The pixel definition layer includes a first opening and a first groove. At least a portion of the first electrode is exposed in the first opening. The orthographic projection of the first portion onto the substrate and the orthographic projection of the first groove onto the substrate at least partially overlap.

[0010] Furthermore, the method includes the following steps after the pixel definition layer step on the side of the first electrode facing away from the substrate: A light-emitting layer is prepared on the side of the pixel definition layer opposite to the substrate, and at least a portion of the light-emitting layer is located in the first opening; Preferably, at least a portion of the light-emitting layer is broken at the first groove.

[0011] Furthermore, the method further includes, after the step of fabricating the light-emitting layer on the side of the first electrode opposite to the substrate: A second electrode is fabricated on the side of the light-emitting layer opposite to the substrate, and the second electrode is continuously disposed. Preferably, the orthographic projection of the second electrode onto the substrate covers the orthographic projection of the first opening onto the substrate and the orthographic projection of the first groove onto the substrate.

[0012] Furthermore, in the method described, the thickness of the pixel definition layer between the bottom surface of the first groove and the top surface of the first electrode is greater than or equal to 50 angstroms.

[0013] A third aspect of the present invention provides an electronic device comprising a display panel as described above or a display panel obtained according to the method described above.

[0014] In the display panel of this application, a pixel definition layer is disposed on the surface of the substrate. The pixel definition layer includes a plurality of first openings and first grooves. The first portion of the overlap between the first electrode and the first trace at least partially overlaps with the first groove, overcoming the reduction in panel resolution caused by the opening of the first groove in the prior art. By overlapping the first groove with the overlapping portion of the lower layer, this application can reduce the reduction in opening ratio caused by the opening of the first groove, save the lateral arrangement space of the panel, and increase the panel resolution. Attached Figure Description

[0015] Figure 1 This is a schematic cross-sectional view of a display panel provided in an embodiment of this application.

[0016] Figure 2 This is a cross-sectional structural diagram of a display panel provided in another embodiment of this application.

[0017] Figure 3 This is a cross-sectional structural diagram of a display panel provided in another embodiment of this application.

[0018] Figure 4 This is a cross-sectional structural diagram of a display panel provided in another embodiment of this application.

[0019] Figure 5 This is a cross-sectional structural diagram of a display panel provided in another embodiment of this application.

[0020] Figure 6 This is a cross-sectional structural diagram of a display panel provided in another embodiment of this application.

[0021] Figure 7 This is a schematic diagram of the planar structure of a display panel provided in another embodiment of this application.

[0022] Figure 8 This is a schematic diagram of the planar structure of a display panel provided in another embodiment of this application. Detailed Implementation

[0023] To enable those skilled in the art to better understand the technical solutions in the embodiments of this application, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art should fall within the protection scope of the embodiments of this application.

[0024] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. The singular forms “a,” “the,” and “the” used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used in the embodiments of this application refers to and includes any or all possible combinations of one or more associated listed items.

[0025] It should be understood that in the description of the embodiments of this application, the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings. They are only for the convenience of describing the scheme of the embodiments of this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of this application.

[0026] Furthermore, when an element or layer is referred to as being "on" another element or layer, "connected to," or "bonded to" another element or layer, the element or layer may be directly on the other element or layer, directly connected to, or directly bonded to the other element or layer, or there may be intermediate elements or layers. However, when an element or layer is referred to as being "directly on" another element or layer, "directly connected to," or "directly bonded to" another element or layer, there are no intermediate elements or layers.

[0027] The terms First, Second, etc., are used to describe various elements, components, regions, layers, and / or parts, but these elements, components, regions, layers, and / or parts should not be limited by these terms. These terms are used to distinguish one element, component, region, layer, and / or part from another element, component, region, layer, and / or part.

[0028] Unless otherwise expressly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0029] The inventors discovered that, since holes are typically drilled below the anode to connect to the TFT via lower metal lines to enable pixel voltage signal transmission, these holes occupy a certain area. Furthermore, partition structures are usually used to increase screen resolution, which also takes up space. Therefore, there are issues that can lead to a decrease in pixel aperture ratio, insufficient pixel arrangement space, or limited OLED screen resolution.

[0030] In view of the above problems, the embodiments of this application are described in detail with reference to the accompanying drawings. In the embodiments of this application, the type of display panel is not specifically limited; the provided diagram is a structural schematic of a display panel according to one embodiment of this application. The display panel can be an Organic Light Emitting Diode (OLED) display panel or a Quantum Dot Light Emitting Diode (QLED) display panel. The display panel includes a display area AA with display function and a non-display area NA. It can be an OLED panel, a QLED panel, or a Mini OLED panel. (Refer to...) Figures 1 to 8 As shown, this application provides a display panel, which includes a substrate 1, a first electrode 4, a pixel definition layer 5, and a light-emitting layer 6 stacked together.

[0031] The substrate 1 includes a first trace 2. The substrate 1 serves as the supporting base for the entire panel. The substrate 1 can be a flexible substrate or a rigid substrate. The substrate 1 is made of a transparent insulating material (such as glass, flexible polyimide (PI) film, etc.) to provide a flat and stable carrier for subsequent film layer preparation.

[0032] Additionally, the first trace 2 includes a first portion 201, wherein the first portion 201 is electrically connected to the first electrode 4, and the other portion of the first trace 2 is used for signal transmission. The first trace 2 transmits driving signals, such as current and voltage signals; wherein the first trace 2 is partially exposed on the surface of the substrate 1, and the exposed first portion 201 of the first trace 2 can be electrically connected to other upper film layers to introduce signals to the upper film layers. The first opening 501 and the first groove 502 can be disposed in the same layer to reduce the number of photomasks and reduce costs. As a pixel, at least a portion of the first electrode 4 is exposed in the first opening 501, and at least a portion of the orthographic projection of the first electrode 4 on the substrate 1 overlaps with the orthographic projection of the first groove 502 on the substrate 1; the light-emitting layer 6 is disposed on the side of the first electrode 4 away from the substrate 1, and the light-emitting layer 6 is at least disposed in the first opening 501 and covers the first electrode 4. The first portion 201 of the overlap between the first electrode 4 and the first trace 2 at least partially overlaps with the orthographic projection of the first groove 502 on the substrate 1, overcoming the reduction in panel resolution caused by the opening of the first groove 502 in the prior art. This application arranges the first groove 502 to overlap with the portion overlapping the lower layer, which can reduce the reduction in aperture ratio caused by the opening of the first groove 502, save lateral arrangement space of the panel, and increase the panel resolution.

[0033] In this circuit, the first portion 201 of the first trace 2 is electrically connected to the first electrode. The orthographic projection of the first portion 201 onto the substrate 1 at least partially overlaps with the orthographic projection of the first groove 502 onto the substrate 1. The first electrode 4 is spaced apart from the first groove 502. The first electrode 4 serves as the anode (in this embodiment, the first electrode is the anode) and is made of a highly conductive metal (such as ITO, silver alloy, etc.) or a conductive oxide to ensure hole injection efficiency. The first electrode 4 is spaced apart from the first groove 502: that is, a certain distance is reserved between the bottom of the first groove 502 and the top of the first electrode 4 (the specific distance is adjusted according to the film thickness and process precision) to avoid short circuits between the first electrode 4 and other films in the first groove, thus ensuring circuit reliability. In order to ensure that the first electrode 4 does not short circuit with other films in the first groove, the first electrode 4 is designed to be spaced apart from the first groove 502, that is, a certain distance is reserved between the bottom of the first groove 502 and the top of the first electrode 4. That is, the pixel definition layer of the first groove 502 is not penetrated, forming a certain distance of isolation. A pixel definition layer 5 (PDL) covers the surface of the first electrode 4 and is used to define the pixel light-emitting area. In this embodiment, the pixel definition layer can be selected from an inorganic layer (such as SiN). x SiO x Alternatively, an organic layer (such as polyimide resin) can be used, or an inorganic-organic multilayer composite film layer (such as a bottom SiN layer) can be employed. x + Surface organic resin), taking into account insulation, resistance to vapor deposition and film smoothness.

[0034] Furthermore, the first part 201, projected onto the substrate 1, covers the first groove 502 within its projection onto the substrate 1. This ensures maximum utilization of the existing panel space, maximizing the resolution of the display panel. The first groove 502, with a cross-section perpendicular to the plane of the substrate 1, is trapezoidal (narrower at the top and wider at the bottom). Its function is to isolate the light-emitting layer 6, causing it to break at the groove, thus forming independent pixel units. The concave slope of the first groove 502 blocks the vapor-deposited light-emitting layer material (such as organic light-emitting material), forcing the light-emitting material to be deposited only in the non-groove pixel area, achieving physical isolation of the pixels. The light-emitting layer 6 includes a stacked hole injection layer HIL, a hole transport layer HTL, an electron blocking layer EBL, a light-emitting material layer EML, a hole blocking layer HBL, an electron transport layer ETL, and an electron injection layer EIL. The light-emitting layer 6 may include a single light-emitting material layer EML or a stacked light-emitting structure including multiple light-emitting material layers EML.

[0035] Furthermore, the display panel also includes a second electrode 7, which is disposed on the side of the light-emitting layer 6 facing away from the substrate 1. The continuous arrangement of the second electrode 7 ensures that the entire electrode surface has low impedance. The orthogonal projection of the second electrode 7 onto the substrate 1 covers the orthogonal projections of the first opening 501 and the first groove 502 onto the substrate 1. In the first groove 502, since the light-emitting layer 6 is interrupted, a certain gap remains at the bottom of the first groove 502. The second electrode 7, acting as a cathode (or common electrode), is continuously disposed (e.g., by vapor-depositing a thin metal film or conductive oxide across the entire surface). The second electrode 7 fills this gap through its covering effect, ensuring the continuity of the second electrode, reducing the impedance of the entire electrode surface, and improving driving stability. In this embodiment, the first electrode 4 is the anode and the second electrode 7 is the cathode; other arrangements can also be used, which are not listed here.

[0036] In a preferred embodiment, the display panel further includes a planarization layer 3, which is disposed on the side of the first trace 2 away from the substrate 1, with at least a portion of the first trace 2 exposed in the opening of the planarization layer 3; the planarization layer 3 ensures that the first trace 2 is insulated from other units thereon, and performs leveling on the plane where the first trace 2 is located, thus ensuring the flatness of the panel.

[0037] Specifically, the first trace 2 has a trapezoidal cross-section along the plane perpendicular to the substrate. A planarization layer 3 covers the side surface and part of the top surface of the first trace 2. An opening is made in part of the top surface of the first trace 2 to achieve the connection between the first electrode 4 and the first trace 2. The material of the first trace 2 includes molybdenum, titanium-aluminum alloy, or molybdenum-titanium alloy. Molybdenum has a high melting point (2623℃) and good oxidation resistance. Titanium-aluminum alloy has excellent strength and corrosion resistance. Molybdenum-titanium alloy combines the advantages of both molybdenum and titanium. The selection of these materials ensures that the first trace maintains good conductivity and stability during subsequent processes (such as high-temperature annealing and etching).

[0038] The first opening 501 and the first groove 502 are spaced apart in the plane of the substrate 1. The distance from the bottom surface of the first groove 502 to the substrate 1 is greater than the distance from the bottom surface of the first opening 501 to the substrate 1. In other words, the depth of the first groove 502 is less than the depth of the first opening 501, leaving space for the overlap of the first electrode 4 and the first trace 2. The first groove 502 extends through the adjacent pixel column along the extension direction (horizontal direction) of the pixel column, and its cross-sectional shape is preferably trapezoidal or rectangular. From a manufacturing process perspective, the trapezoidal cross-sectional shape is more conducive to the subsequent coverage of electrode material, reducing the risk of electrode breakage caused by the step effect.

[0039] To ensure effective insulation, the distance *a* between the bottom surface of the first groove 502 and the top surface of the first electrode 4 is greater than or equal to 50 angstroms. Specifically, the distance can be 50 angstroms, 55 angstroms, 60 angstroms, 65 angstroms, or 100 angstroms. Here, the distance *a* refers to the vertical distance between the bottom surface of the first groove 502 and the top surface of the first electrode 4. By controlling this distance, leakage between adjacent electrodes can be effectively prevented. For example, when *a* = 50 angstroms, the leakage current is less than a set value, which meets the insulation requirements of most display panels.

[0040] On the plane of the display panel, the display panel includes multiple pixels arranged in an array. A first groove 502 is provided between two adjacent pixel columns, and the first groove 502 extends along the direction of the pixel column. In this embodiment, the display panel adopts Real RGB pixel arrangement (i.e., red, green, and blue sub-pixels are arranged closely in a 1:1:1 ratio to form independent pixel units) to achieve a display effect with high color fidelity. Within the planar area of ​​the display panel, a first groove 502 is provided between pixel columns (extending horizontally, each column containing a sub-pixel array of multiple pixels). The first groove 502 penetrates adjacent pixel columns along the extension direction of the pixel column, and its cross-sectional shape is preferably trapezoidal or rectangular. The depth and width can be matched with the size of the first opening 501, or the overlap width of the first part 201 can be used as a matching object for corresponding size design. The first groove 502 is formed by etching process to ensure insulation and compatibility with subsequent electrodes. Of course, the pixel arrangement of the display panel can also be in different forms, such as tripod arrangement and diamond arrangement, etc., which will not be listed here.

[0041] Reference Figure 7 As shown, in a more preferred manner, a first groove 502 is also provided between two adjacent pixel rows. The first groove 502 extends along the direction of the pixel row and penetrates the adjacent pixels along the extension direction (vertical direction) of the pixel row. The display panel also includes a first signal line 100, which extends along the direction of the pixel row. The second electrode 7 overlaps with the first signal line 100, that is, the first groove 502 forms a grid structure, with each grid corresponding to an independent pixel unit, effectively dividing adjacent pixels and reducing optical crosstalk (such as light leakage and color crosstalk) and electrical crosstalk (such as uneven brightness caused by signal interference) between pixels. The display panel also includes the first signal line 100, which extends along the direction of the pixel column. Its material is metal (such as copper or aluminum) or conductive oxide (such as ITO or IZO). Resistivity and process compatibility need to be considered to effectively reduce voltage drop and power consumption during signal transmission. The thickness of the first signal line is selected to ensure a balance between mechanical strength and conductivity, while the line width is determined based on the output capability of the driver chip and the signal transmission distance.

[0042] Another arrangement of the first groove 502, this structure compared to Figure 6This improves crosstalk between pixels, but the climbing ability of the second electrode 7 needs to be enhanced to prevent it from breaking in the first groove 502. This can be achieved by changing the electrode material or adding an auxiliary electrode. The junction of the second electrode 7 and the first signal line 100 can be used to transmit signals such as Vss. Since there is a "step" (height difference in the depth direction) in the first groove 502, the second electrode 7 needs to have sufficient climbing ability when crossing the groove (i.e., the adhesion and ductility of the electrode material on the sidewall / bottom of the groove, or the conductivity continuity within the groove). To prevent the second electrode 7 from breaking in the first groove 502 (leading to signal transmission interruption or pixel failure), the following two optimization methods can be adopted. The first is material optimization: replace it with an electrode material with high adhesion and good ductility, such as adding 10%~20% Ag nanowires to a traditional ITO electrode (to improve flexibility and climbing ability), or using a metal-oxide composite electrode (such as an ITO / Ag / ITO stack, utilizing the ductility of the metal layer to transition the groove step). The second is the reinforcement of the auxiliary electrode: an auxiliary electrode (the same or compatible material as the second electrode 7, such as fine metal wire or conductive polymer) is added to the bottom or side wall of the first groove 502. The auxiliary electrode forms an electrical connection with both the first signal line 100 and the second electrode 7, sharing the "climbing" stress of the second electrode and preventing electrode breakage.

[0043] The display panel may also include at least one film layer such as a touch layer, polarizer, color filter substrate, and protective cover. This film layer may also be bonded to the display panel via an adhesive layer such as OCA (Optical Clear Adhesive).

[0044] Another aspect of the present invention provides a method for manufacturing a display panel, comprising: Reference Figures 1 to 6 As shown, the preparation method includes step 100, preparing a substrate 1, the substrate 1 including a first trace 2; the material of the substrate 1 is transparent glass (such as Corning Eagle XG), flexible polyimide (PI) or silicon wafer, and the thickness is 0.5~1.1mm (rigid substrate) or 20~100μm (flexible substrate).

[0045] Step 200: A planarization layer 3 is prepared on the substrate 1, which covers the first trace 2. The planarization layer 3 is patterned so that at least part of the first trace 2 is exposed. The planarization layer 3 must completely cover the first trace 2, and the surface roughness must be controlled (achieved by CMP polishing or chemical wet processing) to ensure the flatness of the subsequent pixel layer and electrode layer and reduce optical scattering and poor electrical contact.

[0046] Step 300: A first electrode 4 is fabricated on the side of the planarization layer 3 facing away from the substrate 1, and the first electrode 4 is connected to the first portion 201 of the first trace 2. Step 400: A pixel definition layer 5 is prepared on the side of the first electrode 4 away from the substrate 1. The pixel definition layer 5 includes a first opening 501 and a first groove 502. At least a portion of the first electrode 4 is exposed in the first opening 501. The orthographic projection of the first portion 201 on the substrate 1 and the orthographic projection of the first groove 502 on the substrate 1 at least partially overlap.

[0047] Furthermore, the method also includes: Step 500: A light-emitting layer 6 is prepared on the side of the pixel definition layer 4 facing away from the substrate 1. At least a portion of the light-emitting layer 6 is located in the first opening 501 and overlaps with the first electrode 4; wherein at least a portion of the light-emitting layer 6 is broken at the first groove 502.

[0048] Step 600: A second electrode 7 is prepared on the side of the light-emitting layer 5 away from the substrate 1. The second electrode 7 is continuously disposed. The orthogonal projection of the second electrode 7 onto the substrate 1 covers the orthogonal projection of the first opening 501 onto the substrate 1 and the orthogonal projection of the first groove 502 onto the substrate 1.

[0049] The implementation process of this method will be described below in conjunction with specific technological implementation methods.

[0050] Step 100: Prepare substrate 1. Substrate 1 includes first trace 2. First trace 2 is formed by forming a metal layer on top of the array film layer by magnetron sputtering. The metal layer can be a conductive metal layer such as molybdenum, titanium-aluminum alloy, or molybdenum-titanium alloy. The upper PR resist is patterned by applying PR resist, photolithography, and development. The metal layer is patterned by dry etching. Then the PR resist is removed. The first trace 2 is formed by etching process to ensure electrical connection reliability and pattern accuracy.

[0051] Step 200: An organic layer is coated on top of the first trace 2 to form a planarization layer 3. Patterning holes are then created through exposure to expose a portion of the first trace 2. The material of the planarization layer 3 can be an organic material (such as polymethyl methacrylate (PMMA), which has good planarization properties) or an inorganic material (such as silicon dioxide (SiO2), which has excellent insulating properties). The planarization layer 3 is prepared by spin coating. The planarization layer material is spin-coated onto the substrate 1 at a speed of 3000-5000 rpm for 30-60 seconds, followed by pre-baking at 150-250°C for 1-2 minutes, and then exposure and development processes are performed.

[0052] Step 300: The first electrode 4 (anode) is sputtered onto the planarization layer 3 by magnetron sputtering, and overlapped with the first trace 2 of the metal layer through the hole position of the planarization layer 3. The anode is patterned by coating, exposure, development and wet etching processes. The material of the first electrode 4 can be ITO, IZO or other conductive oxides, or it can be a metal material (such as silver or gold).

[0053] Step 400: An inorganic pixel definition layer 5 is formed above the anode using chemical vapor deposition. The first opening 501 and the first groove 502 of the pixel definition layer are formed by adjusting the dry etching method. An inorganic layer, organic layer, or multilayer composite film is selected according to the design. The pixel definition layer is formed on the substrate 1 using PECVD, spin coating, or photolithography and etching processes. The trapezoidal structure of the first groove 502 is etched (controlling the depth, width, and bevel angle). A pixel definition layer 5 of thickness 'a' is left at the opening of the first groove 502 to prevent the cathode and anode from colliding and short-circuiting at that location; or to prevent the OLED material from colliding with the anode to form a new light-emitting point. The distance between the bottom surface of the first groove 502 and the top surface of the first electrode 4 is greater than or equal to 50 angstroms. Specifically, the distance between them can be 50 angstroms, 55 angstroms, 60 angstroms, 65 angstroms, or 100 angstroms. Fabricating the first groove 502 on the planarization layer 3 requires combining "column-oriented" and "row-oriented" etching processes: First, patterns for the "column-oriented grooves" and "row-oriented grooves" are defined on the planarization layer 3 using photolithography (using photomasks to expose the groove areas in the column and row directions, respectively); then, the planarization layer 3 in the patterned areas is removed by dry etching (such as RIE reactive ion etching, using a CF4 / O2 mixed gas) or wet etching (such as BOE buffered oxide etchant, for SiO2 planarization layers) to form the first groove 502; after etching, residual etchant and photoresist are removed by cleaning processes (such as deionized water, isopropanol ultrasonic cleaning) to ensure that the inner wall of the groove is clean and free of residual impurities. The selection of the depth and width of the first groove 502 here is to ensure insulation while avoiding excessive material waste and increased process difficulty. Step 500: Evaporation of light-emitting material to form light-emitting layer 6, wherein the light-emitting material includes OLED organic light-emitting material, and the light-emitting layer includes hole injection layer, hole transport layer, light-emitting layer, electron injection layer, and electron transport layer, etc. In vacuum evaporation equipment, the organic light-emitting material is heated and evaporated. By using a mask or the blocking effect of the first groove, the light-emitting layer 6 is deposited only in the pixel area of ​​the first opening 501, thereby achieving physical isolation of the pixel unit.

[0054] Step 600: Deposit the second electrode 7 (cathode). The material of the second electrode 7 can be a magnesium-silver alloy (Mg:Ag, mass ratio 9:1). Deposit the entire surface to cover the first opening 501 and the first groove 502, filling the gap after the light-emitting layer 6 is disconnected, and ensuring the continuity of the second electrode. A portion of the second electrode 7 covers the top of the first signal line 100 (overlap area). The overlap area is defined by processes such as photolithography to ensure electrical connection while avoiding short circuits with other electrodes / traces.

[0055] Finally, the display panel is encapsulated, specifically by preparing an encapsulation layer on the side of the second motor 7 that is away from the substrate. The encapsulation material can be an organic encapsulation film (such as ethylene-vinyl acetate copolymer EVA) or an inorganic encapsulation layer (such as SiO2 and SiN). x (Multi-layer structure). The purpose of encapsulation is to protect the internal pixel structure and circuitry from water and oxygen corrosion, extending the lifespan of the display panel. The encapsulation layer is continuously disposed over at least the entire display area AA, with a portion also disposed over the bezel area NA.

[0056] The materials of the pixel definition layer (inorganic / organic / stacked), the cross-sectional shape of the first groove (a regular trapezoid can be replaced with an inverted trapezoid, rectangle, etc., to match the occlusion requirements), and the materials of the first and second electrodes (such as ITO for the first electrode and TCO + metal stacked for the second electrode) can all be adjusted according to actual needs. In addition, this structure is also applicable to other self-emissive display technologies such as quantum dot light emission (QLED), requiring only the replacement of the light-emitting layer material and some process parameters.

[0057] A third aspect of this application provides an electronic device, including a display panel as described in any of the foregoing claims or a display panel prepared by any of the foregoing methods. The pixel definition layer 5 of this display panel is disposed on the surface of a substrate 1. The pixel definition layer 5 includes a plurality of first openings 501 and first grooves 502. The first portion 201 of the overlap between the first electrode 4 and the first trace 2 at least partially overlaps with the first groove 502, overcoming the reduction in panel resolution caused by the opening of the first groove 502 in the prior art. This application arranges the first groove 502 to overlap with the overlapping portion of the lower layer, which can reduce the reduction in opening ratio caused by the opening of the first groove 502, save the lateral arrangement space of the panel, and increase the panel resolution.

[0058] Display devices can be mobile or fixed terminals with display panels, such as mobile phones, televisions, tablets, laptops, Ultra-Mobile Personal Computers (UMPCs), Personal Digital Assistants (PDAs), navigation devices, smartwatches, and virtual reality devices.

[0059] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0060] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A display panel, characterized in that, The display panel includes: The substrate includes the first trace; A pixel definition layer is disposed on the surface of the substrate, the pixel definition layer including a plurality of first openings and first grooves; A first electrode is at least partially exposed in the first opening, and at least a portion of the orthographic projection of the first electrode on the substrate overlaps with the orthographic projection of the first groove on the substrate. A light-emitting layer is disposed on the side of the first electrode opposite to the substrate, and the light-emitting layer is at least disposed in the first opening and covers a portion of the first electrode; The first portion of the first trace is electrically connected to the first electrode, and the orthographic projection of the first portion on the substrate at least partially overlaps with the orthographic projection of the first groove on the substrate. The first electrode and the first groove are spaced apart.

2. The display panel according to claim 1, characterized in that, The first portion in the orthographic projection on the substrate covers the first groove in the orthographic projection on the substrate.

3. The display panel according to claim 1, characterized in that, The first groove has a trapezoidal profile along the cross-section perpendicular to the plane of the substrate, and the light-emitting layer is broken at the first groove; Preferably, the display panel further includes a second electrode, which is disposed on the side of the light-emitting layer opposite to the substrate, and the second electrode is continuously disposed. Preferably, the orthographic projection of the second electrode onto the substrate covers the orthographic projection of the first opening onto the substrate and the orthographic projection of the first groove onto the substrate.

4. The display panel according to claim 1, characterized in that, The display panel also includes: A planarization layer is disposed on the side of the first trace away from the substrate, and at least a portion of the first trace is exposed in the opening of the planarization layer; Preferably, the first trace has a trapezoidal cross-section along the plane perpendicular to the substrate, and the planarization layer covers the side surface and part of the top surface of the first trace; Preferably, the distance between the bottom surface of the first groove and the substrate is greater than the distance between the bottom surface of the first opening and the substrate; Preferably, the thickness of the pixel definition layer between the bottom surface of the first groove and the top surface of the first electrode is greater than or equal to 50 angstroms.

5. The display panel according to claim 3, characterized in that, The display panel includes multiple pixels arranged in an array, and the first groove is provided between two adjacent pixel columns, the first groove extending along the direction of the pixel column; Preferably, the first groove is provided between two adjacent pixel rows, and the first groove extends along the direction of the pixel rows; Preferably, the display panel further includes a first signal line extending along the direction of the pixel row, and the second electrode overlaps with the first signal line; Preferably, the material of the first trace includes at least one of molybdenum, titanium-aluminum alloy, or molybdenum-titanium alloy.

6. A method for manufacturing a display panel, characterized in that, include: A substrate is prepared, the substrate including a first trace; A planarization layer is prepared on the substrate, the planarization layer covering the first trace, and the planarization layer is patterned such that at least a portion of the first trace is exposed; A first electrode is fabricated on the side of the planarization layer opposite to the substrate, and the first electrode is connected to a first portion of the first trace. A pixel definition layer is prepared on the side of the first electrode facing away from the substrate. The pixel definition layer includes a first opening and a first groove. At least a portion of the first electrode is exposed in the first opening. The orthographic projection of the first portion onto the substrate and the orthographic projection of the first groove onto the substrate at least partially overlap.

7. The method according to claim 6, characterized in that, After the step of fabricating the pixel definition layer on the side of the first electrode opposite to the substrate, the following steps are included: A light-emitting layer is prepared on the side of the pixel definition layer opposite to the substrate, and at least a portion of the light-emitting layer is located in the first opening; Preferably, at least a portion of the light-emitting layer is broken at the first groove.

8. The method according to claim 7, characterized in that, After the step of fabricating the light-emitting layer on the side of the first electrode opposite to the substrate, the method further includes: A second electrode is fabricated on the side of the light-emitting layer opposite to the substrate, and the second electrode is continuously disposed. Preferably, the orthographic projection of the second electrode onto the substrate covers the orthographic projection of the first opening onto the substrate and the orthographic projection of the first groove onto the substrate.

9. The method according to claim 6, characterized in that, The thickness of the pixel definition layer between the bottom surface of the first groove and the top surface of the first electrode is greater than 50 angstroms.

10. An electronic device, characterized in that, The display panel includes any one of the display panels described in claims 1 to 5, or a display panel obtained by the method described in any one of claims 6 to 9.

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