Method of restoring ion implanted semiconductor material luminescence properties

Abstract

The application provides a method for recovering light emitting performance of ion implanted semiconductor material, relates to the technical field of semiconductor optoelectronic devices, and is used for effectively eliminating or passivating non-radiative recombination defects introduced by the method. The method comprises the following steps: performing ion implantation on a semiconductor substrate to form an implanted layer; preparing an oxide passivation layer on the surface of the ion implanted semiconductor substrate; performing ultrafast annealing on the semiconductor substrate on which the oxide passivation layer is deposited; and performing thermal annealing on the semiconductor substrate after the ultrafast annealing, so as to recover the light emitting performance of the ion implanted semiconductor substrate.

Description

Technical Field

[0001] This invention relates to the field of semiconductor optoelectronic device technology, and in particular to a method for restoring the luminescence properties of ion-implanted semiconductor materials. Background Technology

[0002] Ion implantation technology, due to its ability to achieve highly localized doping in the horizontal direction and precisely controllable doping depth and concentration in the vertical direction, can be applied to integrated circuit manufacturing processes. However, its application in the field of light-emitting devices faces significant challenges. Taking GeSn materials as an example, there are very few reports on active devices such as light-emitting diodes based on ion implantation. Meanwhile, molecular beam epitaxy and chemical vapor deposition, which were developed concurrently, have successfully fabricated devices. The fundamental reason for this significant lag lies in the inherent physical defect mechanisms of ion implantation. Summary of the Invention

[0003] In view of this, the present invention provides a method for restoring the luminescence properties of ion-implanted semiconductor materials, which at least solves the above-mentioned technical problems.

[0004] This invention provides a method for restoring the luminescence properties of ion-implanted semiconductor materials, comprising: ion implantation of a semiconductor substrate to form an implantation layer; preparation of an oxide passivation layer on the surface of the ion-implanted semiconductor substrate; ultrafast annealing of the semiconductor substrate with the deposited oxide passivation layer; and thermal annealing of the ultrafast annealed semiconductor substrate to restore the luminescence properties of the ion-implanted semiconductor substrate.

[0005] According to an embodiment of the present invention, ion implantation is performed on a semiconductor substrate to form an implantation layer, including: using beam ion implantation or plasma immersion ion implantation to implant inert gas ions, group V doped ions, group III doped ions or semiconductor self-implanted ions into the semiconductor substrate to form an implantation layer.

[0006] According to an embodiment of the present invention, an oxide passivation layer is prepared on the surface of an ion-implanted semiconductor substrate, comprising: using plasma-enhanced chemical vapor deposition, atomic layer deposition, low-pressure chemical vapor deposition or sputtering to prepare an oxide passivation layer on the surface of the semiconductor substrate using an oxygen-containing dielectric material.

[0007] According to an embodiment of the present invention, the preparation of an oxide passivation layer on the surface of an ion-implanted semiconductor substrate further includes: preparing an oxide passivation layer with a thickness of 10 nm to 50 nm on the surface of the semiconductor substrate using at least one of a silicon dioxide layer, an aluminum oxide layer, a hafnium oxide layer, or a zirconium oxide layer.

[0008] According to an embodiment of the present invention, ultrafast annealing is performed on a semiconductor substrate with an oxide passivation layer deposited thereon, including: ultrafast annealing of the semiconductor substrate with an oxide passivation layer deposited thereon using at least one of pulsed laser annealing, flash lamp annealing, and spike annealing, so as to recrystallize the implanted layer and initially restore the amorphous implanted layer to a single crystal phase with low defect density.

[0009] According to an embodiment of the present invention, ultrafast annealing is performed on a semiconductor substrate with an oxide passivation layer deposited thereon, comprising: using an energy density of 600 mJ / cm². 2 ~900 mJ / cm 2 Pulsed lasers with pulse widths on the order of nanoseconds are used to perform pulsed laser annealing on semiconductor substrates with deposited oxide passivation layers.

[0010] According to an embodiment of the present invention, thermal annealing of a semiconductor substrate after ultrafast annealing includes: performing rapid thermal annealing on the semiconductor substrate after ultrafast annealing, so that oxygen atoms in the oxide passivation layer combine with dangling bonds on the surface of the semiconductor substrate to form stable chemical bonds, and relaxing lattice atoms in the implanted layer back to their equilibrium positions to eliminate point defects remaining in the bulk during implantation and ultrafast annealing, wherein the annealing temperature is 300°C~600°C, the heating rate is greater than 20°C / s, and the annealing time is 10s~10min.

[0011] According to an embodiment of the present invention, thermal annealing of a semiconductor substrate after ultrafast annealing includes: using furnace tube annealing to thermally anneal the semiconductor substrate after ultrafast annealing, so that oxygen atoms in the oxide passivation layer combine with dangling bonds on the surface of the semiconductor substrate to form stable chemical bonds, and so that lattice atoms in the implanted layer relax back to their equilibrium positions to eliminate point defects remaining in the bulk during implantation and ultrafast annealing, wherein the annealing temperature is 250°C~500°C, the heating rate is less than 10°C / s, and the annealing time is 10min~2h.

[0012] According to an embodiment of the present invention, after thermal annealing the semiconductor substrate after ultrafast annealing, the method further includes: removing the oxide passivation layer.

[0013] According to an embodiment of the present invention, the semiconductor substrate is made of a group IV semiconductor material.

[0014] The method for restoring the luminescence properties of ion-implanted semiconductor materials provided by this invention has at least the following technical effects:

[0015] This method proposes a combined process strategy of "oxide passivation layer + ultrafast annealing + thermal annealing". Through the organic integration of these three steps, the technical challenge of eliminating non-radiative recombination defects after ion implantation is systematically solved. The effectiveness of this technique stems from the combined effect of the two annealing processes: ultrafast annealing repairs the crystal structure of the implanted layer, while subsequent thermal annealing specifically eliminates residual point defects and activates the passivation layer. The two annealing processes complement each other on a timescale, achieving comprehensive suppression of non-radiative recombination centers both in the bulk and on the surface.

[0016] This method employs standard semiconductor industry processes such as Plasma-Enhanced Chemical Vapor Deposition (PECVD), Atomic Layer Deposition (ALD), Pulsed Laser Annealing (PLA), and Rapid Thermal Annealing (RTA). It requires no special equipment or non-standard modifications and can be easily integrated into existing semiconductor production lines. More importantly, this method is applicable to both beam-based ion implantation and plasma implantation, covering a wide range of applications from high-energy deep implantation to shallow, high-dose implantation. By selecting a high-temperature, short-duration rapid thermal annealing mode, impurity diffusion and precipitation can be effectively suppressed, thus achieving good compatibility with ion implantation-based non-equilibrium doping processes.

[0017] This method verifies the effectiveness of commonly used SiO2 oxide layers as passivation layers on crystalline germanium surfaces. Based on the common chemical mechanisms of oxygen-containing media, it reasonably infers that other oxygen-containing dielectric materials (such as Al2O3, HfO2, TiO2, ZrO2, etc.) can also play a similar passivation role. The technical solution is transferable and scalable. This method is applicable to various group IV semiconductor material systems such as Ge, GeSn, SiGe, and SiGeSn, covering the main material platforms in the field of silicon-based optoelectronics, and is expected to promote the expansion of ion implantation from traditional doping processes to the fabrication of light-emitting devices. Attached Figure Description

[0018] The above-described features, other objects, and advantages of the present invention will become clearer from the following description of embodiments of the invention with reference to the accompanying drawings, in which:

[0019] Figure 1 A flowchart illustrating a method for restoring the luminescence properties of ion-implanted semiconductor materials according to an embodiment of the present invention is shown.

[0020] Figure 2 The diagram illustrates the device structure corresponding to each step of the method for restoring the luminescence performance of ion-implanted semiconductor materials according to an embodiment of the present invention.

[0021] Figure 3 A schematic TEM cross-sectional view of the surface region of a single-crystal Ge sample after Ar ion implantation according to an embodiment of the present invention is shown.

[0022] Figure 4 The PL spectra of samples after different process treatments (ion implantation, RTA, PLA) according to embodiments of the present invention are illustrated schematically.

[0023] Figure 5 The diagram illustrates a comparative bar chart of PL intensity for samples under different annealing conditions (FA alone, PLA alone, and PLA+FA combination treatment) according to Embodiment 1 of the present invention.

[0024] Figure 6 The diagram illustrates a comparative histogram of PLA intensity for samples under different annealing conditions (PLA alone, PLA+RTA combined treatment) according to Embodiment 2 of the present invention.

[0025] Figure 7 A schematic bar chart illustrating the comparison of material PL strength under a low-temperature long-time annealing process according to Embodiment 3 of the present invention is shown.

[0026] Figure 8 The diagram illustrates a comparative bar chart of PL intensity with and without a SiO2 passivation layer according to Comparative Example 1 of the present invention. Detailed Implementation

[0027] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the invention. In the following detailed description, numerous specific details are set forth to provide a thorough understanding of the embodiments of the invention for ease of explanation. However, it will be apparent that one or more embodiments may be practiced without these specific details. Furthermore, descriptions of well-known structures and techniques are omitted in the following description to avoid unnecessarily obscuring the concept of the invention.

[0028] In the process of realizing this invention, it was discovered that during ion implantation, collisions between the high-energy ion beam and the crystal lattice generate a large number of vacancy and interstitial atoms, among other lattice defects. The optical properties of semiconductor materials are highly sensitive to these defects. Studies have shown that even extremely low doses of He ion beam irradiation in Rutherford backscattering spectroscopy (RSS) for analytical purposes can cause severe quenching of the luminescence signal in semiconductor materials, with the PL intensity typically decreasing by more than an order of magnitude. Furthermore, bandgap engineering-based ion implantation usually requires non-equilibrium doping with a solid solubility exceeding a certain level, necessitating that the annealing process be strictly limited to an extremely short timescale of less than milliseconds. Although ultrafast annealing techniques such as pulsed laser annealing and flash lamp annealing can achieve good single-crystal epitaxial growth, experiments show that the non-radiative recombination defects generated by implantation are difficult to fully recover within such extremely short annealing timescales, significantly limiting the application of ion implantation technology in the field of light sources. Therefore, it is crucial to effectively eliminate or passivate the non-radiative recombination defects introduced by ion implantation while maintaining its doping advantages, thereby restoring the optical properties of the material.

[0029] In view of this, embodiments of the present invention provide a method for restoring the luminescence properties of ion-implanted semiconductor materials, and specific embodiments are described in detail below.

[0030] Figure 1 A flowchart illustrating a method for restoring the luminescence properties of ion-implanted semiconductor materials according to an embodiment of the present invention is shown. Figure 2 The diagram illustrates the device structure corresponding to each step of the method for restoring the luminescence performance of ion-implanted semiconductor materials according to an embodiment of the present invention.

[0031] like Figure 1 and Figure 2 As shown, the method for restoring the luminescence properties of ion-implanted semiconductor materials in this embodiment may include operations S110 to S140.

[0032] In operation S110, ion implantation is performed on the semiconductor substrate to form an implantation layer.

[0033] According to embodiments of the present invention, ion implantation is performed on a semiconductor substrate. High-dose ion implantation disrupts the lattice periodicity, transforming the surface layer into an amorphous state, thereby achieving amorphization or high-concentration doping of the semiconductor substrate surface. By controlling the ion energy and dose, the doping concentration and junction depth can be precisely controlled. Uniform and controllable ion implantation provides a foundation for subsequent uniform and high-quality recrystallization (e.g., ultrafast annealing).

[0034] In operation S120, an oxide passivation layer is prepared on the surface of an ion-implanted semiconductor substrate.

[0035] According to an embodiment of the present invention, the passivation layer can block the penetration of external impurities (such as metal ions) and prevent contamination.

[0036] In operation S130, an ultrafast annealing is performed on a semiconductor substrate with an oxide passivation layer deposited on it.

[0037] According to an embodiment of the present invention, ultrafast annealing can recrystallize the implanted layer, initially restoring the amorphous implanted layer to a single-crystal phase with low defect density.

[0038] In operation S140, the semiconductor substrate after ultrafast annealing is thermally annealed.

[0039] According to embodiments of the present invention, thermal annealing can cause oxygen atoms in the oxide passivation layer to combine with dangling bonds on the semiconductor substrate surface to form stable chemical bonds, and to relax lattice atoms in the implanted layer back to their equilibrium positions, thereby eliminating point defects remaining in the bulk during implantation and ultrafast annealing. For example, oxygen atoms in the oxide passivation layer can further combine with dangling bonds on the semiconductor surface to form stable Si-O or Al-O bonds, reducing the interface state density. The lattice atoms in the implanted layer relax back to their equilibrium positions through thermal motion, eliminating point defects (such as vacancies and interstitial atoms) and reducing carrier scattering centers.

[0040] In some embodiments, the semiconductor substrate material includes group IV semiconductor materials. For example, Ge, Si, GeSn alloys, SiGe alloys, or SiGeSn alloys. These material systems have significant application value in the field of silicon-based optoelectronics, especially GeSn alloys, which are considered one of the candidate materials for realizing silicon-based light sources due to their tunable bandgap and compatibility with CMOS processes.

[0041] In some embodiments, ion implantation is performed on a semiconductor substrate to form an implanted layer, including: implanting inert gas ions, group V doped ions, group III doped ions, or semiconductor self-implanted ions into the semiconductor substrate using beam ion implantation or plasma immersion ion implantation to form an implanted layer. Alternatively, high-energy ion beams can be used to bombard the surface of the semiconductor substrate, causing ions to embed into the crystal lattice structure to form an amorphous layer or a highly doped region.

[0042] For example, inert gas ions such as He + Ne + Ar + The injection energy and dose are selected according to the target doping concentration and depth to achieve amorphization or high-concentration doping on the substrate surface.

[0043] In some embodiments, preparing an oxide passivation layer on the surface of an ion-implanted semiconductor substrate includes: preparing an oxide passivation layer on the surface of the semiconductor substrate using an oxygen-containing dielectric material by means of plasma-enhanced chemical vapor deposition, atomic layer deposition, low-pressure chemical vapor deposition, or sputtering.

[0044] Furthermore, the preparation of an oxide passivation layer on the surface of an ion-implanted semiconductor substrate further includes: using at least one of a silicon dioxide layer, an aluminum oxide layer, a hafnium oxide layer, an oxide layer, or a zirconium oxide layer to prepare an oxide passivation layer with a thickness of 10 nm to 50 nm on the surface of the semiconductor substrate.

[0045] In some embodiments, ultrafast annealing of a semiconductor substrate with an oxide passivation layer includes: ultrafast annealing of the semiconductor substrate with an oxide passivation layer using at least one of pulsed laser annealing, flash lamp annealing, and spike annealing, so as to recrystallize the implanted layer and initially restore the amorphous implanted layer to a single crystal phase with low defect density.

[0046] For example, pulsed laser annealing uses a high-energy pulsed laser (nanosecond to millisecond level) to instantly heat the material surface, achieving rapid temperature rise, followed by rapid cooling through the substrate's thermal conductivity, resulting in a "fast heating and fast cooling" instantaneous heat treatment. Flash lamp annealing utilizes intense light pulses (millisecond level) to instantly heat the material surface, achieving energy densities of hundreds of J / cm², realizing sub-second non-equilibrium annealing. Spike annealing achieves "spike" heat treatment by rapidly heating to the target temperature (e.g., above 1000℃), holding the temperature briefly (seconds), and then rapidly cooling.

[0047] In some embodiments, ultrafast annealing of a semiconductor substrate with a deposited oxide passivation layer includes: using an energy density of 600 mJ / cm². 2 ~900 mJ / cm 2 Pulsed lasers with pulse widths on the order of nanoseconds are used to perform pulsed laser annealing on semiconductor substrates with deposited oxide passivation layers.

[0048] According to an embodiment of the present invention, the thermal annealing temperature is lower than the melting point of the semiconductor substrate material. Depending on compatibility requirements with the ultrasolid doping process, one of two modes can be selected: a low-temperature long-time mode or a high-temperature short-time mode.

[0049] In some embodiments, low-temperature long-time thermal annealing may include: using furnace annealing (FA) to thermally anneal the semiconductor substrate after ultrafast annealing, allowing oxygen atoms in the oxide passivation layer to bond with dangling bonds on the semiconductor substrate surface to form stable chemical bonds, and allowing lattice atoms in the implanted layer to relax back to their equilibrium positions, thereby eliminating point defects remaining in the bulk during implantation and ultrafast annealing. The annealing temperature is 250°C to 500°C, the heating rate is less than 10°C / s, and the annealing time is 10 min to 2 h. This mode is suitable for process scenarios where thermal budget is not sensitive or where strict diffusion control is not required (such as partial stress release on the surface of epitaxial materials).

[0050] In some embodiments, high-temperature short-time annealing can include: performing rapid thermal annealing on the semiconductor substrate after ultrafast annealing, allowing oxygen atoms in the oxide passivation layer to bond with dangling bonds on the semiconductor substrate surface to form stable chemical bonds, and relaxing lattice atoms in the implanted layer back to their equilibrium positions to eliminate point defects remaining in the bulk during implantation and ultrafast annealing. The annealing temperature is 300°C to 600°C, the heating rate is greater than 20°C / s, and the annealing time is 10s to 10min. This mode has a much higher heating rate than FA, effectively suppressing the diffusion and aggregation of dopant atoms, and is highly compatible with ultrasolid nonequilibrium doping processes.

[0051] In some embodiments, after thermal annealing the semiconductor substrate following ultrafast annealing, the method further includes removing the oxide passivation layer.

[0052] After all annealing steps are completed, the oxide passivation layer on the surface can be selectively removed according to the specific requirements of subsequent device processes. For example, when further electrode fabrication, dielectric layer deposition, or other interface-sensitive processes are required, removing the passivation layer helps to obtain a clean, oxide-free semiconductor surface. The removal method uses an etching solution with a high selectivity to the semiconductor substrate to avoid unnecessary damage to the substrate material.

[0053] For example, the SiO2 passivation layer can be removed using a diluted hydrofluoric acid (HF) solution, typically in a 10:1 ratio (deionized water:HF), for approximately 30 seconds. For the Al2O3 passivation layer, it can be soaked in a phosphoric acid solution (85% H3PO4) heated to 80°C for 5 minutes. After removal, rinse thoroughly with deionized water and dry with nitrogen gas to ensure a clean surface.

[0054] It should be noted that the last step in the process flow is optional and can be performed depending on the specific requirements of subsequent device manufacturing processes. For example, when the passivation layer does not affect subsequent processes or can also serve as an insulating layer for the device, it can be retained; when it is necessary to expose a clean semiconductor surface for electrode contact or epitaxial growth, the passivation layer can be selectively removed.

[0055] Figure 3 A schematic TEM cross-sectional view of the surface region of a single-crystal Ge sample after Ar ion implantation according to an embodiment of the present invention is shown.

[0056] like Figure 3 As shown, the plasma was injected with low-energy Ar plasma (energy 5 keV, dose 1E16 cm⁻¹). -2 The microstructure and morphology of the single-crystal germanium surface after processing were analyzed using transmission electron microscopy (TEM). Figure 3The results show that after high-dose argon ion implantation, a specific depth region on the surface of the single-crystal germanium underwent complete amorphization, forming approximately 12 nm thick amorphous germanium (a-Ge). Based on this, PL (photon emission) measurements revealed that the direct bandgap characteristic peak (approximately 1580 nm) of the PL spectrum almost completely disappeared, indicating that the damage introduced by ion implantation led to extremely significant nonradiative recombination. Subsequently, the ion-implanted sample was cut into two parts and subjected to rapid thermal annealing (RTA) and pulsed laser annealing (PLA), respectively. The results show that both annealing processes had very limited effects on the recovery of PL spectral intensity, with the recovery degree not exceeding 5% of the original germanium substrate's PL spectral intensity. These results fully demonstrate that both RTA and PLA have significant limitations when used alone to eliminate ion implantation damage.

[0057] Figure 4 The PL spectra of samples after different process treatments (ion implantation, RTA, PLA) according to embodiments of the present invention are illustrated schematically.

[0058] like Figure 4 As shown, RTA alone cannot effectively recover from injection damage.

[0059] To more clearly illustrate the method for restoring the luminescence properties of ion-implanted semiconductor materials according to embodiments of the present invention, some examples and comparative examples are provided below to fully demonstrate the effectiveness of the proposed combined process (passivation layer assistance + two-step annealing) in eliminating ion implantation damage and improving the optical properties of single-crystal substrates.

[0060] Example 1 (Basic scheme: conventional furnace tube annealing, FA).

[0061] The method in this embodiment 1 includes the following steps.

[0062] Ion implantation: Ar was implanted on an N-type Ge(100) substrate using plasma immersion ion implantation (PIII) process. + Ion implantation, Ar + The ion implantation energy was 5 keV, and the dose was 5E16 cm⁻¹. -2 After implantation, the surface Ge layer becomes completely amorphous.

[0063] Depositing oxide passivation layer: A 20 nm thick SiO2 layer was deposited on the surface of the implanted sample using PECVD process at a deposition temperature of 150°C.

[0064] First Annealing (PLA): The sample was subjected to pulsed laser annealing using a XeCl excimer laser (wavelength 308 nm), pulse width 28 ns, and energy density 800 mJ / cm². 2This step allows the amorphous Ge layer to undergo liquid-phase epitaxy, restoring it to a high-quality single crystal.

[0065] Second annealing (FA): The sample was cut into three equal parts and placed in an annealing furnace under a nitrogen atmosphere. The parts were then annealed at 300°C, 400°C, and 500°C for 20 minutes each, with a heating rate of 5°C / min, and then allowed to cool naturally.

[0066] Removal of passivation layer: Immerse in HF solution diluted 10:1 for 30 seconds to remove the SiO2 layer on the surface of all samples, then rinse with deionized water and dry with nitrogen.

[0067] Performance testing: A 532 nm continuous wave laser was used as the excitation source with a power of 50 mW and a spot diameter of approximately 1 μm. Photoluminescence (PL) tests were performed on the samples at room temperature.

[0068] Figure 5 The diagram illustrates a comparative bar chart of PL intensity for samples under different annealing conditions (FA alone, PLA alone, and PLA+FA combination treatment) according to Embodiment 1 of the present invention.

[0069] like Figure 5 As shown, after furnace tube annealing at 400°C, the peak PL intensity of the sample recovered to approximately 50% of the original Ge substrate intensity before ion implantation. The peak PL intensity of samples annealed at furnace tube temperatures of 300°C and 500°C recovered to 40% and 18%, respectively, both significantly higher than the effect of PLA treatment alone under the same conditions (less than 5%).

[0070] Example 2 (Compatible with supersolid doping: rapid thermal annealing, RTA)

[0071] To verify the compatibility of this method with ultrasolubility doping processes, rapid thermal annealing was used instead of furnace tube annealing in Example 1.

[0072] Ion implantation: Ar was implanted on an N-type Ge(100) substrate using plasma immersion ion implantation (PIII) process. + Ion implantation, Ar + The ion implantation energy was 5 keV, and the dose was 5E16 cm⁻¹. -2 After implantation, the surface Ge layer becomes completely amorphous.

[0073] Deposition of passivation layer: A 5 nm thick Al2O3 layer was deposited using atomic layer deposition (ALD) at a deposition temperature of 200°C. The precursors were trimethylaluminum (TMA) and water.

[0074] First Annealing (PLA): The sample was subjected to pulsed laser annealing using a XeCl excimer laser (wavelength 308 nm), pulse width 28 ns, and energy density 800 mJ / cm². 2 .

[0075] Secondary annealing (RTA): The sample is cut into multiple parts and placed in a rapid thermal annealing furnace. Rapid thermal annealing is carried out in the temperature range of 300°C-550°C for 1 minute, with a heating rate of 50°C / second, under nitrogen atmosphere protection, and then cooled naturally.

[0076] Remove the passivation layer: Soak in a phosphoric acid solution (85% H3PO4) at 80°C for 5 minutes to remove the Al2O3 layer, then rinse with deionized water and dry with nitrogen.

[0077] Performance testing: A 532 nm continuous wave laser was used as the excitation source with a power of 50 mW and a spot diameter of approximately 1 μm. Photoluminescence (PL) tests were performed on the samples at room temperature.

[0078] Figure 6 The diagram illustrates a comparative histogram of PLA intensity for samples under different annealing conditions (PLA alone, PLA+RTA combined treatment) according to Embodiment 2 of the present invention.

[0079] like Figure 6 As shown, after the above process, the PL strength of all samples was significantly restored, recovering to about 40%-45% of the pre-injection level. Among them, the recovery effect of the 500°C annealed samples was the best, but slightly lower than that of the furnace tube annealing process.

[0080] because Figure 4 It has been confirmed that RTA alone cannot effectively recover from injection damage, therefore... Figure 6 There is a lack of separate RTA comparative data. Considering that the RTA process can effectively suppress the diffusion of dopant ions and has a significantly lower thermal budget than furnace tube annealing, the process scheme of this invention has good compatibility with the ultrasolubility doping process.

[0081] Example 3 (Exploration of Low-Temperature Long-Term Annealing)

[0082] To explore another way to reduce the heat budget, this embodiment 3 uses a lower annealing temperature.

[0083] Ion implantation: Ar was implanted on an N-type Ge(100) substrate using plasma immersion ion implantation (PIII) process. + Ion implantation, Ar + The ion implantation energy was 5 keV, and the dose was 5E16 cm⁻¹. -2 After implantation, the surface Ge layer becomes completely amorphous.

[0084] Deposition of passivation layer: A 20 nm thick SiO2 layer was deposited on the surface of the implanted sample using PECVD process at a deposition temperature of 150°C.

[0085] First Annealing (PLA): The sample was subjected to pulsed laser annealing using a XeCl excimer laser (wavelength 308 nm), pulse width 28 ns, and energy density 800 mJ / cm². 2 .

[0086] Second annealing (low-temperature furnace tube annealing): hot annealing at 200°C for 2 hours.

[0087] Removal of passivation layer: Immerse in HF solution diluted 10:1 for 30 seconds to remove the SiO2 layer on the surface of all samples, then rinse with deionized water and dry with nitrogen.

[0088] Performance testing: A 532 nm continuous wave laser was used as the excitation source with a power of 50 mW and a spot diameter of approximately 1 μm. Photoluminescence (PL) tests were performed on the samples at room temperature.

[0089] Figure 7 A schematic bar chart illustrating the comparison of material PL strength under a low-temperature long-time annealing process according to Embodiment 3 of the present invention is shown.

[0090] like Figure 7 As shown, the intensity increased only slightly compared to before treatment, recovering to only about 10% of the pre-ion implantation level. This indicates that at 200°C, the matrix atoms lack sufficient kinetic energy to overcome the potential barrier, making effective defect elimination and surface passivation impossible. This result implies that significantly reducing the furnace tube annealing temperature and substantially extending the annealing time cannot effectively recover the non-radiative recombination damage introduced by ion implantation. Therefore, for specific semiconductor materials, thermal annealing treatment has a clearly defined threshold temperature requirement.

[0091] Comparative Example 1 (without passivation layer)

[0092] The difference from Example 1 is that no oxide passivation layer was deposited after ion implantation in order to explore the effect of the surface oxide layer on defect passivation.

[0093] Figure 8 The diagram illustrates a comparative bar chart of PL intensity with and without a SiO2 passivation layer according to Comparative Example 1 of the present invention.

[0094] like Figure 8 As shown, in the same PLA (800 mJ / cm) 2Under the conditions of furnace tube hot annealing (400°C, 20 min), without a surface passivation layer, the PL strength can only recover to about 10% of that before ion implantation, which proves that the surface passivation layer is the key to achieving high PL recovery efficiency.

[0095] Comparative Example 2 (PLA annealing only)

[0096] The difference from Example 1 is that a second thermal annealing step is omitted; only PLA (800 mJ / cm²) treatment is performed after the SiO₂ layer is deposited. Test results are as follows: Figure 5 As shown, the PL intensity of the treated sample is only about 10% of that before ion implantation. This indicates that although single-step PLA can restore the crystal structure of the matrix, it still cannot fully eliminate internal point defects, and its effect on restoring the optical properties of the material is very limited.

[0097] Comparative Example 3 (Heat Annealing Only)

[0098] The difference from Example 1 is that the first step of PLA annealing is omitted; instead, only furnace tube hot annealing is performed after the SiO2 layer is deposited. The annealing temperatures are set to 300°C, 400°C, and 500°C, respectively, and the annealing time is 20 minutes for each. The test results are as follows: Figure 5 As shown, after thermal annealing, the PL strength of the sample only recovered to about 2.5% of that before ion implantation. This indicates that, compared with PLA, simple thermal annealing is less effective at eliminating internal defects in the material.

[0099] Based on the above embodiments and comparative examples, systematic comparative experiments have for the first time clearly demonstrated that the combination of pulsed laser annealing, thermal annealing, and oxide passivation layer plays an indispensable role in restoring the luminescence performance of ion-implanted semiconductors. The specific working principle can be briefly described as follows: Pulsed laser annealing, within a nanosecond timescale, effectively repairs a large amount of lattice damage caused by ion implantation through a liquid-phase epitaxial growth mechanism; subsequent thermal annealing plays a dual role over a longer timescale, eliminating residual defects (such as vacancies and interstitial atoms) that pulsed laser annealing failed to remove, and activating the oxide passivation layer to allow oxygen atoms to bond with dangling bonds on the semiconductor surface, thereby passivating surface defect states. The two annealing processes complement each other on the timescale, and combined with the chemical passivation effect of the oxide passivation layer, they jointly achieve comprehensive suppression of non-radiative recombination centers both within and on the surface of the material, thereby significantly improving the luminescence intensity of the material.

[0100] It is worth noting that during pulsed laser annealing, the pre-deposited oxide passivation layer not only serves as a chemical passivation source for subsequent thermal annealing, but also acts as a physical barrier layer during the ultrafast annealing stage, effectively suppressing surface roughening and element volatilization of the high-temperature molten semiconductor material, thereby ensuring the smoothness and stoichiometry integrity of the recrystallized layer.

[0101] It should be noted that while there are existing technologies that deposit a capping layer on the semiconductor surface before pulsed laser annealing, these technologies utilize the physical barrier effect of the capping layer to suppress the diffusion and escape of supersaturated dopant atoms and inert gas bubbles, and to avoid the ablation effect on the substrate surface during laser annealing, as well as the loss of impurities and bubbles caused by high-temperature evaporation of the molten layer. This technology only focuses on the physical protection effect during the laser annealing stage; the capping layer is usually removed after annealing, and it does not address subsequent thermal annealing treatment, nor does it reveal the function and role of the capping layer in chemical passivation.

[0102] In comparison, this invention not only employs an oxide passivation layer to provide the aforementioned physical protection during the pulsed laser annealing stage (suppressing surface roughening and preventing element volatilization), but more importantly, it introduces a subsequent thermal annealing process for the first time to achieve dual technical objectives: firstly, activating the oxide passivation layer to allow oxygen atoms to chemically bond with dangling bonds on the semiconductor surface, thereby achieving chemical passivation of surface defect states; secondly, through a longer thermal annealing timescale, promoting the elimination of residual point defects (such as vacancies and interstitial atoms) within the crystal lattice, further reducing the concentration of non-radiative recombination centers. Therefore, this invention, through a multiple mechanism of "physical protection + chemical passivation + defect elimination," achieves a significant recovery of the luminescent performance of ion-implanted semiconductors, achieving technical effects never before achieved by existing technologies.

[0103] In summary, this invention proposes a systematic solution to the long-standing technical challenge of eliminating non-radiative recombination defects and significantly reducing luminous efficiency in semiconductor light-emitting devices using ion implantation technology. This solution is the first to organically combine oxide passivation layer deposition, ultrafast annealing, and subsequent thermal annealing processes, forming a "passivation layer-assisted + two-step annealing" technical route.

[0104] It should be noted that, in addition to the nanosecond pulsed laser annealing described in the embodiments, the present invention can also employ other ultrafast annealing methods commonly used in the semiconductor field to achieve recrystallization repair of the implanted damaged layer, such as millisecond-level flash annealing or sub-millisecond-level spike annealing. These annealing methods typically heat the material surface rapidly in a very short time, with energy transfer mainly concentrated in the wafer surface area. Due to the limited heat diffusion time, the substrate temperature remains at a low level, thus forming a large longitudinal temperature gradient on the material surface. This is similar to laser annealing, but the difference lies in the fact that flash annealing or spike annealing has a larger thermal irradiation area and is not limited by wafer size, offering excellent process uniformity and production capacity advantages, making it very suitable for industrial production line applications.

[0105] After irradiation, the surface hot layer cools rapidly through heat conduction from the substrate. The huge temperature gradient triggers an ultrafast non-equilibrium epitaxial crystallization mechanism, enabling rapid recrystallization of the surface damaged layer from bottom to top, thereby obtaining a high-quality surface crystalline layer. Therefore, any method that uses a similar technical solution to this invention, namely the combination of "oxide passivation layer deposition + ultrafast annealing + thermal annealing," to restore the luminescent properties of semiconductor materials after ion implantation, falls within the protection scope of this invention.

[0106] The method provided by this invention can be directly applied to the manufacturing process of group IV alloy optoelectronic devices (such as light-emitting diodes, lasers, and photodetectors) based on ion implantation technology, including GeSn, SiGe, and SiGeSn alloys, effectively overcoming the bottleneck of low luminous efficiency caused by non-radiative recombination defects. This method is highly compatible with existing CMOS processes and is expected to promote the development of key technology areas such as silicon-based optical interconnects and on-chip light sources.

[0107] The embodiments of the present invention have been described above. However, these embodiments are merely illustrative and not intended to limit the scope of the invention. Although various embodiments have been described above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination. The scope of the invention is defined by the appended claims and their equivalents. Various substitutions and modifications can be made by those skilled in the art without departing from the scope of the invention, and all such substitutions and modifications should fall within the scope of the invention.

Claims

1. A method for restoring the luminescent properties of ion-implanted semiconductor materials, characterized in that, include: Ion implantation is performed on a semiconductor substrate to form an implantation layer; An oxide passivation layer is prepared on the surface of an ion-implanted semiconductor substrate; Ultrafast annealing of semiconductor substrates with deposited oxide passivation layers; Thermal annealing was performed on the semiconductor substrate after ultrafast annealing to restore the light-emitting properties of the ion-implanted semiconductor substrate.

2. The method according to claim 1, characterized in that, The process of ion implantation into a semiconductor substrate to form an implanted layer includes: The implanted layer is formed by implanting inert gas ions, group V doped ions, group III doped ions, or semiconductor self-implanted ions into the semiconductor substrate using beam ion implantation or plasma immersion ion implantation.

3. The method according to claim 1, characterized in that, The preparation of an oxide passivation layer on the surface of an ion-implanted semiconductor substrate includes: An oxide passivation layer is prepared on the surface of a semiconductor substrate using an oxygen-containing dielectric material by means of plasma-enhanced chemical vapor deposition, atomic layer deposition, low-pressure chemical vapor deposition, or sputtering.

4. The method according to claim 3, characterized in that, The preparation of an oxide passivation layer on the surface of an ion-implanted semiconductor substrate further includes: An oxide passivation layer with a thickness of 10 nm to 50 nm is prepared on the surface of the semiconductor substrate using at least one of a silicon dioxide layer, an aluminum oxide layer, a hafnium oxide layer, a titanium oxide layer, or a zirconium oxide layer.

5. The method according to claim 1, characterized in that, The ultrafast annealing of the semiconductor substrate with deposited oxide passivation layer includes: Ultrafast annealing is performed on a semiconductor substrate with an oxide passivation layer by at least one of pulsed laser annealing, flash lamp annealing, and spike annealing, so that the implanted layer recrystallizes and the amorphous implanted layer is initially restored to a single crystal phase with low defect density.

6. The method according to claim 5, characterized in that, The ultrafast annealing of the semiconductor substrate with deposited oxide passivation layer includes: Utilizing an energy density of 600 mJ / cm 2 ~900 mJ / cm 2 Pulsed lasers with pulse widths on the order of nanoseconds are used to perform pulsed laser annealing on semiconductor substrates with deposited oxide passivation layers.

7. The method according to claim 1, characterized in that, The thermal annealing of the semiconductor substrate after ultrafast annealing includes: Rapid thermal annealing is used to perform thermal annealing on the semiconductor substrate after ultrafast annealing. This allows oxygen atoms in the oxide passivation layer to combine with dangling bonds on the semiconductor substrate surface to form stable chemical bonds, and also allows lattice atoms in the implanted layer to relax back to their equilibrium positions. This eliminates point defects remaining in the bulk during implantation and ultrafast annealing. The annealing temperature is 300°C to 600°C, the heating rate is greater than 20°C / s, and the annealing time is 10s to 10min.

8. The method according to claim 1, characterized in that, The thermal annealing of the semiconductor substrate after ultrafast annealing includes: The semiconductor substrate after ultrafast annealing is thermally annealed using furnace tube annealing. This process allows oxygen atoms in the oxide passivation layer to bond with dangling bonds on the semiconductor substrate surface, forming stable chemical bonds. It also allows lattice atoms in the implanted layer to relax back to their equilibrium positions, thereby eliminating point defects remaining in the bulk during implantation and ultrafast annealing. The annealing temperature is 250°C to 500°C, the heating rate is less than 10°C / s, and the annealing time is 10 min to 2 h.

9. The method according to claim 1, characterized in that, After thermally annealing the semiconductor substrate following ultrafast annealing, the method further includes: Remove the oxide passivation layer.

10. The method according to claim 1, characterized in that, The semiconductor substrate is made of group IV semiconductor materials.

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