Chip on film package structure

CN122602886APending Publication Date: 2026-08-18CHIPMOS TECH INC
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Patent Information

Application Number
CN202510484883.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2025-02-11
Filing Date
2025-04-17
Publication Date
2026-08-18

AI Technical Summary

Technical Problem

由于芯片设置区内的空间有限,可延伸至芯片设置区内的内引脚数量受到限制,使得芯片无法扩充信号输出入端点的数量,而使薄膜覆晶封装结构的效能无法再提升

Benefits of technology

[0011] In the thin-film flip-chip packaging structure according to an embodiment of the present invention, the types of heat dissipation components include heat dissipation adhesive, heat dissipation film and heat sink.

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Abstract

This invention provides a thin-film flip-chip packaging structure, including a flexible substrate, a patterned circuit layer, a chip, a plurality of conductive lines, and an encapsulating adhesive layer. The flexible substrate has a chip mounting area. The patterned circuit layer is disposed on the flexible substrate and includes a plurality of first lines and a plurality of second lines. Each of the first lines has a first inner pin extending into the chip mounting area, and each of the second lines is located outside the chip mounting area and has a contact. The chip is electrically connected to the patterned circuit layer. The chip includes an upper surface, a lower surface, a plurality of bumps, and a plurality of pads. The bumps are disposed on the lower surface, and the pads are disposed on the upper surface. The bumps are respectively connected to the first inner pins. The conductive lines are respectively connected to the pads and the contacts. The encapsulating adhesive layer is disposed on the flexible substrate and covers the chip and the conductive lines. The thin-film flip-chip packaging structure of this invention has superior performance.
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Description

Technical Field

[0001] This invention relates to a packaging structure, and more particularly to a thin-film flip-chip packaging structure. Background Technology

[0002] Chip-on-Film (COF) packaging uses flip-chip bonding to mount a chip within a chip mounting area of ​​a flexible substrate and electrically connect it to circuitry on the flexible substrate. Multiple signal sources from the chip extend to multiple internal pins within the chip mounting area via multiple bumps on the chip to receive and transmit signals. Due to the limited space within the chip mounting area, the number of internal pins that can extend into the chip mounting area is limited, preventing the chip from expanding the number of signal input / output endpoints and thus limiting the performance improvement of the COF packaging structure. Summary of the Invention

[0003] This invention provides a thin-film flip-chip packaging structure with superior performance.

[0004] According to an embodiment of the present invention, a thin-film flip-chip packaging structure includes a flexible substrate, a patterned circuit layer, a chip, a plurality of conductive lines, and an encapsulating adhesive layer. The flexible substrate has opposing first and second surfaces and a chip mounting area located on the first surface. The patterned circuit layer is disposed on the first surface of the flexible substrate. The patterned circuit layer includes a plurality of first lines and a plurality of second lines, each of the first lines having a first inner pin extending into the chip mounting area, and each of the second lines being located outside the chip mounting area and having a contact. The chip is disposed within the chip mounting area and electrically connected to the patterned circuit layer. The chip includes an upper surface, a lower surface, a plurality of bumps, and a plurality of pads, the bumps being disposed on the lower surface and the pads being disposed on the upper surface, the bumps respectively connecting to the first inner pins of the first lines. The conductive lines respectively connect the pads and the contacts of the second lines. The encapsulating adhesive layer is disposed on the first surface of the flexible substrate and covers the chip and the conductive lines.

[0005] In the thin-film flip-chip packaging structure according to an embodiment of the present invention, a solder resist layer is further included, which is disposed on the first surface of the flexible substrate and partially covers the patterned circuit layer. The solder resist layer includes a first opening and a plurality of second openings. The first opening exposes the chip placement area, and the plurality of second openings expose a plurality of contacts of a plurality of second circuits respectively.

[0006] In a thin-film flip-chip package structure according to an embodiment of the present invention, a plurality of first lines extend in a direction away from the chip setting area and each has a first external pin relative to a first internal pin, a plurality of second lines extend in a direction away from the chip setting area and each has a second external pin relative to a contact, and a solder mask exposes a plurality of first external pins and a plurality of second external pins.

[0007] In the thin-film flip-chip encapsulation structure according to an embodiment of the present invention, the encapsulating adhesive layer covers a plurality of second openings.

[0008] In the thin-film flip-chip packaging structure according to an embodiment of the present invention, an underfill adhesive is further included, which fills at least between the lower surface of the chip and the first surface of the flexible substrate and covers the chip placement area.

[0009] In the thin-film flip-chip packaging structure according to an embodiment of the present invention, the flexible substrate includes a predetermined bending region, and the encapsulating adhesive layer is located outside the predetermined bending region.

[0010] In the thin-film flip-chip packaging structure according to an embodiment of the present invention, a heat dissipation component is further included, which is disposed on the first surface of the flexible substrate and at least partially covers the encapsulation adhesive layer.

[0011] In the thin-film flip-chip packaging structure according to an embodiment of the present invention, the types of heat dissipation components include heat dissipation adhesive, heat dissipation film and heat sink.

[0012] In the thin-film flip-chip packaging structure according to an embodiment of the present invention, a heat dissipation component is further included, which is disposed on the second surface of the flexible substrate and at least corresponds to the chip placement area.

[0013] In the thin-film flip-chip packaging structure according to an embodiment of the present invention, the types of heat dissipation components include heat dissipation adhesive, heat dissipation film and heat sink.

[0014] Based on the above, the chip in the thin-film flip-chip packaging structure of the present invention is connected to the first internal pin of the first line located within the chip mounting area via bumps disposed on the lower surface of the chip, and connected to the second line located outside the chip mounting area via wires via pads disposed on the upper surface of the chip. Thus, the number of endpoints for receiving and outputting signals can be increased without increasing the chip size, and signal transmission is performed through the first line within the chip mounting area and the second line outside the chip mounting area. Since the second line does not extend into the chip mounting area, it is not limited by the limited wiring space of the chip mounting area, allowing full utilization of the space on the flexible substrate, thereby improving the space utilization, wiring flexibility, and efficiency of the thin-film flip-chip packaging structure. Attached Figure Description

[0015] Figure 1A This is a top view of a thin-film flip-chip packaging structure according to an embodiment of the present invention;

[0016] Figure 1B yes Figure 1A A partially enlarged view of the thin-film flip-chip packaging structure;

[0017] Figure 1C This is a partially enlarged view of a thin-film flip-chip packaging structure according to an embodiment of the present invention;

[0018] Figure 2 yes Figure 1A A cross-sectional view of the thin-film flip-chip packaging structure along the A-A' line;

[0019] Figure 3 This is a cross-sectional view of a thin-film flip-chip packaging structure according to an embodiment of the present invention;

[0020] Figure 4 This is a cross-sectional view of a thin-film flip-chip packaging structure according to an embodiment of the present invention;

[0021] Figure 5 This is a cross-sectional view of a thin-film flip-chip packaging structure according to an embodiment of the present invention;

[0022] Figure 6 This is a cross-sectional view of a thin-film flip-chip packaging structure according to an embodiment of the present invention. Detailed Implementation

[0023] Reference will now be made in detail to exemplary embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same element references are used in the drawings and description to denote the same or similar parts.

[0024] Figure 1A This is a top view of a thin-film flip-chip packaging structure according to an embodiment of the present invention. Figure 1B yes Figure 1A A partial enlarged view of the thin-film flip-chip packaging structure. Figure 1C This is a partially enlarged view of a thin-film flip-chip packaging structure according to an embodiment of the present invention. Figure 2 yes Figure 1A The cross-sectional view of the thin-film flip-chip packaging structure along section A-A' is shown. It should be noted that... Figure 1A The thin-film flip-chip packaging structure 100 is shown in the form of a roll-to-roll conveyor operation, and only one thin-film flip-chip packaging structure 100 is schematically shown. Figure 1A The portion of the component covered by the encapsulating adhesive layer 160 is shown with solid lines for ease of component description. Please also refer to... Figures 1A to 2 The thin-film flip-chip package structure 100 includes a flexible substrate 110, a patterned circuit layer 120, a chip 140, a plurality of conductive lines 150, and an encapsulating adhesive layer 160. The flexible substrate 110 has opposing first surfaces 113 and second surfaces 114, and a chip placement area 112 located on the first surface 113. The patterned circuit layer 120 is disposed on the first surface 113 of the flexible substrate 110. The chip 140 is disposed within the chip placement area 112 and electrically connected to the patterned circuit layer 120.

[0025] The patterned circuit layer 120 includes a plurality of first lines 121 and a plurality of second lines 122. Each of the first lines 121 has a first internal pin 121a extending into the chip mounting area 112, and each of the second lines 122 is located outside the chip mounting area 112 and has a contact 122a. The chip 140 includes an upper surface 141, a lower surface 142, a plurality of bumps 143, and a plurality of pads 144. The bumps 143 are disposed on the lower surface 142, and the pads 144 are disposed on the upper surface 141. The bumps 143 are respectively connected to the first internal pins 121a of the first lines 121. Conductors 150 are respectively connected to the pads 144 and the contacts 122a of the second lines 122. Specifically, the chip 140 may, for example, connect the first lines 121 by thermocompression bonding, such that the bumps 143 and the first internal pins 121a are eutectic bonded. These wires 150 can be electrically connected, for example, by wire bonding, to the contacts 122a of the second lines 122. Multiple signal sources of the chip 140 receive and transmit signals externally through the bumps 143 and the contacts 144.

[0026] An encapsulating adhesive layer 160 is disposed on the first surface 113 of the flexible substrate 110 and covers the chip 140 and the conductive lines 150 to protect the conductive lines 150 and the electrical connection endpoints of the conductive lines 150 with the pads 144 and the contacts 122a, ensuring stable transmission of electrical signals between the pads 144 and the second line 122. The flexible substrate 110 includes a predetermined bending region 111, and the encapsulating adhesive layer 160 is located outside the predetermined bending region 111 to avoid affecting the bending freedom of the thin-film flip-chip package structure 100 in subsequent applications. In this embodiment, there are two predetermined bending regions 111, and the encapsulating adhesive layer 160 is located between the two predetermined bending regions 111.

[0027] like Figure 1AAs shown, the first lines 121 extend away from the chip mounting area 112 and each has a first external pin 121b relative to the first internal pin 121a. The second lines 122 extend away from the chip mounting area 112 and each has a second external pin 122b relative to the contact 122a. The thin-film flip-chip package structure 100 also includes a solder resist layer 130. The solder resist layer 130 is disposed on the first surface 113 of the flexible substrate 110 and partially covers the patterned circuit layer 120. The solder resist layer 130 includes a first opening 131 and a plurality of second openings 132. The first opening 131 exposes the chip mounting area 112, and the second openings 132 expose the contacts 122a of the second lines 122, allowing one end 151 of the conductors 150 to be connected to the contacts 122a. The solder resist layer 130 further exposes the first external pins 121b and the second external pins 122b for subsequent electrical bonding of other external components. The encapsulating adhesive layer 160 covers these second openings 132. That is, the electrical connection points 122a exposed by these second openings 132 to one end 151 of these wires 150 are covered by the encapsulating adhesive layer 160 to prevent damage or contamination.

[0028] like Figure 1B As shown, in this embodiment, the contact 122a of the second line 122 is located in the second line 122 rather than at its end. That is, portions of the second line 122 on both opposite sides of the contact 122a are covered by the solder mask layer 130. The width of the contact 122a is greater than the width of other portions of the second line 122 besides the contact 122a. The shape of the contact 122a corresponds to the shape of the second opening 132 and is rectangular, but is not limited to this. In an embodiment not shown, the width of the contact 122a may be equal to the width of other portions of the second line 122. In an embodiment not shown, the shape of the contact 122a may be any polygon or circle. Figure 1C As shown, in other embodiments, the contact 122a' of the second line 122 may also be located at the end of the second line 122, that is, the second line 122 is covered by the solder resist layer 130 only on one side of the contact 122a'. The width of the contact 122a' is greater than the width of the second line 122 in other parts besides the contact 122a', but is not limited thereto.

[0029] like Figure 2 As shown, the thin-film flip-chip package structure 100 also includes an underfill adhesive 170. The underfill adhesive 170 fills at least between the lower surface 142 of the chip 140 and the first surface 113 of the flexible substrate 110, and covers the chip mounting area 112 to protect the electrical contacts of the bumps 143 and the first internal pins 121a of the chip 140. An encapsulating adhesive layer 160 covers the underfill adhesive 170.

[0030] In this embodiment, the chip 140 of the thin-film flip-chip package structure 100 can not only be electrically connected to the first internal pin 121a located in the chip mounting area 112 via the bump 143 disposed on the lower surface 142, but can also be further electrically connected to the pad 144 disposed on the upper surface 141 via the wire 150 to the second line 122 located outside the chip mounting area 112. This allows the chip 140 to increase the number of endpoints for receiving and outputting signals without increasing its size, thereby improving the performance of the thin-film flip-chip package structure 100. In addition, since these second lines 122 are located outside the chip mounting area 112, they are not limited by the limited wiring space within the chip mounting area 112, allowing the space on the flexible substrate 110 to be fully utilized, thereby improving the space utilization and wiring flexibility of the thin-film flip-chip package structure 100.

[0031] Figure 3 This is a cross-sectional view of a thin-film flip-chip packaging structure according to an embodiment of the present invention. Please also refer to... Figure 2 and Figure 3 The thin-film flip-chip package structure 100a in this embodiment is similar to the previous embodiment, except that the thin-film flip-chip package structure 100a in this embodiment further includes a heat dissipation component 180a to assist the thin-film flip-chip package structure 100a in dissipating the heat generated during operation. The heat dissipation component 180a is disposed on the first surface 113 of the flexible substrate 110 and at least partially covers the encapsulating adhesive layer 160. In this embodiment, the heat dissipation component 180a completely covers the encapsulating adhesive layer 160 and partially covers the solder resist layer 130, but is not limited thereto. The types of heat dissipation component 180a may include, but are not limited to, thermal paste, thermal film, and heat sink. Due to the increased number of signal receiving and output terminals of the chip 140, the chip 140 generates more heat during operation. Therefore, the heat dissipation component 180a in this embodiment can improve the heat dissipation effect of the thin-film flip-chip package structure 100a to avoid structural damage or electrical abnormalities caused by excessive temperature.

[0032] Figure 4 This is a cross-sectional view of a thin-film flip-chip packaging structure according to an embodiment of the present invention. Please also refer to... Figure 3 and Figure 4 The thin-film flip-chip package structure 100b of this embodiment is similar to that of the previous embodiment, except that the heat dissipation component 180b of this embodiment partially covers the encapsulating adhesive layer 160. Specifically, the heat dissipation component 180b only covers the top surface 161 of the encapsulating adhesive layer 160, but is not limited thereto. The top surface 161 corresponds to the upper surface 141 of the chip 140. The thin-film flip-chip package structure 100b of this embodiment has similar effects to the previous embodiment, and will not be described again here.

[0033] Figure 5 This is a cross-sectional view of a thin-film flip-chip packaging structure according to an embodiment of the present invention. Please also refer to... Figure 3 and Figure 5 The thin-film flip-chip packaging structure 100c of this embodiment is similar to that of the previous embodiment. The difference is that the heat dissipation component 180c of this embodiment is disposed on the second surface 114 of the flexible substrate 110 and at least corresponds to the chip placement area 112. The thin-film flip-chip packaging structure 100c of this embodiment has similar effects to those of the previous embodiment, and will not be described again here.

[0034] Figure 6 This is a cross-sectional view of a thin-film flip-chip packaging structure according to an embodiment of the present invention. Please also refer to... Figure 3 and Figure 6 The thin-film flip-chip packaging structure 100d in this embodiment is similar to that in the previous embodiment, except that there are two heat dissipation components in this embodiment. One heat dissipation component 180d is disposed on the first surface 113 of the flexible substrate 110 and covered with the encapsulating adhesive layer 160, and the other heat dissipation component 180e is disposed on the second surface 114 of the flexible substrate 110. The thin-film flip-chip packaging structure 100d in this embodiment has similar effects to those in the previous embodiment, and will not be described again here.

[0035] In summary, the chip of the thin-film flip-chip package structure of the present invention is connected to the first internal pin of the first line located within the chip mounting area via bumps disposed on the lower surface of the chip, and connected to the second line located outside the chip mounting area via wires via pads disposed on the upper surface of the chip. Thus, the number of endpoints for receiving and outputting signals can be increased without increasing the chip size, and signal transmission is performed through the first line within the chip mounting area and the second line outside the chip mounting area. Since the second line does not extend into the chip mounting area, it is not limited by the limited wiring space of the chip mounting area, allowing full utilization of the space on the flexible substrate, thereby improving the space utilization, wiring flexibility, and efficiency of the thin-film flip-chip package structure.

[0036] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A thin-film flip-chip packaging structure, characterized in that, include: A flexible substrate having opposing first and second surfaces and a chip mounting area located on the first surface; A patterned circuit layer is disposed on the first surface of the flexible substrate. The patterned circuit layer includes a plurality of first lines and a plurality of second lines. Each of the plurality of first lines has a first inner pin extending into the chip mounting area. The plurality of second lines are located outside the chip mounting area and each has a contact. A chip is disposed within the chip setting area and electrically connected to the patterned circuit layer. The chip includes an upper surface, a lower surface, multiple bumps, and multiple pads. The multiple bumps are disposed on the lower surface, and the multiple pads are disposed on the upper surface. The multiple bumps are respectively connected to the multiple first internal pins of the multiple first circuits. Multiple wires are respectively connected to the multiple pads and the multiple contacts of the multiple second lines; as well as An encapsulating adhesive layer is disposed on the first surface of the flexible substrate and covers the chip and the plurality of wires.

2. The thin-film flip-chip packaging structure according to claim 1, characterized in that, It also includes a solder resist layer disposed on the first surface of the flexible substrate and partially covering the patterned circuit layer. The solder resist layer includes a first opening and a plurality of second openings. The first opening exposes the chip mounting area, and the plurality of second openings expose the plurality of contacts of the plurality of second circuits, respectively.

3. The thin-film flip-chip packaging structure according to claim 2, characterized in that, The plurality of first lines extend away from the chip mounting area and each has a first external pin relative to the first internal pin; the plurality of second lines extend away from the chip mounting area and each has a second external pin relative to the contact; the solder mask exposes the plurality of first external pins and the plurality of second external pins.

4. The thin-film flip-chip packaging structure according to claim 2, characterized in that, The encapsulating adhesive layer covers the plurality of second openings.

5. The thin-film flip-chip packaging structure according to claim 1, characterized in that, It also includes an underfill adhesive, which fills at least between the lower surface of the chip and the first surface of the flexible substrate and covers the chip mounting area.

6. The thin-film flip-chip packaging structure according to claim 1, characterized in that, The flexible substrate includes a predetermined bending region, and the encapsulating adhesive layer is located outside the predetermined bending region.

7. The thin-film flip-chip packaging structure according to claim 1, characterized in that, It also includes a heat dissipation component disposed on the first surface of the flexible substrate and at least partially covering the encapsulating adhesive layer.

8. The thin-film flip-chip packaging structure according to claim 7, characterized in that, The types of heat dissipation components include heat dissipation adhesives, heat dissipation films, and heat sinks.

9. The thin-film flip-chip packaging structure according to claim 1, characterized in that, It also includes a heat dissipation component disposed on the second surface of the flexible substrate and at least corresponding to the chip mounting area.

10. The thin-film flip-chip packaging structure according to claim 9, characterized in that, The types of heat dissipation components include heat dissipation adhesives, heat dissipation films, and heat sinks.