A coaxial cone barrel nested three-dimensional chip structure and a manufacturing method thereof

Abstract

This invention discloses a coaxial conical-barrel nested three-dimensional chip structure and its manufacturing method, belonging to the field of three-dimensional chip technology. It includes multi-level coaxially nested truncated cone shells, each with the same taper and a proportionally reduced radial diameter. The shell surface is provided with a conductive and thermally conductive functional layer. Insulating support bumps, divided into three equal parts along the circumference, are provided on the upper and lower end faces of adjacent shells, forming a three-point statically determinate support system. An air gap is maintained between adjacent shells except for the support bumps, forming an axially continuous annular heat dissipation channel. The chip also includes a base and a cover plate. The base supports the outermost shell. By completely eliminating thermal stress, the structural reliability is significantly improved. Based on the mechanical design of the three-point statically determinate constraint, each conical shell can freely expand and contract slightly radially and axially during thermal deformation, without large-area rigid binding constraints. Thermal stress is significantly eliminated from its generation mechanism, completely solving the failure problems of warpage, delamination, and thermal fatigue fracture in traditional stacked chips.

Description

Technical Field

[0001] This invention relates to the field of three-dimensional chips, specifically to a coaxial cone-barrel nested three-dimensional chip structure and its manufacturing method. Background Technology

[0002] As Moore's Law approaches its physical limits, the traditional silicon-based planar chip development path, relying on photolithography for miniaturization, is gradually reaching its bottleneck. Traditional three-dimensional stacked chips mostly adopt a planar stacking architecture with TSV vertical interconnects, still relying on planar photolithography processes to complete circuit fabrication. The overall manufacturing is highly dependent on high-end photolithography equipment, resulting in high equipment barriers, expensive manufacturing costs, and severe process constraints.

[0003] Current mainstream 3D chip stacking solutions generally have significant shortcomings. Multi-layer chips are rigidly bonded via microbumps, and the differences in material thermal expansion coefficients easily generate accumulated thermal stress, leading to failures such as chip warpage, interlayer delamination, and structural cracking. Planar stacked structures often have solid dielectric filling between layers, resulting in poor airflow and difficulty in rapid heat dissipation; the higher the number of stacked layers, the more severe the heat accumulation. Planar dielectrics have relatively high dielectric constants, large interlayer parasitic capacitances, and significant signal crosstalk, limiting the application scenarios of high-frequency and high-speed circuits. The entire process relies on photolithography machines to etch circuits line by line, making process upgrades completely tied to high-end photolithography equipment, thus restricting the industry's independent development. Traditional block-type stacking topologies are fixed, creating a natural contradiction between computing power expansion and heat dissipation optimization, making simultaneous positive upgrades impossible. Summary of the Invention

[0004] The purpose of this invention is to provide a coaxial cone-barrel nested three-dimensional chip structure and its manufacturing method to solve the problems mentioned in the background art.

[0005] To achieve the above objectives, the present invention provides the following technical solution: a multi-level coaxially nested truncated cone shell, each level of the shell having the same taper and a proportionally reduced radial diameter; a conductive and thermally conductive functional layer is provided on the surface of the shell; insulating support protrusions are provided on the upper and lower end faces of adjacent shells, dividing the circumference into three equal parts, forming a three-point statically determinate support system; an air gap is maintained between adjacent shells except for the support protrusions, forming an axially continuous annular heat dissipation channel; the chip also includes a base and a cover plate; the base supports the outermost shell, and the cover plate fastens to the innermost shell;

[0006] As a further preferred embodiment of this technical solution: the shell is a single-crystal silicon thin-walled conical cylinder, including conical cylinder one and conical cylinder two; the conductive and thermally conductive functional layer is one or more composite layers of graphene, carbon nanotubes, and MXene;

[0007] As a further preferred embodiment of this technical solution: the conductive and thermally conductive functional layer is disconnected in the support bump area, so that the various levels of the shell are electrically isolated from each other; the shells are longitudinally interconnected through the through-contact structure at the support bump; the support bump includes a lower support bump, a middle support bump and an upper support bump;

[0008] As a further preferred embodiment of this technical solution: the through-contact structure is a metal through hole that penetrates the support protrusion, or a conductive point contact structure at the support protrusion;

[0009] As a further preferred embodiment of this technical solution: each level of the shell relies on a unified conical surface to achieve automatic centering and axial self-locking; the support protrusions and the taper are matched in a coordinated manner to form a six-point statically determinate mechanical structure without redundant constraints;

[0010] As a further preferred embodiment of this technical solution: ventilation holes communicating with the annular heat dissipation channel are provided on the base and cover plate;

[0011] As a further preferred embodiment of this technical solution: the number of stacked shell layers can be freely increased or decreased according to computing power and heat dissipation requirements, thereby achieving modular expansion;

[0012] As a further preferred embodiment of this technical solution: the conductive and thermally conductive functional layer is integrally formed on the inner and outer curved surfaces of the shell through a deposition process;

[0013] As a further preferred embodiment of this technical solution: the interlayer air gap is a fully continuous air channel, forming a natural convection or forced convection heat dissipation structure;

[0014] As a further preferred embodiment of this technical solution, it includes:

[0015] Step 1: Prepare a multi-stage, proportionally tapered, and uniformly tapered frustum shell, including cone barrel 1 and cone barrel 2;

[0016] Step 2: Integrate a conductive and thermally conductive functional layer on the inner and outer curved surfaces of the shell; prepare insulating support protrusions and through-contact structures at three equal division positions on the upper and lower end faces of the shell, wherein the insulating support protrusions include a lower support protrusion, a middle support protrusion and an upper support protrusion;

[0017] Step 3: The multi-level shells are coaxially nested, and self-centering and self-locking assembly is achieved by relying on the conical surface;

[0018] Step four: Apply axial preload to the base and cover plate to form a six-point statically determinate constraint, and obtain the finished three-dimensional chip.

[0019] Compared with the prior art, the beneficial effects of the present invention are:

[0020] 1. This invention significantly improves structural reliability by completely eliminating thermal stress. Based on the mechanical design of statically determinate constraints at three points, each conical shell can freely expand and contract slightly in the radial and axial directions when subjected to thermal deformation. Without large-area rigid binding constraints, thermal stress is greatly eliminated from the generation mechanism, completely solving the failure problems of warpage, delamination, and thermal fatigue fracture in traditional stacked chips, and significantly improving long-term service stability.

[0021] 2. This invention breaks through the stacking limit by positively synergistically combining computing power and heat dissipation. The annular air gaps between layers form a continuous vertical heat dissipation channel, achieving natural convection cooling through the chimney effect, while forced convection cooling can be adapted for high-power scenarios. As the number of stacked layers increases, the overall heat exchange surface area increases linearly, breaking the inherent contradiction that higher stacking layers lead to poorer heat dissipation, thus achieving simultaneous upgrades in computing power and heat dissipation capabilities.

[0022] 3. This invention boasts excellent electrical performance, low high-frequency loss, and minimal crosstalk. Air serves as a natural insulating medium between layers, with an air dielectric constant approaching 1, significantly lower than traditional solid-state packaging media, thus substantially reducing interlayer parasitic capacitance. Combined with curved overall conductive wiring and partitioned isolation design, it effectively suppresses high-frequency signal crosstalk and transmission loss, making it suitable for high-speed, high-frequency chip applications.

[0023] 4. This invention completely eliminates reliance on high-end lithography machines, leading to a comprehensive upgrade of the manufacturing process. This invention breaks free from the traditional framework of etching and wiring line by line in lithography, no longer relying on lithography machines to carve circuit lines one by one. Instead, it utilizes mature MEMS etching, curved thin film deposition, and overall film forming processes for fabrication. The entire process requires no high-end lithography equipment, ensuring independent and controllable technology and completely breaking down equipment barriers.

[0024] 5. This invention features a self-locking mechanical configuration, resulting in simple assembly and flexible expansion. The unified tapered coaxial nested structure possesses inherent self-centering and self-locking characteristics, ensuring high assembly alignment accuracy. The modular shell design allows for flexible addition or removal of stacking layers according to computing power requirements, enabling rapid, modular expansion and adapting to the development of multi-power, multi-level chip products.

[0025] 6. This invention achieves high material utilization and high integration density. It utilizes a thin-walled conical curved surface as the circuit carrier, allowing for the placement of functional circuits on both the inner and outer hyperboloids. This significantly increases conductivity and integration area per unit space, resulting in space utilization and integration density far superior to traditional planar plate stacking structures. Attached Figure Description

[0026] Figure 1 This is a front view of a coaxial cone-barrel nested three-dimensional chip structure and its manufacturing method according to the present invention.

[0027] Figure 2 This is a side view of a coaxial cone-barrel nested three-dimensional chip structure and its manufacturing method according to the present invention.

[0028] Figure 3 This is a top view of a coaxial cone-barrel nested three-dimensional chip structure and its manufacturing method according to the present invention.

[0029] In the diagram: 1. Base; 2. Lower support protrusion; 3. Conical barrel one; 4. Middle support protrusion; 5. Conical barrel two; 6. Upper support protrusion; 7. Cover plate. Detailed Implementation

[0030] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0031] Please see Figures 1-3 This is a schematic diagram of some embodiments of a coaxial cone-barrel nested three-dimensional chip structure and its manufacturing method, as described in this application.

[0032] Example 1

[0033] The coaxial conical-barrel nested three-dimensional chip structure in this embodiment achieves low stress, high efficiency heat dissipation, high frequency and low crosstalk, and high integration of three-dimensional chip integration through the synergistic cooperation of multi-level coaxial nesting configuration, three-point statically determinate support system, curved conductive and thermally conductive functional layer, and interlayer annular air gap heat dissipation channel.

[0034] First, a multi-level frustum-shaped conical shell is fabricated. A single-crystal silicon wafer is selected as the substrate material. The annular contour is defined by photolithography, and a deep reactive ion etching (DRIE) or anisotropic wet etching process is used to integrally form the multi-level single-crystal silicon thin-walled frustum-shaped conical shell. Each level of the shell has a consistent taper, and the radial dimensions decrease progressively according to a preset ratio. All shells share the same central axis, meeting the structural requirements of coaxial nesting, automatic centering, and axial self-locking.

[0035] Conductive and thermally conductive functional layers are integrally and continuously deposited on the inner and outer curved surfaces of each stage of the shell using at least one of the following processes: electrophoretic deposition, chemical vapor deposition, or physical vapor deposition. These functional layers utilize one or more composite two-dimensional materials selected from graphene, carbon nanotubes, and MXene, forming a functional interface with both high electrical and thermal conductivity on the inner and outer hyperboloids of the shell, thus achieving integrated circuit wiring and efficient thermal conductivity.

[0036] Insulating support bumps are prepared at 120° intervals along the circumference on the upper and lower surfaces of each stage of the truncated cone shell. The insulating material is silicon nitride or silicon dioxide. Adjacent stages of the shell rely on the three insulating support bumps at the upper end and the three at the lower end to form a six-point statically determinate support system, which allows the shell to expand and contract freely when heated, eliminating the accumulation of thermal stress from a structural mechanism and avoiding warping, delamination, and cracking failure.

[0037] To achieve interlayer electrical isolation and vertical interconnection, the conductive and thermally conductive functional layers are disconnected at the contact area of ​​the insulating support bumps, ensuring electrical independence between each housing level. A vertical through-hole is etched at the center of the insulating support bump, and the through-hole is filled with metal material to form a metal-filled through-hole, serving as a through-contact structure to achieve vertical electrical signal interconnection at designated points between adjacent housings.

[0038] The conical shells of each level are coaxially nested from the outside in along the central axis, achieving automatic guidance, coaxial centering, and axial self-locking through a unified conical surface. The outermost conical barrel 3 is fixedly installed on the base 1, and the cover plate 7 is fastened to the top of the innermost conical barrel 5. An axial preload is applied through the base 1 and the cover plate 7, forming a closed mechanical balance system for the entire nested structure. Ventilation holes are provided on the base 1 and the cover plate 7 to allow for vertical heat dissipation channels between the layers.

[0039] Except for the point contact areas of the lower support protrusion 2, middle support protrusion 4, and upper support protrusion 6, a continuous air gap is maintained between adjacent shells, forming a ring-shaped heat dissipation channel that runs the entire length of the axial direction. This channel can achieve natural convection heat dissipation by relying on the chimney effect, and in high-power scenarios, it can be further combined with external air cooling to achieve forced convection heat dissipation. As the number of stacked layers increases, the heat exchange surface area increases synchronously, realizing simultaneous improvement in computing power expansion and heat dissipation capacity. In this embodiment, the number of shell stacked layers can be flexibly increased or decreased according to computing power and heat dissipation requirements, realizing modular expansion and rapid assembly like building blocks.

[0040] Example 2

[0041] This embodiment is basically the same as Embodiment 1 in terms of overall structure, integration method, and heat dissipation principle. The difference lies in the implementation form of the through-contact structure. In this embodiment, the metal through-hole penetrating the insulating support bump is eliminated. The conductive and thermally conductive functional layers of the two adjacent cone-shaped bumps 3 and 5 are directly formed into point contact interconnects at the lower support bump 2, middle support bump 4, and upper support bump 6 positions through conductive adhesive dotting or local metal sputtering deposition. This structure simplifies the vertical interconnect process, reduces process complexity, and is suitable for chip integration scenarios with low to medium interconnect density, low cost, and miniaturization.

[0042] The remaining structural features, including a multi-stage coaxial frustum shell, a three-point statically determinate support, a curved conductive and thermally conductive functional layer, an interlayer annular air gap heat dissipation channel, assembly of base 1 and cover plate 7, and modular expansion of the number of layers, are consistent with those in Embodiment 1 and will not be repeated here.

[0043] Example 3

[0044] This embodiment provides a complete manufacturing method for coaxial cone-barrel nested 3D chips. Through standardized process flows, it achieves high-precision, high-consistency, and high-reliability 3D chip fabrication. The specific steps are as follows:

[0045] Step 1: MEMS bulk silicon fabrication of multi-level silicon cone shells. Using a single-crystal silicon wafer, the annular contour patterns of each level of the cone are defined by photolithography. Deep reactive ion etching or anisotropic wet etching processes are employed to integrally fabricate a multi-level single-crystal silicon frustum-shaped shell unit with uniform wall thickness, consistent taper, and proportionally reduced diameter. This ensures that all shells have a uniform taper and meet the coaxial nesting self-centering condition.

[0046] Step 2: Fabrication of the conductive functional layer on the curved surface. The prepared single-crystal silicon conical shell is used as the deposition substrate and immersed in a graphene oxide dispersion. Electrophoretic deposition is used to uniformly attach graphene oxide sheets to the three-dimensional inner and outer curved surfaces of the cone. After deposition, a high-temperature thermal annealing reduction treatment is performed to reduce the graphene oxide to graphene, forming a continuous, dense, highly conductive and thermally conductive functional layer on the curved surface of the silicon substrate.

[0047] Step 3: Fabrication of three-point insulating support bumps. On the upper and lower end faces of each stage of the shell, using photolithography deposition, insulating micro-bumps made of silicon nitride or silicon dioxide are fabricated at precisely 120° trisections along the circumference. The height and consistency of the bumps are strictly controlled, and the interlayer air gap spacing is precisely defined, while simultaneously meeting the dual requirements of electrical insulation and statically determinate support.

[0048] Step 4: Fabrication of the through-hole contact structure. A vertical through-hole is etched at the center of the insulating support bump, and the inside of the through-hole is filled with copper or tungsten metal to form a metal-filled through-hole as a through-hole contact structure; the conductive and thermally conductive functional layer is disconnected and isolated in the bump contact area to ensure that each level of the shell is electrically independent, and the longitudinal signal interconnection at the specified position is achieved only through the metal through-hole.

[0049] Step 5: Coaxial Nesting Assembly and Mechanical Sealing. The outermost cone-shaped barrel 3 is fixedly installed above the base 1. Utilizing the self-guiding characteristics of the cone surface, each level of the truncated cone shell is nested from the outside in, automatically achieving coaxial centering and pre-locking by relying on the slope of the cone surface. Finally, the top cover plate 7 is installed, and a small axial preload is applied through the base 1 and the cover plate 7 to ensure that each level of the shell is stably in a six-point statically determinate constraint state.

[0050] Step Six: Heat Dissipation Channel Forming and Overall System Debugging. After assembly, an annular vertical air gap heat dissipation channel with axial continuity is naturally formed between adjacent housings. The ventilation holes of the base 1 and the cover plate 7 are connected vertically to the air gap. When the chip is working, it relies on natural air convection to form a chimney effect for heat dissipation. In high-power scenarios, it can be used with external air cooling equipment to achieve forced convection heat dissipation.

[0051] Working principle

[0052] This coaxial conical-barrel nested 3D chip adopts a multi-level, coaxially nested topology of conical shells with the same taper. Each level of conical barrel 1 (3) and conical barrel 2 (5) achieves automatic centering and axial self-locking through their conical surfaces. The upper and lower end faces of adjacent shells are divided into three equal parts at 120° intervals, with lower support bump 2, middle support bump 4, and upper support bump 6 forming a six-point statically determinate support system. This allows the shells to freely expand and contract slightly when heated, avoiding thermal stress accumulation. The inner and outer curved surfaces of the shells are integrally deposited with conductive and thermally conductive functional layers to achieve circuit wiring and efficient heat conduction. Air gaps are maintained throughout the space between adjacent shells, except at the support points, forming an axially continuous annular heat dissipation channel. Combined with the ventilation holes in the base 1 and cover plate 7, natural convection heat dissipation is achieved using the chimney effect. In high-power scenarios, forced convection can be further used to enhance heat dissipation. The conductive and thermally conductive functional layers are disconnected at the support bumps, ensuring electrical isolation between each level of shell. Interlayer electrical signals are only vertically interconnected through the through-contact structure within the support bumps. The overall structure forms a closed mechanical balance system by applying axial preload to the base 1 and the cover plate 7. The number of nested layers can be flexibly increased or decreased according to computing power requirements, so as to achieve modular expansion and efficient and stable operation.

[0053] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus.

[0054] The present invention and its embodiments have been described above. This description is not restrictive, and the accompanying drawings are only one embodiment of the invention; the actual structure is not limited thereto. In conclusion, if those skilled in the art, inspired by this description, design similar structures and embodiments without departing from the spirit of the invention, such designs should fall within the scope of protection of this invention.

[0055] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A coaxial cone-barrel nested three-dimensional chip structure, characterized in that, The chip includes a multi-level coaxial nested truncated cone shell, with each level of shell having the same taper and a radial diameter that is proportionally reduced. The shell surface is provided with a conductive and heat-conducting functional layer. The upper and lower end faces of adjacent shells are provided with insulating support protrusions that are divided into three equal parts along the circumference at 120°, forming a three-point statically determinate support system. Except for the support protrusions, the adjacent shells maintain an air gap throughout, forming an axially connected annular heat dissipation channel. The chip also includes a base (1) and a cover plate (7). The base (1) supports the outermost shell, and the cover plate (7) fastens the innermost shell.

2. The coaxial cone-barrel nested three-dimensional chip structure according to claim 1, characterized in that: The shell is a single-crystal silicon thin-walled cone, including cone one (3) and cone two (5); the conductive and thermally conductive functional layer is one or more composite layers of graphene, carbon nanotubes, and MXene.

3. The coaxial cone-barrel nested three-dimensional chip structure according to claim 1, characterized in that: The conductive and thermally conductive functional layer is disconnected in the support bump area, so that the shells at each level are electrically isolated from each other; the shells are longitudinally interconnected through the through contact structure at the support bump; the support bump includes a lower support bump (2), a middle support bump (4) and an upper support bump (6).

4. The coaxial cone-barrel nested three-dimensional chip structure according to claim 3, characterized in that: The through-contact structure is either a metal through-hole that passes through the support protrusion, or a conductive point contact structure at the support protrusion.

5. The coaxial cone-barrel nested three-dimensional chip structure according to claim 1, characterized in that: Each level of the shell relies on a unified conical surface to achieve automatic centering and axial self-locking; the support protrusions and the taper are matched in a coordinated manner to form a six-point statically determinate mechanical structure without redundant constraints.

6. The coaxial cone-barrel nested three-dimensional chip structure according to claim 1, characterized in that: Ventilation holes connected to the annular heat dissipation channel are opened on the base (1) and the cover plate (7).

7. The coaxial cone-barrel nested three-dimensional chip structure according to claim 1, characterized in that: The number of stacked shell layers can be freely increased or decreased according to computing power and heat dissipation requirements, realizing modular expansion.

8. The coaxial cone-barrel nested three-dimensional chip structure according to claim 1, characterized in that: The conductive and thermally conductive functional layer is integrally formed on the inner and outer curved surfaces of the shell through a deposition process.

9. A coaxial cone-barrel nested three-dimensional chip structure according to claim 1, characterized in that: The interlayer air gap is a fully continuous air channel, forming a natural convection or forced convection heat dissipation structure.

10. A method for manufacturing a coaxial cone-barrel nested three-dimensional chip, characterized in that, include: Step 1: Prepare a multi-stage truncated cone shell with equal diameter reduction and consistent taper, including cone barrel 1 (3) and cone barrel 2 (5). Step 2: Integrate conductive and thermally conductive functional layers on the inner and outer curved surfaces of the shell; prepare insulating support protrusions and through-contact structures at 120° three-part positions on the upper and lower end faces of the shell, wherein the insulating support protrusions include a lower support protrusion (2), a middle support protrusion (4) and an upper support protrusion (6). Step 3: The multi-level shells are coaxially nested, and self-centering and self-locking assembly is achieved by relying on the conical surface; Step 4: Apply axial preload to the base (1) and cover plate (7) to form a six-point statically determinate constraint and obtain the finished three-dimensional chip.

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