Vertical nanostructure energy storage device with two-tier substrate and method of fabrication

Abstract

An energy storage device (11) comprising: a substrate (27) having a first level (31), a second level (33) higher than the first level (31), and a surface (35) connecting the first level (31) and the second level (33); a plurality of nanostructures (37) extending vertically from the first level (31) of the substrate (27); a first electrode layer (39) covering each of the plurality of nanostructures (37), the surface (35) connecting the first level (31) and the second level (33); a conduction control layer (41) conformally covering the first electrode layer (39); a second electrode layer (43) covering the conduction control layer (41); a first contact pad (21) electrically conductively connected to the first electrode layer (39) on the second level (33) of the substrate (27); and a second contact pad (23) electrically conductively connected to the second electrode layer (43).

Description

Technical Field

[0001] The present invention relates to an energy storage device comprising a substrate and a plurality of nanostructures extending from the substrate, and a method for manufacturing such an energy storage device. Background Technology

[0002] To accommodate the increasing clock frequencies and shrinking sizes in electronic devices, there is a need for compact and high-capacity energy storage devices. Discrete MIM (metal-insulator-metal) capacitor components have been developed, exhibiting smaller size and higher capacitance.

[0003] US 2022 / 0013305 A1 discloses a discrete MIM energy storage device comprising: a MIM arrangement; a first connection structure for external electrical connection of a capacitor component; a second connection structure for external electrical connection of the capacitor component; and an electrically insulating encapsulating material at least partially embedded in the MIM arrangement, the MIM arrangement comprising: a first electrode layer; a plurality of conductive nanostructures grown from the first electrode layer; a conduction control material covering each of the plurality of conductive nanostructures and the first electrode layer not covered by the conductive nanostructures; and a second electrode layer covering the conduction control material. Different configurations of the discrete MIM energy storage device in US 2022 / 0013305 A1 can be made very compact and have high energy storage capacity.

[0004] It is desirable to provide energy storage devices with similar characteristics, thereby achieving advantageous electrical connections between the first electrode layer of the energy storage device and the first contact pad for external connection, and between the second electrode layer of the energy storage device and the second contact pad for external connection. Summary of the Invention

[0005] According to a first aspect of the present invention, an energy storage device is thus provided, comprising: a substrate having a first level, a second level above the first level, and a surface connecting the first level and the second level; a plurality of nanostructures extending vertically from the first level of the substrate; a first electrode layer covering each of the plurality of nanostructures, the surface connecting the first level and the second level, and the second level of the substrate; a conduction control layer conformally covering the first electrode layer; a second electrode layer covering the conduction control layer; a first contact pad conductively connected to the first electrode layer on the second level of the substrate; and a second contact pad conductively connected to the second electrode layer.

[0006] It should be understood that when the substrate is macroscopically arranged in a horizontal plane, the second layer of the substrate is higher than the first layer of the substrate in the vertical direction. Similarly, the "vertical extension" of the nanostructure from the first layer of the substrate should be understood to mean that when the substrate is macroscopically arranged in a horizontal plane, the nanostructure extends substantially vertically.

[0007] In the context of this application, the term "conformal coating" should be understood to mean covering in such a way that the thickness of the conformal coating is substantially uniform regardless of the orientation of the surface covered by the layer. Various deposition methods for achieving conformal coating are well known to those skilled in the art. Typical examples of potentially suitable deposition methods are various vapor phase deposition methods, such as CVD, ALD, and PVD.

[0008] This invention is based on the understanding that it is desirable to arrange the first electrode layer and the second electrode layer, at least partially, such that the vertical distance between them is shorter than the maximum length of the nanostructures among a plurality of nanostructures. The inventors have further recognized that this can be achieved by providing a substrate with different vertical levels, providing nanostructures extending vertically from the lower level of the different vertical levels, and depositing a first electrode layer to cover the nanostructures and the higher level of the different vertical levels. In this way, the first electrode layer can be brought closer to the vertical level of the tip of the vertically extending nanostructure. This, in turn, facilitates a conductive connection between the first electrode layer and the first contact pad.

[0009] This configuration of the energy storage device reduces the need for long connectors. This, in turn, provides convenient manufacturing and improved utilization of the substrate area. Consequently, for a given energy storage device footprint, the energy storage device can be manufactured with higher yield and / or higher energy storage capacity. Furthermore, the configuration according to various aspects of this disclosure allows for the use of longer, vertically extending nanostructures, which can also contribute to higher energy storage capacity for a given energy storage device footprint.

[0010] In the example configuration, the second contact pads can advantageously be electrically connected to a second electrode layer directly above the plurality of conductive nanostructures. This example configuration can provide a uniform distribution of the first and second contact pads, and can also provide minor differences in the vertical positions between the first and second electrode layers, and between the positions where the first contact pads are electrically connected to the first electrode layer and the positions where the second contact pads are electrically connected to the second electrode layer.

[0011] Advantageously, the first and second contact pads can be substantially on the same vertical level relative to the second layer of the substrate. This configuration makes it easier to mount energy storage devices as discrete components on integrated circuits or PCBs.

[0012] In an example configuration of the energy storage device, the thickness of the first electrode layer on the surface connecting the first and second layers can be greater than the thickness of the first electrode layer on the second layer of the substrate. This configuration can provide a reduced ESR (electrical series resistance) and / or a reduced ESL (electrical series inductance) for the energy storage device.

[0013] In an example configuration of the energy storage device, the conduction control layer may cover a portion of the first electrode layer on the second layer of the substrate; and the second electrode layer may cover a portion of the conduction control layer on the second layer of the substrate.

[0014] An opening may be present in the conductive control layer and the second electrode layer on the second level of the substrate; and the energy storage device may also include a conductive structure that extends through the opening to conductively connect the first electrode layer on the second level of the substrate to the first contact pad.

[0015] In an example configuration of the energy storage device, the second electrode layer may include: a first sublayer conformally covering the conductive control layer; and a second sublayer covering the first sublayer such that the space between the individual nanostructures in the plurality of conductive nanostructures is substantially completely filled by the second sublayer, and the space between the plurality of conductive nanostructures and the surfaces of the first and second levels of the connecting substrate is substantially completely filled by the second sublayer. This example configuration may provide improved structural strength and durability of the energy storage device, and / or reduced ESR (electrical series resistance) and / or reduced ESL (electrical series inductance) of the energy storage device.

[0016] In an example configuration of an energy storage device, the energy storage device may include an electrically insulating encapsulating material that at least partially forms the outer boundary surface of the energy storage device; and each of a first contact pad and a second contact pad may at least partially form the outer boundary surface of the energy storage device. This configuration provides a discrete energy storage device component that is robust and suitable for reasonable electronic device production using so-called "pick-and-place" type mass production equipment.

[0017] Energy storage devices according to various exemplary configurations of the invention can be advantageously included in an electronic system, the electronic system further comprising: a substrate having a substrate conductor pattern and substrate pads included in the substrate conductor pattern; a semiconductor component having an active circuit system and component pads coupled to the active circuit system of the semiconductor component, the component pads being connected to the substrate pads of the substrate; and a power interface for receiving power from a power source, the power interface being connected to the substrate conductor pattern. The energy storage device may be disposed between the substrate and the semiconductor component, a first contact pad of the energy storage device being conductively connected to a first component pad of the semiconductor component, and a second contact pad of the energy storage device being conductively connected to a second component pad of the semiconductor component.

[0018] Energy storage devices according to various exemplary configurations of the invention can be advantageously included in an electronic system, the electronic system further comprising: a substrate having a substrate conductor pattern and substrate pads included in the substrate conductor pattern; a semiconductor component having an active circuit system and component pads coupled to the active circuit system of the semiconductor component, the component pads being connected to substrate pads of the substrate; and a power interface for receiving power from a power source, the power interface being connected to the substrate conductor pattern. The energy storage device can be embedded in the substrate, a first contact pad of the energy storage device being electrically connected to a first component pad of the semiconductor component via a first substrate pad of the substrate conductor pattern, and a second contact pad of the energy storage device being electrically connected to a second component pad of the semiconductor component via a second substrate pad of the substrate conductor pattern.

[0019] According to a second aspect of the present invention, a method for manufacturing an energy storage device is provided, comprising: providing a substrate having a first layer, a second layer above the first layer, and a surface connecting the first layer and the second layer; providing a plurality of nanostructures on the first layer of the substrate such that each of the plurality of nanostructures extends substantially perpendicularly from the first layer of the substrate; providing a first electrode layer covering each of the plurality of nanostructures, the surface connecting the first layer and the second layer, and the second layer of the substrate; providing a conduction control layer conformally covering the first electrode layer; providing a second electrode layer covering the conduction control layer; removing at least a portion of the conduction control layer and the second electrode layer on the second layer of the substrate, thereby exposing the first electrode layer on the second layer of the substrate; forming a first contact pad conductively connected to the exposed first electrode layer on the second layer of the substrate; and forming a second contact pad conductively connected to the second electrode layer.

[0020] According to the example, setting up a substrate may include: setting up a monolayer substrate exposed in a first portion of the monolayer substrate and covered by a mask in a second portion of the monolayer substrate; subjecting the monolayer substrate to a material removal technique, such that material is removed from the monolayer substrate in the first portion of the monolayer substrate and below the edge portion of the mask, until the substrate is at the first layer of its exposed substrate and below the edge portion of the mask; setting up a first electrode layer may include: depositing a first conductive layer using a first deposition technique while the mask remains on the substrate, such that the first conductive layer is formed on the first layer of the substrate and on the surface connecting the first layer and the second layer; and setting up multiple nanostructures may include: depositing a catalyst layer using a second deposition technique while the mask remains on the substrate, such that the catalyst layer is formed on the first conductive layer on the first layer of the substrate, as defined by the projection of the mask onto the first layer of the substrate; and growing nanostructures from the catalyst layer.

[0021] In this exemplary embodiment of the method according to the invention, the combination of under-etching of the substrate and a suitable selection of different deposition techniques for depositing a portion of the first electrode layer and the catalyst layer provides several advantageous characteristics for the energy storage device. By using a first deposition technique to deposit the first conductive layer, such that the first conductive layer is formed not only on the first level of the substrate but also on the surface connecting the first and second levels, this helps to reduce the ESR and / or ESL of the energy storage device. The selection of under-etching and a second deposition technique for depositing the catalyst layer, such that the catalyst layer is formed on the first conductive layer on the first level of the substrate, as defined by the projection of the mask onto the first level of the substrate, prevents undesirable growth of nanostructures on the surface connecting the first and second levels, which is important for the performance and quality of the energy storage device. With this example of the method according to the invention, this can be achieved without photolithography on the first level of the substrate, providing lower manufacturing costs and increased yield.

[0022] In an example of the method according to the invention, the method may include removing a mask and a first conductive layer and a catalyst layer deposited on the mask; and setting the first electrode layer may include: depositing a second conductive layer using a third deposition technique to produce a first conductive layer conformally covering each of a plurality of nanostructures, on the surfaces of a first level and a second level of the substrate, and a second conductive layer of the second level of the substrate.

[0023] Thus, the first electrode layer provides the dual functionality of high conductivity (provided by the second conductive layer) at the surface of each nanostructure and low series resistance (ESR) along the surfaces of the first and second layers of the connecting substrate. For example, these two functions contribute to capacitor characteristics that facilitate decoupling in demanding applications.

[0024] According to the example, setting the second electrode layer may include: depositing a first sublayer on each of the plurality of nanostructures and on the surfaces of a first level and a second level of the connecting substrate, the first sublayer conformally covering the conduction control layer; and depositing a second sublayer covering the first sublayer such that the space between the various nanostructures of the plurality of nanostructures is substantially completely filled by the second sublayer, and the space between the plurality of nanostructures and the surfaces of the first level and the second level of the connecting substrate is substantially completely filled by the second sublayer.

[0025] According to the example, the method may further include depositing an electrically insulating encapsulation material to at least partially form the outer boundary surface of the energy storage device; and forming the first contact pad may include: forming a hole in the electrically insulating encapsulation material above a second layer of the substrate; filling the hole with a conductive material that is in conductive contact with the first electrode layer; and forming the first contact pad on the conductive material; and forming the second contact pad may include: forming a hole in the electrically insulating encapsulation material above a plurality of nanostructures; filling the hole with a conductive material that is in conductive contact with the second electrode layer; and forming the second contact pad on the conductive material. Attached Figure Description

[0026] These and other aspects of the invention will now be described in more detail with reference to the accompanying drawings, in which:

[0027] Figure 1 schematically illustrates the application of an energy storage device according to an example of the present invention in the form of an illustrative mobile phone;

[0028] Figure 2 An example of a circuit board according to the prior art is shown schematically, which may represent a typical circuit board in current electronic devices;

[0029] Figure 3 This schematically illustrates the replacement of energy storage devices according to an example of the invention. Figure 2 Potential impact on conventional energy storage components on circuit boards;

[0030] Figure 4 This is a schematic diagram of an energy storage device configured according to an example;

[0031] Figure 5 is Figure 4 A schematic cross-sectional view of the energy storage device in the image;

[0032] Figure 6A to Figure 6C This is an enlarged view of different parts of the energy storage device in Figure 5;

[0033] Figure 7 This is a flowchart illustrating the example method;

[0034] Figure 8 This is a flowchart illustrating the example method; and

[0035] Figures 9A to 9G schematically shown Figure 8 Different steps in the method. Detailed Implementation

[0036] Figure 1 schematically illustrates an electronic device according to an embodiment of the present invention, here in the form of a mobile phone 1. In the simplified and schematic illustration of Figure 1, the mobile phone is indicated to include, like most electronic devices, an electronic system 3, which includes a circuit board filled with semiconductor components 5 and passive components, the passive components including energy storage devices in the form of capacitors 7.

[0037] Figure 2 This is an exemplary illustration of an electronic system 3 using technologies currently available for reasonable and cost-effective mass production. Figure 2 In this circuit, there are numerous capacitors 7 mounted on a circuit board 9 (which can be provided in the form of a printed circuit board (PCB)). The capacitors 7 currently used are typically so-called multilayer ceramic capacitors (MLCCs), with a minimum package height of approximately 0.4 mm.

[0038] In order to provide even more compact electronic devices with even higher processing speeds, it is desirable to reduce the space occupied by the capacitors 7 required for decoupling and temporary energy storage, and to reduce the distance between the semiconductor component 5 and the capacitors 7 serving the semiconductor component 5.

[0039] This can be achieved using energy storage devices according to an example of the invention, which can be fabricated with a significantly smaller package height compared to conventional MLCCs with similar capacitance and footprint.

[0040] Figure 3 This is a schematic illustration of an electronic system 3 according to an example of the present invention, which includes a circuit board 9, semiconductor components 5, a power interface 15, and a plurality of energy storage devices. Figure 3 In this drawing, only the reference numerals are used to indicate the two energy storage devices 11a and 11b to avoid confusion. The circuit board 9 has a circuit board conductor pattern 17 and circuit board pads 19 included in the circuit board conductor pattern 17. The semiconductor component has an active circuit system (in... Figure 3(Not visible in the image) and component pads 13 coupled to the active circuit system. Component pads 13 are connected to circuit board pads 19 of the circuit board 9. Power interface 15 is configured to receive power from a power source and is connected to circuit board conductor pattern 17.

[0041] The energy storage device 11a shown is disposed between the circuit board 9 and the semiconductor component 5. The first contact pad 21 of the energy storage device 11a is electrically connected to the first component pad 13a of the semiconductor component 5, and the second contact pad 23 of the energy storage device 11a is electrically connected to the second component pad 13b of the semiconductor component 5.

[0042] Another energy storage device 11b of the energy storage devices shown is embedded in the circuit board 9. The first contact pad 21 of the energy storage device 11b is electrically connected to the first circuit board pad 19a of the circuit board conductor pattern 17, and the second contact pad 23 of the energy storage device 11b is electrically connected to the second circuit board pad 19b of the circuit board conductor pattern 17.

[0043] As from Figure 3 It is evident that the reduced package height of the energy storage device 11 allows it to be placed below the semiconductor component 5 and / or embedded in the substrate 9. Clearly, this arrangement of the energy storage device 11 results in a smaller PCB 9, and thus a more compact electronic system 3. It is also clear that a shorter distance between the active circuitry in the semiconductor component 5 and the energy storage device 11 is provided, which reduces ESL (electrical series inductance).

[0044] Figure 4 This is a schematic diagram of the energy storage device 11 configured according to the example. Figure 4 The exemplary energy storage device 11 has an outer boundary surface that is at least partially formed by an electrically insulating encapsulation material 25. Figure 4 In the example configuration, the substrate 27 of the energy storage device 11 also partially forms the outer boundary surface of the energy storage device 11.

[0045] Figure 4 The exemplary energy storage device 11 is a discrete capacitor component that can be connected to, for example, a semiconductor component 5 or a substrate conductor pattern 17 by means of a plurality of first contact pads 21 and a plurality of second contact pads 23 substantially uniformly distributed on the top surface of the energy storage device 11. Figure 4Only a few first contact pads 21 and second contact pads 23 are indicated by reference numerals in the accompanying drawings to avoid confusion. By providing a plurality of first contact pads 21 all connected to the first electrode layer of the energy storage device 11 and a plurality of second contact pads 23 all connected to the second electrode layer of the energy storage device 11, the ESR and / or ESL of the energy storage device 11 can be reduced, thereby providing improved decoupling characteristics.

[0046] Figure 5 is Figure 4 Along the energy storage device 11 in Figure 4 A schematic cross-sectional view of the portion cut by line A-A' in the diagram. Referring first to Figure 5, the energy storage device 11 includes the aforementioned substrate 27, a nanostructured MIM (metal-insulator-metal) arrangement 29, the aforementioned first contact pad 21, and the aforementioned second contact pad 23. The substrate 27, which may be made of, for example, doped or undoped silicon, has a first layer 31, a second layer 33 perpendicular to the first layer 31, and a surface 35 connecting the first layer 31 and the second layer 33.

[0047] The nanostructure MIM arrangement 29 includes a plurality of nanostructures 37 extending substantially vertically from the first layer 31 of the substrate 27. See Figures 6A to 6B, which are enlarged views of different portions of the energy storage device in Figure 5. Figure 6C The best-looking nanostructure MIM arrangement 29 also includes a first electrode layer 39, a conduction control layer 41, and a second electrode layer 43.

[0048] Nanostructure 37 can advantageously be a grown nanostructure, and can be so-called carbon nanofibers (CNF). However, other possibilities exist, and may be advantageous depending on the application.

[0049] The first electrode layer 39 covers each nanostructure 37, the surface 35 of the first level 31 and the second level 33 connecting the substrate 27, and the second level 33 of the substrate 27. The thickness of the first electrode layer 39 on the surface 35 connecting the first level 31 and the second level 33 of the substrate 27 may be greater than the thickness of the first electrode layer 39 on the second level 33, and also greater than the thickness of the first electrode layer 39 on the nanostructure 37. At least on the surface 35 connecting the first level 31 and the second level 33, the first electrode layer 39 may include a first conductive layer 45 and a second conductive layer 47. As will be combined below... Figure 8 Flowcharts and Figures 9A to 9G As described in further detail in the accompanying drawings, the first conductive layer 45 may be deposited before the nanostructure 37 is provided, while the second conductive layer 47 is deposited after the nanostructure is provided.

[0050] The conduction control layer 41 conformally covers the first electrode layer 39. The conduction control layer 41 can advantageously be made of a so-called high-k dielectric. High-k dielectric materials can be, for example, HfOx, TiOx, TaOx, or other known high-k dielectrics. Alternatively, the conduction control layer 41 can be polymer-based, such as polypropylene, polystyrene, poly(p-xylene), pyrene, etc. Other known dielectric materials such as SiOx or SiNx can also be used for the conduction control layer 41. The conduction control layer 41 can be a multilayer structure, which may include sublayers of different material compositions.

[0051] The second electrode layer 43 covers the conduction control layer 41, and thus the first electrode layer 39, the conduction control layer 41, and the second electrode layer 43 together form a large-area MIM structure. Although in Figures 5 or 6A to... Figure 6C While not visible in the middle, the second electrode layer 43 may advantageously include: a first sublayer that conformally covers the conduction control layer 41; and a second sublayer that covers the first sublayer such that the space between the individual nanostructures 37 of the plurality of conductive nanostructures is substantially completely filled by the second sublayer, and the space between the plurality of conductive nanostructures 37 and the surfaces 35 of the first level 31 and the second level 33 of the connecting substrate 27 is substantially completely filled by the second sublayer.

[0052] The first contact pad 21 is electrically connected to the first electrode layer 39 on the second layer 33 of the substrate 27. In the example configuration shown in FIG5, the conductive connection between the first contact pad 21 and the first electrode layer 39 is achieved using a first electrode plug 48. The first contact pad 21 is not electrically connected to the second electrode layer 43.

[0053] The conduction control layer 41 may cover a portion of the first electrode layer 39 on the second layer 33 of the substrate 27, and the second electrode layer 43 may cover a portion of the conduction control layer 41 on the second layer 33 of the substrate 27.

[0054] Then, an opening may be present in the conductive control layer 41 and the second electrode layer 43 on the second layer 33 of the substrate 27, and the first electrode plug 48 may extend through the opening to electrically connect the first electrode layer 39 on the second layer 33 of the substrate 27 to the first contact pad 21.

[0055] The second contact pad 23 is electrically connected to the second electrode layer 43. As shown in FIG5, the conductive connection between each second contact pad 23 and the second electrode layer 43 can be located directly above the plurality of nanostructures 37. In the example configuration shown in FIG5, the conductive connection between the second contact pad 23 and the second electrode layer 43 is achieved using a second electrode plug 49.

[0056] The first contact pad 21 and the second contact pad 23 can be on the same vertical level relative to the second level 33 of the substrate 27. This can be achieved, for example, by adjusting the vertical extension of the first electrode plug 48 and / or the second electrode plug 49.

[0057] Figure 7 This is a flowchart illustrating an example method for manufacturing the energy storage device 11. As indicated, further refer to Figures 5 and 6A to... Figure 6C .

[0058] In the first step 701, a substrate 27 is provided, which has a first layer 31, a second layer 33 that is perpendicular to the first layer 31, and a surface 35 that connects the first layer 31 and the second layer 33.

[0059] Subsequently, a plurality of nanostructures 37 702 are disposed on the first layer 31 of the substrate 27 such that each of the plurality of nanostructures 37 extends substantially vertically from the first layer 31 of the substrate 27.

[0060] A first electrode layer 39 703 is provided such that the first electrode layer 39 covers each of the plurality of nanostructures 37, the surface 35 connecting the first layer 31 and the second layer 33, and the second layer 33 of the substrate 27.

[0061] A conduction control layer 41 704 is provided so that the conduction control layer 41 conformally covers the first electrode layer 39.

[0062] A second electrode layer 43 705 is provided such that the second electrode layer 43 covers the conduction control layer 41.

[0063] By removing at least a portion of the conductive control layer 41 and the second electrode layer 43 on the second layer 33 of the substrate 27, the first electrode layer 39 on the second layer 33 of the substrate 27 is exposed 706.

[0064] At least a first contact pad 21 and a second contact pad 23 707 are formed such that the first contact pad is electrically connected to the exposed first electrode layer 39 on the second layer 33 of the substrate 27, and the second contact pad is electrically connected to the second electrode layer 43.

[0065] Figure 8 This is a flowchart illustrating an example method for manufacturing the energy storage device 11, and Figures 9A to 9G schematically shown Figure 8 The different steps of the method are described. See further reference to Figures 5, 6A, and 6B as indicated. Figure 6C .

[0066] In the first step 801, a single-layer substrate 27 is formed. The substrate 27 is covered by a patterned mask 51, which is patterned to leave an exposed first portion 53 of the substrate 27 and a covered second portion 55 of the substrate 27. The mask 51 may, for example, be a thin oxide layer that is first deposited and then patterned using photolithography techniques known per se. Figure 9A A portion of a masked single-layer substrate 27 is schematically shown in the figure.

[0067] Subsequently, the monolayer substrate 27 is subjected to material removal technique 802, which removes material from the monolayer substrate 27 in the first portion 53 of the monolayer substrate 27 and below the edge portion of the mask 51, until the substrate 27 is located at its exposed (not covered by the mask 51) first layer 31 of the substrate 27 and below the edge portion of the mask 51. The desired under-etch can be achieved, for example, in a dry etching step by adjusting plasma conditions such as substrate voltage bias, gas chemistry, and chamber pressure. Through such adjustment, the etching rates of the sidewalls and the bottom surface can be adjusted to obtain a specific etching ratio between them. In doing so, controlled under-etching below the mask 51 can be achieved, such as... Figure 9B As shown. Various processes are commonly used in the semiconductor industry to produce under-etch. The single-layer substrate 27 can advantageously be a silicon substrate, which can be doped or undoped. Other substrate materials are also possible, as long as they can be etched to achieve the desired under-etch.

[0068] While the mask 51 remains on the substrate 27, a first conductive layer 45 is formed using a first deposition technique, such that the first conductive layer 45 is formed on the first layer 31 of the substrate 27, on the surface 35 connecting the first layer 31 and the second layer 33, and on the mask 51. See Figures 5 and 6A above. Figure 6C As described, when the manufacturing process is complete, a first conductive layer 45 will be included in the first electrode layer 39 of the finished energy storage device 11. A suitable choice of the first deposition technique may be sputtering. The first conductive layer may be made of any of a variety of metals such as W, Ti, Al, Si, Ni, Pt, or Cr, or combinations thereof. Sputtering produces the desired sidewall (surface 35) coverage, which ultimately contributes to the desired low ESR.

[0069] In the next step 804, while the mask 51 remains on the substrate 27, a catalyst layer 57 is deposited. The catalyst layer 57 is deposited using a second deposition technique such that the catalyst layer 57 is formed on the first conductive layer 45 on the first layer 31 of the substrate 27, as defined by the projection of the mask 51 onto the first layer 31 of the substrate 27. An advantageous example of the second deposition technique could be evaporation, since evaporation does not produce sidewall coverage, such that the catalyst layer 57 is substantially confined to the area defined by the projection of the mask 51 onto the first layer 31 of the substrate 27. The catalyst layer 57 may be made, for example, of nickel, iron, platinum, palladium, nickel silicide, cobalt, molybdenum, Au, or alloys thereof, or may be combined with other materials (e.g., silicon). Figure 9C A substrate 27 having a first conductive layer 45 and a catalyst layer formed thereon is schematically shown, wherein a mask 51 is retained and covered by the first conductive layer 45 and the catalyst layer 57. After depositing the catalyst layer 57, the mask 51 805 is removed, for example, by sacrificial etching of the mask 51 (as an oxide layer). For example, a buffered HF solution can be used to remove the oxide with minimal impact on other layers. Figure 9D The resulting coated substrate 27 is shown in the figure.

[0070] Nanostructures 37 806 are grown on the catalyst layer 57. Since the catalyst layer 57 is not on the surface 35 of the first layer 31 and the second layer 33 connecting the substrate 27, parasitic growth of nanostructures on the wall can be avoided, and a region without nanostructures can be generated near the sidewall (the surface 35 connecting the first layer 31 and the second layer 33).

[0071] Vertically grown carbon nanofibers (CNFs) are particularly suitable for energy storage devices 11. The use of vertically grown nanostructures 37 allows for extensive tuning of the properties of the nanostructures 37. For example, growth conditions can be selected to achieve a morphology in which each nanostructure 37 has a large surface area, which in turn can increase the charge storage capacitance or the capacitance per 2D space occupied. As alternatives to CNFs, the nanostructures can be metallic carbon nanotubes or carbide-derived carbon nanostructures, nanowires such as copper, aluminum, silver, silicides, or other types of nanowires. Advantageously, catalyst materials and growth gases, etc., can be selected in a manner known per se to achieve so-called tip growth of the nanostructures 37, which can produce a catalyst layer material at the tip of the nanostructure 37.

[0072] Subsequently, a second conductive layer 47 807 is deposited using a third deposition technique, thereby producing a first conductive layer 45 conformally covering each of the plurality of nanostructures 37, the surface 35 connecting the first level 31 and the second level 33 of the substrate 27, and the second conductive layer 47 of the second level 33 of the substrate 27. The third deposition technique can advantageously be ALD (atomic layer deposition). For example, a thin TiN layer (or the like) can be deposited. The second conductive layer 47, together with the first conductive layer deposited in step 803, forms a first electrode layer 39 extending from the nanostructure 37 to the second level 33 of the substrate 27.

[0073] The conduction control layer 41 808 is then formed using a deposition technique, thereby creating a conformal cover of the first electrode layer 39. For example, ALD deposition can be used to form the conduction control layer 41 as an oxide stack. The conduction control layer 41 can be made, for example, of a so-called high-k dielectric. High-k dielectric materials can be, for example, HfOx, TiOx, TaOx, or other known high-k dielectrics. Alternatively, the conduction control layer 41 can be polymer-based, such as polypropylene, polystyrene, poly(p-xylene), pyrene, etc. Other known dielectric materials such as SiOx or SiNx can also be used as the conduction control layer 41.

[0074] After forming the conduction control layer 41, a first sublayer 59809 can be deposited on each of the plurality of nanostructures 37, and on the surface 35 of the first level 31 and the second level 33 of the connecting substrate 27, and on the second level 33, to conformally cover the conduction control layer 41. The first sublayer 59 of the second electrode layer 43 can be deposited, for example, using ALD (atomic layer deposition). For example, a thin TiN layer (or the like) can be deposited. Figure 9E The resulting structure is schematically shown in the diagram.

[0075] Optionally, in a subsequent step 810, a second sublayer 61 may be deposited, which covers the first sublayer 59, such that the spaces between the individual nanostructures 37 of the plurality of nanostructures are substantially completely filled by the second sublayer 61, and the spaces between the plurality of nanostructures 37 and the surfaces 35 of the first and second layers 31 and 33 of the connecting substrate 27 are substantially completely filled by the second sublayer 61. For example, an overfill material (which may be tungsten, TiN, or the like) used in the CVD process for depositing the second sublayer 61 is used to fill all the voids. Figure 9F The resulting structure is schematically shown in the diagram. The excess filler can then be polished away using CMP to produce a flush top surface.

[0076] Finally, in step 811, encapsulation material 25 is deposited and a first contact pad 21 and a second contact pad 23 are formed. The contact pads can be formed using BEOL processing, which is known per se. Figure 9G The image shows a typical example of BEOL treatment using two metal layers.

[0077] Those skilled in the art will recognize that the invention is by no means limited to the preferred embodiments described above. Rather, many modifications and variations are possible within the scope of the appended claims.

[0078] In the claims, the word "comprising" does not exclude other elements or steps, and the indefinite articles "a" or "an" do not exclude a plurality. A single processor or other unit can perform the functions of several items listed in the claims. The mere fact that certain measures are listed in mutually different dependent claims does not indicate that a combination of these measures cannot be used advantageously. Any reference numerals in the claims should not be construed as limiting the scope.

Claims

1. An energy storage device, comprising: A substrate having a first layer, a second layer above the first layer, and a surface connecting the first layer and the second layer; Multiple nanostructures, the multiple nanostructures extending vertically from the first layer of the substrate; A first electrode layer covers each of the plurality of nanostructures, the surface connecting the first level and the second level, and the second level of the substrate; A conduction control layer conformally covers the first electrode layer; A second electrode layer, which covers the conduction control layer; The first contact pad is electrically connected to the first electrode layer on the second level of the substrate; as well as The second contact pad is electrically connected to the second electrode layer.

2. The energy storage device according to claim 1, wherein, The second contact pad is electrically connected to the second electrode layer directly above the plurality of nanostructures.

3. The energy storage device according to claim 1 or 2, wherein, The first contact pad and the second contact pad are on the same vertical level relative to the second level of the substrate.

4. The energy storage device according to any one of the preceding claims, wherein, The thickness of the first electrode layer on the surface connecting the first layer and the second layer is greater than the thickness of the first electrode layer on the second layer of the substrate.

5. The energy storage device according to any one of the preceding claims, wherein: The conduction control layer covers a portion of the first electrode layer on the second level of the substrate; and The second electrode layer covers the conduction control layer on a portion of the second level of the substrate.

6. The energy storage device according to claim 5, wherein: An opening exists in the conduction control layer and the second electrode layer on the second level of the substrate; and The energy storage device further includes a conductive structure that extends through the opening to conductively connect the first electrode layer on the second level of the substrate to the first contact pad.

7. The energy storage device according to any one of the preceding claims, wherein, The second electrode layer includes: A first sublayer, conformally covering the conduction control layer; and The second sublayer covers the first sublayer, such that the space between each nanostructure in the plurality of conductive nanostructures is substantially completely filled by the second sublayer, and the space between the plurality of conductive nanostructures and the surface connecting the first level and the second level of the substrate is substantially completely filled by the second sublayer.

8. The energy storage device according to any one of the preceding claims, wherein: The energy storage device includes an electrically insulating encapsulating material that at least partially forms the outer boundary surface of the energy storage device; and Each of the first contact pad and the second contact pad at least partially forms the outer boundary surface of the energy storage device.

9. An electronic system comprising: A circuit board having a circuit board conductor pattern and circuit board pads included in the circuit board conductor pattern; A semiconductor component having an active circuit system and component pads of the active circuit system coupled to the semiconductor component, the component pads being connected to circuit board pads of the circuit board substrate; A power interface for receiving power from a power source, the power interface being connected to the conductor pattern of the circuit board. as well as The energy storage device according to any one of the preceding claims is disposed between the circuit board and the semiconductor component, wherein a first contact pad of the energy storage device is conductively connected to a first component pad of the semiconductor component, and a second contact pad of the energy storage device is conductively connected to a second component pad of the semiconductor component.

10. An electronic system comprising: A circuit board having a circuit board conductor pattern and circuit board pads included in the circuit board conductor pattern; A semiconductor component having an active circuit system and component pads of the active circuit system coupled to the semiconductor component, the component pads being connected to circuit board pads of the circuit board substrate; A power interface for receiving power from a power source, the power interface being connected to the conductor pattern of the circuit board. as well as According to any one of the preceding claims, the energy storage device is embedded in the circuit board, the first contact pad of the energy storage device is electrically connected to the first component pad of the semiconductor component via the first circuit board pad of the circuit board conductor pattern, and the second contact pad of the energy storage device is electrically connected to the second component pad of the semiconductor component via the second circuit board pad of the circuit board conductor pattern.

11. A method for manufacturing an energy storage device, comprising: A substrate is provided, the substrate having a first layer, a second layer above the first layer, and a surface connecting the first layer and the second layer; A plurality of nanostructures are disposed on the first layer of the substrate, such that each of the plurality of nanostructures extends substantially perpendicularly from the first layer of the substrate. A first electrode layer is provided, which covers each of the plurality of nanostructures, the surface connecting the first level and the second level, and the second level of the substrate; A conduction control layer is provided, wherein the conduction control layer conformally covers the first electrode layer; A second electrode layer is provided, which covers the conduction control layer; At least a portion of the conduction control layer and the second electrode layer on the second level of the substrate are removed, thereby exposing the first electrode layer on the second level of the substrate; A first contact pad is formed, which is electrically connected to the exposed first electrode layer on the second layer of the substrate; as well as A second contact pad is formed, which is electrically connected to the second electrode layer.

12. The method according to claim 11, wherein: Setting the substrate includes: A single-layer substrate is provided, the single-layer substrate being exposed in a first portion of the single-layer substrate and covered by a mask in a second portion of the single-layer substrate; and The single-layer substrate is subjected to a material removal technique, in which material is removed from the single-layer substrate in the first portion of the single-layer substrate and below the edge portion of the mask, until the substrate is at the first layer of the exposed substrate and below the edge portion of the mask. Depositing the first electrode layer includes: while the mask remains on the substrate, depositing a first conductive layer using a first deposition technique, such that the first conductive layer is formed on the first layer of the substrate and on the surface connecting the first layer and the second layer; and Setting the plurality of nanostructures includes: While the mask remains on the substrate, a catalyst layer is deposited using a second deposition technique, such that a catalyst layer is formed on the first conductive layer at the first level of the substrate, the catalyst layer being defined by the projection of the mask onto the first level of the substrate; and Nanostructures are grown from the catalyst layer.

13. The method according to claim 12, wherein: The method includes removing the mask and the first conductive layer and the catalyst layer deposited on the mask; and The first electrode layer is configured by depositing a second conductive layer using a third deposition technique to generate the second conductive layer, the second conductive layer conformally covering each of the plurality of nanostructures, the first conductive layer on the surface connecting the first level and the second level of the substrate, and the second level of the substrate.

14. The method according to any one of claims 11 to 13, wherein, Setting the second electrode layer includes: A first sublayer is deposited on each of the plurality of nanostructures and on the surface connecting the first and second levels of the substrate, the first sublayer conformally covering the conduction control layer; and A second sublayer is deposited, which covers the first sublayer, such that the space between each of the plurality of nanostructures is substantially completely filled by the second sublayer, and the space between the plurality of nanostructures and the surface connecting the first and second layers of the substrate is substantially completely filled by the second sublayer.

15. The method according to any one of claims 11 to 14, wherein: The method further includes depositing an electrically insulating encapsulating material to at least partially form the outer boundary surface of the energy storage device; and Forming the first contact pad includes: A hole is formed in the electrically insulating encapsulation material above the second layer of the substrate; The holes are filled with a conductive material that is in conductive contact with the first electrode layer; and The first contact pad is formed on the conductive material; and Forming the second contact pad includes: A pore is formed in the electrically insulating encapsulation material above the plurality of nanostructures; The holes are filled with a conductive material that makes conductive contact with the second electrode layer; and The second contact pad is formed on the conductive material.

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