Harmonic termination for differential amplifier

Abstract

Certain aspects of the present disclosure provide techniques for a harmonic termination for a differential amplifier. An example apparatus includes an amplifier configured to output a differential signal via a first output terminal and a second output terminal. The apparatus includes a resonant circuit coupled between the first output terminal and the second output terminal of the amplifier. The resonant circuit includes a first capacitor, a second capacitor, a third capacitor, a first inductor, and a second inductor. The third capacitor is coupled between separate terminals of the inductors.

Description

[0001] Cross-reference to related applications

[0002] This patent application claims priority to U.S. Provisional Application No. 63 / 627,525, filed January 31, 2024, and U.S. Non-Provisional Patent Application No. 18 / 814,110, filed August 23, 2024, the entire contents of which are hereby expressly incorporated herein by reference. Background Technology Technical Field

[0004] Various aspects of this disclosure relate to wireless communication, and more specifically to harmonic termination circuitry for amplifiers.

[0005] Related technical descriptions

[0006] Wireless communication systems are widely deployed to provide a variety of telecommunications services, such as telephone, video, data, messaging, and broadcasting. These wireless communication systems can employ multiple access technologies that enable communication with multiple users by sharing available wireless communication system resources. Wireless communication devices can transmit radio frequency (RF) signals via any of a variety of suitable radio access technologies (RATs), including but not limited to 5G New Radio (NR), Evolved Universal Terrestrial Radio Access (E-UTRA), Code Division Multiple Access (CDMA), Time Division Multiple Access (TDMA), Wideband CDMA (WCDMA), Global System for Mobile Communications (GSM), Bluetooth, Bluetooth Low Energy (BLE), ZigBee, Wireless Local Area Network (WLAN) RATs (e.g., the IEEE 802.11 specification), and any future RATs.

[0007] In some cases, wireless communication devices are equipped with an RF transceiver (also known as an RF front-end) for transmitting RF signals. Typically, modulation techniques such as Phase Shift Keying (PSK) or any other suitable modulation technique are used to modulate the baseband signal to transmit information. In transmit mode, the RF transceiver is responsible for multiplexing the baseband signal with the RF carrier signal transmitted over the air (e.g., via a wireless communication channel). This operation is called up-conversion. In receive mode, the RF transceiver converts the received RF signal back into a baseband signal. This operation is called down-conversion. The received baseband signal can then be demodulated into the information encoded at the transmitter. The RF transceiver may include cascades of discrete components in the transmit and receive chains, respectively. These cascades may include one or more of, for example, attenuators, switches, couplers, filters, mixers, amplifiers, frequency synthesizers, oscillators, antenna tuners, duplexers, double-signalers, detectors, etc.

[0008] Despite significant technological advancements in RF circuits over the years, challenges remain. For example, RF circuits can still exhibit harmonic distortion. Therefore, there is a continued desire to improve the technical performance of RF circuits, such as harmonic termination. Summary of the Invention

[0009] Some aspects provide an apparatus configured for wireless communication. The apparatus includes an amplifier configured to output a differential signal via a first output terminal and a second output terminal. The apparatus includes a resonant circuit coupled between the first and second output terminals of the amplifier. The resonant circuit includes: a first capacitor having a first terminal and a second terminal, the first terminal of the first capacitor coupled to the first output terminal of the amplifier, and the second terminal of the first capacitor coupled to a first node; a second capacitor having a third terminal and a fourth terminal, the third terminal of the second capacitor coupled to the second output terminal of the amplifier, and the fourth terminal of the second capacitor coupled to a second node; a first inductor having a fifth terminal and a sixth terminal, the fifth terminal of the first inductor coupled to the first node; a second inductor having a seventh terminal and an eighth terminal, the seventh terminal of the second inductor coupled to the second node; and a third capacitor coupled between the first and second nodes.

[0010] Some aspects provide a method for harmonic termination control of an amplifier. The method includes: outputting an amplified differential signal via a first output terminal and a second output terminal of the amplifier. The method includes: controlling the harmonic termination of the differential signal using a resonant circuit coupled between the first and second output terminals of the amplifier. The resonant circuit includes: a first capacitor having a first terminal and a second terminal, the first terminal of the first capacitor being coupled to the first output terminal of the amplifier, and the second terminal of the first capacitor being coupled to a first node; a second capacitor having a third terminal and a fourth terminal, the third terminal of the second capacitor being coupled to the second output terminal of the amplifier, and the fourth terminal of the second capacitor being coupled to a second node; a first inductor having a fifth terminal and a sixth terminal, the fifth terminal of the first inductor being coupled to the first node; a second inductor having a seventh terminal and an eighth terminal, the seventh terminal of the second inductor being coupled to the second node; and a third capacitor coupled between the first and second nodes.

[0011] Some aspects provide a transceiver. The transceiver includes a transmit chain configured to output a radio frequency signal for transmission. The transmit chain includes: an amplifier configured to output a differential signal via a first output terminal and a second output terminal; and a resonant circuit coupled between the first and second output terminals of the amplifier. The resonant circuit includes: a first capacitor having a first terminal and a second terminal, the first terminal of the first capacitor being coupled to the first output terminal of the amplifier, and the second terminal of the first capacitor being coupled to a first node; a second capacitor having a third terminal and a fourth terminal, the third terminal of the second capacitor being coupled to the second output terminal of the amplifier, and the fourth terminal of the second capacitor being coupled to a second node; a first inductor having a fifth terminal and a sixth terminal, the fifth terminal of the first inductor being coupled to the first node; a second inductor having a seventh terminal and an eighth terminal, the seventh terminal of the second inductor being coupled to the second node; and a third capacitor coupled between the first and second nodes.

[0012] Other aspects provide: an apparatus operable to, configured to, or otherwise adapted to perform one or more of the foregoing methods and / or those methods described elsewhere herein; a non-transitory computer-readable medium comprising instructions which, when executed by a processor of the apparatus, cause the apparatus to perform the foregoing methods and those methods described elsewhere herein; a computer program product embodied on a computer-readable storage medium comprising: code for performing the foregoing methods and those methods described elsewhere herein; and / or an apparatus comprising components for performing the foregoing methods and those methods described elsewhere herein. By way of example, an apparatus may include a processing system, a device having a processing system, or a processing system cooperating via one or more networks.

[0013] To achieve the foregoing and related objectives, one or more aspects include the features fully described below and specifically pointed out in the claims. The following description and drawings illustrate certain exemplary features of these one or more aspects in detail. However, these features indicate only a few of the various ways in which the principles of the various aspects may be employed. Attached Figure Description

[0014] To gain a more detailed understanding of the foregoing features of this disclosure, a more specific description of the brief overview can be obtained by referring to some aspects illustrated in the accompanying drawings. However, it should be noted that the drawings illustrate only certain typical aspects of this disclosure and are therefore not to be considered as limiting its scope, as other equally valid aspects may be acknowledged in this description.

[0015] Figure 1 An example wireless communication system is shown.

[0016] Figure 2 An example wireless communication device is shown that communicates with another device.

[0017] Figure 3A An example amplifier circuit with harmonic termination control for multiple harmonics is illustrated.

[0018] Figure 3B Another example amplifier circuit with harmonic termination control for multiple harmonics is illustrated.

[0019] Figure 4A An example circuit model of the amplifier circuit depicted in Figure 3 is shown for use with even-mode excitation signals.

[0020] Figure 4B An example circuit model of the amplifier circuit depicted in Figure 3 is shown for use with odd-mode excitation signals.

[0021] Figure 5A Another example amplifier circuit with harmonic termination control for multiple harmonics is illustrated.

[0022] Figure 5B Another example amplifier circuit with harmonic termination control for multiple harmonics is illustrated.

[0023] Figure 6A Another example amplifier circuit with harmonic termination control for multiple harmonics is illustrated.

[0024] Figure 6B Another example amplifier circuit with harmonic termination control for multiple harmonics is illustrated.

[0025] Figure 7 An example operation for harmonic termination control of an amplifier is illustrated.

[0026] For ease of understanding, the same reference numerals have been used where possible to denote common elements in the figures. It is conceivable that elements disclosed in one aspect may be usefully applied to other aspects without specific description. Detailed Implementation

[0027] This disclosure provides apparatus and techniques for harmonic termination of differential amplifiers.

[0028] In some respects, an RF transmitter may use a power amplifier (PA) to amplify a signal for transmission via an antenna. For example, a PA can convert a low-power RF signal into a higher-power RF signal, and the output of the power amplifier can drive the antenna to transmit RF energy for wireless communication. For example, the PA's output may have some harmonic distortion, including second and / or third harmonics, due to nonlinear characteristics associated with other circuitry in the PA and / or transmitter's transmission chain (e.g., mixers). Harmonic distortion can affect PA performance, such as adjacent channel leakage ratio (ACLR), error vector magnitude (EVM), power output, etc.

[0029] Technical challenges with certain amplifiers (such as differential PAs) include, for example, employing effective harmonic termination to control certain harmonics in the amplifier output. In some cases, a resonant circuit can be arranged between the differential output terminals of the amplifier to control harmonic distortion exhibited in the output. An example resonant circuit may consist of two capacitors series-coupled between the amplifier's output terminals and an inductor having terminals coupled between the two capacitors. Using this inductor-capacitor (LC) architecture, the resonant circuit is able to control the second harmonic in the differential signal. For example, the resonant circuit may be able to suppress the second harmonic in the differential signal. However, in some cases, a third harmonic may be exhibited in the amplifier output, and therefore, the resonant circuit may not be able to control the harmonic termination of the second and third harmonics.

[0030] The aspects described herein can overcome the aforementioned technical problems, for example, by providing an enhanced resonant circuit configured to control harmonic terminations for the second and third harmonics in the amplifier output. As an example, the resonant circuit may include at least a first capacitor, a second capacitor, a third capacitor, a first inductor, and a second inductor. The third capacitor may be coupled between the inductor and the other capacitors. The third capacitor can be tuned to suppress the third harmonic in the amplifier output. The resonant circuit may employ the method described herein with respect to Figure 3. Figure 5A , Figure 5B , Figure 6A and Figure 6B The various LC architectures are further described.

[0031] Certain circuits for harmonic terminating described herein offer a variety of beneficial technical effects and / or advantages. Circuits for harmonic terminating can achieve improved amplifier performance, such as reduced ACLR, reduced EVM, and / or increased power-added efficiency (PAE). The improved amplifier performance can be attributed to the harmonic terminating described herein, which allows suppression of the second and third harmonics in the amplifier's output signal.

[0032] Example wireless communication system

[0033] Figure 1Example wireless communication system 100 is illustrated, in which aspects of this disclosure may be performed. For example, wireless communication system 100 may include a wireless wide area network (WWAN) and / or a wireless local area network (WLAN). For example, a WWAN may include a new radio (NR) system (e.g., a fifth-generation (5G) NR network), an evolved universal terrestrial radio access (E-UTRA) system (e.g., a fourth-generation (4G) network), a universal mobile telecommunications system (UMTS) (e.g., a second-generation (2G) or third-generation (3G) network), a code division multiple access (CDMA) system (e.g., a 2G / 3G network), any future WWAN system, or any combination thereof. A WLAN may include a wireless network configured to communicate according to Institute of Electrical and Electronics Engineers (IEEE) standards (such as one or more standards in the 802.11 standard). In some cases, wireless communication system 100 may include a device-to-device (D2D) communication network or a short-range communication system, such as Bluetooth communication.

[0034] like Figure 1 As illustrated, the wireless communication system 100 may include a first wireless device 102 that communicates with any of a variety of second wireless devices 104a to 104d (hereinafter referred to as "second wireless device 104") via any of a variety of radio access technologies (RATs), wherein a wireless device may refer to a wireless communication device. RATs may include, for example, WWAN communication (e.g., E-UTRA and / or 5G NR), WLAN communication (e.g., IEEE 802.11), vehicle-to-everything (V2X) communication, non-terrestrial network (NTN) communication, short-range communication (e.g., Bluetooth), etc.

[0035] The first wireless device 102 may include any of a variety of wireless communication devices, including user equipment (UE), base station, radio station, access point, customer premises equipment (CPE), etc. In some aspects, according to various aspects of this disclosure, the first wireless device 102 includes a harmonic termination circuit 106 that controls harmonic termination associated with an amplifier.

[0036] The second wireless device 104 may include, for example, a base station 104a, a vehicle 104b, an access point (AP) 104c, and / or a user equipment (UE) 104d. Furthermore, the wireless communication system 100 may include terrestrial aspects (such as ground-based network entities (e.g., base station 104a and / or access point 104c)) and / or non-terrestrial aspects (such as spaceborne platforms and / or airborne platforms). These non-terrestrial aspects may include onboard network entities (e.g., one or more base stations) capable of communicating with other network elements (e.g., terrestrial base stations) and / or user equipment.

[0037] Base station 104a may typically include: Node B, Enhanced Node B (eNB), Next Generation Enhanced Node B (ng-eNB), Next Generation Node B (gNB or gNodeB), access point, transceiver base station, radio base station, radio transceiver, transceiver functionality, transmit / receive point, and / or others. Base station 104a can provide communication coverage for a corresponding geographic coverage area, which may sometimes be referred to as a cell, and in some cases may overlap (e.g., a small cell may have a coverage area that overlaps with the coverage area of ​​a macro cell). For example, the base station may provide communication coverage for macro cells (covering a relatively large geographic area), pico cells (covering a relatively small geographic area, such as a stadium), femtocells (covering a relatively small geographic area (e.g., a home)), and / or other types of cells.

[0038] The first wireless device 102 and / or UE 104d may generally include: cellular phones, smartphones, Session Initiation Protocol (SIP) phones, laptops, personal digital assistants (PDAs), satellite radios, global positioning systems, multimedia devices, video devices, digital audio players, cameras, game consoles, tablet computers, smart devices, wearable devices, vehicles, electricity meters, air pumps, large or small kitchen appliances, healthcare devices, implants, sensors / actuators, displays, Internet of Things (IoT) devices, always-on (AON) devices, edge processing devices, or other similar devices. The UE may also be more generally referred to as a mobile device, wireless device, wireless communication device, radio station (STA), mobile station, subscriber station, mobile subscriber station, mobile unit, subscriber unit, wireless unit, remote unit, remote device, access terminal, mobile terminal, wireless terminal, remote terminal, mobile phone, and other terms.

[0039] Figure 2 Example components of a first wireless device 102 are illustrated, which can be used to communicate with any of the second wireless devices in the second wireless device 104.

[0040] The first wireless device 102 may be or may include a chip, a system-on-a-chip (SoC), a system-in-package (SiP), a chipset, a package, or a device including one or more modems 210 (hereinafter “modem 210”). In some cases, modem 210 may include, for example, any of the following: a WWAN modem (e.g., a modem configured to communicate via E-UTRA 5G NR and / or any future WWAN communication standard), a WLAN modem (e.g., a modem configured to communicate via the IEEE 802.11 standard), a Bluetooth modem, an NTN modem, etc. In some aspects, the first wireless device 102 also includes one or more RF transceivers (hereinafter “RF transceiver 250”). In some examples, RF transceiver 250 may be referred to as an RF front end (RFFE). In some aspects, modem 210 also includes one or more processors, processing blocks, or processing elements (hereinafter “processor 212”) and one or more storage blocks or elements (hereinafter “memory 214”).

[0041] In some respects, processor 212 may process any of the protocol stack layers associated with radio access technology (RAT). For example, processor 212 may process any of the application layer, packet layer, WLAN protocol stack layer (e.g., link or media access control (MAC) layer) and / or WWAN protocol stack layer (e.g., radio resource control (RRC) layer, packet data convergence protocol (PDCP) layer, radio link control (RLC) layer, and MAC layer).

[0042] Modem 210 may typically be configured to implement the physical (PHY) layer. For example, modem 210 may be configured to modulate packets and output the modulated packets to RF transceiver 250 for transmission over a wireless medium. Modem 210 is similarly configured to receive modulated packets received by RF transceiver 250 and demodulate these packets to provide demodulated packets. In addition to modulators and demodulators, modem 210 may also include digital signal processing (DSP) circuitry, automatic gain control (AGC), decoders, decoders, multiplexers, and / or demultiplexers (not shown).

[0043] As an example, when in transmit mode, modem 210 may obtain data from a data source, such as an application processor. The data may be provided to a decoder, which encodes the data to provide coded bits. The coded bits may be mapped (e.g., using a selected modulation and decoding scheme) to points in a modulation constellation to provide modulated symbols. The modulated symbols may be mapped to, for example, a spatial stream or a space-time stream. The modulated symbols may be multiplexed, transformed via an inverse fast Fourier transform (IFFT) block, and subsequently provided to DSP circuitry for transmit windowing and filtering. The digital signal may be provided to digital-to-analog converter (DAC) 216. In some aspects involving beamforming, the modulated symbols in the corresponding spatial stream may be pre-decoded via a steering matrix before being provided to the IFFT block.

[0044] Modem 210 can be coupled to RF transceiver 250, which includes a transmit (TX) path 218 (also called a transmit chain) for transmitting signals via one or more antennas 220 (hereinafter “antenna 220”) and a receive (RX) path 222 (also called a receive chain) for receiving signals via antenna 220. When TX path 218 and RX path 222 share antenna 220, these paths can be coupled to antenna 220 via interface 224, which can include any of a variety of suitable RF devices, such as antenna tuners, switches, duplexers, dual-signalers, multiplexers, etc. As an example, modem 210 can output digital in-phase (I) baseband signals and / or quadrature (Q) baseband signals representing corresponding symbols to DAC 216.

[0045] Receiving either an I-band analog signal or a Q-band analog signal from DAC 216, TX path 218 may include a baseband filter (BBF) 226, a mixer 228 (which may include one or more mixers), and a power amplifier (PA) 230. BBF 226 filters the baseband signal received from DAC 216, and mixer 228 mixes the filtered baseband signal with a transmit local oscillator (LO) signal to convert the baseband signal to a different frequency (e.g., up-converting from baseband to RF). In some aspects, the frequency conversion process produces a sum and difference frequency between the LO frequency and the frequency of the baseband signal. This sum and difference frequency is called a beat frequency. Some beat frequencies are in the RF range, such that the signal output from mixer 228 is typically an RF signal, which may be amplified by PA 230 before being transmitted via antenna 220. In some aspects, PA 230 includes a harmonic termination circuit 106 that controls the harmonic termination of the PA output, as described herein with respect to Figures 3 to 4. Figure 7Further described. Antenna 220 can transmit RF signals, which can be received at the second wireless device 104. Although a mixer 228 is illustrated, several mixers can be used to upconvert the filtered baseband signal to one or more intermediate frequencies and then upconvert the intermediate frequency signal to the frequency used for transmission.

[0046] RX path 222 may include a low-noise amplifier (LNA) 232, a mixer 234 (which may include one or more mixers), and a baseband filter (BBF) 236. RF signals received via antenna 220 (e.g., from the second wireless device 104) may be amplified by LNA 232, and mixer 234 mixes the amplified RF signal with a received local oscillator (LO) signal to convert the RF signal to a baseband frequency (e.g., down-conversion). The baseband signal output from mixer 234 may be filtered by BBF 236 and then converted to a digital I or Q signal by analog-to-digital converter (ADC) 238 for digital signal processing. Modem 210 may receive the digital I or Q signals and further process these digital signals, for example, demodulating them into information.

[0047] Some transceivers may employ a frequency synthesizer with a voltage-controlled oscillator (VCO) to generate a stable, tunable LO frequency with a specific tuning range. Therefore, the transmit LO frequency can be generated by frequency synthesizer 240, which may be buffered or amplified by an amplifier (not shown) before mixing with the baseband signal in mixer 228. Similarly, the receive LO frequency can be generated by frequency synthesizer 240, which may be buffered or amplified by an amplifier (not shown) before mixing with the RF signal in mixer 234. Separate frequency synthesizers may be used for TX path 218 and RX path 222.

[0048] When in receive mode, modem 210 can acquire the digitally converted signal via ADC 238 and RX path 222. As an example, in modem 210, the digital signal can be provided to DSP circuitry configured to acquire the received signal, for example, by detecting the presence of the signal and estimating the initial timing and frequency offset. The DSP circuitry is also configured to digitally condition the digital signal, for example, using channel (narrowband) filtering, analog impairment conditioning (such as correcting I / Q imbalance), and applying digital gain to ultimately obtain a narrowband signal. The output of the DSP circuitry can be fed to AGC, which is configured to use information extracted from the digital signal (e.g., in one or more received training fields) to determine the appropriate gain. The output of the DSP circuitry can also be coupled to a demodulator configured to extract modulated symbols from the signal and, for example, calculate the log-likelihood ratio (LLR) for each bit location of each subcarrier in each spatial stream. The demodulator can be coupled to a decoder configured to process the LLR to provide decoded bits. The decoded bits from all spatial streams can be fed to a demultiplexer for demultiplexing. The demultiplexed bits can be descrambled and provided to the media access control layer (e.g., processor 212) for processing, evaluation, or interpretation.

[0049] Modem 210 and / or processor 212 can control the transmission of signals via TX path 218 and / or the reception of signals via RX path 222. In some aspects, modem 210 and / or processor 212 can be configured to perform various operations, such as those associated with any of the methods described herein. Modem 210 and / or processor 212 may include a microcontroller, microprocessor, application processor, baseband processor, MAC processor, artificial intelligence processor, digital signal processor (DSP), application-specific integrated circuit (ASIC), field-programmable gate array (FPGA) or other programmable logic device (PLD), discrete gate or transistor logic unit, discrete hardware component, or any combination thereof. Memory 214 may store data and program code (e.g., processor-readable instructions) for performing wireless communications as described herein. In some cases, memory 214 may be external to modem 210 and / or processor 212 and / or incorporated into the modem and / or processor (as illustrated).

[0050] Figure 2 An example transceiver design is illustrated. It will be understood that other transceiver designs or architectures can be applied in conjunction with various aspects of this disclosure. For example, while the examples discussed herein utilize I and Q signals (e.g., quadrature modulation), those skilled in the art will understand that transceiver components can be configured to utilize any other suitable modulation, such as polarity modulation. Furthermore, circuit blocks can be... Figure 2The configurations shown are arranged differently, and / or can be implemented in addition to or in place of the depicted blocks. Figure 2 Other circuit blocks not shown.

[0051] Example harmonic termination for a differential amplifier

[0052] Various aspects of this disclosure provide circuitry for harmonic termination control of differential amplifiers. The harmonic termination circuitry described herein can achieve improved amplifier performance, such as reduced ACLR, reduced EVM, and / or increased PAE.

[0053] Figure 3A An example amplifier circuit 300A with harmonic termination control for multiple harmonics is illustrated. In this example, amplifier circuit 300A includes amplifier 302 and resonant circuit 304. Amplifier circuit 300A can be employed in an RF circuit that includes, for example, a power amplifier (e.g., PA 230), a transceiver (e.g., RF transceiver 250), a transmit chain (e.g., TX path 218), and / or any other suitable amplifier (e.g., LNA 232). As an example, the transceiver may include a transmit chain with amplifier circuit 300A. The transmit chain can be configured to output an RF signal for transmission.

[0054] Amplifier 302 may be or include a linear power amplifier, such as a Class A power amplifier and / or a Class AB power amplifier. Amplifier 302 may be or include a differential amplifier having differential input terminals 306a to 306b and differential output terminals 308a to 308b. The amplifier may be configured to receive a differential input signal, amplify the input signal (e.g., convert the input signal to higher power), and output the amplified differential signal via a first output terminal 308a and a second output terminal 308b. Amplifier 302 may include a variety of different gain elements, such as one or more transistors. As an example, amplifier 302 may include transistor configurations that provide differential outputs, as described herein with respect to... Figure 3B Further description.

[0055] Resonant circuit 304 may be coupled between the first output terminal 308a and the second output terminal 308b of amplifier 302. Resonant circuit 304 and amplifier 302 may be coupled to reference node 318, as described herein relative to... Figure 3BFurther described. The resonant circuit 304 can be tuned to control the harmonic termination of the differential signal output via amplifier 302. For example, the resonant circuit 304 can be configured to suppress one or more harmonics (e.g., second and / or third harmonics) in the differential signal. The resonant circuit 304 can be or includes an energy storage circuit, an inductor-capacitor (FC) circuit, a resistor-inductor-capacitor (RFC) circuit, etc. In this example, the resonant circuit 304 includes a first capacitor 320, a second capacitor 322, a third capacitor 324, a first inductor 326, and a second inductor 328. In some aspects, any of capacitors 320, 322, and 324 can be or include one or more capacitive elements, such as tantalum capacitors, aluminum capacitors, ceramic capacitors, varactor diodes, metal-insulator-metal (MIM) capacitors, metal-oxide-metal (MOM) capacitors, metal-oxide-semiconductor (MOS) capacitors, metal edge capacitors, trench capacitors, junction capacitances of diodes or transistors, etc. Either of the inductors 326 and 328 may be formed of metal or conductive spirals, for example, including circular spiral structures, octagonal spiral structures, symmetrical spiral structures, stacked spiral structures, parallel spirals, etc.

[0056] Figure 3B An example amplifier circuit 300B with harmonic termination control for multiple harmonics is illustrated. In this example, amplifier circuit 300B may be an example of amplifier circuit 300A, and shared components of amplifier circuit 300A are shown accordingly. Amplifier 302 may include a first transistor 310a and a second transistor 310b. In some aspects, each of transistors 310a to 310b may be or include a bipolar junction transistor (BJT), a heterojunction bipolar transistor (HBT), a field-effect transistor (FET), and / or a high electron mobility transistor (HEMT).

[0057] Each of the input terminals 306a to 306b of amplifier 302 corresponds to the base 312a to 312b of the corresponding transistors 310a to 310b, and each of the output terminals 308a to 308b of amplifier 302 corresponds to the collector 314a to 314b of the corresponding transistors 310a to 310b. The first input terminal 306a of amplifier 302 corresponds to or is coupled to the first base 312a of the first transistor 310a, and the second input terminal 306b of amplifier 302 corresponds to or is coupled to the second base 312b of the second transistor 310b. The first output terminal 308a of amplifier 302 corresponds to or is coupled to the first collector 314a of the first transistor 310a, and the second output terminal 308b corresponds to or is coupled to the second collector 314b of the second transistor 310b. The first emitter 316a of the first transistor 310a is coupled to a reference node 318 (e.g., a reference potential or signal ground node), and the second emitter 316b of the second transistor 310b is coupled to the reference node 318.

[0058] The first terminal 330 of the first capacitor 320 is coupled to the first output terminal 308a of the amplifier 302, and the second terminal 332 of the first capacitor 320 is coupled to the first node 334. The third terminal 336 of the second capacitor 322 is coupled to the second output terminal 308b of the amplifier 302, and the fourth terminal 338 of the second capacitor 322 is coupled to the second node 340. The fifth terminal 342 of the first inductor 326 is coupled to the first node 334, and the sixth terminal 344 of the first inductor 326 is coupled to the reference node 318. The seventh terminal 346 of the second inductor 328 is coupled to the second node 340, and the eighth terminal 348 of the second inductor 328 is coupled to the reference node 318. The third capacitor 324 is coupled between the first node 334 and the second node 340. Therefore, in some respects, the third capacitor 324 is coupled between the first inductor 326 and the second inductor 328. As an example, the ninth terminal 350 of the third capacitor 324 is coupled to the first node 334, and the tenth terminal 352 of the third capacitor 324 is coupled to the second node 340.

[0059] In some aspects, the first capacitor 320 and the second capacitor 322 may have symmetrical capacitance. For example, the first capacitor 320 has a first capacitance value, and the second capacitor 322 has a second capacitance value. The first and second capacitance values ​​may be within each other's threshold values ​​(e.g., ±10% of a target value). The first and second capacitance values ​​may be tuned or selected to control or match the impedance at the fundamental frequency (such as the carrier frequency) associated with or in the differential signal. In some aspects, based on the values ​​of the first and second capacitance values, the inductance values ​​of inductors 326, 328 may be tuned or selected to control or suppress the second harmonic in the differential signal or allow the second harmonic to pass through the resonant circuit 304. The inductance values ​​of inductors 326, 328 may be within each other's threshold values ​​(e.g., ±10% of a target value). The third capacitor 324 has a capacitance value that is tuned or selected to at least control the third harmonic associated with or in the differential signal. For example, the resonant circuit 304 may have an impedance at the third harmonic, which is configured to suppress or attenuate the third harmonic or allow the third harmonic to remain in the differential signal (e.g., as a bandpass filter or bandstop filter at the third harmonic). In some aspects, the resonant circuit 304 may have an impedance at the second harmonic, which is configured to suppress or attenuate the second harmonic or allow the second harmonic to remain in the differential signal (e.g., as a bandpass filter or bandstop filter at the second harmonic). Therefore, the multi-harmonic termination of the resonant circuit 304 can achieve improved amplifier performance, such as reduced ACLR, reduced EVM, and / or increased PAE.

[0060] Figure 4A and Figure 4B Example circuit models 400A and 400B of the amplifier circuits depicted in Figure 3 are illustrated for even-mode and odd-mode excitation, respectively. Circuit models 400A and 400B are conceptual views of how amplifier circuits 300A and 300B can operate in even-mode and odd-mode, respectively, and therefore, circuit models 400A and 400B are not examples of actual physical hardware. The components illustrated in circuit models 400A and 400B correspond to the same components in Figure 3.

[0061] refer to Figure 4A In even mode (e.g., when the voltages of the differential input signals are equal), the third capacitor 324 is effectively transparent due to the symmetry of the input excitation. Therefore, in even mode, the first capacitor 320, the second capacitor 322, and the inductors 326 and 328 control the harmonic termination (e.g., the second harmonic termination).

[0062] like Figure 4BAs shown, in odd mode (e.g., when the voltages of the differential input signals have opposite polarities), a virtual ground 418 exists at the mid-plane of circuit model 400B. Therefore, in odd mode, the third capacitor is effectively divided into separate virtual capacitors 424a to 424b, and the virtual capacitors 424a to 424b and inductors 326, 328 are tuned to control the harmonic termination of the third harmonic. For example, the virtual capacitors 424a to 424b and inductors 326, 328 can resonate with inductors 426, 428 to control the harmonic termination of the third harmonic.

[0063] Figure 5A Another example amplifier circuit 500A with harmonic termination control for multiple harmonics is illustrated. In this example, amplifier circuit 500A is similar to amplifier circuits 300A and 300B, and shared components of amplifier circuits 300A and 300B are shown accordingly. However, amplifier circuit 500A also includes a third inductor 554 and a fourth inductor 556. The third inductor 554 is coupled between a first node 534 and a third capacitor 324, and the fourth inductor 556 is coupled between a second node 340 and the third capacitor 324. That is, the first inductor 326 and the third capacitor 324 are coupled to the first node 334 via the third inductor 554, and the second inductor 328 and the third capacitor 324 are coupled to the second node 340 via the fourth inductor 556.

[0064] Figure 5B Another example amplifier circuit 500B with harmonic termination control for multiple harmonics is illustrated. In this example, amplifier circuit 500B is similar to amplifier circuit 300B, and correspondingly, the shared components of amplifier circuit 300B are shown. However, amplifier circuit 500B also includes a fourth capacitor 558 and a fifth capacitor 560. The fourth capacitor 558 may be coupled between the first inductor 326 and the first node 334, and the fifth capacitor 560 may be coupled between the second inductor 328 and the second node 340.

[0065] Figure 6A Another example amplifier circuit 600A with harmonic termination control for multiple harmonics is illustrated. In this example, amplifier circuit 600A is similar to amplifier circuit 300B, and the shared components of amplifier circuit 300B are shown accordingly. However, amplifier circuit 600A also includes a fifth inductor 662 coupled between reference node 318 and other inductors 326, 328.

[0066] Figure 6BAnother example amplifier circuit 600B with harmonic termination control for multiple harmonics is illustrated. In this example, amplifier circuit 600B is similar to amplifier circuit 300B, and the shared components of amplifier circuit 300B are shown accordingly. However, amplifier circuit 600B also includes a third inductor 654, a fourth inductor 656, and a fifth inductor 662. The third inductor 654 is coupled between the first node 334 and the third capacitor 324, and the fourth inductor 656 is coupled between the second node 340 and the third capacitor 324. The fifth inductor 662 is coupled between the reference node 318 and the other inductors 326, 328. In some cases, amplifier circuit 600B can be considered as Figure 5A and Figure 6A A combination of amplifier circuits of 500A and 600A.

[0067] Figure 7 An example operation 700 for harmonic termination control of an amplifier is illustrated. Operation 700 can be performed, for example, by an amplifier circuit (such as amplifier circuits 300A, 300B, 500A, 500B, 600A, or 600B). In some aspects, the amplifier circuit may be included in a transceiver, such as... Figure 2 RF transceiver 250.

[0068] Operation 700 may optionally begin at block 702, wherein the amplifier circuit outputs the amplified differential signal via the first and second output terminals of the amplifier.

[0069] At box 704, the amplifier circuit uses a resonant circuit coupled between the first and second output terminals of the amplifier to control the harmonic termination of the differential signal. The resonant circuit may be, or includes, as described herein with respect to Figure 3. Figure 5A , Figure 5B , Figure 6A and Figure 6B Any of the resonant circuits described herein. To control harmonic termination, an amplifier circuit may use a resonant circuit to suppress (e.g., attenuate) one or more harmonics in a differential signal. In some aspects, to control harmonic termination, the amplifier circuit may allow harmonics (e.g., a second harmonic) to pass through the resonant circuit. These one or more harmonics may include one or more of the second or third harmonic of the fundamental frequency in the differential signal. For example, the fundamental frequency may include the carrier frequency.

[0070] At box 706, a transceiver (e.g., RF transceiver 250) can transmit a signal based on an amplified differential signal (e.g., a single-ended signal), wherein the transceiver includes an amplifier. For example, the transceiver can transmit to another wireless communication device (e.g., Figure 1The second wireless device (any of the second wireless devices 104 depicted) transmits a signal. The signal may indicate (or carry) any information of various kinds, such as data and / or control information.

[0071] The aspects of this disclosure can be applied to any of the various wireless communication devices that can use the amplifier with harmonic termination described herein to perform signal amplification.

[0072] Example

[0073] Specific implementation examples are described in the following numbered clauses: Aspect 1: An apparatus configured for wireless communication, the apparatus comprising: an amplifier configured to output a differential signal via a first output terminal and a second output terminal; and a resonant circuit coupled between the first output terminal and the second output terminal of the amplifier, the resonant circuit comprising: a first capacitor having a first terminal and a second terminal, the first terminal of the first capacitor coupled to the first output terminal of the amplifier, and the second terminal of the first capacitor coupled to a first node; a second capacitor having a third terminal and a fourth terminal, the third terminal of the second capacitor coupled to the second output terminal of the amplifier, and the fourth terminal of the second capacitor coupled to a second node; a first inductor having a fifth terminal and a sixth terminal, the fifth terminal of the first inductor coupled to the first node; a second inductor having a seventh terminal and an eighth terminal, the seventh terminal of the second inductor coupled to the second node; and a third capacitor coupled between the first node and the second node.

[0074] Aspect 2: The apparatus according to aspect 1, wherein the resonant circuit is configured to control the impedance of the resonant circuit at one or more harmonics in the differential signal.

[0075] Aspect 3: The apparatus according to aspect 2, wherein the one or more harmonics include one or more of the second harmonic or the third harmonic.

[0076] Aspect 4: The apparatus according to any one of aspects 1 to 3, wherein: the first capacitor has a first capacitance value; the second capacitor has a second capacitance value; and the first capacitance value and the second capacitance value are within each other's threshold values.

[0077] Aspect 5: The apparatus according to aspect 4, wherein the first capacitance value and the second capacitance value are tuned to control the impedance of the resonant circuit at the fundamental frequency associated with the differential signal.

[0078] Aspect 6: The apparatus according to any one of aspects 1 to 5, wherein the third capacitor includes a ninth terminal and a tenth terminal, the ninth terminal of the third capacitor being coupled to the first node, and the tenth terminal of the third capacitor being coupled to the second node.

[0079] Aspect 7: The apparatus according to any one of aspects 1 to 6, wherein the third capacitor has a capacitance value that is tuned to control the impedance of the resonant circuit at the third harmonic associated with the differential signal.

[0080] Aspect 8: The apparatus according to aspect 6 or 7, wherein: the fifth terminal of the first inductor is coupled to the ninth terminal of the third capacitor and the second terminal of the first capacitor; the sixth terminal of the first inductor is coupled to a reference node; the seventh terminal of the second inductor is coupled to the tenth terminal of the third capacitor and the fourth terminal of the second capacitor; and the eighth terminal of the second inductor is coupled to the reference node.

[0081] Aspect 9: The apparatus according to aspect 8, wherein the amplifier comprises: a first transistor including a first collector and a first emitter, wherein a first output terminal corresponds to the first collector of the first transistor; and a second transistor including a second collector and a second emitter, wherein a second output terminal corresponds to the second collector of the second transistor.

[0082] Aspect 10: The apparatus according to aspect 9, wherein: the first emitter of the first transistor is coupled to the reference node; and the second emitter of the second transistor is coupled to the reference node.

[0083] Aspect 11: The apparatus according to any one of aspects 1 to 10, the apparatus further comprising a transceiver including the amplifier.

[0084] Aspect 12: The apparatus according to aspect 11, wherein the transceiver includes a transmit chain having the amplifier.

[0085] Aspect 13: The apparatus according to any one of aspects 1 to 12, wherein the amplifier comprises a linear power amplifier.

[0086] Aspect 14: A method for harmonic termination control of an amplifier, the method comprising: outputting an amplified differential signal via a first output terminal and a second output terminal of the amplifier; and controlling the harmonic termination of the differential signal using a resonant circuit coupled between the first output terminal and the second output terminal of the amplifier, the resonant circuit comprising: a first capacitor having a first terminal and a second terminal, the first terminal of the first capacitor being coupled to the first output terminal of the amplifier, and the second terminal of the first capacitor being coupled to a first node; a second capacitor having a third terminal and a fourth terminal, the third terminal of the second capacitor being coupled to the second output terminal of the amplifier, and the fourth terminal of the second capacitor being coupled to a second node; a first inductor having a fifth terminal and a sixth terminal, the fifth terminal of the first inductor being coupled to the first node; a second inductor having a seventh terminal and an eighth terminal, the seventh terminal of the second inductor being coupled to the second node; and a third capacitor coupled between the first node and the second node.

[0087] Aspect 15: According to the method of aspect 14, controlling the harmonic termination includes: using the resonant circuit to control the impedance of the resonant circuit at one or more harmonics in the differential signal.

[0088] Aspect 16: According to the method of aspect 15, the one or more harmonics include one or more of the second harmonic or the third harmonic.

[0089] Aspect 17: The method according to any one of aspects 14 to 16, wherein: the first capacitor has a first capacitance value; the second capacitor has a second capacitance value; and the first capacitance value and the second capacitance value are within each other's threshold values.

[0090] Aspect 18: According to the method of aspect 17, wherein the first capacitance value and the second capacitance value are tuned to control the impedance of the resonant circuit at the fundamental frequency associated with the differential signal.

[0091] Aspect 19: The method according to any one of aspects 14 to 18, wherein the third capacitor includes a ninth terminal and a tenth terminal, the ninth terminal of the third capacitor being coupled to the first node, and the tenth terminal of the third capacitor being coupled to the second node.

[0092] Aspect 20: The method according to any one of aspects 14 to 19, wherein the third capacitor has a capacitance value that is tuned to at least control the impedance of the resonant circuit at the third harmonic associated with the differential signal.

[0093] Aspect 21: The method according to aspect 19 or 20, wherein: the fifth terminal of the first inductor is coupled to the ninth terminal of the third capacitor and the second terminal of the first capacitor; the sixth terminal of the first inductor is coupled to a reference node; the seventh terminal of the second inductor is coupled to the tenth terminal of the third capacitor and the fourth terminal of the second capacitor; and the eighth terminal of the second inductor is coupled to the reference node.

[0094] Aspect 22: According to the method of aspect 21, the amplifier includes: a first transistor including a first collector and a first emitter, wherein the first output terminal corresponds to the first collector of the first transistor; and a second transistor including a second collector and a second emitter, wherein the second output terminal corresponds to the second collector of the second transistor.

[0095] Aspect 23: According to the method of aspect 22, wherein: the first emitter of the first transistor is coupled to the reference node; and the second emitter of the second transistor is coupled to the reference node.

[0096] Aspect 24: The method according to any one of aspects 14 to 23, the method further comprising: transmitting the amplified differential signal via a transceiver including the amplifier.

[0097] Aspect 25: The method according to aspect 24, wherein the transceiver includes a transmit chain having the amplifier.

[0098] Aspect 26: The method according to any one of aspects 14 to 25, wherein the amplifier comprises a linear power amplifier.

[0099] Aspect 27: A transceiver comprising: a transmit chain configured to output a radio frequency signal for transmission, wherein the transmit chain includes: an amplifier configured to output a differential signal via a first output terminal and a second output terminal; and a resonant circuit coupled between the first output terminal and the second output terminal of the amplifier, wherein the resonant circuit includes: a first capacitor having a first terminal and a second terminal, the first terminal of the first capacitor coupled to the first output terminal of the amplifier, and the second terminal of the first capacitor coupled to a first node; a second capacitor having a third terminal and a fourth terminal, the third terminal of the second capacitor coupled to the second output terminal of the amplifier, and the fourth terminal of the second capacitor coupled to a second node; a first inductor having a fifth terminal and a sixth terminal, the fifth terminal of the first inductor coupled to the first node; a second inductor having a seventh terminal and an eighth terminal, the seventh terminal of the second inductor coupled to the second node; and a third capacitor coupled between the first node and the second node.

[0100] Aspect 28: An apparatus comprising components for performing the method according to any one of aspects 14 to 26.

[0101] Additional Notes

[0102] The foregoing description is provided to enable any person skilled in the art to practice the various aspects described herein. The examples discussed herein do not limit the scope, applicability, or aspects set forth in the claims. Various modifications to these aspects will be apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects. For example, the function and arrangement of the elements discussed may be changed without departing from the scope of this disclosure. Various processes or components may be omitted, substituted, or added as appropriate in various examples. For example, the described methods may be performed in a different order than described, and various actions may be added, omitted, or combined. Furthermore, features described with respect to some examples may be combined in others. For example, any number of aspects set forth herein may be used to implement an apparatus or practice. Moreover, the scope of this disclosure is intended to cover such apparatuses or methods practiced using other structures, functionalities, or structures and functionalities that complement or replace the various aspects of this disclosure set forth herein. It should be understood that any aspect of this disclosure disclosed herein may be embodied by one or more elements of these claims.

[0103] The various exemplary logic blocks, modules, and circuits described in this disclosure can be implemented or executed using microcontrollers, microprocessors, general-purpose processors, artificial intelligence (AI) processors, digital signal processors (DSPs), ASICs, field-programmable gate arrays (FPGAs) or other programmable logic devices (PLDs), discrete gate or transistor logic components, discrete hardware components, or any combination thereof, designed to perform the functions described herein. A general-purpose processor may be a microprocessor, but in alternatives, the processor may be any commercially available processor, controller, microcontroller, or state machine. The processor may also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors working in conjunction with a DSP core, a system-on-a-chip (SoC), a system-in-package (SiP), or any other such configuration.

[0104] As used in this article, the phrase “at least one of” in a list of items refers to any combination of those items, including a single member. For example, “at least one of a, b, or c” is intended to cover a, b, c, ab, ac, bc, and abc, as well as any combination with multiple identical elements (e.g., aa, aaa, aab, aac, abb, acc, bb, bbb, bbb, bbc, cc, and ccc, or any other ordering of a, b, and c).

[0105] As used herein, the term "determine" encompasses a wide variety of actions. For example, "determine" can include calculation, computation, processing, derivation, research, searching (e.g., searching in a table, database, or other data structure), assertion, etc. Additionally, "determine" can include receiving (e.g., receiving information), accessing (e.g., accessing data in memory), etc. Furthermore, "determine" can include parsing, selecting, picking, building, etc.

[0106] As used herein, unless otherwise stated, “coupled to” and “coupled with” generally encompass both direct and indirect coupling (e.g., including intermediate aspects of coupling). For example, stating that a processor is coupled to memory allows for direct coupling or coupling via an intermediate aspect such as a bus.

[0107] The methods disclosed herein include one or more actions for implementing the methods. These actions may be interchanged without departing from the scope of the claims. In other words, unless a specific order of actions is specified, the order and / or use of a particular action may be modified without departing from the scope of the claims. Furthermore, the various operations of the methods described above may be performed by any suitable component capable of performing the corresponding function. This component may include various hardware and / or software components and / or modules, including but not limited to circuits, application-specific integrated circuits (ASICs), or processors.

[0108] The following claims are not intended to be limited to the aspects shown herein, but should be given the full scope consistent with the language of the claims. References to singular elements are not intended to mean “only one” (unless specifically stated as “only one”), but rather “one or more”. Unless otherwise specified, definite articles (e.g., “the” or “described”) subsequently used with an element (e.g., “processor”) are not intended to give that element a singular meaning (e.g., “only one”). For example, unless otherwise specified, references to elements (e.g., “processor”, “controller”, “memory”, “transceiver”, “antenna”, “the processor”, “the controller”, “the memory”, “the transceiver”, “the antenna”, etc.) should be understood to refer to one or more elements (e.g., “one or more processors”, “one or more controllers”, “one or more memories”, “one or more transceivers”, etc.). The terms “set” and “group” are intended to include one or more elements and may be used interchangeably with “one or more”. In the case of references to one or more elements performing a function (e.g., steps of a method), one element may perform all the functions, or more than one element may collectively perform those functions. When more than one element performs these functions together, each function does not need to be performed by every single element (e.g., different functions can be performed by different elements), and / or each function does not need to be performed by only one element as a whole (e.g., different elements can perform different sub-functions of a function). Similarly, when referring to one or more elements configured to cause another element (e.g., a device) to perform a function, one element may be configured to cause another element to perform all functions, or more than one element may be jointly configured to cause another element to perform these functions. Unless otherwise specifically stated, the term "some" means one or more. All structural and functional equivalents of the elements of the various aspects described throughout this disclosure that are currently or hereafter known to those skilled in the art are intended to be covered by the claims. Furthermore, nothing disclosed herein is intended to be offered to the public, whether or not such disclosure is explicitly recited in the claims.

Claims

1. An apparatus configured for wireless communication, the apparatus comprising: An amplifier configured to output a differential signal via a first output terminal and a second output terminal; and A resonant circuit, coupled between the first output terminal and the second output terminal of the amplifier, the resonant circuit comprising: A first capacitor having a first terminal and a second terminal, the first terminal of the first capacitor being coupled to the first output terminal of the amplifier, and the second terminal of the first capacitor being coupled to a first node; A second capacitor having a third terminal and a fourth terminal, the third terminal of the second capacitor being coupled to the second output terminal of the amplifier, and the fourth terminal of the second capacitor being coupled to a second node; A first inductor having a fifth terminal and a sixth terminal, wherein the fifth terminal of the first inductor is coupled to the first node; A second inductor having a seventh terminal and an eighth terminal, the seventh terminal of the second inductor being coupled to the second node; and A third capacitor is coupled between the first node and the second node.

2. The apparatus of claim 1, wherein the resonant circuit is configured to control the impedance of the resonant circuit at one or more harmonics in the differential signal.

3. The apparatus of claim 2, wherein the one or more harmonics include one or more of the second harmonic or the third harmonic.

4. The apparatus according to claim 1, wherein: The first capacitor has a first capacitance value; The second capacitor has a second capacitance value; and The first capacitance value and the second capacitance value are within each other's threshold values.

5. The apparatus of claim 4, wherein the first capacitance value and the second capacitance value are tuned to control the impedance of the resonant circuit at the fundamental frequency associated with the differential signal.

6. The apparatus of claim 1, wherein the third capacitor includes a ninth terminal and a tenth terminal, the ninth terminal of the third capacitor being coupled to the first node, and the tenth terminal of the third capacitor being coupled to the second node.

7. The apparatus of claim 1, wherein the third capacitor has a capacitance value that is tuned to at least control the impedance of the resonant circuit at the third harmonic associated with the differential signal.

8. The apparatus according to claim 6, wherein: The fifth terminal of the first inductor is coupled to the ninth terminal of the third capacitor and the second terminal of the first capacitor; The sixth terminal of the first inductor is coupled to the reference node; The seventh terminal of the second inductor is coupled to the tenth terminal of the third capacitor and the fourth terminal of the second capacitor; and The eighth terminal of the second inductor is coupled to the reference node.

9. The apparatus of claim 8, wherein the amplifier comprises: A first transistor, the first transistor including a first collector and a first emitter, wherein the first output terminal corresponds to the first collector of the first transistor; and The second transistor includes a second collector and a second emitter, wherein the second output terminal corresponds to the second collector of the second transistor.

10. The apparatus according to claim 9, wherein: The first emitter of the first transistor is coupled to the reference node; and The second emitter of the second transistor is coupled to the reference node.

11. The apparatus of claim 1, further comprising a transceiver including the amplifier.

12. The apparatus of claim 11, wherein the transceiver includes a transmit chain having the amplifier.

13. The apparatus of claim 1, wherein the amplifier comprises a linear power amplifier.

14. A transceiver, the transceiver comprising: A transmission chain configured to output a radio frequency signal for transmission, wherein the transmission chain includes: an amplifier configured to output a differential signal via a first output terminal and a second output terminal; and a resonant circuit coupled between the first output terminal and the second output terminal of the amplifier, wherein the resonant circuit includes: A first capacitor having a first terminal and a second terminal, the first terminal of the first capacitor being coupled to the first output terminal of the amplifier, and the second terminal of the first capacitor being coupled to a first node; A second capacitor having a third terminal and a fourth terminal, the third terminal of the second capacitor being coupled to the second output terminal of the amplifier, and the fourth terminal of the second capacitor being coupled to a second node; A first inductor having a fifth terminal and a sixth terminal, wherein the fifth terminal of the first inductor is coupled to the first node; A second inductor having a seventh terminal and an eighth terminal, the seventh terminal of the second inductor being coupled to the second node; and A third capacitor is coupled between the first node and the second node.

15. A method for harmonic termination control of an amplifier, the method comprising: The amplified differential signal is output via the first and second output terminals of the amplifier; as well as The harmonic termination of the differential signal is controlled using a resonant circuit coupled between the first output terminal and the second output terminal of the amplifier, the resonant circuit comprising: A first capacitor having a first terminal and a second terminal, the first terminal of the first capacitor being coupled to the first output terminal of the amplifier, and the second terminal of the first capacitor being coupled to a first node; A second capacitor having a third terminal and a fourth terminal, the third terminal of the second capacitor being coupled to the second output terminal of the amplifier, and the fourth terminal of the second capacitor being coupled to a second node; A first inductor having a fifth terminal and a sixth terminal, wherein the fifth terminal of the first inductor is coupled to the first node; A second inductor having a seventh terminal and an eighth terminal, the seventh terminal of the second inductor being coupled to the second node; and A third capacitor is coupled between the first node and the second node.

16. The method of claim 15, wherein controlling the harmonic terminal comprises: The resonant circuit is used to control the impedance of the resonant circuit at one or more harmonics in the differential signal.

17. The method of claim 16, wherein the one or more harmonics include one or more of a second harmonic or a third harmonic.

18. The method according to claim 15, further comprising: A signal based on the amplified differential signal is transmitted via a transceiver including the amplifier.

19. The method of claim 18, wherein the transceiver comprises a transmit chain having the amplifier.

20. The method of claim 15, wherein the amplifier comprises a linear power amplifier.

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