Apparatus and method for reconfigurable analog input monitoring

Abstract

An ADC system can include an ADC, a comparator, a voltage source, a comparator output polarity control circuit, and a comparator output counter. An analog input signal can be input to a first input of the comparator, and an output of the voltage source can be input to a second input of the comparator. The comparator can generate an output to the comparator output polarity control circuit, and the comparator output counter can count clock cycles when the comparator output is asserted, and can assert a monitor output based on the comparator output counter value. The monitor output can be an interrupt, an alarm, or other system warning, and can control system operation.

Description

priority

[0001] This application claims priority to jointly owned Indian Provisional Patent Application No. 202311077542, filed on 14 November 2023, the entire contents of which are incorporated herein by reference for all purposes. Technical Field

[0002] This disclosure relates to devices and methods for reconfigurable analog input monitoring. Background Technology

[0003] An analog-to-digital converter (ADC) is used to convert analog input signals into digital codes for processing and monitoring by a microcontroller or other processor. A microcontroller can be a system-on-a-chip (SoC), which typically includes a processor, memory, multiple input / output ports, and various peripherals. Specifically, various peripherals may be provided, such as configurable logic units, complementary waveform / output generators, dedicated arithmetic units, numerically controlled oscillators, and programmable switch-mode controllers. A microcontroller may include a host controller that communicates with peripherals via communication protocols. A microcontroller may include a digital processor with memory and multiple programmable input and output ports. A microcontroller may be a host device capable of communicating with one or more auxiliary devices.

[0004] In one example of various examples, the analog input signal can be monitored to ensure it remains within predetermined limits. In another example, a threshold level can be set, and the analog input signal can be monitored to determine whether it is above or below the threshold level. Determining whether the associated analog input signal remains within those predetermined limits or above or below the threshold level may require time-consuming and energy-intensive processing.

[0005] Additionally, in examples where analog signals are continuously monitored (such as continuously monitoring temperature signals when identifying thermal overload conditions), significant power is consumed in continuously converting the analog signals. The microcontroller or processor may continuously interrupt its processing to handle data from the converter, even when the data from the converter is far below any threshold level. As one example among various examples, an ADC may monitor a temperature signal and continuously convert the temperature signal even when the associated temperature value is far below the thermal overload condition. This wastes power and increases the processing load on the microcontroller or processor.

[0006] An ADC system is needed that can monitor the input signal and perform a conversion only when the analog signal meets predetermined conditions. Summary of the Invention

[0007] The examples in this paper implement a device and method for monitoring input signals in an ADC system.

[0008] According to one aspect, an apparatus includes an analog-to-digital converter (ADC) for receiving at least one analog input signal. The apparatus includes a voltage source for generating a threshold voltage based on predetermined conditions. The apparatus includes a comparator for receiving the threshold voltage and generating a comparator output based on a comparison of the at least one analog input signal with the threshold voltage. The apparatus includes comparator output polarity control circuitry for generating and setting a polarity configuration based on the comparator output. The apparatus includes a comparator output counter for counting edges of a clock signal based on the output of the comparator output polarity control circuitry, the count including a comparator output counter value. The comparator output counter generates one or more monitor outputs based on the comparator output counter value.

[0009] According to one aspect, a system includes an analog-to-digital converter (ADC) for receiving at least one analog input signal. The system includes a voltage source for generating a threshold voltage based on predetermined conditions. The system includes a switch for selectively coupling at least one analog input signal to a comparator for receiving the threshold voltage. The comparator generates a comparator output based on a comparison of the at least one analog input signal with the threshold voltage. The system includes comparator output polarity control circuitry for generating an output based on the comparator output and a polarity configuration setting. The system includes a comparator output counter for counting edges of a clock signal based on the output of the comparator output polarity control circuitry, the count including a comparator output counter value. The comparator output counter generates one or more monitor outputs based on the comparator output counter value. The system includes a microcontroller for receiving one or more monitor outputs.

[0010] According to one aspect, a method includes the steps of: configuring a voltage source to output a threshold voltage; comparing an analog input signal with the threshold voltage; obtaining a comparison result; and modifying system operation based on the comparison result. Attached Figure Description

[0011] Figure 1 This is one example of various examples of devices used to monitor analog input signals.

[0012] Figure 2 This is one example of a system used to monitor analog input signals.

[0013] Figure 3 This is one example of various examples of voltage sources.

[0014] Figure 4 An example of a method for monitoring analog input signals is given. Detailed Implementation

[0015] Figure 1 This is one example of various examples of a device 100 for monitoring analog input signals. Device 100 includes a positive analog input signal 101 and a negative analog input signal 102. The positive analog input signal 101 can be coupled to the positive input of an ADC 110 via a switch 103. The negative analog input signal 102 can be coupled to the negative input of an ADC 110 via a switch 104.

[0016] ADC 110 may be a successive approach register (SAR) converter, or it may be another type of converter, including but not limited to flash ADC, Σ-Δ ADC, dual-slope ADC, pipelined ADC, or another type of ADC not specifically mentioned. ADC 110 can generate an output of 199.

[0017] Switch 120 can selectively couple a positive analog input signal 101 to the inverting input of comparator 130. In operation, control signal 121 can control the state of switch 120 and selectively couple the positive analog input signal 101 to comparator 130.

[0018] Switch 103 can be coupled between the positive analog input signal 101 and the positive input of ADC 110. Control signal 123 can control the state of switch 103. Switch 104 can be coupled between the negative analog input signal 102 and the negative input of ADC 110. Control signal 124 can control the state of switch 104.

[0019] The non-inverting input of comparator 130 can be coupled to the output of controllable voltage source 140. In operation, threshold selection setting 141 can be a predetermined condition and can set the output voltage of controllable voltage source 140. Controllable voltage source 140 can output a voltage representing the voltage set by threshold selection setting 141. In one example of various examples, controllable voltage source 140 may include a digital-to-analog converter (DAC), and threshold selection setting 141 may include register settings. Voltage reference 142 can be input to controllable voltage source 140. Threshold selection setting 141 can specify a percentage or ratio of voltage reference 142 as the output of controllable voltage source 140.

[0020] In operation, when the voltage on the positive polarity analog input signal 101 exceeds the output voltage of the controllable voltage source 140, the comparator 130 may output a logic low level at the comparator output 131. The comparator output polarity control circuit 150 may monitor the comparator output 131 and may output a voltage based on the comparator output 131 and the polarity configuration setting 151.

[0021] In one example of various examples, the positive analog input signal 101 may represent the output of a temperature sensor, where a higher voltage on the positive analog input signal 101 may represent a higher temperature. Device 100 may detect over-temperature conditions. In operation, switch 120 may be closed in comparator-only mode, and comparator 130 may monitor the voltage on the positive analog input signal 101 and output a logic low signal when the voltage on the positive analog input signal 101 exceeds the voltage output of controllable voltage source 140. Switches 103 and 104 may be in the open position, and ADC 110 may be in a reset or low-power state. A logic low signal at comparator output 131 may represent an over-temperature condition, and polarity configuration setting 151 may configure comparator output polarity control circuitry 150 to output a positive voltage when a logic low signal is output from comparator 130. In other examples, device 100 may be configured to detect under-temperature conditions. Comparator 130 can monitor the voltage on the positive analog input signal 101 and output a logic high signal when the voltage on the positive analog input signal 101 is lower than the voltage output of the controllable voltage source 140. The logic high signal at comparator output 131 can indicate an under-temperature condition, and polarity configuration setting 151 can configure comparator output polarity control circuit 150 to output a positive voltage when the logic high signal is output from comparator 130.

[0022] In one example of various examples, the positive polarity analog input signal 101 may represent the battery voltage. In operation, comparator 130 may monitor the voltage on the positive polarity analog input signal 101 and may output a logic high signal when the voltage on the positive polarity analog input signal 101 drops below the voltage output of the controllable voltage source 140. The logic high signal at comparator output 131 may represent an undervoltage condition of the battery voltage, and polarity configuration setting 151 may configure comparator output polarity control circuitry 150 to output a positive voltage when the logic high signal is output from comparator 130.

[0023] The comparator output counter circuit 160 counts the cycles of clock input 161, while the output of comparator output polarity control circuit 150 can be logic high and generate a comparator output counter value. After a predetermined number of clock cycles programmed by counter configuration setting 163, the comparator output counter circuit 160 can output a logic high signal at monitor output 162 based on the comparator output counter value. In one example of various examples, if the output of comparator output polarity control circuit 150 transitions to logic low before the comparator output counter circuit 160 counts for a predetermined number of clock cycles, the monitor output 162 can remain at a logic low level. Once the output of comparator output polarity control circuit 150 is detected as logic low for a predetermined number of clock cycles, the monitor output 162 can subsequently transition to a logic low level. The comparator output counter circuit 160 can count for a predetermined number of clock cycles to transition the monitor output 162 to a logic low level programmed by counter configuration setting 163. In one of the various examples, the minimum time interval can be between 62 microseconds and 531 microseconds.

[0024] Monitor output 162 can be input to microcontroller 164, processor, or other control circuitry to control the operation of a larger system. In one example of various examples, in response to a logic high signal on monitor output 162, monitor output 162 enables ADC 110 to initiate analog-to-digital conversion of the positive analog input signal 101 and the negative analog input signal 102. Switches 103 and 104 can be in a closed position during analog-to-digital conversion. Monitor output 162 may include a trigger signal. Monitor output 162 may include multiple monitor output signals, including but not limited to an ADC enable signal and an ADC clock signal. Monitor output 162 can be coupled to ADC 110 and can initiate data conversion in ADC 110.

[0025] In this way, device 100 can enable the low-power analog input monitoring and conversion path via switch 120, comparator 130, controllable voltage source 140, comparator output polarity control circuit 150, comparator output counter circuit 160, and ADC 110. Once the low-power analog input monitoring path triggers monitor output 162, ADC 110 can be enabled to more accurately monitor the positive polarity analog input signal 101 and the negative polarity analog input signal 102 via switches 103 and 104, respectively. Monitor output 162 can similarly trigger other system operations, including but not limited to interrupt service routines. Monitor output 162 can be an alarm signal. Monitor output 162 can be output to an external pin.

[0026] Figure 1An example is illustrated as a differential input with a positive analog input signal 101 and a negative analog input signal 102. In other examples, a single-ended input can be monitored, and the negative analog input signal 102 can be coupled to a ground node. In other examples, a pseudo-differential input can be monitored, and the negative analog input signal 102 can be coupled to a common-mode voltage. Figure 1 An example is illustrated with a positive analog input signal 102 coupled to comparator 130 via switch 120, but this is not intended to be limiting. In other examples, a negative analog input signal 102 may be coupled to comparator 130 via switch 120.

[0027] Figure 1 An example is shown in which a logic high signal on monitor output signal 162 is considered an assertion signal. It should be understood that in other examples, a logic low signal on monitor output signal 162 may be considered an assertion signal. Figure 1 An example is illustrated where a logic high signal on the comparator output polarity control circuit 150 is considered an assertion signal. It should be understood that in other examples, a logic low signal on the comparator output polarity control circuit 150 may be considered an assertion signal. Similarly, the polarity of the inputs to comparator 130 may be set as needed without going out of range.

[0028] Figure 2 Another example of a device 200 for monitoring analog input signals is illustrated. Device 200 includes a positive analog input signal 201 and a negative analog input signal 202. The positive analog input signal 201 can be coupled to the positive input of ADC 210 via switch 203. The negative analog input signal 202 can be coupled to the negative input of ADC 210 via switch 204.

[0029] ADC 210 may be a successive approach register (SAR) converter, or it may be another type of converter, including but not limited to flash ADC, Σ-Δ ADC, dual-slope ADC, pipelined ADC, or another type of ADC not specifically mentioned. ADC 210 can generate an output of 299.

[0030] Switch 220 can selectively couple a positive analog input signal 201 to the inverting input of comparator 230. In operation, control signal 221 can control the state of switch 220 and selectively couple the positive analog input signal 201 to comparator 230.

[0031] Switch 203 can be coupled between the positive analog input signal 201 and the positive input of ADC 210. Control signal 223 can control the state of switch 203. Switch 204 can be coupled between the negative analog input signal 202 and the negative input of ADC 210. Control signal 224 can control the state of switch 204.

[0032] The non-inverting input of comparator 230 can be coupled to the output of controllable voltage source 240. Voltage reference 242 can be input to controllable voltage source 240. In operation, threshold selection setting 241 can set the output voltage of controllable voltage source 240. Controllable voltage source 240 can output a voltage representing the voltage set by threshold selection setting 241. In one example of various examples, controllable voltage source 240 may include a digital-to-analog converter (DAC), and threshold selection setting 241 may include register settings. Controllable voltage source 240 can output voltage based on a percentage of voltage reference 242.

[0033] During operation, when the voltage on the positive polarity analog input signal 201 exceeds the output voltage of the controllable voltage source 240, the comparator 230 can output a logic low level at the comparator output 231. The comparator output polarity control circuit 250 can monitor the comparator output 231 and can output a voltage based on the comparator output 231 and the polarity configuration setting 251.

[0034] In one example of various examples, the positive analog input signal 201 may represent the output of a temperature sensor, where a higher voltage on the positive analog input signal 201 may represent a higher temperature. Device 200 may be configured to detect over-temperature conditions. In operation, switch 220 may be closed, and comparator 230 may monitor the voltage on the positive analog input signal 201 and may output a logic low signal when the voltage on the positive analog input signal 201 exceeds the voltage output of the controllable voltage source 240. The logic low signal at comparator output 231 may represent an over-temperature condition, and polarity configuration setting 251 may configure comparator output polarity control circuitry 250 to output a positive voltage when a logic low signal is output from comparator 230. In other examples, device 200 may be configured to detect under-temperature conditions. Comparator 230 may monitor the voltage on the positive analog input signal 201 and may output a logic high signal when the voltage on the positive analog input signal 201 is lower than the voltage output of the controllable voltage source 240. The logic high signal at comparator output 231 can represent an undertemperature condition, and the polarity configuration setting 251 can configure the comparator output polarity control circuit 250 to output a positive voltage when the logic high signal is output from comparator 230.

[0035] The comparator output counter circuit 260 counts the cycles of the clock input 261, while the output of the comparator output polarity control circuit 250 can be logic high. After a predetermined number of clock cycles, the comparator output counter circuit 260 can output a logic high signal at the monitor output 262. The number of clock cycles can be specified by the counter configuration setting 263. The monitor output 262 can trigger a conversion in the ADC 210. Switches 203 and 204 can be in the closed position during analog-to-digital conversion. Once the output of the comparator output polarity control circuit 250 is detected as logic low for a predetermined number of clock cycles, the monitor output 262 can transition to a logic low level.

[0036] Monitor output 262 may be coupled to control circuitry 270. Control circuitry 270 may include internal trigger circuitry 290. Internal trigger circuitry 290 may receive input from monitoring circuitry 265 based on monitor output 262 and may generate internal trigger signal 295 based on one or more configuration settings. In one example of various examples, internal trigger configuration setting 291 may configure internal trigger circuitry 290 to assert internal trigger signal 295 when monitor output 262 is asserted. Internal trigger signal 295 may be an interrupt signal, a general purpose input / output (GPIO) signal, an alarm or warning signal, a trigger signal for ADC 210 to initiate data conversion, or another type of signal not specifically mentioned. Switches 203 and 204 may be in a closed position during analog-to-digital conversion.

[0037] Control circuitry 270 may include external trigger circuitry 280. External trigger circuitry 280 may receive input from monitoring circuitry 265 based on monitor output 262 and may generate external trigger signal 285 based on one or more configuration settings. In one example of various examples, external trigger configuration setting 281 may configure external trigger circuitry 280 to assert external trigger signal 285 when monitor output 262 is asserted. External trigger signal 285 may be an interrupt signal, a general purpose input / output (GPIO) signal, or another type of signal not specifically mentioned.

[0038] ADC control signal 275 can be output from control circuit 270 and can enable ADC 210 based on monitor output 262. ADC control signal 275 may include an ADC enable signal and an ADC clock signal coupled to ADC 210.

[0039] In this way, device 200 can assert external trigger signal 285 and internal trigger signal 295 based on positive polarity analog input signal 201.

[0040] Monitoring circuit 265 can receive a trigger signal from external input 268. External input 268 can be a general purpose input-output (GPIO) pin, or it can be another pin configured as an input. Monitoring circuit 265 can assert the ADC control signal 275 based on external input 268. Based on the assertion of ADC control signal 275, switch 220 can be in the open position, and switches 203 and 204 can be in the closed position. In this way, external input 268 can trigger a conversion in ADC 210, and the conversion output can be updated at output 299.

[0041] Once the low-power monitoring path triggers the monitor output 262, the ADC 210 can be enabled by the ADC control signal 275 to more accurately monitor the positive analog input 201 and the negative analog input signal 202.

[0042] Figure 2 An example is illustrated as a differential input with a positive analog input signal 201 and a negative analog input signal 202. In other examples, a single-ended input can be monitored, and the negative analog input signal 202 can be coupled to a ground node. In other examples, a pseudo-differential input can be monitored, and the negative analog input signal 202 can be coupled to a common-mode voltage.

[0043] Figure 3 This is one example of various examples of voltage source 300. Voltage source 300 can be as shown in the reference. Figure 1 One example of the various examples of the controllable voltage source 140 described and illustrated. Figure 3 The illustrated voltage source 300 may be implemented as a series of resistors, but this is not intended to be limiting. Other examples of the controllable voltage source 140 may be a DAC, a voltage-controlled voltage source, a current-controlled voltage source, or another implementation not specifically mentioned.

[0044] Reference voltage 310 may be coupled to one end of the resistor network. Reference voltage 310 may be provided by an external reference circuit, an internal reference circuit, a GPIO pin, or another circuit not specifically mentioned. The resistor network may consist of multiple resistors connected in series. Multiple resistors 320, 321, 322, and 323 may be coupled in series between reference voltage 310 and ground node 325.

[0045] Figure 3 The example shown includes four resistors, but this is not intended to be limiting. Other examples may include more than four resistors or fewer than four resistors.

[0046] The voltage at each node of the resistor string can be output to the multiplexer 330. Resistors in the resistor network can have different values. Alternatively, all resistors in the resistor network can have the same value.

[0047] The multiplexer 330 can select a node of the resistor string based on a threshold selection setting 340. The threshold selection setting 340 can be as shown in the reference... Figure 1 One example of the various examples of the threshold selection setting 141 described and illustrated.

[0048] The output voltage 350 can be selected by the threshold selection setting 340.

[0049] In operation, the threshold selection setting 340 can be a programmable register setting that allows for selectable voltage output. Figure 3 In the illustrated example, threshold selection setting 340 can select a voltage output equal to one-quarter of the reference voltage 310. Multiplexer 330 can select the node between resistors 322 and 323, which will represent one-quarter of the reference voltage 310.

[0050] In other examples, threshold selection setting 340 allows you to select a voltage output that is a percentage of the reference voltage 310.

[0051] Figure 4 An example of a method for monitoring analog input signals is given.

[0052] At operation 410, the voltage source can be configured to output a threshold voltage. The threshold voltage level can be set by a configuration register, by a GPIO pin, by software programming, or by another method not specifically mentioned.

[0053] At operation 420, the analog input can be compared to a threshold voltage. A comparator circuit, an operational amplifier, or another method not specifically mentioned can be used to compare the analog input.

[0054] At operation 430, the comparison result can be obtained. In one example of various examples, the comparison result may be a logic high level when the analog input voltage exceeds the threshold voltage level for a predetermined duration. In other examples, the comparison result may be a logic low level when the analog input voltage exceeds the threshold voltage level for a predetermined duration.

[0055] At operation 440, system operation can be modified based on the comparison result. In one example of various examples, the ADC can be enabled based on the comparison result. In other examples, the circuit can be enabled or disabled based on the comparison result. In still other examples, interrupt signals or GPIO pins can be asserted.

[0056] Examples of this disclosure may include an apparatus. The apparatus may include an ADC, a voltage source, a comparator, comparator output polarity control circuitry, and a comparator output counter. The ADC may be used to receive at least one analog input signal. A threshold voltage may be based on predetermined conditions. The comparator may be used to receive the threshold voltage and generate a comparator output based on a comparison of at least one analog input signal with the threshold voltage. The comparator output polarity control circuitry may be used to generate an output based on the comparator output and a polarity configuration setting. The comparator output counter may be used to count the edges of a clock signal based on the output of the comparator output polarity control circuitry. The counting may include a comparator output counter value. The comparator output counter may be used to generate one or more monitor outputs based on the comparator output counter value.

[0057] Combining any of the examples above, one or more monitor outputs may include alarm signals.

[0058] Combining any of the examples above, one or more monitor outputs may include an ADC enable signal coupled to the ADC.

[0059] Combining any of the examples above, one or more monitor outputs may include an ADC clock signal coupled to the ADC.

[0060] In conjunction with any of the examples above, the predetermined conditions may include register settings for specifying the threshold voltage level.

[0061] Combining any of the examples above, the threshold voltage may include a percentage of the reference voltage.

[0062] Combining any of the examples above, the output of one or more monitors can be generated based on the comparator output counter value that reflects the minimum time period.

[0063] Examples of this disclosure may include a system. The system may include any of the devices described in the examples above. The system may include a switch for selectively coupling at least one analog input signal to a comparator. The system may include a microcontroller for receiving one or more monitor outputs.

[0064] Combining any of the examples above, one or more monitor outputs can be used to initiate the conversion of at least one analog input signal by the ADC.

[0065] Combining any of the examples above, one or more monitor outputs can reach a predetermined value based on the comparator output counter.

[0066] In conjunction with any of the examples above, the threshold voltage may include the minimum value of at least one analog input signal.

[0067] Examples of this disclosure may include methods performed by any of the example devices or systems described above.

Claims

1. An apparatus, the apparatus comprising: An analog-to-digital converter (ADC) for receiving at least one analog input signal; A voltage source for generating a threshold voltage based on predetermined conditions; A comparator for receiving the threshold voltage and for generating a comparator output based on a comparison of the at least one analog input signal with the threshold voltage; A comparator output polarity control circuit is used to generate an output based on the output of the comparator and based on a polarity configuration setting. and A comparator output counter is configured to: count the edges of a clock signal based on the output of the comparator output polarity control circuit, the count including a comparator output counter value; and generate one or more monitor outputs based on the comparator output counter value.

2. The device according to claim 1, wherein the output of the one or more monitors includes an alarm signal.

3. The device according to any one of claims 1 to 2, wherein the output of the one or more monitors includes an ADC enable signal coupled to the ADC.

4. The device according to any one of claims 1 to 3, wherein the one or more monitor outputs include an ADC clock signal coupled to the ADC.

5. The device according to any one of claims 1 to 4, wherein the predetermined conditions include register settings for specifying threshold voltage levels.

6. The device according to any one of claims 1 to 5, wherein the threshold voltage comprises a percentage of the reference voltage.

7. The device according to any one of claims 1 to 6, wherein the output of the one or more monitors is generated based on the comparator output counter value reflecting the minimum time period.

8. A system comprising: Any one of the devices according to claims 1 to 7; A switch for selectively coupling the at least one analog input signal to the comparator; and A microcontroller for receiving outputs from the one or more monitors.

9. The system of claim 8, wherein the one or more monitor outputs are used to initiate the conversion of the at least one analog input signal by the ADC.

10. The system according to any one of claims 8 to 9, wherein the one or more monitors output a value based on the comparator output counter reaching a predetermined value.

11. The system according to any one of claims 8 to 10, wherein the threshold voltage comprises the minimum value of the at least one analog input signal.

12. A method, the method comprising: Configure the voltage source to output the threshold voltage; The analog input signal is compared with the threshold voltage; Obtain the comparison results; as well as Modify system operations based on the comparison results.

13. The method according to claim 12, wherein configuring the voltage source comprises: The voltage value is set based on register settings.

14. The method according to any one of claims 12 to 13, wherein the threshold voltage is set based on a register.

15. The method according to any one of claims 12 to 14, wherein the threshold voltage comprises a percentage of the reference voltage.

16. The method according to any one of claims 12 to 15, wherein modifying system operation comprises: Assert an alarm signal, which is coupled to the microcontroller.

17. The method according to any one of claims 12 to 16, wherein modifying system operation comprises: This enables the ADC to perform the conversion of the analog input signal.

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