Composite metal foil and metal-clad laminate

Abstract

The application discloses a composite metal foil and a metal-clad laminate, and the composite metal foil comprises a carrier layer, a stripping layer and a functional layer which are sequentially stacked; the functional layer has a pinhole on the side close to the stripping layer after being stripped; the maximum depth H from the top end surface of the pinhole to the lowest point of the bottom end is less than or equal to 2 / 3 of the thickness of the functional layer; the top end surface of the pinhole is located on the side end surface of the functional layer close to the stripping layer; and the lowest point of the bottom end of the pinhole is located in the functional layer away from the stripping layer. Through the design, by limiting the maximum depth of the pinhole on the functional layer, the metal foil residue at the corresponding functional layer at the pinhole is prevented from being too low, the etching process in the pinhole during etching of the circuit can be slowed down, the functional layer residue metal foil at the pinhole position is prevented from being etched away by the etching liquid, the situation that the fine circuit prepared after etching is short-circuited or open-circuited can be significantly reduced, and thus the success rate of etching of the circuit is improved, and the metal foil is more suitable for the fine circuit manufacturing requirement in the high-end electronic field.

Description

Technical Field

[0001] This invention relates to the field of metal foil technology, and more specifically to a composite metal foil and a metal-clad laminate. Background Technology

[0002] Peelable copper foil is a key material used in modern high-end chip manufacturing. As electronic products develop towards higher density and thinner profiles, peelable copper foil is widely used in high-end flexible electronics, IC packaging substrates and other fields, and the requirements for the flatness, peelability and mechanical stability of copper foil are becoming increasingly stringent.

[0003] Existing peelable copper foil typically consists of a carrier layer, a release layer, and a thin copper layer. However, during the application process after preparation, one side of the thin copper layer is usually pressed onto the carrier board, and then the carrier is peeled off. This results in multiple pinholes forming on the surface of the thin copper layer away from the circuit carrier board. Consequently, when the thin copper layer is etched into fine circuits, some of the etching solution will flow into the pinholes, etching away the excess metal foil at the bottom of the pinholes. This can lead to open circuits or broken circuits, affecting the quality of the circuit. Summary of the Invention

[0004] Therefore, the present invention aims to solve the problem that the pinholes formed after peeling of the existing peelable copper foil are easily etched away by the etching solution, resulting in open circuits or broken circuits in the circuit, which in turn affects the circuit quality. The present invention provides a composite metal foil and a metal-clad laminate.

[0005] To solve the above-mentioned technical problems, the technical solution of the present invention is as follows: A composite metal foil includes a carrier layer, a release layer, and a functional layer stacked sequentially. After the functional layer is peeled off from the release layer, it has a pinhole on the side near the release layer. The maximum depth H from the top surface of the pinhole to the lowest point of the bottom surface is less than or equal to 2 / 3 of the thickness of the functional layer. The top surface of the pinhole is located on the end face of the functional layer near the release layer, and the lowest point of the pinhole is located on the side of the functional layer away from the release layer.

[0006] Furthermore, the pinhole has at least 10 wave crest structures distributed circumferentially thereon, and the vertical distance between the apex of the wave crest structure and the low points of the wave troughs on both sides is greater than 1 μm.

[0007] Furthermore, the density of the pinholes on the functional layer is less than or equal to 500 / m. 2 .

[0008] Furthermore, the projected area of ​​the tip surface of the pinhole is less than or equal to 700 μm. 2 .

[0009] Furthermore, after the functional layer is peeled off from the peeling layer, it has a plurality of pinholes on the side near the peeling layer, and the average width of the openings of the plurality of pinholes is less than or equal to 30 μm.

[0010] Furthermore, the roughness Rz of the side of the functional layer away from the peeling layer is 1~2μm.

[0011] Furthermore, the release layer is a composite release layer, comprising an amorphous alloy layer and an organic layer sequentially disposed near the surface of the carrier layer.

[0012] Furthermore, an antioxidant layer is provided on the side of the functional layer away from the peeling layer.

[0013] Furthermore, a heat-resistant layer is provided on the side of the carrier layer away from the peeling layer.

[0014] A metal-clad laminate, said metal-clad laminate being made using the functional layer of a metal foil as described in any of the preceding claims as one of the materials.

[0015] The technical solution of this invention has the following advantages: 1. The composite metal foil provided by the present invention, by limiting the maximum depth of the pinholes on the functional layer, avoids excessively low metal foil allowance at the corresponding functional layer location of the pinhole, which can slow down the etching process inside the pinhole during the etching process and prevent the etching solution from etching away all the remaining metal foil in the functional layer at the pinhole location. This can significantly reduce the occurrence of short circuits or open circuits in the fine circuits prepared after etching, thereby improving the success rate of the etched circuits and making the metal foil more suitable for the fine circuit manufacturing needs of high-end electronic fields. Attached Figure Description

[0016] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0017] Figure 1 This is a cross-sectional view of the composite metal foil provided in this invention; Figure 2 This is a schematic cross-sectional view of the functional layer in this invention; Figure 3 for Figure 2 An enlarged schematic diagram of point A is shown below; Explanation of reference numerals in the attached diagram: 1. Carrier layer; 2. Release layer; 3. Functional layer; 4. Pinhole; 5. Peak; 6. Trough; 7. Antioxidant layer; 8. Heat-resistant layer. Detailed Implementation

[0018] The technical solution of the present invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0019] In the description of this invention, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0020] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0021] Furthermore, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0022] like Figures 1-3 The composite metal foil shown includes a carrier layer 1, a release layer 2, and a functional layer 3 stacked sequentially. After the functional layer 3 is peeled off from the release layer 2, it has a plurality of pinholes 4 on the side near the release layer 2. The maximum depth H from the top surface of the pinhole 4 to the lowest point of the bottom surface is less than or equal to 2 / 3 of the thickness of the functional layer 3. The top surface of the pinhole 4 is located on the side of the functional layer 3 near the release layer 2, and the lowest point of the bottom surface of the pinhole 4 is located on the side of the functional layer 3 away from the release layer 2.

[0023] This composite metal foil, by limiting the maximum depth of the pinholes 4 on the functional layer 3, avoids excessively low metal foil allowance at the corresponding functional layer 3 location of the pinholes 4. This slows down the etching process within the pinholes 4 during the etching process, preventing the etching solution from completely etching away the excess metal foil in the functional layer 3 at the pinhole location. This significantly reduces the occurrence of short circuits or open circuits in the fine circuits prepared after etching, thereby improving the success rate of the etched circuits and making the metal foil more suitable for the fine circuit fabrication needs of high-end electronics.

[0024] In this embodiment, the lowest point of the pinhole 4 can be obtained by means of atomic force microscopy, 3D laser profilometer, scanning electron microscope, machine vision detection, ultrasonic detection, X-ray detection, etc.

[0025] In this embodiment, the pinhole 4 has at least 10 circumferentially distributed wave crests 5. This arrangement creates an undulating, wrinkled contour on the surface of the pinhole 4, further slowing the rate at which the etching solution flows towards the bottom of the pinhole 4 after it enters. This reduces the etching rate of the corresponding functional layer 3 within the pinhole 4, further decreasing the probability of short circuits or open circuits. Specifically, the vertical distance between the apex of the wave crest 5 and the low points of the troughs 6 on either side is greater than 1 μm. This arrangement, by ensuring a height difference between the wave crests 5 and troughs 6 greater than 1 μm, creates sufficient undulation around the pinhole 4, effectively slowing the flow rate of the etching solution and improving the etching rate reduction. Furthermore, the wave crests 5 on the circumference of the pinhole 4 are irregularly arranged, and each wave crest 5 has an irregular shape. This arrangement reduces the smoothness of the etching solution entering the pinhole 4, further slowing its entry rate.

[0026] In this embodiment, the density of pinholes 4 on the functional layer 3 is less than or equal to 500 per m2. By reducing the distribution density of pinholes 4 to no more than 500 per m2, the probability of bottom etching of the functional layer 3 can be effectively reduced, thereby reducing the probability of open circuits or broken circuits in the fine circuits prepared after etching.

[0027] In this embodiment, the projected area of ​​the top surface of the pinhole 4 is less than or equal to 700 μm². By reducing the opening area of ​​the pinhole 4, the amount of etching solution flowing into the pinhole 4 can be further reduced, thereby further slowing down the etching rate of the remaining functional layer 3 inside the pinhole 4 and reducing the probability of short circuits or open circuits.

[0028] Specifically, the methods for testing the projected area of ​​the top surface of pinhole 4 include scanning electron microscopy, metallurgical microscopy, machine vision, ultrasonic testing, X-ray inspection, AOI (Automated Optical Inspection), and CCD (Charge-Coupled Device) inspection. Alternatively, the projected area can be calculated by measuring the average radius or average diameter of pinhole 4. Specifically, the projected area refers to the vertical projected area.

[0029] In this embodiment, after the functional layer 3 is peeled off from the release layer 2, it has multiple pinholes 4 on the side near the release layer 2, and the average width of the opening of the multiple pinholes 4 is less than or equal to 30 μm. By setting it up in this way, by reducing the width of the pinholes 4, the rate at which the etching solution flows into the pinholes 4 can be further reduced, thereby slowing down the etching rate of the remaining functional layer 3 inside the pinholes 4, and thus reducing the probability of short circuits or open circuits in the circuit.

[0030] Specifically, the average width of the pinhole 4 opening is measured as follows: sampling; measuring the opening width of each pinhole 4 on the side of the functional layer 3 near the peeling layer 2 in the SEM electron microscope image; summing up the opening widths of all pinholes 4 and taking the average value, which is the average width of the pinhole 4 opening in the sample; finally, calculating the final average value of the average width of the openings of multiple samples (at least 10) as the final average width of the pinhole 4.

[0031] In this embodiment, the roughness Rz of the side of the functional layer 3 away from the release layer 2 is 1~2μm. This setting ensures sufficient bonding force between the functional layer 3 and other structural layers while giving the functional layer 3 a low profile. It also avoids a large skin effect on the bonding side of the functional layer 3 away from the release layer 2, thereby improving the high-frequency and high-speed performance of the circuit after the functional layer 3 is fabricated.

[0032] In this embodiment, the release layer 2 is a composite release layer 2, which includes an amorphous alloy layer and an organic layer sequentially disposed near the surface of the carrier layer 1.

[0033] With this configuration, a stable interfacial metallurgical bond can be formed between the amorphous alloy layer and the carrier layer 1, and a weaker physical bond can be formed between the amorphous alloy layer and the organic layer, thus avoiding affecting the peeling stability and reducing the number of adhesion points between the functional layer 3 and the carrier layer 1 during peeling, thereby reducing the number of pinholes 4 generated in the functional layer 3 after peeling.

[0034] In this embodiment, an antioxidant layer 7 is provided on the side of the functional layer 3 away from the release layer 2. This arrangement enhances the antioxidant effect of the metal foil before application.

[0035] In this embodiment, a heat-resistant layer 8 is provided on the side of the carrier layer 1 away from the release layer 2. This arrangement enhances the high-temperature resistance of the metal foil during hot pressing, and the heat insulation effect of the heat-resistant layer 8 reduces the heating temperature of the release layer 2, ensuring the thermal stability of the release layer 2.

[0036] Specifically, the heat-resistant layer 8 can be made of polytetrafluoroethylene (PTFE) film, polyimide film (PI film), heat-resistant adhesive, etc. All of these materials possess certain heat resistance properties, effectively protecting the copper foil from heat damage during the lamination process.

[0037] Specifically, in existing circuit fabrication techniques, the side of the functional layer 3 away from the release layer 2 of the metal foil is pressed onto the circuit substrate. Then, the carrier layer 1 is peeled off through the release layer 2, leaving the functional layer 3 on the circuit substrate. At this time, the side of the functional layer 3 closest to the release layer 2 is exposed as the outer surface of the circuit, and several pinholes 4 are formed on this surface. When the etching solution etches the functional layer 3 to form the circuit, some of the etching solution flows into the pinholes 4 and etches the remaining functional layer 3 within the pinholes 4. In the composite metal foil of this invention, after peeling, the maximum depth of the pinholes 4 formed on its surface is shallower than that formed on existing metal foils. The functional layer 3 of the metal foil in this invention has more remaining material at the pinholes 4, which can effectively slow down the etching rate of the etching solution, thereby reducing the probability of short circuits or open circuits and effectively improving the quality of circuit etching.

[0038] A metal-clad laminate is made using the functional layer 3 of the aforementioned metal foil as one of the materials.

[0039] In summary, this composite metal foil and metal-clad laminate, by limiting the maximum depth of the pinholes 4 on the functional layer 3 of the composite metal foil, avoids excessively low metal foil allowance at the functional layer 3 corresponding to the pinholes 4. This slows down the etching process within the pinholes 4 during the etching process, preventing the etching solution from completely etching away the excess metal foil in the functional layer 3 at the pinhole 4 location. This significantly reduces the occurrence of short circuits or open circuits in the fine circuits prepared after etching, thereby improving the success rate of the etched circuits and making the metal foil more suitable for the fine circuit fabrication needs of high-end electronic fields.

[0040] In this embodiment, by limiting the maximum depth H of the metal foil pinhole 4 to no more than 2 / 3 of the thickness D of the functional layer 3, the bottom of the pinhole 4 can retain a thickness of not less than 1 / 3 of the thickness of the functional layer 3, thus ensuring the integrity of the dielectric substrate.

[0041] During the etching process of fabricating the circuit, etching solution can easily remain in the pinholes 4 on the surface of the functional layer 3. If the depth H of the pinhole 4 is too large (for example, more than 2 / 3 of the thickness of the functional layer 3), the amount of etching solution remaining at the bottom of the pinhole 4 will increase and be difficult to clean. As a result, in the subsequent etching process, the metal in the area at the bottom of the pinhole 4 will be continuously etched, eventually forming a local perforation or weak area on the side of the functional layer 3 near the carrier layer, affecting the integrity of the circuit.

[0042] Therefore, in this embodiment, the functional layer 3 with a complete dielectric substrate can prevent the etching solution from directly and massively penetrating into the deep recess of the pinhole 4, effectively slowing down the lateral etching rate of the etching solution on the metal foil around the pinhole 4, and avoiding excessive etching of the metal on the sidewall of the pinhole 4; thereby significantly reducing the probability of defects such as circuit breaks and open circuits, stabilizing circuit accuracy, and effectively improving the overall quality and production yield of the metal foil.

[0043] Implementation Method 1: In this embodiment, the thickness of the functional layer 3 is D, and the maximum depth H of the pinhole 4 is set to H≤2D / 3. In the optimal state, the depth H of the pinhole 4 can approach 0. The smaller the value of H, the higher the security of the metal foil.

[0044] Specifically, the depth of pinhole 4 is controlled within 2 / 3 of the thickness of the functional layer. The remaining at least 1 / 3 of the functional layer thickness at the bottom is used to block the etchant from penetrating inward, reducing the lateral etching rate and avoiding short circuits and open circuits. Only the maximum depth of pinhole 4 is constrained, and in the optimal state, the depth of pinhole 4 can approach 0. Controlling the maximum depth of pinhole 4 within 2 / 3 of the thickness of functional layer 3 can ensure that there is a sufficient dielectric layer at the bottom of pinhole 4 to block the etchant, reducing the probability of short circuits and open circuits caused by over-etching. If the depth exceeds this upper limit, it is easy to be etched away completely, and the defect rate of the circuit process will increase significantly.

[0045] Implementation Method Two: In this embodiment, the inner wall surface of the pinhole 4 is distributed with several irregular wave peaks 5, which are arranged irregularly in an undulating manner along the depth direction of the pinhole 4. The irregular wave peaks 5 distributed on the inner wall of the pinhole 4 increase the effective volume inside the pinhole 4 compared to a smooth hole wall. Simultaneously, the presence of the wave peaks 5 provides additional "reservoir space" and "flow buffer" for the etching solution penetrating into the pinhole 4.

[0046] Specifically, when the depth H of the pinhole 4 is relatively large (approximately 2D / 3), if the hole wall is a smooth surface, the etching solution can easily penetrate rapidly downwards to the bottom of the hole under capillary action, increasing the amount of etching solution residue at the bottom. However, when the pinhole 4 contains several irregular peak structures 5, these peak structures 5 act as "blockers" and "diverters" during the downward penetration of the etching solution. This forces the etching solution to change direction when it encounters the peak structures 5 and flows into the trough structures 6, delaying the time it takes for the etching solution to reach the bottom wall of the pinhole 4. At the same time, the undulating surface of the peak structures 5 increases the contact area between the etching solution and the functional layer 3, allowing the etching reaction to be more fully consumed in the upper and middle sections of the hole wall, reducing the total amount of etching solution that penetrates to the bottom of the hole.

[0047] With the depth of the pinhole 4 not exceeding 2 / 3 of the thickness of the functional layer 3, the wave crests 5 distributed on the inner wall of the hole provide further anchoring. In subsequent processes, other filler materials penetrate into the pinhole 4 and interlock with the wave crests 5 structure. After the filler material cures, the wave crests 5 structure forms a mechanical lock, enhancing the bonding force between the functional layer 3 and the filler material in the pinhole 4 area. In summary, this embodiment, by combining the limitation of the depth range of the pinhole 4 with the irregular wave crests 5 structure on the inner wall of the pinhole 4, utilizes the liquid storage buffer and mechanical anchoring effect of the wave crests 5 structure to further reduce the risk of etching solution penetration and enhance structural strength.

[0048] Implementation Method 3: The vertical distance between the apex of the crest 5 structure and the low points of the troughs 6 on both sides is greater than 1 μm. Ensuring that the crest 5 structure on the inner wall of the pinhole 4 reaches a depth of greater than 1 μm further guarantees an effective blocking and diversion effect on the downward penetration of the etching solution. If the depth of the crest 5 structure is less than 1 μm, its undulation amplitude is too small, resulting in the inability to form a significant undulating structure on the inner peripheral wall of the pinhole 4. Consequently, it cannot substantially change the capillary flow path of the etching solution, and the etching solution can still penetrate relatively smoothly downwards along the hole wall to the bottom of the hole.

[0049] This embodiment limits the minimum depth of the wave crest 5 structure to 1 μm, ensuring that the wave crest 5 structure forms a physical barrier on the inner wall of the pinhole 4 sufficient to change the flow direction of the etching solution. In the extreme case where the hole depth H reaches 2D / 3, the wave crest structure with a depth ≥1 μm can effectively reduce the seepage rate of the etching solution and intercept the etching solution in the upper-middle section of the pinhole 4. Combined with the fact that the depth H of the pinhole 4 does not exceed 2 / 3 of the thickness D of the functional layer 3, a dual protection mechanism is formed to prevent the wave crest 5 structure from being too shallow and to prevent the pinhole 4 from being too deep.

[0050] When the depth H of the pinhole 4 is shallow (e.g., close to 1D / 3), the depth of the crest 5 structure (≥1μm) accounts for a large proportion relative to the hole depth, and the crest 5 structure has a more significant impact on the fluid behavior within the pinhole 4. However, when the depth H of the pinhole 4 is close to 2D / 3, the crest 5 structure with a depth ≥1μm can effectively slow down the penetration rate of the etching solution. Experimental verification shows that, under the conditions of H≤2D / 3 and crest depth≥1μm, the penetration rate of the pinhole 4 after the etching process is less than 0.5%, significantly lower than the control group with a crest depth <1μm (penetration rate approximately 2.3%). In summary, this embodiment, by limiting the minimum depth of the crest structure to 1μm, ensures that the crest structure can effectively block the etching solution, forming a synergistic effect with the upper limit of the hole depth in Embodiment 1, jointly enhancing the technical effect of preventing etching solution penetration.

[0051] Implementation Method Four: The projected area of ​​the top surface of pinhole 4 is less than or equal to 700 μm². The projected area of ​​the top surface of pinhole 4 determines the opening size of pinhole 4, and the opening size of pinhole 4, together with the depth H of pinhole 4, determines the aspect ratio and volume of pinhole 4. In this embodiment, the opening area of ​​pinhole 4 is limited by the depth range of pinhole 4 (H≤2D / 3), and the flow rate of etching solution penetrating into the interior of pinhole 4 is limited by the projected area of ​​the opening of pinhole 4.

[0052] When the projected area is too large (over 700 μm²) and the hole depth H is also large (close to 2D / 3), the opening area of ​​the pinhole 4 is large, making it easier for the etching solution to flow into and fill the interior of the pinhole 4. The amount of etching solution at the bottom of the hole increases, and the risk of penetration increases significantly.

[0053] In this embodiment, the projected area of ​​the pinhole 4 opening is limited to no more than 700 μm², ensuring that even if the hole depth H reaches the upper limit allowed in Embodiment 1 (2D / 3), the pinhole 4 still has a small opening area. The smaller opening area reduces the flow rate of the etching solution into the pinhole 4 through the opening, and increases the surface tension effect of the etching solution at the opening of the pinhole 4, making it more difficult for the etching solution to overcome capillary resistance and penetrate downward to the bottom of the hole.

[0054] In this embodiment, while ensuring that the hole depth is not too large (not exceeding 2D / 3), this embodiment further limits the upper limit of the opening area, making it easier to clean and remove the residual etching solution inside the pinhole 4. Although the smaller opening area of ​​the pinhole 4 restricts the inflow of etching solution, in the cleaning stage, the smaller pore volume means that the absolute amount of residual etching solution is less. Combined with the limitation that the hole depth does not exceed 2D / 3 (leaving sufficient margin at the bottom of the hole), the small amount of residual etching solution is more easily diluted and removed during the cleaning process.

[0055] In summary, this embodiment, by limiting the projected area of ​​the pinhole 4 opening to no more than 700 μm², further reduces the inflow and residue of etching solution on the basis of the upper limit of hole depth in Embodiment 1, enhances the technical effect of preventing etching solution from penetrating the functional layer, and at the same time ensures cleaning efficiency.

[0056] Implementation Method 5: In this embodiment, the width of the opening of the pinhole 4 is less than or equal to 30 μm. When the opening width of the pinhole 4 is ≤30 μm, the pinhole 4 is a micron-sized "micropore". At such a small scale, capillary effect becomes the main factor affecting the flow behavior of the etching solution within the pinhole 4. According to the capillary principle, the height of the capillary rise is inversely proportional to the capillary radius—the smaller the diameter, the greater the capillary rise, and the easier it is for the etching solution to be "drawn" into the pinhole 4. When the width W is limited to a small range of ≤30 μm, and the depth H of the pinhole 4 is limited to an upper limit (H≤2D / 3), it can be ensured that the penetration path of the etching solution is restricted to the first 2 / 3 of the thickness direction of the functional layer 3, and cannot reach the lower surface of the functional layer 3.

[0057] Simultaneously, while ensuring that the remaining thickness at the bottom of pinhole 4 is at least D / 3, when the opening width of pinhole 4 is ≤30μm, pinhole 4 exhibits a "narrow and deep" morphological characteristic. In this morphology, the bottom region of pinhole 4 becomes a geometric discontinuity point in the thickness direction of functional layer 3, resulting in a significant stress concentration effect. If the hole depth H is close to the full thickness of functional layer 3 (e.g., H≥4D / 5), the remaining metal layer thickness at the bottom of pinhole 4 is extremely small, and the stress concentration coefficient due to the narrow width is very high. Under subsequent pressing or thermal stress, the remaining metal layer at the bottom is very prone to fracture failure. This embodiment limits the hole depth H to ≤2D / 3, combined with the width limitation of ≤30μm, to ensure that the bottom of pinhole 4 retains sufficient metal layer thickness (at least D / 3), and that the remaining metal layer has a sufficient cross-sectional area in its width direction to bear stress. This cross-sectional area is sufficient to provide the bearing capacity required to resist stress concentration, avoiding cracking of the bottom metal layer under stress due to the "narrow and deep" hole shape.

[0058] Obviously, the above embodiments are merely illustrative examples for clear explanation and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of protection of this invention.

Claims

1. A composite metal foil, characterized in that, It includes a carrier layer (1), a peeling layer (2) and a functional layer (3) stacked in sequence; after the functional layer (3) is peeled off from the peeling layer (2), it has a pinhole (4) on the side near the peeling layer (2). The maximum depth H from the top surface of the pinhole (4) to the lowest point of the bottom is less than or equal to 2 / 3 of the thickness of the functional layer (3). The top surface of the pinhole (4) is located on the side of the functional layer (3) near the peeling layer (2), and the lowest point of the bottom of the pinhole (4) is located on the side of the functional layer (3) away from the peeling layer (2).

2. The composite metal foil according to claim 1, characterized in that, The pinhole (4) has at least 10 wave crest (5) structures distributed along its circumference, and the vertical distance between the apex of the wave crest (5) structure and the low point of the wave trough (6) on both sides is greater than 1 μm.

3. The composite metal foil according to claim 1, characterized in that, The density of the pinholes (4) on the functional layer (3) is less than or equal to 500 / m. 2 .

4. The composite metal foil according to claim 1, characterized in that, The projected area of ​​the top surface of the pinhole (4) is less than or equal to 700 μm. 2 .

5. The composite metal foil according to claim 1, characterized in that, After the functional layer (3) is peeled off from the peeling layer (2), it has a plurality of pinholes (4) on the side near the peeling layer (2), and the average width of the opening of the plurality of pinholes (4) is less than or equal to 30 μm.

6. The composite metal foil according to claim 1, characterized in that, The surface roughness Rz of the side of the functional layer (3) away from the peeling layer (2) is 1~2μm.

7. The composite metal foil according to claim 1, characterized in that, The release layer (2) is a composite release layer (2), which includes an amorphous alloy layer and an organic layer arranged sequentially near the surface of the carrier layer (1).

8. The composite metal foil according to claim 1, characterized in that, An antioxidant layer (7) is provided on the side of the functional layer (3) away from the peeling layer (2).

9. The composite metal foil according to claim 1, characterized in that, A heat-resistant layer (8) is provided on the side of the carrier layer (1) away from the peeling layer (2).

10. A metal-clad laminate, characterized in that, The metal-clad laminate is made using the functional layer (3) of the metal foil as described in any one of claims 1 to 9 as one of the materials.

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