Method for eliminating large load single wafer gold corrosion from the trailing side of the centripetal side and inhibiting back plating

Abstract

The application discloses a method for eliminating large-load single-chip gold corrosion trailing on the centripetal side and inhibiting back-plating, and belongs to the technical field of MEMS devices. In the KI-I2 system gold corrosion under large-load working conditions, the wafer centripetal side liquid retention causes gold layer trailing, and gold particle back-plating caused by hydrolysis of gold-containing complex. The application adopts 3 mu thin photoresist matched with high-temperature short-time post-baking process to eliminate liquid retention dead zones. Through high-speed large-flow cooperation with the forward and reverse rotation of the carrier table, the main body of the gold layer is coarsely corroded, and then precise fine finishing corrosion is completed with low parameters. DIW nozzle scanning and washing at the end of the process inhibit the hydrolysis of gold complex back-plating. The application effectively eliminates the comet-shaped trailing and edge serration defects of the gold layer, and has excellent performance in long-term high and low temperature and temperature cycle reliability tests. The process does not need to add new equipment and chemical additives, and has low cost, strong mass production compatibility, and is suitable for large-scale precision preparation of high-frequency resonant MEMS galvanometer.

Description

Technical Field

[0001] This invention belongs to the field of microelectromechanical systems (MEMS) device manufacturing technology, specifically relating to a single-wafer wet chemical etching process for gold thin films. In particular, it relates to a method that combines photoresist morphology reconstruction, segmented variable parameter etching timing, stage forward and reverse perturbation, and deionized water full-domain intelligent scanning rinsing to eliminate the centripetal tailing defect of gold patterns under high load processes and simultaneously suppress the hydrolysis and back-plating of gold complexes. It is mainly applicable to metal electrodes and functional mirror devices with high mechanical reliability requirements, such as MEMS galvanometers. Background Technology

[0002] In MEMS device structures, gold (Au) possesses advantages such as excellent conductivity, high chemical stability, controllable stress, and high specular reflectivity, making it widely used in electrode layers, lead layers, and optical reflective functional layers. In resonant MEMS galvanometer products, the gold layer not only serves as an electrostatically driven electrode but also directly participates in high-frequency resonant oscillation as an optical mirror, placing extremely high demands on the uniformity of metal edge morphology, interfacial adhesion strength, thin film residual stress, and surface cleanliness.

[0003] Currently, the mainstream gold wet etching system in industry is the potassium iodide-iodine (KI-I2) etchant system. This system has a fast etching rate and good selectivity, making it suitable for wafer-level single-wafer spin etching processes. However, under scenarios involving high loads, large-area patterns, and high-speed spin etching, existing processes suffer from two key drawbacks that are difficult to address simultaneously: First, the high-speed rotation of the wafer generates a fluid boundary layer gradient. On the centripetal side, where the pattern faces the wafer center, a dead zone of stagnant flux is easily formed, resulting in a much lower fluid turnover rate than on the centrifugal side. This causes uneven lateral etching on the centripetal side, ultimately forming a comet-shaped tail, serrated edges, and residual corrosion byproducts at the bottom. This tail structure continuously generates stress concentration during the high-frequency resonance of the galvanometer. Simultaneously, the tail area is accompanied by incomplete interface corrosion, severely reducing the adhesion between the gold layer and the underlying TiW layer. Under long-term operation, this easily leads to peeling, delamination, detachment, fatigue fracture, and ultimately device failure.

[0004] Second, the gold corrosion process generates tetraiodide alloy complex ions [AuI4]. - This complex is prone to hydrolysis and reduction under conditions of concentrated chemical solution and rapid evaporation of water, resulting in the precipitation of nano-sized elemental gold particles. In traditional processes, there is a time difference between the completion of etching and the switching to rinsing. During high-speed spin drying, the residual chemical solution is rapidly concentrated, which easily leads to the formation of gold back-plating particles on the sidewalls and gaps of the pattern, causing reliability problems such as short circuits on the device plates, surface leakage, increased damping, and abnormal optical scattering.

[0005] Existing technologies often optimize only the etching rate, reagent concentration, or rinsing flow rate, failing to simultaneously address the two coupled defects of fluid dead zone tailing on the centripetal side and complex hydrolysis-induced plating back-coating. Furthermore, they cannot meet the stringent reliability requirements of MEMS mirrors under long-term temperature cycling, high temperature and humidity, and high-frequency vibration. Therefore, there is an urgent need for an integrated process method that can simultaneously optimize the fluid field, photoresist boundary morphology, etching timing, and rinsing logic. Summary of the Invention

[0006] The purpose of this invention is to overcome the defects of existing high-load monolithic gold etching processes, such as severe centripetal tailing, interface residual contamination, poor gold layer adhesion, and numerous hydrolytic back-plating particles. This invention provides a method to eliminate centripetal tailing and suppress back-plating in high-load monolithic gold etching, achieving gold pattern edge-free, sidewall-flat, interface-clean, and no back-plating particles, thereby significantly improving the mechanical stability and long-term operational reliability of the gold layer structure of MEMS devices (galvanometers).

[0007] To achieve the above objectives, this invention provides a method for eliminating the centripetal tail of high-load single-wafer gold etching and suppressing back plating. This method is achieved through the coordinated optimization of equipment hardware linkage and photoresist morphology control, and includes the following steps: S1, Photoresist Morphology Optimization and Control A 3μm photoresist layer was prepared on a TiW / Au metal stack on a silicon wafer. After exposure and development, the photoresist underwent post-baking with the following parameters: baking temperature 150℃, baking time 5 min, and the sidewall steepness of the photoresist controlled within the range of 45°–50°. By increasing the post-baking temperature and shortening the baking time, the developed photoresist sidewalls formed an outwardly sloping surface, reducing the sidewall steepness and minimizing the retention of etching solution and gold-containing waste solution in the dead corners of the sidewalls.

[0008] S2, Coarse Corrosion Stage The silicon wafers after baking were sprayed with KI-I2 etchant at a flow rate of 1.5-2.5 L / min and a stage speed of 1500-2000 rpm. The stage was controlled to rotate alternately in forward and reverse directions in segments to remove 90% of the total thickness of the etched metal stack. High centrifugal force and alternating fluid shear force were used to break the eddy currents of the etchant on the inner side of the wafer, ensuring a uniform etching rate and avoiding slow etching on the inner side to prevent tailing. S3. Pre-standby anti-re-plating intelligent rinsing procedure: 2-3 seconds before the end of the etching solution spraying, the wafer stage is raised to the direct discharge position of the solution and the DIW nozzle is pre-positioned and ready to go; immediately within 0.5 seconds after the etching solution is turned off, the DIW nozzle spraying is started, with a DIW flow rate of 2.5-3.0 L / min. The nozzle reciprocates and rinses within the 0%-90% diameter area of ​​the wafer at a speed greater than 200 mm / s. The rinsing time is 60-90 seconds to remove residual gold complexes and inhibit hydrolytic re-plating. S4. Fine-tuning etching steps: Spray the etching solution again, control the flow rate of the etching solution to 0.5-1.0L / min and the stage speed to 400-600rpm, continue to rotate in segments with alternating forward and reverse rotation, and spray etching time is 20-30 seconds, etching the remaining 10% of the gold layer. Avoid and prevent the etching rate from being too fast under high speed and high flow rate, and ensure the regularity of the pattern edge. S5. Final cleaning and drying stage: Maintain the DIW nozzle reciprocating scanning rinsing mode, reduce the scanning rinsing speed to 20mm / s~30mm / s, increase the rinsing flow rate to 4.0~5.0L / min for full-area intensive cleaning, spray rinsing time is 90s, finally move the nitrogen nozzle to the center of the wafer to spray nitrogen gas, and chuck synchronously spin dry at high speed to complete the MEMS device fabrication.

[0009] Compared with the prior art, the present invention has the following significant technical advantages: 1. This invention completely eliminates the fluid retention dead zone formed by the vertical steep wall of the photoresist by reconstructing the morphology of the thin film and the inclined outward expansion of the film. Combined with segmented forward and reverse rotation speed etching, it solves the problem of centripetal liquid retention in the high-load high-speed rotation process from the fluid field level, completely eliminating the comet-like tail, jagged edges and bottom residual defects of the gold layer, and the gold pattern edge contour is highly regular.

[0010] 2. This invention innovatively adopts a nozzle pre-standby before corrosion ends, sub-second ultra-fast switching flushing + high-frequency intelligent scanning flushing strategy, which completes waste liquid replacement and stripping before the gold complex hydrolysis and concentration, blocking the source of gold back plating reaction from the mechanism level, completely eliminating the gold particle back plating defect on the side wall, and greatly improving the surface cleanliness and electrical stability of the device.

[0011] 3. The present invention employs a segmented process of rapid delamination with high parameters in coarse etching and precise trimming with low parameters in fine etching, which balances etching efficiency and pattern accuracy. This ensures high-load capacity while avoiding over-etching and undercutting, resulting in a wide process window and good consistency.

[0012] 4. After optimization, the interface between the gold layer and the TiW adhesion layer is clean and free of residue, and the bonding force is greatly improved. After long-term temperature cycling, low temperature, high temperature and high humidity reliability tests, the cross-cut test showed no peeling, no flaking, and no delamination, which can meet the long-term mechanical reliability requirements of MEMS galvanometer under high frequency resonance conditions.

[0013] 5. All improvements in this invention are based on fine-tuning of existing equipment parameter logic and photolithography process. No equipment replacement or new chemical additives are required. The modification cost is extremely low, and it has strong mass production compatibility, making it suitable for large-scale industrial promotion. Attached Figure Description

[0014] Figure 1 This is a flowchart illustrating the overall process of this invention. Figure 2SEM images of the steep sidewalls of the photoresist and the centripetal comet tail of the gold layer under the traditional 5μm thick photoresist process; Figure 3 This is a SEM image showing the morphology of the inclined sidewall of the 3μm thin adhesive and the gold layer without tailing or re-plating in this invention. Figure 4 SEM image of gold layer interface lifting and poor adhesion in the tailing area of ​​traditional process; Figure 5 After using the method of the present invention, the gold layer in the galvanometer area was tested using the cross-cut test. The photo shows the adhesion test effect after the tape was peeled off without any detachment. Figure 6 The image shows a gold layer in the galvanometer region tested using the cross-cut test after 168 hours of temperature cycling, low temperature, and high temperature and humidity following the method of this invention, with no peeling off after the tape was removed. Figure 7 The image shows a photograph taken after the gold layer in the galvanometer region was tested using the cross-cut test following the method of this invention, under temperature cycling, low temperature, and high temperature and high humidity conditions for 332 hours, and after the tape was peeled off, showing no peeling. Detailed Implementation

[0015] The present invention will be further described in detail below with reference to specific embodiments, but the present invention is not limited to the following embodiments.

[0016] This embodiment uses a 6-inch silicon substrate wafer, with an 80nm TiW adhesion layer and a 700nm Au functional layer fabricated by front-end sputtering for MEMS galvanometer device patterning. Figure 1 This includes the following steps: The first step, photoresist morphology optimization: 7600A series photoresist is spin-coated onto the wafer, with a thickness controlled at 3μm (replacing the original 5μm thick photoresist). After exposure and development, a high-temperature post-baking process is performed, with the post-baking temperature set at 150℃ (compared to the standard condition of 120°C with a pull-off of +30°C), and a baking time of 5 minutes. SEM analysis shows that, compared to the traditional 120℃ long-time baking process, this process achieves a gentle slope with outwardly expanding sidewalls, and the steepness of the photoresist sidewalls is controlled at approximately 47.4° (see...). Figure 3 Compared to the traditional 5μm thick adhesive with a 74.6° steep-wall structure under the original post-baking conditions (see...), Figure 2 The effect of drug retention has been significantly reduced.

[0017] The second step is the coarse etching process: using KI-I2 etching solution, spray flow rate of 2.0L / min, stage speed of 1800rpm, continuous forward and reverse rotation, using high centrifugal force and alternating shear force to destroy the centripetal fluid boundary layer, quickly etch away 90% of the gold layer thickness, and avoid long-term slow retention etching that will cause tailing.

[0018] The third step is pre-standby intelligent scanning anti-re-plating rinsing: the software controls the stage to be raised to the straight cup position 2 seconds before the end of the etching spray, and the DIW nozzle is in place in advance; within 0.3 seconds after the etching spray stops, the DIW nozzle is immediately started to spray water, with a DIW flow rate of 2.8L / min, a nozzle scanning speed of 220mm / s, and a spraying time of 90s. The spraying and rinsing repeatedly scans and rinses within the 0% to 90% diameter range of the wafer, quickly replacing and removing all residual gold-containing complex waste liquid, and preventing hydrolytic re-plating.

[0019] Step 4, fine etching: Spray the etching solution again, reduce the flow rate of the etching solution to 0.8L / min, adjust the stage speed to 500rpm, and continue to rotate in both forward and reverse directions to precisely etch the remaining 10% of the gold layer, ensuring that the edges of the pattern are flat and the undercut is controllable.

[0020] Step 5, final wash and drying: Increase the DIW flow rate to 4.5L / min, maintain reciprocating full-area scanning wash, reduce the scanning speed to 20mm / s~30mm / s, and spray wash time to 90s to thoroughly remove trace residual impurities. Finally, move the nitrogen nozzle to the center of the wafer to spray nitrogen at a fixed point.

[0021] The process results show that: SEM images are as follows Figure 3 As shown, the gold pattern processed by this invention has no comet tail, no serrated edges, and smooth and clean sidewalls on the centripetal side; the surface has no elemental gold plating particles.

[0022] Adhesion test: The gold layer in the galvanometer area was tested using the cross-cut test. No peeling occurred after the tape was removed (e.g., ...). Figure 5 ); Compared with the original method, the SEM observation of areas with severe tailing showed significant improvement in the appearance of obvious gold layer lifting (e.g., Figure 4 ).

[0023] Reliability testing: The fabricated wafers are subjected to temperature cycling, low temperature, and high temperature and humidity tests for 168 hours to test adhesion. The results are satisfactory (e.g., ...). Figure 6 Afterwards, the adhesion was tested under temperature cycling, low temperature, and high temperature and high humidity conditions for 332 hours, and the results were satisfactory (e.g.) Figure 7 ).

[0024] The above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for eliminating the centripetal tailing of gold corrosion on a single wafer under heavy load and suppressing plating re-plating, comprising sputtering a TiW / Au metal stack on a silicon wafer, characterized in that... Includes the following steps: S1. Photoresist morphology control steps: Prepare 3μm photoresist on the TiW / Au metal stack of silicon wafer. After exposure and development, perform photoresist post-baking at 150℃ for 5min. The steepness of the photoresist sidewall is controlled within the range of 45° to 50°. By increasing the post-baking temperature and shortening the baking time, the sidewalls of the developed photoresist form an outwardly sloping surface, reducing the steepness of the sidewalls and minimizing the retention of etching solution and gold-containing waste solution in the dead corners of the sidewalls. S2. Coarse etching step: The silicon wafer after baking is sprayed with KI-I2 etching solution. The flow rate of the etching solution is 1.5-2.5L / min, and the stage speed is 1500-2000rpm. The stage is controlled to rotate alternately in forward and reverse directions in segments to remove 90% of the total thickness of the etched metal stack. The high centrifugal force and alternating fluid shear force are used to break the eddy current of the etchant on the centripetal side of the wafer. S3. Pre-standby anti-re-plating intelligent rinsing procedure: The software controls the stage to be raised to the direct discharge position of the chemical solution 2-3 seconds before the end of the etching solution spraying and the DIW nozzle is pre-positioned and ready to go; the DIW nozzle is started to spray less than 0.5 seconds after the etching solution is turned off, with a DIW flow rate of 2.5-3.0 L / min. The nozzle reciprocates and scans within the 0%-90% diameter area of ​​the wafer at a speed greater than 200 mm / s to remove residual gold complexes and inhibit hydrolytic re-plating. S4. Fine-tuning etching step: Spray the etching solution again, control the flow rate of the etching solution to 0.5-1.0L / min, reduce the stage speed to 400-600rpm, and continue to rotate in segments with alternating forward and reverse rotation to etch the remaining 10% of the gold layer, so as to achieve precise edge trimming of the pattern. S5. Final cleaning and drying step: Maintain the DIW nozzle reciprocating scanning rinsing mode, reduce the scanning rinsing speed to 20mm / s~30mm / s, increase the rinsing flow rate to 4.0~5.0L / min for full-area intensive cleaning, and finally move the nitrogen nozzle to the center of the wafer to spray nitrogen gas at a fixed point, and chuck synchronously rotates at high speed to spin dry, completing the MEMS device fabrication.

2. The method for eliminating the centripetal tail of high-load single-piece gold corrosion and suppressing plating re-plating according to claim 1, characterized in that: In step S3, the DIW nozzle scanning area takes the wafer center as the zero point and covers the 0% to 90% radial range of the wafer, specifically flushing the pattern concentration area and the dead corners on the centripetal side.

3. The method for eliminating the centripetal tail of large-load single-piece gold corrosion and suppressing plating re-plating according to claim 1, characterized in that: The method is applicable to high-load monolithic wet etching processes for gold electrodes and gold reflective mirrors in MEMS galvanometers.

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