A power device substrate dielectric coating and method of making and use thereof
Patent Information
- Application Number
- CN202610951552.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-06-29
- Publication Date
- 2026-08-21
AI Technical Summary
[0004]目前,功率器件衬底高k(高介电常数)电介质薄膜制备通常采用CVD工艺,但依赖专用金属有机前驱体原料,不同前驱体挥发性、热稳定性差异较大,在多组分体系制备中配比窗口极窄;而传统溶胶-凝胶法受前驱体水解、聚合反应不可控因素影响,同样存在组分均匀性差、量产一致性低等问题;而PVD、磁控溅射则需要定制成型靶材、棒材,制备工序繁琐、生产成本高昂,制备多组分钙钛矿结构薄膜易出现元素配比失衡,破坏晶体结构,劣化介电与绝缘性能
本发明采用高纯陶瓷粉体作原料,工艺简单易行,从源头解决PVD、CVD及传统溶胶-凝胶等工艺制备多组分结构薄膜配比失衡组分偏移等技术问题,实现介质薄膜组分精准可控,无需昂贵真空镀膜设备、定制靶材及有机前驱体原料,显著降低制备成本与工艺门槛,工业化适配性和量产可行性优异。通过本发明工艺可获得结晶完整、结构致密、介电性能可控、稳定性优异的陶瓷介质涂层,为有效满足碳化硅基高功率、光功率器件的高性能应用需求和可控制备提供了新的技术路径。
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Figure CN122609091A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of ceramic-based coating materials technology, and specifically to a dielectric coating for a power device substrate, its preparation method, and its application. Background Technology
[0002] Wide bandgap semiconductors are key substrate materials for high-power, high-temperature, high-frequency semiconductors and optical power devices. To meet the development requirements of device miniaturization, high withstand voltage, and low leakage current, effectively suppressing quantum tunneling leakage current and optimizing device electrical performance are crucial steps in the fabrication of next-generation power devices. Preparing highly stable dielectric thin film materials on the substrate surface is a core technology for improving device insulation, operational stability, and service life.
[0003] In dielectric ceramic material systems, strontium / barium titanate perovskite structure titanates are typical high dielectric ceramic materials with advantages such as excellent dielectric properties, good insulation, and suitability for high-power device operating conditions, making them ideal materials for preparing high-performance substrate dielectric coatings.
[0004] Currently, the preparation of high-k (high dielectric constant) dielectric thin films for power device substrates typically employs CVD technology. However, this relies on specialized metal-organic precursor raw materials, and different precursors exhibit significant differences in volatility and thermal stability, resulting in an extremely narrow proportioning window in the preparation of multi-component systems. Furthermore, the traditional sol-gel method is affected by uncontrollable factors such as precursor hydrolysis and polymerization reactions, leading to problems like poor component uniformity and low mass production consistency. On the other hand, PVD and magnetron sputtering require custom-molded targets and rods, resulting in cumbersome preparation processes and high production costs. In the preparation of multi-component perovskite structure thin films, elemental imbalances are prone to occur, damaging the crystal structure and degrading dielectric and insulating properties.
[0005] Therefore, developing a simple, controllable, uniform microstructure, and low-cost method for preparing dielectric thin film coatings that is suitable for large-scale power device substrates is one of the technical problems that urgently need to be solved in this field. Summary of the Invention
[0006] To address the shortcomings of existing technologies, the present invention aims to provide a dielectric coating for power device substrates, its preparation method, and its applications. The process of this invention yields a ceramic dielectric coating with complete crystal structure, dense structure, controllable dielectric properties, and excellent stability, providing a new technical path for effectively meeting the high-performance application requirements and controllable preparation of silicon carbide-based high-power and optical power devices.
[0007] To achieve this objective, the present invention employs the following technical solution: In a first aspect, the present invention provides a method for preparing a dielectric coating on a power device substrate, the method comprising: S1. Ceramic powder, additives and solvent are mixed and dispersed to obtain a ceramic suspension. S2. The ceramic suspension is coated onto the surface of a silicon carbide wafer substrate to form a wet film layer; S3. The wet film layer is dried. S4. Annealing heat treatment is performed in an oxygen atmosphere to crystallize and shape the ceramic powder, forming a ceramic crystal thin film dielectric coating on the surface of the silicon carbide wafer substrate.
[0008] This invention uses finished high-purity ceramic powder to prepare a concentrated ceramic suspension. The raw material composition is fixed, which can avoid the problem of component runaway as much as possible from the source. After annealing heat treatment, nano, submicron and micron-level dielectric ceramic thin film coatings can be formed on the surface of the wafer substrate. The coating has a uniform microstructure, good light transmittance and suitable and controllable dielectric constant.
[0009] The following are preferred technical solutions of the present invention, but are not intended to limit the technical solutions provided by the present invention. The technical objectives and beneficial effects of the present invention can be better achieved and realized through the following preferred technical solutions.
[0010] Preferably, the ceramic powder in step S1 includes BaTiO3, SrTiO3, and Ba x Sr 1-x TiO3, PbZr x Ti 1-x Any one or at least two of O3, Ba2TiSi2O8, Sr2TiSi2O8, and BaTiSi3O9, wherein 0 < x < 1.
[0011] Preferably, the D50 of the ceramic powder in step S1 is 1nm~500nm, such as 1nm, 10nm, 50nm, 100nm, 200nm, 300nm, 400nm or 500nm, and the purity is ≥99.9%.
[0012] Preferably, the ceramic powder in step S1 has a spherical or near-spherical particle morphology.
[0013] It is understandable that the ceramic powder used in step S1 should be free of obvious agglomeration and impurity particles.
[0014] Preferably, the additive in step S1 includes a dispersant.
[0015] Preferably, the dispersant comprises any one or a combination of at least two of the following: sodium tripolyphosphate, tetramethylammonium hydroxide, ammonium polyacrylate, polyethyleneimine, polyvinylpyrrolidone, sodium dodecyl sulfate, oleic acid, zinc stearate, BYK-163, AFCONA-4401, Hypermer KD9, Isobam-104, or NANOBYK-3620.
[0016] It should be noted that among the dispersants mentioned above, BYK-163 is a wetting and dispersing agent manufactured by BYK Chemicals; AFCONA-4401 is a polymer dispersant manufactured by AFCONA; Hypermer KD9 is a superdispersant manufactured by Croda; Isobam-104 is a water-soluble dispersant manufactured by Kuraray; and NANOBYK-3620 is a nano-additive manufactured by BYK Chemicals. Those skilled in the art can purchase these products based on the above product information.
[0017] Preferably, the mass of the dispersant is 0.1% to 2% of the mass of the ceramic powder, for example, 0.1%, 0.3%, 0.5%, 0.7%, 1%, 1.3%, 1.5%, 1.7% or 2%.
[0018] Preferably, when the dispersant includes polyethyleneimine and / or polyvinylpyrrolidone, the additive in step S1 further includes an acidic pH adjuster, which includes any one or a combination of at least two of dilute hydrochloric acid, glacial acetic acid, or anhydrous phosphoric acid, and the pH value of the ceramic suspension is 2 to 4.
[0019] Preferably, when the dispersant includes any one or a combination of at least two of sodium tripolyphosphate, tetramethylammonium hydroxide, ammonium polyacrylate, sodium dodecyl sulfate, or Isobam-104, the additive in step S1 further includes an alkaline pH adjuster, which includes any one or a combination of at least two of ammonia, diethylamine, or dimethylethanolamine, and the pH value of the ceramic suspension is 10-12.
[0020] Preferably, the solvent in step S1 includes water and a first organic solvent, wherein the first organic solvent includes any one or a combination of at least two of the following: n-octane, n-hexane, N,N-dimethylformamide, xylene, ethylene glycol monomethyl ether, or terpineol.
[0021] Preferably, the dispersion treatment in step S1 includes any one or a combination of at least two of mechanical stirring, ultrasonic dispersion, or ball milling dispersion.
[0022] Preferably, the mechanical stirring speed is 300 r / min to 1500 r / min, such as 300 r / min, 500 r / min, 700 r / min, 900 r / min, 1000 r / min, 1200 r / min or 1500 r / min, and the time is 10 min to 60 min, such as 10 min, 20 min, 30 min, 40 min, 50 min or 560 min.
[0023] Preferably, the power of the ultrasonic dispersion is 100W~500W, such as 100W, 200W, 300W, 400W or 500W, and the time is 5min~30min, such as 5min, 10min, 15min, 20min, 25min or 30min.
[0024] Preferably, the ball milling dispersion speed is 200 r / min to 800 r / min, such as 200 r / min, 300 r / min, 400 r / min, 500 r / min, 600 r / min, 700 r / min or 800 r / min, and the time is 30 min to 120 min, such as 30 min, 50 min, 60 min, 80 min, 100 min or 120 min.
[0025] Preferably, the solid content of the ceramic suspension in step S1 is 35 vol% to 50 vol%, for example, 35 vol%, 38 vol%, 40 vol%, 45 vol%, or 50 vol%, and the viscosity is 5 mPa·s to 500 mPa·s, for example, 5 mPa·s, 10 mPa·s, 50 mPa·s, 100 mPa·s, 200 mPa·s, 300 mPa·s, 400 mPa·s, or 500 mPa·s.
[0026] Preferably, the silicon carbide wafer substrate is cleaned before the coating process described in step S2.
[0027] Preferably, the cleaning process includes: using a protective gas to blow away dust from the surface and edges of the silicon carbide wafer substrate.
[0028] Preferably, the protective gas includes nitrogen and / or argon, with a purity ≥99.999%.
[0029] Preferably, the coating method in step S2 includes: first, dropping the ceramic suspension onto the surface of the silicon carbide wafer substrate, and then spin-coating at varying speeds in segments.
[0030] Preferably, the segmented speed-controlled spin coating method includes: firstly, laying the film at a speed of 300 r / min to 800 r / min for 3 s to 10 s, and then uniformly coating at a speed of 2000 r / min to 6000 r / min for 10 s to 120 s; for example, the film laying speed is 300 r / min, 400 r / min, 500 r / min, 600 r / min, 700 r / min or 800 r / min, etc., and the time is 3 s, 5 s, 6 s, 7 s, 8 s, 9 s or 10 s, etc.; the uniformly coating speed is 2000 r / min, 3000 r / min, 4000 r / min, 5000 r / min or 6000 r / min, and the time is 10 s, 20 s, 40 s, 50 s, 80 s, 100 s or 120 s, etc.
[0031] Preferably, the thickness of the wet film layer in step S2 is 0.1μm to 200μm, such as 0.1μm, 1μm, 10μm, 20μm, 50μm, 100μm, 150μm or 200μm.
[0032] In this invention, a wet film layer with uniform thickness and smooth surface can be obtained by segmented speed-adjusted spin coating; the film thickness can be precisely controlled so that the final wet film thickness is controlled from 0.1μm to 200μm.
[0033] Preferably, the drying process in step S3 includes segmented gradient heating drying.
[0034] Preferably, the segmented gradient heating drying includes: a first stage of heating to 40℃~80℃ and holding for 5min~45min; a second stage of heating to 80℃~120℃ and holding for 10min~20min; and a third stage of heating to 120℃~180℃ and holding for 15min~30min, wherein the cutoff temperatures of the first stage, the second stage, and the third stage of heating increase sequentially.
[0035] For example, the cutoff temperature for the first stage of heating is 40℃, 50℃, 60℃, 70℃, or 80℃, and the holding time is 5min, 10min, 15min, 20min, 25min, 30min, 35min, 40min, or 45min, etc.; the cutoff temperature for the second stage of heating is 80℃, 90℃, 100℃, 110℃, or 120℃, and the holding time is 10min, 12min, 15min, 18min, or 20min, etc.; the cutoff temperature for the third stage of heating is 120℃, 130℃, 140℃, 150℃, 160℃, 170℃, or 180℃, and the holding time is 15min, 18min, 20min, 25min, 28min, or 30min, etc.
[0036] In this invention, by using segmented gradient heating and drying, the solvent inside the wet film layer can be slowly and uniformly evaporated, thereby obtaining a dry, dense pre-fabricated ceramic film layer without defects such as cracks, pinholes, or wrinkles.
[0037] Preferably, the oxygen partial pressure of the oxygen-containing atmosphere in step S4 is 10% to 100%, such as 10%, 20%, 40%, 50%, 70%, 80%, or 100%.
[0038] Preferably, the annealing heat treatment in step S3 is performed at a temperature of 900℃ to 1250℃ for a time of 3 min to 15 min. For example, the temperature can be 900℃, 1000℃, 1100℃, 1200℃ or 1250℃, and the time can be 3 min, 5 min, 8 min, 10 min, 12 min or 15 min.
[0039] This invention achieves ceramic thin film crystallization and formation through precise temperature and time control, resulting in a ceramic crystal thin film medium with complete crystallization and dense structure.
[0040] Preferably, the thickness of the ceramic crystal thin film dielectric coating in step S3 is 20 nm to 2 μm.
[0041] Preferably, after step S4, the silicon carbide wafer substrate after annealing heat treatment is sequentially cleaned and dried.
[0042] Preferably, the cleaning method includes: performing segmented ultrasonic cleaning sequentially with water and a second organic solvent.
[0043] Preferably, the second organic solvent includes any one or a combination of at least two of ethanol, acetone, toluene, xylene, isopropanol, anhydrous diethyl ether, ethylene glycol, or ethyl acetate.
[0044] Preferably, the total time for segmented ultrasonic cleaning is 10 min to 60 min, such as 10 min, 20 min, 30 min, 40 min, 50 min or 60 min, and the time for a single segment cleaning is 3 min to 10 min, such as 3 min, 5 min, 6 min, 7 min, 8 min or 10 min.
[0045] Preferably, the ultrasonic power of the segmented ultrasonic cleaning is 50W~300W, such as 50W, 100W, 150W, 200W, 250W or 300W.
[0046] In this invention, segmented ultrasonic cleaning is used to remove stripped material, floating powder, and trace impurities and contaminants remaining on the substrate edge and surface.
[0047] In a second aspect, the present invention provides a power device substrate dielectric coating prepared by the preparation method described in the first aspect.
[0048] Thirdly, the present invention provides an application of the dielectric coating on the power device substrate as described in the second aspect in a power device.
[0049] The numerical range described in this invention includes not only the point values listed above, but also any point values within the numerical ranges not listed above. Due to space limitations and for the sake of brevity, this invention will not exhaustively list all the specific point values included in the range.
[0050] Compared with the prior art, the present invention has the following beneficial effects: This invention uses high-purity ceramic powder as raw material, and the process is simple and easy to implement. It solves the technical problems of component imbalance and component displacement in the preparation of multi-component structured thin films by PVD, CVD, and traditional sol-gel processes from the source. It achieves precise and controllable composition of dielectric thin films, eliminating the need for expensive vacuum coating equipment, customized targets, and organic precursor raw materials, significantly reducing preparation costs and process barriers. It also has excellent industrial adaptability and mass production feasibility. The process of this invention can obtain ceramic dielectric coatings with complete crystal structure, dense structure, controllable dielectric properties, and excellent stability, providing a new technical path for effectively meeting the high-performance application requirements and controllable preparation of silicon carbide-based high-power and optical power devices. Attached Figure Description
[0051] Figure 1 This is the X-ray diffraction (XRD) pattern of the coating obtained in Example 1.
[0052] Figure 2 and Figure 3 These are, respectively, scanned images (SEM) and elemental composition scanned images (EDS) of the coating obtained in Example 1 at different magnifications.
[0053] Figure 4 These are comparative photographs showing the light transmittance of the coating obtained in Example 1 at different annealing temperatures. Detailed Implementation
[0054] The technical solution of the present invention will be further illustrated below through specific embodiments. Those skilled in the art should understand that the embodiments described are merely illustrative of the present invention and should not be construed as limiting the invention.
[0055] "The scope of this invention can be defined by a lower limit and an upper limit. The selected lower limit and upper limit define the boundary of a specific range. The range defined in this way can be defined by the inclusion or exclusion of endpoints. Any endpoint can be independently selected for inclusion or exclusion, and all lower limit and upper limit values can be arbitrarily combined to form a new range. That is, any lower limit value can be combined with any upper limit value to form an effective range. For example, if the ranges of 60~120 and 80~110 are listed for specific parameters, it should be understood that the ranges of 60~110 and 80~120 also fall within the scope of this invention. In addition, if the minimum range values 1 and 2 are listed, and the maximum range values 3, 4 and 5 are also listed, then 1~3, 1~4, and 2~3, 1~4, 2~5 ... All ranges from 1 to 5, 2 to 3, 2 to 4, and 2 to 5 fall within the scope of this invention. In this invention, the numerical range "a to b" represents a shortened representation of any combination of real numbers between a and b, where both a and b are real numbers. For example, the numerical range "0 to 5" indicates that all real numbers between 0 and 5 have been fully listed in this document; "0 to 5" is merely a shortened representation of this numerical combination. When a parameter is expressed as an integer ≥ 2, it is equivalent to listing positive integers that meet the requirements, such as 2, 3, 4, 5, 6, 7, 8, 9, and 10. When a parameter is expressed as an integer selected from "2 to 10", it is equivalent to listing any integer among 2, 3, 4, 5, 6, 7, 8, 9, and 10.
[0056] In this invention, "a combination of at least two" refers to a quantity greater than or equal to 2 unless otherwise specified. For example, "any one or a combination of at least two" means that any one of the listed items can be selected, or a combination of at least two of the listed items formed in a manner that does not conflict and enables the implementation of this invention. In this invention, unless otherwise specified, the features or solutions corresponding to "and / or" cover any one of two or more related listed items, as well as any and all combinations of the related listed items. The arbitrary and all combinations include any two related listed items, any more related listed items, or a combination of all related listed items. For example, "A and / or B" means a set consisting of A, B, and combinations of A and B, where "containing A and / or B" can be understood, depending on the context of the statement, as containing A, containing B, or simultaneously containing both A and B. In this invention, "optional" means that the corresponding feature, component, step or solution is not necessary, that is, it is selected from either "with" or "without". If there are multiple "optional" limitations in a technical solution, unless otherwise specified and there is no technical conflict or mutual constraint, each "optional" limitation is independent and does not affect the others.
[0057] In this invention, technical features or solutions described using open-ended terms such as "comprising" or "including" do not exclude additional non-conflicting elements beyond the listed elements unless otherwise specified. They are considered to disclose both closed-ended features or solutions consisting solely of the listed elements and open-ended features or solutions that may include additional non-conflicting elements beyond the listed elements. For example, if A includes a1, a2, and a3, unless otherwise specified, this means that A can consist only of a1, a2, and a3, or it can include other non-conflicting elements based on a1, a2, and a3. This corresponds to the disclosure of technical solutions such as "A consists of a1, a2, and a3," "A is selected from a1, a2, and a3," and "A not only includes a1, a2, and a3, but may also include other non-conflicting elements." All embodiments and optional embodiments of this invention, unless otherwise specified and without technical conflict, can be combined to form new technical solutions, and such combinations fall within the scope of this invention. The term "embodiment" as used in this invention means that a specific feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment or implementation of the invention. The appearance of this phrase in various locations throughout the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art will understand, explicitly and implicitly, that the embodiments described in this invention can be combined with other embodiments that do not conflict with the technology. The ordinal numbers "first," "second," "third," and "fourth," etc., used in the expressions "first aspect," "second aspect," "third aspect," and "fourth aspect" in this invention are for descriptive purposes only and should not be construed as indicating or implying relative importance or quantity, nor should they be construed as implicitly specifying the importance or quantity of the indicated technical features. They serve only as a non-exhaustive enumeration and do not constitute a closed limitation on quantity.
[0058] In this invention, the order in which the steps are written in the methods described in each embodiment does not imply a strict execution order. The actual execution order of each step should be determined based on its function and possible internal logic. Unless otherwise specified, all steps of this invention can be executed in the order they are written, or in any order without technical conflict. For example, if the method includes steps (a) and (b), it means that the method may include steps (a) and (b) executed sequentially, or it may include steps (b) and (a) executed sequentially. If the method also includes step (c), then step (c) can be added to the method in any order without conflict, including but not limited to the execution order of steps (a), (b), and (c), steps (a), (c), and (b), steps (c), (a), and (b), etc.
[0059] The term "embodiment" as used in this invention means that a specific feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment or implementation of the invention. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a mutually exclusive, independent, or alternative embodiment. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described in this invention can be combined with other embodiments.
[0060] In this invention, "room temperature" generally refers to 4℃~35℃, and can refer to 20℃±5℃. In some embodiments of this invention, room temperature refers to 20℃~30℃.
[0061] Example 1 This embodiment provides a method for preparing a dielectric coating on a power device substrate. The substrate is a 4H-SiC substrate, and the dielectric coating material is fluorosilicone (Ba2TiSi2O8). The preparation method includes the following steps: S1, Select particle size D 50 High-purity ceramic powder of spherical fluorosilicone (Ba2TiSi2O8) with a particle size of 90 nm and a purity of ≥99.9% was used as the medium raw material. 154.8 g of fluorosilicone, 57 g of water, 0.31 g of ammonium polyacrylate and 0.4 mL of ammonia were weighed and mixed. The mixture was dispersed by ball milling at 600 r / min for 30 min and ultrasonic dispersion at 300 W for 20 min to obtain a stable suspension with a solid volume fraction of 43%, a viscosity of 400 mPa·s and a pH of 11. S2. The front and back sides and edges of the SiC wafer are cleaned by purging with 5N high-purity argon gas; a segmented spin coating process is used for film laying: first, the film is laid at a speed of 500 r / min for 5s, and then the film is homogenized at a speed of 3500 r / min for 40s to obtain a wet film layer with a thickness of 100 μm. S3. Segmented drying is adopted, and the temperature is kept at 60℃ for 20 min, 100℃ for 15 min, and 150℃ for 20 min in sequence. S4. Under an atmosphere with an oxygen partial pressure of 50%, rapid crystallization was completed by annealing at 1000℃ for 3 minutes. After annealing, ultrasonic cleaning was performed sequentially with deionized water, ethanol, and acetone for a total cleaning time of 30 minutes to remove stripping material, floating powder, and surface impurities. Finally, the substrate was dried in a dust-free, constant-temperature environment and purged with high-purity argon to obtain a dense crystalline fluorosilicone dielectric thin film substrate with a thickness of 1 μm; the equivalent oxide layer thickness (EOT) was 156 nm.
[0062] Example 2 This embodiment provides a method for preparing a dielectric coating on a power device substrate. The power device substrate is a 4H-SiC substrate, and the dielectric coating material is barium titanate (BaTiO3). The preparation method includes the following steps: S1, Select D 50High-purity ceramic powder of near-spherical barium titanate (BaTiO3) with a purity of ≥99.9% and a particle size of 15 nm was used as the medium raw material. 228 g of barium titanate, 46.7 g of terpineol, 11.6 g of ethylene glycol monomethyl ether, 0.912 g of polyvinylpyrrolidone and 0.2 mL of dilute acetic acid were weighed and mixed. The mixture was dispersed by ball milling at 500 r / min for 40 min and ultrasonic dispersion at 250 W for 15 min to obtain a stable ceramic suspension with a solid volume fraction of 38 vol%, a viscosity of 188 mPa·s and a pH of 5. S2. The front and back sides and edges of the 4H-SiC wafer are cleaned by purging with 5N high-purity argon gas; a segmented spin coating process is used for film laying: first, the film is laid at a speed of 400r / min for 6s, and then the film is homogenized at a speed of 4000r / min for 30s to obtain a wet film layer with a thickness of 8μm. S3. Segmented drying is adopted, and the temperature is kept at 50℃ for 25 min, 90℃ for 18 min, and 160℃ for 15 min in sequence. S4. Under an atmosphere with an oxygen partial pressure of 45%, rapid crystallization was completed by annealing at 1000℃ for 4 minutes. After annealing, ultrasonic cleaning was performed sequentially with deionized water, ethanol, and acetone for a total cleaning time of 30 minutes to remove stripping material, floating powder, and surface impurities. Finally, the substrate was dried in a dust-free, constant-temperature environment and purged with high-purity argon gas to obtain a dense, crystalline barium titanate dielectric film substrate with a thickness of 80 nm and an EOT of 0.26 nm.
[0063] Example 3 This embodiment provides a method for preparing a dielectric coating on a power device substrate. The power device substrate is a 4H-SiC substrate, and the dielectric coating material is barium strontium titanate (Ba). 0.2 Sr 0.8 TiO3), the preparation method includes the following steps: S1, Select D 50 Spherical barium strontium titanate (Ba) with a wavelength of 5 nm and a purity ≥99.9% 0.2 Sr 0.8 Using high-purity TiO3 ceramic powder as the medium raw material, 182g of barium strontium titanate, 65g of water, 0.546g of polyethyleneimine and 0.5mL of dilute hydrochloric acid were weighed and mixed. The mixture was then mechanically stirred at 1000r / min for 40min and ultrasonically dispersed at 300W for 15min to obtain a stable ceramic suspension with a solid volume fraction of 35vol%, a viscosity of 80mPa·s and a pH of 3. S2. The front and back sides and edges of the 4H-SiC wafer are cleaned by purging with 5N high-purity argon gas; a segmented spin coating process is used for film laying: first, the film is laid at a speed of 450 r / min for 8 s, and then the film is homogenized at a speed of 3800 r / min for 35 s to obtain a wet film layer with a thickness of 3 μm. S3. Segmented drying is adopted, and the temperature is kept at 55℃ for 22 min, 105℃ for 12 min, and 155℃ for 18 min in sequence. S4. Subsequently, rapid crystallization was completed by annealing at 1250℃ for 3 minutes under an oxygen partial pressure of 60%. After annealing, ultrasonic cleaning was performed sequentially with deionized water, ethanol, and acetone for a total cleaning time of 30 minutes to remove stripping material, floating powder, and surface impurities. Finally, the substrate was dried in a dust-free, constant-temperature environment and purged with high-purity argon gas to obtain a dense crystalline barium strontium titanate dielectric film substrate with a thickness of 30 nm and an EOT of 0.39 nm.
[0064] Example 4 This embodiment provides a method for preparing a dielectric coating on a power device substrate. The power device substrate is a 4H-SiC substrate, and the dielectric coating material is lead zirconate titanate (PbZr). 0.5 Ti 0.5 O3), the preparation method includes the following steps: S1, Select D 50 100nm, spherical lead zirconate titanate (PbZr) with a purity ≥99.9% 0.5 Ti 0.5 Using O3 high-purity ceramic powder as the medium raw material, 346.5g of barium titanate, 35.2g of n-octane, 4.74g of N,N-dimethylformamide, 3.465g of oleic acid and 1.7325g of AFCONA-4401 were weighed and dispersed by ball milling at 600r / min for 40min and ultrasonic dispersion at 300W for 20min to obtain a stable ceramic suspension with a solid volume fraction of 45vol% and a viscosity of 480mPa·s. S2. The front and back sides and edges of the 4H-SiC wafer are cleaned by purging with 5N high-purity argon gas; a segmented spin coating process is used for film laying: first, the film is laid at a speed of 400r / min for 6s, and then the film is homogenized at a speed of 3000r / min for 30s to obtain a wet film layer with a thickness of 150μm. S3. Segmented drying is adopted, and the temperature is kept at 60℃ for 20 min, 100℃ for 20 min and 130℃ for 15 min in sequence. S4. Under an atmosphere with an oxygen partial pressure of 50%, rapid crystallization was completed by annealing at 1000℃ for 5 minutes. After annealing, ultrasonic cleaning was performed sequentially with deionized water, ethanol, and acetone for a total cleaning time of 30 minutes to remove stripping material, floating powder, and surface impurities. Finally, the substrate was dried in a dust-free, constant-temperature environment and purged with high-purity argon gas to obtain a dense, crystalline lead zirconate titanate dielectric film substrate with a thickness of 1.5 μm and an EOT of 4.5 nm.
[0065] Example 5 This embodiment provides a method for preparing a dielectric coating on a power device substrate. The power device substrate is a 4H-SiC substrate, and the dielectric coating material is benitoite (BaTiSi3O9). The preparation method includes the following steps: S1, Select D 50 High-purity ceramic powder of spherical benitoite (BaTiSi3O9) with a particle size of 20 nm and a purity of ≥99.9% was used as the medium raw material. 144 g of benitoite powder, 60 g of water, 0.288 g of sodium tripolyphosphate, 0.05 g of sodium dodecyl sulfate and 0.45 mL of ammonia were weighed and dispersed by ball milling at 550 r / min for 20 min and ultrasonic dispersion at 300 W for 15 min to obtain a stable ceramic suspension with a solid volume fraction of 40 vol%, a viscosity of 310 mPa·s and a pH of 12. S2. The front and back sides and edges of the 4H-SiC wafer are cleaned by purging with 5N high-purity argon gas; a segmented spin coating process is used for film laying: first, the film is laid at a speed of 400r / min for 7s, and then the film is homogenized at a speed of 3600r / min for 35s to obtain a wet film layer with a thickness of 10μm. S3. Segmented drying is adopted, and the temperature is kept at 60℃ for 20 min, 100℃ for 10 min, and 150℃ for 20 min in sequence. S4. Under an atmosphere with an oxygen partial pressure of 30%, rapid crystallization was completed by annealing at 1000℃ for 3 minutes. After annealing, ultrasonic cleaning was performed sequentially with deionized water, ethanol, and acetone for a total cleaning time of 20 minutes to remove stripping material, floating powder, and surface impurities. Finally, the substrate was dried in a dust-free, constant-temperature environment and purged with high-purity argon gas to obtain a densely crystalline benioidin fluorosilicon dielectric thin film substrate with a thickness of 100 nm and an EOT of 23 nm.
[0066] Example 6 The difference between this embodiment and Embodiment 1 is that the annealing heat treatment temperature is 1200℃; The remaining preparation methods and parameters are consistent with those in Example 1.
[0067] Example 7 The difference between this embodiment and embodiment 1 is that in step S2, the spin coating is performed directly at a speed of 3000 r / min for 45 seconds without segmented speed adjustment. The remaining preparation methods and parameters are consistent with those in Example 1.
[0068] Example 8 The difference between this embodiment and embodiment 1 is that step S3 is performed by holding at 100°C for 55 minutes, without segmented gradient heating and drying. The remaining preparation methods and parameters are consistent with those in Example 1.
[0069] Comparative Example 1 The difference between this comparative example and Example 1 is that the substrate is a silicon substrate; The remaining preparation methods and parameters are consistent with those in Example 1.
[0070] Comparative Example 2 The difference between this comparative example and Example 1 is that step S1 uses a sol-gel precursor solution, which consists of barium acetate Ba(CH3COO)2, tetrabutyl titanate Ti(OC4H9)4 and tetraethyl orthosilicate Si(OC2H5)4, prepared in a molar ratio of Ba:Ti:Si=2:1:2, with glacial acetic acid as a stabilizer and ethylene glycol methyl ether as a solvent, and a concentration of 0.25mol / L. The remaining preparation methods and parameters are consistent with those in Example 1.
[0071] Comparative Example 3 The difference between this comparative example and Example 1 is that high-purity nitrogen is used in step S4; The remaining preparation methods and parameters are consistent with those in Example 1.
[0072] Structural characterization and performance testing The dielectric coating prepared in Example 1 was subjected to XRD, SEM, and EDS tests, and the light transmittance of the dielectric coatings obtained in Example 1 and Example 6 was compared. The test results are as follows: Figures 1-4 As shown.
[0073] The dielectric constants of Examples 1-8 and Comparative Examples 1-3 were tested using a precision impedance analyzer, and the results are shown in Table 1.
[0074] Table 1 Depend on Figures 1-3 It can be seen that the dielectric coating prepared by the present invention has complete crystallization, dense structure, and uniform elemental distribution; Figure 4 It can be seen that the annealing heat treatment temperature affects the light transmittance of the dielectric coating.
[0075] As can be seen from the comparison of the data of Example 1 and Comparative Examples 1-3 in Table 1, the dielectric coating prepared by the present invention using silicon carbide wafer as substrate and ceramic powder suspension combined with oxygen annealing process has a dielectric constant that is significantly better than that of the comparative examples. This also shows that the synergistic effect of the above three parameters is a necessary condition for achieving the excellent dielectric performance of the present invention, and the technical effect of the present invention cannot be obtained by changing any parameter.
[0076] As can be seen from Examples 1-5 in Table 1, the method of the present invention can be used to prepare dielectric coatings of different materials and thicknesses, and all of them can exhibit excellent dielectric properties. As can be seen from the comparison of the data of Example 1 and Examples 6-8 in Table 1, in the present invention, the annealing temperature, spin coating method and drying method all affect the dielectric constant of the dielectric coating. The preferred method of the present invention can yield a dielectric coating with better performance.
[0077] In summary, by designing the composition and preparation process of the substrate dielectric coating, the present invention produces a dielectric coating with good dielectric properties, suitable thickness, and uniform microstructure.
[0078] The applicant declares that the above description is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Those skilled in the art should understand that any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention fall within the protection and disclosure scope of the present invention.
Claims
1. A method for preparing a dielectric coating on a power device substrate, characterized in that, The preparation method includes: S1. Ceramic powder, additives and solvent are mixed and dispersed to obtain a ceramic suspension. S2. The ceramic suspension is coated onto the surface of a silicon carbide wafer substrate to form a wet film layer; S3. The wet film layer is dried. S4. Annealing heat treatment is performed in an oxygen atmosphere to crystallize and shape the ceramic powder, forming a ceramic crystal thin film dielectric coating on the surface of the silicon carbide wafer substrate.
2. The preparation method according to claim 1, characterized in that, The ceramic powder mentioned in step S1 includes BaTiO3, SrTiO3, and Ba x Sr 1-x TiO3, PbZr x Ti 1-x O3, Ba2TiSi2O8, Sr2TiSi2O8 or BaTiSi3O9, or a combination of at least two of them, wherein 0 < x < 1; Preferably, the ceramic powder in step S1 has a D50 of 1 nm to 500 nm and a purity of ≥99.9%. Preferably, the ceramic powder in step S1 has a spherical or near-spherical particle morphology.
3. The preparation method according to claim 1 or 2, characterized in that, The additives mentioned in step S1 include dispersants; Preferably, the dispersant comprises any one or a combination of at least two of the following: sodium tripolyphosphate, tetramethylammonium hydroxide, ammonium polyacrylate, polyethyleneimine, polyvinylpyrrolidone, sodium dodecyl sulfate, oleic acid, zinc stearate, BYK-163, AFCONA-4401, Hypermer KD9, Isobam-104, or NANOBYK-3620; Preferably, the mass of the dispersant is 0.1% to 2% of the mass of the ceramic powder; Preferably, when the dispersant includes polyethyleneimine and / or polyvinylpyrrolidone, the additive in step S1 further includes an acidic pH adjuster, which includes any one or a combination of at least two of dilute hydrochloric acid, glacial acetic acid or anhydrous phosphoric acid, and the pH value of the ceramic suspension is 2 to 4. Preferably, when the dispersant includes any one or a combination of at least two of sodium tripolyphosphate, tetramethylammonium hydroxide, ammonium polyacrylate, sodium dodecyl sulfate, or Isobam-104, the additive in step S1 further includes an alkaline pH adjuster, which includes any one or a combination of at least two of ammonia, diethylamine, or dimethylethanolamine, and the pH value of the ceramic suspension is 10-12. Preferably, the solvent in step S1 includes water and a first organic solvent, wherein the first organic solvent includes any one or a combination of at least two of the following: n-octane, n-hexane, N,N-dimethylformamide, xylene, ethylene glycol monomethyl ether, or terpineol.
4. The preparation method according to any one of claims 1-3, characterized in that, The dispersion treatment method described in step S1 includes any one or a combination of at least two of mechanical stirring, ultrasonic dispersion, or ball milling dispersion; Preferably, the mechanical stirring speed is 300 r / min to 1500 r / min, and the time is 10 min to 60 min; Preferably, the ultrasonic dispersion power is 100W~500W, and the time is 5min~30min; Preferably, the ball milling dispersion is performed at a rotation speed of 200 r / min to 800 r / min for a time of 30 min to 120 min; Preferably, the solid content of the ceramic suspension in step S1 is 35 vol% to 50 vol%, and the viscosity is 5 mPa·s to 500 mPa·s.
5. The preparation method according to any one of claims 1-4, characterized in that, Before the coating process described in step S2, the silicon carbide wafer substrate is cleaned. Preferably, the cleaning process includes: using a protective gas to blow away dust from the surface and edges of the silicon carbide wafer substrate; Preferably, the coating method in step S2 includes: first, dropping the ceramic suspension onto the surface of the silicon carbide wafer substrate, and then spin-coating in segments with adjustable speed; Preferably, the segmented speed-adjustable spin coating method includes: first laying the film at a speed of 300r / min to 800r / min for 3s to 10s, and then uniformly coating the film at a speed of 2000r / min to 6000r / min for 10s to 120s; Preferably, the thickness of the wet film layer in step S2 is 0.1 μm to 200 μm.
6. The preparation method according to any one of claims 1-5, characterized in that, The drying process described in step S3 includes segmented gradient temperature drying; Preferably, the segmented gradient heating drying includes: a first stage of heating to 40℃~80℃ and holding for 5min~45min; a second stage of heating to 80℃~120℃ and holding for 10min~20min; and a third stage of heating to 120℃~180℃ and holding for 15min~30min, wherein the cutoff temperatures of the first stage, the second stage, and the third stage of heating increase sequentially.
7. The preparation method according to any one of claims 1-6, characterized in that, The oxygen partial pressure of the oxygen-containing atmosphere described in step S4 is 10%~100%; Preferably, the annealing heat treatment in step S4 is performed at a temperature of 900℃~1250℃ for a time of 3min~15min; Preferably, the thickness of the ceramic crystal thin film dielectric coating in step S4 is 20 nm to 2 μm.
8. The preparation method according to any one of claims 1-7, characterized in that, After step S4, the silicon carbide wafer substrate after annealing heat treatment is sequentially cleaned and dried; Preferably, the cleaning method includes: performing segmented ultrasonic cleaning sequentially with water and a second organic solvent; Preferably, the second organic solvent includes any one or a combination of at least two of ethanol, acetone, toluene, xylene, isopropanol, anhydrous diethyl ether, ethylene glycol, or ethyl acetate; Preferably, the total time for the segmented ultrasonic cleaning is 10 min to 60 min, and the time for cleaning a single segment is 3 min to 10 min; Preferably, the ultrasonic power of the segmented ultrasonic cleaning is 50W~300W.
9. A dielectric coating on a power device substrate prepared by the preparation method according to any one of claims 1-8.
10. The application of the power device substrate dielectric coating as described in claim 9 in a power device.