A full-temperature-zone electric energy metering precision compensation system

Abstract

The application discloses a kind of full temperature zone electric energy metering precision compensation systems, including hardware sampling unit, voltage reference unit, ADC analog-digital conversion unit and DSP multi-source error decoupling compensation unit.The system is combined by hardware optimization and compensation algorithm, the comprehensive influence of current sampling nonlinearity, channel phase mismatch, reference voltage drift and mutual inductor angle difference change in full temperature zone on the measurement accuracy is systematically inhibited, so as to realize that the measurement error of high-precision electric energy meter is stable in full temperature range It is better than ±0.05%.The technical scheme disclosed in the application provides an effective technical scheme for high-precision metering of gateway electric energy meter under wide temperature range and multiple working conditions, and has practical engineering value for improving the fairness of power grid trade settlement and the accuracy of line loss assessment.

Description

Technical Field

[0001] This application relates to the field of power technology, and in particular to a full-temperature-range electricity meter metering accuracy compensation system. Background Technology

[0002] Currently, existing high-precision energy meters suffer from insufficient metering accuracy across the entire temperature range (-45℃ to +85℃). This problem is mainly caused by the following factors, which current technologies cannot yet solve, specifically in the following aspects:

[0003] (1) Under low current conditions, current transformers have poor linearity and large angle difference.

[0004] Traditional iron-core current transformers are based on the principle of electromagnetic induction and are affected by excitation current. When the primary current is small, the proportion of excitation current increases significantly, leading to a decrease in transformer linearity and a phase difference deviation of 180°. This results in a significant increase in measurement error in the low current range, making it difficult to meet the requirements of wide-range, high-precision measurement.

[0005] (2) The voltage and current sampling channels have an additional phase difference mismatch.

[0006] Due to differences in component parameters and topology, the current sampling channel (including transformers, signal conditioning, and anti-aliasing filters) and voltage sampling channel (including voltage divider network and anti-aliasing filters) of an electricity meter will produce differential additional phase differences for signals of the same frequency. Traditional methods struggle to maintain consistent phase difference between the two channels over a wide frequency band (from the fundamental frequency to the 64th harmonic), thus introducing metering angle differences, which are further amplified, especially under low power factor and harmonic operating conditions.

[0007] (3) Voltage reference chips have problems with temperature drift, thermal hysteresis and batch consistency across the entire temperature range.

[0008] Voltage reference chips provide a reference level for analog-to-digital converters (ADCs), and their output voltage drifts with temperature changes. Some existing brand-name chips (including some foreign brands) exhibit significant thermal hysteresis (room temperature hysteresis deviation after high and low temperature cycling) and poor batch consistency (discrete temperature variation patterns among samples of the same model, even resulting in abnormal individual products), leading to unstable reference voltage across the entire temperature range. A drift of only 0.2mV can cause approximately 0.012% measurement error, which is unacceptable for high-precision energy meters requiring an error better than ±0.1% across the entire temperature range. Furthermore, due to poor batch consistency, standardized temperature compensation algorithms are not universally applicable.

[0009] (4) The temperature compensation algorithm does not perform real-time, multi-correction for key error sources.

[0010] Existing compensation schemes either only perform initial calibration without tracking temperature changes, or the compensation model does not distinguish the differences in error sources under different power factors (the error at a power factor of 1.0 mainly comes from the reference temperature drift, while at a power factor of 0.5L, the change in transformer angle difference with temperature also needs to be superimposed), resulting in a large residual error across the entire temperature range, which cannot be stably controlled within ±0.1%.

[0011] Therefore, there is an urgent need to provide a comprehensive technical solution that can simultaneously address the aforementioned technical problems affecting the metering accuracy of electricity meters across the entire temperature range. Summary of the Invention

[0012] The purpose of this application is to provide a compensation system that can improve the metering accuracy of electricity meters across the entire temperature range.

[0013] This application discloses a full-temperature-range energy meter metering accuracy compensation system, including a hardware sampling unit, a voltage reference unit, an ADC analog-to-digital converter (ADC), and a DSP multi-source error decoupling compensation unit. The input terminal of the hardware sampling unit is connected to the power grid, and the output terminal is connected to the analog signal input terminal of the ADC. The reference voltage output by the voltage reference unit is fed into the ADC and the hardware sampling unit. The digital sampling data output by the ADC is fed into the DSP multi-source error decoupling compensation unit, and the compensation coefficient output by the DSP multi-source error decoupling compensation unit is fed into the metering chip. The hardware sampling unit is used to input the three-phase voltage of the power grid. The signal and three-phase current signal are conditioned; the voltage reference unit is used to provide a reference voltage for the ADC analog-to-digital converter unit and the hardware sampling unit. The voltage reference unit includes a high-precision voltage reference chip and an external power supply circuit. The high-precision voltage reference chip is obtained through four-dimensional screening; the ADC analog-to-digital converter unit is used to synchronously convert the conditioned voltage signal and current signal into digital sampling data. The ADC analog-to-digital converter unit adopts a multi-channel synchronous high-precision analog-to-digital converter; the DSP multi-source error decoupling compensation unit is used to calculate the compensation coefficient. The DSP multi-source error decoupling compensation unit includes a temperature sensor and a digital signal processor. The temperature sensor is arranged near the metering chip.

[0014] According to some embodiments, the calculation steps of the compensation coefficient include:

[0015] The digital signal processor receives digital sampling data from the ADC analog-to-digital conversion unit, and simultaneously acquires temperature data t output by the temperature sensor.

[0016] If t is within the range of -55℃ to 150℃, then calculate the real-time power factor. Otherwise, reset the compensation coefficient to zero, report a sensor fault, and end the process.

[0017] like If the power factor is ≥0.9, it is determined to be a 1.0 power factor operating condition, and the compensation coefficient y is calculated using the formula. Calculate and end the process;

[0018] If 0.6≥ A power factor ≥0.4 is considered a 0.5L power factor condition, and the compensation coefficient y is calculated using the formula... Calculate and end the process;

[0019] If 0.9> >0.6 or If the value is less than 0.4, the calibrated parameters will be used, and the process will end.

[0020] According to some embodiments, the step of obtaining a high-precision voltage reference chip through four-dimensional screening includes:

[0021] The voltage reference chip was placed in a high and low temperature test chamber for continuous temperature cycling test.

[0022] Test the output voltage and operating temperature of the voltage reference chip according to the sampling period;

[0023] Four-dimensional evaluation indicators were calculated, including temperature drift coefficient, thermal hysteresis, batch consistency, and long-term stability. The temperature drift coefficient is the drift amplitude of the output voltage across the entire temperature range of -45℃ to 85℃, expressed in ppm / ℃. The thermal hysteresis is the difference between the initial voltage at room temperature before heating and the voltage after temperature cycling back to room temperature. The batch consistency is the dispersion of the temperature change curves of at least N samples of the same model, where N is a positive integer. The long-term stability is the voltage drift data from a 1000-hour continuous aging test, expressed in ppm / 1000h.

[0024] The voltage reference chip performance is evaluated by a comprehensive score based on four dimensions of evaluation indicators. The weight of thermal hysteresis is set as follows: > weight of batch consistency > weight of temperature drift coefficient > weight of long-term stability. Each voltage reference chip is graded according to the four dimensions of evaluation indicators. Unqualified voltage reference chips with large thermal hysteresis, serious batch dispersion, and abnormal temperature change trend are eliminated. The grading is divided into excellent, good and poor grades.

[0025] We selected voltage reference chip models that achieved excellent ratings across all four evaluation dimensions, exhibited uniform temperature change curves, and had minimal room temperature hysteresis offset; we verified that the measurement error of this voltage reference chip across the entire temperature range was <0.03%.

[0026] According to some embodiments, the temperature cycle is as follows: uniformly raising the temperature from room temperature to 85°C, holding at 85°C and then uniformly lowering the temperature to -45°C, holding at -45°C and then uniformly raising the temperature back to room temperature.

[0027] According to some embodiments, the sampling period is 10 seconds.

[0028] In some implementations, N is taken as 8.

[0029] According to some embodiments, a six-and-a-half-digit digital multimeter is used to test the output voltage of a voltage reference chip.

[0030] According to some embodiments, the hardware sampling unit includes a resistor divider network, a voltage sampling pre-amplifier circuit, a passive zero-flux current transformer, and a current sampling pre-amplifier circuit. The three-phase grid voltage signal is divided by the resistor divider network, processed by the voltage sampling pre-amplifier circuit, and then sent to the ADC analog-to-digital converter unit. The voltage sampling pre-amplifier circuit is a configurable RC anti-aliasing filter circuit. The three-phase grid current signal passes through the passive zero-flux current transformer, is processed by the current sampling pre-amplifier circuit, and then sent to the ADC analog-to-digital converter unit. The current sampling pre-amplifier circuit includes a fixed sampling resistor and a configurable RC anti-aliasing filter circuit.

[0031] According to some embodiments, the parameters of the configurable RC anti-aliasing filter circuit are as follows: the resistance R is 100Ω and the capacitance C is 1nF.

[0032] According to some embodiments, the reference voltage is 2.5V.

[0033] The technical solution disclosed in this application constructs a full-temperature-range energy meter metering accuracy compensation system through a comprehensive approach combining hardware and accuracy compensation algorithms. In terms of hardware, the technical solution employs a combination of a zero-flux current transformer, a phase matching circuit, and a highly stable voltage reference chip. The passive zero-flux current transformer uses electromotive force compensation to ensure the main magnetic core operates in a near-zero flux state, effectively improving linearity and phase difference characteristics under low-current conditions. The phase matching technology optimizes the anti-aliasing filter parameters of the voltage and current sampling channels, making the additional phase difference between the two channels in the 0–3.2kHz frequency band more consistent, thus reducing the phase difference amplification effect under low power factor conditions from the source. The optimized voltage reference chip, based on full-temperature cycling testing, controls the metering error introduced by reference temperature drift to within 0.01%, eliminating the systemic risks caused by batch dispersion and thermal hysteresis. Regarding the accuracy compensation algorithm, the technical solution disclosed in this application adopts a real-time temperature compensation algorithm for different operating conditions to further reduce residual errors. By distinguishing between two typical operating conditions of 1.0 and 0.5L through power factor discrimination, a compensation model for voltage reference temperature drift and a temperature-error compensation model for transformer angle difference are established respectively to achieve accurate error correction. Based on hardware optimization, this algorithm improves the extreme value of error in the entire temperature range by about 43.4%.

[0034] The technical solution disclosed in this application has the following beneficial effects: By combining hardware optimization and compensation algorithms, the combined effects of current sampling nonlinearity, channel phase mismatch, reference voltage drift, and transformer angle difference variation on metering accuracy across the entire temperature range are systematically suppressed, thereby achieving a metering error of better than ±0.05% for high-precision energy meters across the entire temperature range. The technical solution disclosed in this application provides an effective technical solution for high-precision metering of energy meters at the gateway under wide temperature range and multiple operating conditions, and has practical engineering value for improving the fairness of power grid trade settlement and the accuracy of line loss assessment. Attached Figure Description

[0035] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0036] Figure 1 A block diagram of a full-temperature-range energy meter metering accuracy compensation system according to an example embodiment is shown.

[0037] Figure 2 A flowchart illustrating the calculation of the metering accuracy compensation coefficient for a full-temperature-range energy meter according to an example embodiment is shown.

[0038] Figure 3 A schematic diagram of a zero-flux current transformer according to an example embodiment is shown.

[0039] Figure 4 A typical current preamplifier circuit diagram according to an example embodiment is shown.

[0040] Figure 5 A typical voltage preamplifier circuit diagram according to an example embodiment is shown.

[0041] Figure 6 The frequency response curves of the amplitude difference between the voltage preamplifier channel and the current preamplifier channel according to an example embodiment are shown.

[0042] Figure 7 The frequency response curves of the phase difference between the voltage preamplifier channel and the current preamplifier channel according to an example embodiment are shown.

[0043] Figure 8 A block diagram of a voltage reference chip screening system according to an example embodiment is shown.

[0044] Figure 9 The diagram shows a voltage reference versus temperature curve for a voltage reference chip from a foreign brand according to an example embodiment.

[0045] Figure 10 The diagram shows the voltage reference versus temperature curves of a foreign brand voltage reference chip according to an example embodiment.

[0046] Figure 11 The voltage reference versus temperature curve of the voltage reference chip selected according to this embodiment of the example embodiment is shown.

[0047] Figure 12 A data point plot showing the effect of a reference chip on metrological errors according to an example embodiment is shown.

[0048] Figure 13 The diagram shows the temperature versus angle difference curves at various current points of a zero-flux current transformer according to an example embodiment.

[0049] Figure 14 A comparison graph showing the error before and after power factor compensation according to the example embodiment is shown.

[0050] Figure 15 A comparison graph showing the error before and after 0.5L power factor compensation according to an example embodiment is shown. Detailed Implementation

[0051] The embodiments of this application will now be described in detail with reference to the accompanying drawings. It should be understood that the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0052] Those skilled in the art should understand that the following specific embodiments or implementation methods are a series of optimized configurations listed in this application to further explain the specific application content. These configuration methods can be combined or used in conjunction with each other, unless this application explicitly states that some or a specific embodiment or implementation method cannot be associated with or used in conjunction with other embodiments or implementation methods. Furthermore, the following specific embodiments or implementation methods are only considered as optimized configurations and are not intended to limit the scope of protection of this application.

[0053] Example 1:

[0054] Figure 1 A block diagram of a full-temperature-range energy meter metering accuracy compensation system according to an example embodiment is shown. Figure 1As shown, a full-temperature-range energy meter metering accuracy compensation system includes a hardware sampling unit 101, a voltage reference unit 102, an ADC analog-to-digital converter unit 103, and a DSP multi-source error decoupling compensation unit 104. The input terminal of the hardware sampling unit 101 is connected to the power grid, and the output terminal of the hardware sampling unit 101 is connected to the analog signal input terminal of the ADC analog-to-digital converter unit 103. The reference voltage output by the voltage reference unit 102 is fed into the ADC analog-to-digital converter unit 103 and the hardware sampling unit 101. The digital sampling data output by the ADC analog-to-digital converter unit 103 is fed into the DSP multi-source error decoupling compensation unit 104, and the compensation coefficient output by the DSP multi-source error decoupling compensation unit 104 is fed into the metering chip.

[0055] The ADC analog-to-digital converter unit 103 is used to synchronously convert the conditioned voltage signal and current signal into digital sampling data. The ADC analog-to-digital converter unit 103 adopts a multi-channel synchronous high-precision analog-to-digital converter.

[0056] The hardware sampling unit 101 includes a voltage sampling channel and a current sampling channel. The voltage sampling channel includes a resistor divider network and a voltage sampling pre-amplifier circuit, while the current sampling channel includes a passive zero-flux current transformer and a current sampling pre-amplifier circuit. The three-phase grid voltage signal is divided by the resistor divider network, processed by the voltage sampling pre-amplifier circuit, and then sent to the ADC analog-to-digital converter unit 103. The voltage sampling pre-amplifier circuit is a configurable RC anti-aliasing filter circuit. The three-phase grid current signal passes through the passive zero-flux current transformer, is processed by the current sampling pre-amplifier circuit, and then sent to the ADC analog-to-digital converter unit 103. The current sampling pre-amplifier circuit includes a fixed sampling resistor and a configurable RC anti-aliasing filter circuit.

[0057] Figure 4 A typical current preamplifier circuit diagram according to an example embodiment is shown.

[0058] This embodiment uses, as follows: Figure 4 The current preamplifier circuit shown is shown. Figure 4 In this circuit, T1 is a passive zero-flux current transformer, R1 is the current sampling resistor, R2 and C form an anti-aliasing filter circuit, R4 is the input impedance of the ADC, and 2.5V provides a stable bias voltage for current sampling, ensuring the sampled signal is within the ADC's range. The phase frequency characteristic of the current transformer T1 depends on the phase frequency characteristic of the current transformer (CT), and the phase frequency characteristic of the current sampling circuit depends on the anti-aliasing filter circuit. Therefore, the transfer function of the equivalent circuit of the current sampling channel is... .

[0059] To achieve high-precision measurement over a wide range, current sensors are crucial. Most commercially available current sensors are iron-core current transformers (CTs). In metering applications, an excitation current is typically present, causing the primary and secondary currents to no longer be proportional, and the phase difference between them is no longer 180°. When the primary current is large, the effect of the excitation current is essentially negligible. However, when the primary current is small, the effect of the excitation current is significant. In the low-current range, the linearity of the current transformer decreases, and the phase difference increases.

[0060] Considering some shortcomings of the aforementioned iron-core current transformers, this invention employs a zero-flux current sensing technology to ensure accurate measurement in the low-current range. This technology compensates externally to the current transformer (CT) to minimize the magnetic flux in the iron core, bringing it to approximately zero, almost negligible, thereby improving the CT's accuracy. Currently, there are two schemes to achieve zero flux: active and passive schemes. The active scheme provides the transformer with an opposite electromotive force (EMF) through an external circuit, but because this EMF needs to be in phase with the CT's EMF, the external circuitry becomes more complex. The passive scheme, on the other hand, directly provides the opposite EMF by superimposing an auxiliary current transformer onto the main CT. Compared to the active scheme, the passive scheme does not require the magnetic flux of the main current transformer to provide the EMF, nor does it require additional external circuitry, making it much simpler to implement.

[0061] Figure 3 A schematic diagram of a zero-flux current transformer according to an example embodiment is shown.

[0062] like Figure 3 As shown, the zero flux CT consists of main core I, auxiliary core II, and primary coil. Secondary coil and auxiliary coil composition. Winding is done simultaneously on both cores, but less is wound on the auxiliary core. Turn. When At that time, the zero flux current transformer eliminates the excitation current, making the ratio difference and phase difference approach zero. The ratio of the actual secondary current to the primary current is equal to the rated current ratio. The secondary current can accurately reflect the magnitude and phase of the primary current, thus obtaining a high-precision current transformer.

[0063] Figure 5 A typical voltage preamplifier circuit diagram according to an example embodiment is shown.

[0064] This embodiment adopts Figure 5 The circuit diagram shown is for a voltage preamplifier. Figure 5In this circuit, L1 and L2 are magnetic rings, Rv is a varistor, C is a power supply filter capacitor, R1 and R2 together form a voltage divider circuit, R3 and C form an anti-aliasing filter circuit, and R4 is the input impedance of the ADC. 2.5V provides a stable reference voltage for sampling. L1, L2, and Rv are protection devices; their influence on amplitude and phase frequency characteristics is negligible within the power frequency and the highest 64th harmonic (interharmonic) frequency band. The equivalent transfer function of the voltage sampling channel is... .

[0065] The resistor divider network is a purely resistive circuit and produces almost no phase shift. Therefore, the additional phase shift and amplitude attenuation in the voltage sampling channel are dominated solely by the RC anti-aliasing filter circuit.

[0066] The key to phase matching technology lies in adjusting circuit parameters to make the additional phase difference generated by the preamplifier units of the voltage and current loops as similar as possible. Since the phase shift characteristics of the current sampling channel cannot be adjusted once the CT model is determined, while the resistor divider network in the voltage sampling channel has little impact on the phase shift characteristics of the overall circuit, the phase matching requirement can be achieved by adjusting the parameters of the anti-aliasing filter circuit.

[0067] Establish the phase-matching objective function: The optimization target is the entire frequency band from 0 to 3.2 kHz. Minimum, The phase of the voltage channel. This represents the phase of the current path.

[0068] The simulation constraints and test frequencies are determined as follows: covering the fundamental frequency from 50Hz to the 64th harmonic at 3.2kHz; key evaluation frequencies: 50Hz fundamental frequency and 3.2kHz highest harmonic; evaluation indicators are the amplitude difference and phase difference of the dual channels at each frequency, with the phase difference being the core optimization indicator; the RC parameter traversal range is set as follows: resistance 100Ω / 680Ω / 1kΩ, capacitance 100pF / 1nF / 10nF, forming a total of 9 parameter combinations.

[0069] Nine sets of RC parameters were sequentially substituted into the transfer function model to perform batch simulations calculating the amplitude and phase differences at two frequency points: 50Hz and 3.2kHz. Tables were generated to record the percentage of amplitude error and the fractional arc of phase error for each set of parameters. The amplitude-frequency and phase-frequency characteristic curves for the entire 0~3.2kHz frequency band were output as follows: Figure 6 , Figure 7 As shown.

[0070] Figure 6 The frequency response curves of the amplitude difference between the voltage preamplifier channel and the current preamplifier channel according to an example embodiment are shown.

[0071] Figure 7The frequency response curves of the phase difference between the voltage preamplifier channel and the current preamplifier channel according to an example embodiment are shown.

[0072] Prioritize comparing the phase difference at the 3.2kHz high-frequency harmonic point (harmonic measurement is a core performance indicator in the industry); compare the amplitude and phase error of the 50Hz fundamental frequency as auxiliary constraints; and select the 100Ω, 1nF combination to achieve a dual-channel phase difference of only [value missing] at the 3.2kHz frequency point. The amplitude difference across the entire frequency band is the lowest and is preliminarily determined as the optimal parameter.

[0073] Complete amplitude-frequency and phase-frequency curves from 0 to 3.2 kHz were plotted separately for the 100Ω / 1nF parameter. This verified a high degree of overlap in the additional phase shifts of the two channels across the entire frequency band, with no local phase abrupt changes. Comparison with the curves of the other eight parameter sets confirmed that this combination exhibits optimal phase consistency in both the fundamental and all harmonic ranges. Ultimately, 100Ω and 1nF were determined to be the standard optimal matching RC parameters. Therefore, in this embodiment, the configurable parameters for the RC anti-aliasing filter circuit are: a resistance of 100Ω and a capacitance of 1nF.

[0074] The voltage reference unit 102 is used to provide a reference voltage for the ADC analog-to-digital conversion unit 103 and the hardware sampling unit 101. The voltage reference unit 102 includes a high-precision voltage reference chip and an external power supply circuit. The high-precision voltage reference chip is obtained through four-dimensional screening.

[0075] Figure 8 A block diagram of a voltage reference chip screening system according to an example embodiment is shown.

[0076] like Figure 8 As shown, the voltage reference chip selection system includes a test fixture, a host computer, and a 6.5-digit digital multimeter. The test fixture and the host computer are interconnected via RS485 communication, while the 6.5-digit digital multimeter is interconnected with the host computer via Ethernet. The host computer sends a channel selection command to the test fixture board via RS485 communication. Upon receiving the command, the MCU on the test fixture board selects the voltage reference chip for the corresponding channel. Simultaneously, the MCU collects the ambient temperature data via an internal sensor and transmits it back to the host computer via RS485 communication. The 6.5-digit digital multimeter collects the voltage signal of the reference chip for the corresponding channel and uploads it to the host computer via Ethernet.

[0077] This embodiment uses a voltage reference chip screening system to perform four-dimensional screening to obtain a high-precision voltage reference chip, including the following steps:

[0078] Install the same model / different brand of voltage reference chips into the 16-channel SOP-8 test socket of the test fixture. A maximum of 16 samples can be tested at the same time in a single batch. The fixture is connected to a 220V isolated power supply, and the regulated power supply outputs a stable 5V to power the reference chips. The fixture's RS485 interface is connected to the host computer software, and the analog switch output channel is connected to a 6.5-digit digital multimeter. Place the entire test fixture into a high and low temperature test chamber to complete the hardware setup.

[0079] The host computer software sets the temperature cycle curve: uniformly heat up from room temperature to 85℃, hold at 85℃ and then uniformly cool down to -45℃, hold at -45℃ and then uniformly heat back to room temperature; set the sampling period to 10s, automatically switch the fixture channel every 10s, collect the real-time output voltage of a single chip and the fixture ambient temperature; start automatic testing, the host computer synchronously records the raw data of temperature and reference voltage of each chip across the entire temperature range, automatically saves it to an Excel document and plots the temperature change curve in real time.

[0080] After the test is completed, all data is exported and quantitatively calculated for each chip based on four indicators:

[0081] Dimension 1: Temperature drift coefficient: Extracts the voltage extreme value difference across the entire temperature range of -45℃ to 85℃, converts it to ppm / ℃, and characterizes the amplitude of the basic temperature drift.

[0082] Dimension 2: Thermal hysteresis: Extract the initial voltage at room temperature before heating and the voltage at room temperature after temperature cycling and cooling back. The difference between the two is the thermal hysteresis offset, which is converted into the corresponding metering error of the electricity meter.

[0083] Dimension 3: Batch consistency: The dispersion of temperature change curves of at least 8 samples of the same model, the stratification shift of the statistical curves, and whether there are any individual products with abnormal trends;

[0084] Dimension 4: Long-term stability: retrieve voltage drift data from 1000h continuous aging test, in ppm / 1000h, to characterize the long-term grid connection error drift of the electricity meter.

[0085] The voltage reference chip performance is evaluated by a comprehensive score based on four dimensions of evaluation indicators. The weight of thermal hysteresis is set as follows: > weight of batch consistency > weight of temperature drift coefficient > weight of long-term stability. Each voltage reference chip is graded according to the four dimensions of evaluation indicators. Unqualified voltage reference chips with large thermal hysteresis, serious batch dispersion, and abnormal temperature change trend are eliminated. The grading is divided into excellent, good and poor grades.

[0086] We selected voltage reference chip models that achieved excellent ratings across all four evaluation dimensions, exhibited uniform temperature change curves, and had minimal room temperature hysteresis offset; we verified that the measurement error of this voltage reference chip across the entire temperature range was <0.03%.

[0087] This embodiment selects nine voltage reference chips from five manufacturers and conducts temperature cycling tests within the temperature range of -45℃ to 85℃. The output voltage at different temperature points is recorded simultaneously. The chips are then screened according to the four-dimensional screening process described above. The results are as follows:

[0088] Figure 9 The diagram shows a voltage reference versus temperature curve for a voltage reference chip from a foreign brand according to an example embodiment.

[0089] like Figure 9 As shown, the temperature characteristics of a voltage reference chip from a certain foreign brand 1 have the following features:

[0090] 1) Significant thermal hysteresis: All samples formed open-loop curves, and the reference voltages for returning to room temperature from low temperature and high temperature did not coincide, with an average deviation of 0.4mV, which is equivalent to a fixed error of about 0.024% for the electricity meter.

[0091] 2) Poor batch consistency: The curves of the 10 samples showed obvious stratification, and the temperature change trend of sample No. 5 was completely different from that of the other 9 samples, indicating that the general temperature compensation algorithm failed.

[0092] 3) Temperature drift trend: Excluding sample 5, the remaining 9 samples showed a U-shaped change. The voltage rise dispersion was large in the low temperature range and the convergence was slightly better in the high temperature range.

[0093] 4) Stability of the temperature chamber: The voltage stabilizes quickly after returning to room temperature, but the error has been solidified and shifted.

[0094] Figure 10 The diagram shows the voltage reference versus temperature curves of a foreign brand voltage reference chip according to an example embodiment.

[0095] like Figure 10 As shown, the temperature characteristics of a voltage reference chip from a certain foreign brand 2 have the following features:

[0096] 1) Significant and unstable thermal hysteresis: All 6 samples formed open rings, and the two temperature cycling trajectories in the low temperature region did not overlap, resulting in poor error repeatability.

[0097] 2) Large fluctuations at room temperature: The voltage fluctuates significantly after returning to room temperature, and the error drifts significantly after leaving the temperature chamber.

[0098] 3) Extremely poor batch consistency: Sample No. 6 is abnormal and the general algorithm cannot be adapted.

[0099] 4) Temperature drift trend: It is inverted arch shape. The voltage rises to the peak value in the low temperature section and then decreases monotonically. The dispersion in the low temperature region is higher than that in the high temperature region.

[0100] Figure 11 The voltage reference versus temperature curve of the voltage reference chip selected according to this embodiment of the example embodiment is shown.

[0101] like Figure 11 As shown, the voltage reference chip selected in this embodiment has the following temperature characteristics:

[0102] 1) Low thermal hysteresis: All 8 samples had hysteresis loops, but the opening width was much smaller than the previous two samples, resulting in lower measurement error caused by the hysteresis voltage deviation at room temperature.

[0103] 2) Good stability of the temperature chamber: After returning to room temperature, the voltage stabilizes quickly and the error no longer drifts.

[0104] 3) Excellent batch consistency: The 8 curves are arranged in layers but follow a consistent pattern, with no abnormal deviations from the samples. The unified temperature compensation algorithm can effectively compensate for this.

[0105] 4) Temperature drift trend: It shows a standard U-shape. The voltage decreases as the temperature decreases in the low temperature range and increases monotonically in the high temperature range. The dispersion of high and low temperatures is similar.

[0106] 5) Narrow voltage range: concentrated between 2.4995V and 2.5010V, with measured temperature drift dispersion better than two foreign brands.

[0107] Based on the test results of three benchmark chips and six other chips, the two foreign brand benchmark chips generally have problems such as large thermal hysteresis, poor batch consistency, and severe parameter dispersion in the low temperature range. Some individual products have abnormal temperature change patterns, which will not only introduce fixed measurement errors, but also make it impossible to implement standardized temperature compensation algorithms. The other six chips, which are not detailed, also fail to meet the high-precision measurement requirements in terms of temperature drift, hysteresis, and stability.

[0108] In this embodiment, the brand voltage reference chip with the best overall performance was selected. Test data shows that even a 0.2mV drift in the reference voltage can cause a 0.012% metering error in the electricity meter. For high-precision electricity meters requiring an error better than ±0.1% across the entire temperature range, even a small deviation in the reference source will be amplified, directly impacting the metering accuracy threshold. By using an automated screening system to perform batch testing and selection of voltage reference chips, systematic errors caused by temperature drift and thermal hysteresis can be controlled at the device source. This also ensures consistent characteristics within the same batch of products, allowing the backend multi-dimensional temperature compensation algorithm to achieve optimal correction.

[0109] The DSP multi-source error decoupling compensation unit 104 is used to calculate the compensation coefficient. The DSP multi-source error decoupling compensation unit 104 includes a temperature sensor and a digital signal processor. The temperature sensor is arranged near the metering chip.

[0110] Figure 2 A flowchart illustrating the calculation of the metering accuracy compensation coefficient for a full-temperature-range energy meter according to an example embodiment is shown. Figure 2 As shown, the calculation process for the metering accuracy compensation coefficient of a full-temperature-range electricity meter is as follows:

[0111] In step S201, the process begins.

[0112] In step S202, the digital signal processor receives digital sampling data from the ADC analog-to-digital conversion unit 103, and the digital signal processor simultaneously acquires the temperature value T output by the temperature sensor.

[0113] In step S203, it is determined whether the temperature value T is within the range of -55℃ to 150℃; if the temperature value T is within the range of -55℃ to 150℃, then step S204 is executed; otherwise, step S211 is executed.

[0114] In step S204, the real-time power factor is calculated. .

[0115] In step S205, power factor is adjusted accordingly. Operating condition determination; if If ≥0.9, proceed to step S206; if 0.6 ≥ If ≥0.4, proceed to step S207; if 0.9 > >0.6 or If the value is less than 0.4, then proceed to step S208.

[0116] In step S206, the power factor is determined to be 1.0, the temperature error fitting model is called, and step S209 is executed.

[0117] In step S207, the power factor is determined to be 0.5L, the comprehensive compensation model is invoked, and step S209 is executed.

[0118] In step S208, the factory calibration parameters are used without performing real-time compensation, and step S212 is executed.

[0119] In step S209, the active power compensation coefficient y at the current temperature is calculated based on the model called in step S206 or step S207.

[0120] In step S210, the compensation coefficient y is written into the metering chip register, the compensation parameters are updated, and step S212 is executed.

[0121] In step S211, the compensation coefficient is cleared and a sensor fault is reported, then step S212 is executed.

[0122] In step S212, the process ends.

[0123] The temperature error fitting model in step S206 is as follows:

[0124] Under a power factor of 1.0, the measurement error mainly originates from the temperature drift characteristics of the voltage reference chip, and the error exhibits a cubic function relationship with temperature. Five sample meters that have completed initial calibration were selected, and the measurement error across the entire temperature range was tested at the Ib current point. The error and voltage reference characteristics as a function of temperature are shown in the curves below. Figure 12 As shown.

[0125] Figure 12 A data point plot showing the effect of a reference chip on metrological errors according to an example embodiment is shown.

[0126] The error variation trend across the entire temperature range is basically consistent with the reference variation, indicating that the voltage reference has a significant impact on the measurement error. A cubic polynomial is used to fit the error scatter points to obtain a temperature error fitting model.

[0127] In the formula, y is the error compensation value and t is the current ambient temperature.

[0128] The comprehensive compensation model in step S207 is as follows:

[0129] At a power factor of 0.5L, the metering error mainly consists of two superimposed parts: first, the gain error caused by the temperature drift of the voltage reference; and second, the phase error caused by the change in the phase angle difference of the zero-flux transformer with temperature. Active power When there is an angle difference At that time, the power error can be approximated as (in =60°, tan60°≈1.732). Therefore, the measurement error caused by the angle difference will be amplified by a factor of 1.732. Under this operating condition, the overall error amplitude is larger and is related to the current magnitude. The temperature characteristics of the transformer angle difference at different current points (1%Ib, 2%Ib, 5%Ib, 20%Ib, Ib, Imax, 120%Imax) are tested, such as... Figure 13 As shown.

[0130] Figure 13 The diagram shows the temperature versus angle difference curves at various current points of a zero-flux current transformer according to an example embodiment.

[0131] The phase angle difference at various current points of the current transformer varies with temperature. The fitted expression for the temperature error at a power factor of 0.5L is: In the formula t represents the angular difference compensation value, and t represents the current ambient temperature.

[0132] After superimposing the gain error caused by the reference temperature drift, the error compensation formula for the 0.5L power factor condition is as follows: In the formula This is the angle difference error coefficient. This is the angle difference compensation value. t is the baseline temperature drift compensation function, where t is the current ambient temperature.

[0133] Since there are slight differences in the angle difference corresponding to different current points of the current transformer, the weight of the angle difference compensation can be appropriately reduced, assuming an angle difference error coefficient. The value is 0.8, resulting in the comprehensive compensation model as follows: .

[0134] To avoid frequent writes to the register affecting the stability of the measurement, a temperature change threshold is set. In step S210, the compensation coefficient is only updated when the temperature change exceeds 1°C.

[0135] In this embodiment, 15 prototypes with completed hardware optimization and software compensation were selected to build a high and low temperature automated metrology and testing system for comparative testing.

[0136] (1) The impact of different hardware solutions on measurement accuracy:

[0137] To verify the effectiveness of different hardware solutions, traditional iron-core current transformers and passive zero-flux current transformers were used across the entire temperature range. They were equipped with pre-sampling circuits with different phase matching parameters and voltage reference chips from different brands. Comparative tests were conducted at the Ib current point and two power factor conditions of 1.0 and 0.5L. The extreme range of measurement error across the entire temperature range (-45℃ to 85℃) is shown in Table 1.

[0138] Table 1. Impact of different hardware sampling schemes on metrology

[0139]

[0140] As shown in Table 1, under the traditional current transformer, after optimizing the filter parameters from 100Ω / 100pF to 100Ω / 1nF, the difference in the extreme range of the 1.0 power factor error is very small; the extreme value under the 0.5L power factor is reduced from [-0.456%, +0.366%] to [-0.347%, +0.313%], an improvement of about 19.7%, indicating that the phase matching technology effectively suppresses the angle difference amplification effect.

[0141] After replacing the traditional current transformer with a zero-flux current transformer, the extreme values ​​of the error at power factors of 1.0 and 0.5L narrowed to [-0.044%, +0.039%] and [-0.141%, +0.110%], respectively, representing improvements of approximately 78.2% and 62.0%, indicating that the zero-flux current transformer has a significant impact on metering.

[0142] In terms of RC filter parameter optimization, Scheme 5 is significantly better than Scheme 4 and Scheme 6 at a power factor of 0.5L; it also shows a significant improvement over Scheme 3 and Scheme 7.

[0143] In terms of benchmark chip comparison, the error change trends of the five sample meters tested by Scheme 5 were highly consistent across the entire temperature range. At a power factor of 1.0, the extreme error range was improved by 60.7% and 58.9% respectively compared to Brand 1 and Brand 2. However, the error deviation caused by thermal hysteresis of the sample meter equipped with Brand 1 benchmark chip was as high as 0.026%. The error trend and range of the sample meter equipped with Brand 2 benchmark chip were very different in each temperature cycle test, and the consistency and repeatability could not be guaranteed, further verifying the necessity of benchmark screening.

[0144] The three hardware measures worked together to reduce the extreme values ​​of the full-temperature range error at a power factor of 1.0 from [-0.283%, +0.109%] in the traditional scheme to [-0.044%, +0.039%], an improvement of 78.8%, which fully verified the effectiveness of the hardware optimization scheme.

[0145] (2) The impact of real-time compensation algorithm on measurement accuracy:

[0146] Figure 14 A comparison graph showing the error before and after power factor compensation according to the example embodiment is shown.

[0147] Figure 15 A comparison graph showing the error before and after 0.5L power factor compensation according to an example embodiment is shown.

[0148] Based on the hardware optimization scheme, the effectiveness of the real-time compensation algorithm was further verified. The full-temperature range error-temperature curves before and after algorithm compensation were tested at power factors of 1.0 and 0.5L, respectively. Taking the Ib current point as an example, the test results are as follows: Figure 14 , Figure 15 As shown.

[0149] Depend on Figure 14 , Figure 15 As can be seen, the comparison of the extreme values ​​of the full-temperature-range error before and after algorithm compensation is shown in Table 2.

[0150] Table 2 Comparison of extreme values ​​of error across the entire temperature range before and after algorithm compensation

[0151]

[0152] At a power factor of 1.0, the error before compensation mainly stemmed from the temperature drift of the voltage reference chip, exhibiting a U-shaped distribution across the entire temperature range. After enabling the compensation algorithm, the error was improved by approximately 43.4%. At a power factor of 0.5L, due to the amplification effect of the transformer angle difference on the power error, the error fluctuation before compensation was significantly greater than that under the 1.0 condition, with an extreme value span of 0.251%. After enabling the compensation algorithm, the extreme value span of the error was reduced to 0.096%, an improvement of approximately 61.8%.

[0153] The results show that the sub-condition compensation model based on power factor discrimination can accurately match the characteristics of different error sources and significantly improve the measurement accuracy under both typical conditions. The improvement effect is particularly prominent under low power factor conditions, and it has good engineering application value.

[0154] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A full-temperature-range electricity meter metering accuracy compensation system, characterized in that, It includes a hardware sampling unit, a voltage reference unit, an ADC analog-to-digital conversion unit, and a DSP multi-source error decoupling compensation unit; The input terminal of the hardware sampling unit is connected to the power grid, and the output terminal of the hardware sampling unit is connected to the analog signal input terminal of the ADC analog-to-digital converter. The reference voltage output by the voltage reference unit is sent to the ADC analog-to-digital converter and the hardware sampling unit. The digital sampling data output by the ADC analog-to-digital converter is sent to the DSP multi-source error decoupling compensation unit. The compensation coefficient output by the DSP multi-source error decoupling compensation unit is sent to the metering chip. The hardware sampling unit is used to condition the input three-phase voltage signal and three-phase current signal of the power grid; The voltage reference unit is used to provide a reference voltage for the ADC analog-to-digital conversion unit and the hardware sampling unit. The voltage reference unit includes a high-precision voltage reference chip and an external power supply circuit. The high-precision voltage reference chip is obtained through four-dimensional screening. The ADC analog-to-digital converter unit is used to synchronously convert the conditioned voltage signal and current signal into digital sampling data. The ADC analog-to-digital converter unit adopts a multi-channel synchronous high-precision analog-to-digital converter. The DSP multi-source error decoupling compensation unit is used to calculate the compensation coefficient. The DSP multi-source error decoupling compensation unit includes a temperature sensor and a digital signal processor. The temperature sensor is arranged near the metering chip.

2. The full-temperature-range energy meter metering accuracy compensation system according to claim 1, characterized in that, The calculation steps for the compensation coefficient include: The digital signal processor receives digital sampling data from the ADC analog-to-digital conversion unit, and the digital signal processor simultaneously acquires temperature data t output by the temperature sensor; If t is within the range of -55℃ to 150℃, then calculate the real-time power factor. Otherwise, reset the compensation coefficient to zero, report a sensor fault, and end the process. like If the power factor is ≥0.9, it is determined to be a 1.0 power factor operating condition, and the compensation coefficient y is calculated using the formula. Calculate and end the process; If 0.6≥ A power factor ≥0.4 is considered a 0.5L power factor condition, and the compensation coefficient y is calculated using the formula... Calculate and end the process; If 0.9> >0.6 or If the value is less than 0.4, the calibrated parameters will be used, and the process will end.

3. The full-temperature-range energy meter metering accuracy compensation system according to claim 1, characterized in that, The steps for obtaining a high-precision voltage reference chip through four-dimensional screening include: The voltage reference chip was placed in a high and low temperature test chamber for continuous temperature cycling test. Test the output voltage and operating temperature of the voltage reference chip according to the sampling period; Four-dimensional evaluation indicators were calculated, including temperature drift coefficient, thermal hysteresis, batch consistency, and long-term stability. The temperature drift coefficient is the drift amplitude of the output voltage across the entire temperature range of -45℃ to 85℃, expressed in ppm / ℃. The thermal hysteresis is the difference between the initial voltage at room temperature before heating and the voltage after temperature cycling and cooling back to room temperature. The batch consistency is the dispersion of the temperature change curves of at least N samples of the same model, where N is a positive integer. The long-term stability is the voltage drift data from a 1000-hour continuous aging test, expressed in ppm / 1000h. The voltage reference chip performance is evaluated by a comprehensive score based on four dimensions of evaluation indicators. The weight of thermal hysteresis is set as follows: > weight of batch consistency > weight of temperature drift coefficient > weight of long-term stability. Each voltage reference chip is graded according to the four dimensions of evaluation indicators. Unqualified voltage reference chips with large thermal hysteresis, serious batch dispersion, and abnormal temperature change trend are eliminated. The grading is divided into excellent, good and poor grades. We selected voltage reference chip models that achieved excellent ratings across all four evaluation dimensions, exhibited uniform temperature change curves, and had minimal room temperature hysteresis offset; we verified that the measurement error of this voltage reference chip across the entire temperature range was <0.03%.

4. The full-temperature-range energy meter metering accuracy compensation system according to claim 3, characterized in that, The temperature cycle is as follows: the room temperature is uniformly raised to 85℃, held at 85℃ and then uniformly lowered to -45℃, held at -45℃ and then uniformly raised back to room temperature.

5. The full-temperature-range energy meter metering accuracy compensation system according to claim 3, characterized in that, The sampling period is 10 seconds.

6. The full-temperature-range energy meter metering accuracy compensation system according to claim 3, characterized in that, N takes the value 8.

7. The full-temperature-range energy meter metering accuracy compensation system according to claim 3, characterized in that, Use a 6.5-digit digital multimeter to test the output voltage of the voltage reference chip.

8. The full-temperature-range energy meter metering accuracy compensation system according to claim 1, characterized in that, The hardware sampling unit includes a resistor voltage divider network, a voltage sampling pre-amplifier circuit, a passive zero-flux current transformer, and a current sampling pre-amplifier circuit. After the three-phase voltage signal of the power grid is divided by the resistor voltage divider network, it is processed by the voltage sampling pre-amplifier circuit and then sent to the ADC analog-to-digital converter unit. The voltage sampling pre-amplifier circuit is a configurable RC anti-aliasing filter circuit. After the three-phase current signal of the power grid passes through the passive zero-flux current transformer, it is processed by the current sampling pre-amplifier circuit and then sent to the ADC analog-to-digital converter unit. The current sampling pre-amplifier circuit includes a fixed sampling resistor and a configurable RC anti-aliasing filter circuit.

9. The full-temperature-range energy meter metering accuracy compensation system according to claim 8, characterized in that, The parameters of the configurable RC anti-aliasing filter circuit are as follows: the resistance R is 100Ω and the capacitance C is 1nF.

10. The full-temperature-range energy meter metering accuracy compensation system according to claim 1, characterized in that, The reference voltage is 2.5V.

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