A load machine for PDU testing

Abstract

The application relates to the technical field of power electronic testing, and discloses a load machine for PDU (Power Distribution Unit) testing, which comprises a loss compensation unit, a common DC bus, a virtual power generation unit and a virtual multi-path load unit. The loss compensation unit is used for establishing and maintaining the voltage stability of the common DC bus and supplementing the power loss in the load machine operation process. The common DC bus is connected with the loss compensation unit, the virtual power generation unit and the virtual multi-path load unit respectively. The virtual power generation unit is used for converting the DC power on the common DC bus into AC voltage to drive the measured PDU. The virtual multi-path load unit is used for sucking the current flowing through the measured PDU according to a preset model, and feeding back the rectified electric energy to the common DC bus. A central coordination control unit is used for controlling the power conversion process of each unit. The application realizes self-circulation of electric energy through the common DC bus, greatly reduces the energy consumption, uses the PWM synthesis technology to reproduce the nonlinear harmonic current, and combines the source-load impedance coupling to control the real simulation of the grid voltage drop interaction characteristic.

Description

Technical Field

[0001] This invention relates to the field of power electronics testing technology, specifically to a load cell for PDU testing. Background Technology

[0002] As the end-point power distribution equipment within data center racks, the reliability of power distribution units (PDUs) directly impacts the operational safety of critical IT loads such as servers. With the continuous expansion of cloud computing and big data center construction, the single-unit capacity of PDUs has increased from the traditional kilowatt level to tens of kilowatts, and their integrated monitoring and protection functions are becoming increasingly complex. To ensure that PDU performance meets standards under actual load conditions, full-power, full-load aging tests and dynamic response tests are required before shipment.

[0003] Traditional PDU testing typically uses an RL linear load group consisting of a resistance box and an inductor box as a simulated load. This testing approach has significant limitations when dealing with high-power PDUs. First, the resistive load converts all the input electrical energy into heat dissipation, resulting in significant power waste and increased ambient temperature in the testing room, necessitating the additional configuration of a high-power air conditioning cooling system, further increasing operating costs. Second, actual loads in data centers (such as server power supplies) are mostly switching power supplies, whose input current waveforms exhibit significant nonlinearity and high crest factor characteristics, containing abundant high-order harmonics. Traditional linear impedance loads cannot simulate this complex non-sinusoidal current waveform, causing the test results to fail to accurately reflect the PDU's temperature rise characteristics and protection action accuracy under harmonic stress.

[0004] Furthermore, in existing testing systems, the power source and load are typically independent devices, lacking a physical electrical connection. In real power grid environments, sudden changes in high-current loads can cause instantaneous voltage drops or fluctuations on the bus through line impedance. This source-load interaction significantly impacts the stability of internal PDU components such as relays and contactors. However, traditional testing schemes often use an ideal voltage source, failing to automatically adjust the output voltage characteristics according to changes in load current. This results in an overly idealized testing environment, making it difficult to reproduce the potential malfunction risks of PDUs under weak power grid conditions. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this invention provides a load cell for PDU testing, which solves the problems of huge power loss in high-power PDU testing, the inability of traditional linear loads to simulate the nonlinear current waveform of server power supplies, and the inability of independent source-load architectures to reproduce the physical interaction characteristics of voltage drops caused by load changes in real power grids.

[0006] To achieve the above objectives, the present invention provides the following technical solution: This invention provides a load cell for PDU testing, comprising: The loss compensation unit has an input terminal for connecting to the external power grid and an output terminal for connecting to the common DC bus. It is used to establish and maintain the voltage stability of the common DC bus and to compensate for the power loss during the operation of the load machine. A common DC bus serves as the central link for energy interaction within the load unit, connecting the loss compensation unit, the virtual power generation unit, and the virtual multi-load unit respectively. The virtual power generation unit has its input end connected to the common DC bus and its output end connected to the power input plug of the PDU under test. It is used to invert the DC power on the common DC bus into AC voltage to drive the PDU under test. The virtual multi-load unit has an input terminal for connecting to multiple output jacks of the PDU under test and an output terminal for connecting to the common DC bus. It is used to absorb the current flowing through the PDU under test according to a preset model and to rectify the absorbed power and feed it back to the common DC bus. The central coordination and control unit establishes signal connections with the virtual power generation unit, the virtual multi-load unit, and the loss compensation unit, respectively, to control the power conversion process of each unit.

[0007] Preferably, the loss compensation unit specifically includes: The grid-side filter circuit, whose input is connected to the external power grid, is used to filter out high-frequency switching ripple; A pre-charging circuit, connected in series in the output circuit of the grid-side filter circuit, includes a pre-charging resistor and a bypass contactor connected in parallel with the pre-charging resistor; A bidirectional AC-DC converter circuit, wherein the AC side is connected to the pre-charge circuit and the DC side is connected to the common DC bus; The bidirectional AC-DC converter circuit is used to control the amplitude of the active current drawn from the external power grid according to the DC bus voltage reference value.

[0008] Preferably, the bidirectional AC-DC converter circuit includes three power bridge arms connected in parallel, each power bridge arm consisting of an upper bridge arm power switch device and a lower bridge arm power switch device connected in series; each of the upper bridge arm power switch devices and the lower bridge arm power switch devices is connected in anti-parallel with a freewheeling diode; the midpoint of the three power bridge arms serves as the AC side input terminal of the bidirectional AC-DC converter circuit and is connected to the pre-charge circuit.

[0009] Preferably, the common DC bus specifically includes: The positive bus and the negative bus extend to the DC ports of the loss compensation unit, the virtual power generation unit and the virtual multi-load unit, respectively. A DC support capacitor bank is composed of multiple electrolytic capacitors connected in parallel, and the DC support capacitor bank is connected across the positive busbar and the negative busbar; The bus voltage sampling circuit is connected in parallel with the DC support capacitor bank, and the signal output terminal of the bus voltage sampling circuit is connected to the central coordination and control unit. The discharge circuit includes a discharge resistor and a discharge switch connected in series, and the discharge circuit is connected in parallel between the positive bus and the negative bus.

[0010] Preferably, the positive bus and the negative bus adopt a stacked busbar structure, which includes a physically bonded and electrically isolated positive copper busbar layer, an insulating dielectric layer, and a negative copper busbar layer; the multiple electrolytic capacitors in the DC support capacitor group are mechanically fixed to the stacked busbar structure by screw terminals.

[0011] Preferably, the virtual power generation unit includes: The three-phase full-bridge inverter circuit consists of six power switching devices, and the DC input side of the three-phase full-bridge inverter circuit is connected to the common DC bus. An LC filter circuit, the input of which is connected to the AC output side of the three-phase full-bridge inverter circuit; An output contactor is connected between the output terminal of the LC filter circuit and the power input plug of the PDU under test. A source voltage and current sensor is installed on the output circuit of the LC filter circuit, and the signal output terminal of the source voltage and current sensor is connected to the central coordination and control unit.

[0012] Preferably, the LC filter circuit includes three filter inductors and three filter capacitors; one end of each of the three filter inductors is connected to one of the three AC output terminals of the three-phase full-bridge inverter circuit, and the other end of each of the three filter inductors is connected to one end of each of the three filter capacitors and the input terminal of the output contactor; the other ends of the three filter capacitors are connected to a common neutral point, which is connected to the neutral terminal of the power input plug of the PDU under test.

[0013] Preferably, the virtual multiplexed load unit includes: Multiple load channel modules are connected in parallel, and each load channel module is connected to one output jack of the PDU under test. Each of the load channel modules includes an AC-side boost inductor, a single-phase H-bridge PWM rectifier circuit, and a load-side voltage and current sensor connected in series at the input. The AC input terminal of the single-phase H-bridge PWM rectifier circuit is connected to the output jack of the PDU under test through the AC side boost inductor, and the DC output terminal of the single-phase H-bridge PWM rectifier circuit is connected in parallel to the common DC bus. The load-side voltage and current sensor is installed on the AC input circuit of the single-phase H-bridge PWM rectifier circuit, and the signal output terminal of the load-side voltage and current sensor is connected to the central coordination and control unit.

[0014] Preferably, the single-phase H-bridge PWM rectifier circuit includes four metal-oxide-semiconductor field-effect transistors or insulated-gate bipolar transistors connected in an H-bridge topology; the DC output terminal of the single-phase H-bridge PWM rectifier circuit is connected to the positive bus and negative bus of the common DC bus respectively through a pair of DC-side fuses; the AC-side boost inductor is connected in series between the output jack of the PDU under test and the midpoint of one AC input bridge arm of the single-phase H-bridge PWM rectifier circuit.

[0015] Preferably, the central coordination and control unit specifically includes: A multi-channel analog signal acquisition circuit, whose input terminals are respectively connected to the voltage and current sensor signal output terminals in the loss compensation unit, the virtual power generation unit, and the virtual multi-load unit, is used to convert the acquired analog electrical signals into digital signals. A digital signal processor, connected to the multi-channel analog signal acquisition circuit, is used to receive the digital signal and generate a PWM control signal based on the built-in impedance coupling control logic. The PWM drive isolation circuit has its input terminal connected to the digital signal processor, and its output terminal connected to the control gates of the power switching devices in the loss compensation unit, the virtual power generation unit, and the virtual multi-load unit, respectively, for amplifying and isolating the PWM control signal and transmitting it to each power switching device.

[0016] This invention provides a load cell for PDU testing. It has the following advantages: 1. This invention connects the virtual power generation unit and the virtual multi-load unit via a common DC bus, constructing an internal self-circulating energy path. Unlike traditional resistive loads that convert all electrical energy into heat, the energy in this system circulates between the source and load ends. The loss compensation unit only needs to draw a very small amount of active power from the external power grid to supplement the internal system losses. This reduces the demand on the factory's power distribution transformer capacity for high-power full-load PDU testing, while also reducing energy consumption during testing and the investment cost in environmental cooling equipment.

[0017] 2. This invention utilizes source-load impedance dynamic coupling control logic to establish a real-time physical correlation between the input voltage and output load current of the PDU under test. When the virtual multi-load unit simulates load changes or generates high dynamic current, the central coordination control unit can control the output voltage of the virtual power generation unit to generate synchronous transient drops or waveform distortions based on the virtual grid impedance model. This feature enables the system to reproduce the complex operating conditions of the power grid and load interaction in a real computer room in a laboratory environment, thereby effectively detecting the electrical connection reliability and the accuracy of protection device operation of the PDU under conditions of deteriorated input power quality.

[0018] 3. This invention employs a virtual multi-load unit based on PWM rectification technology, possessing the capability to synthesize arbitrary current waveforms. Through independent control of each load channel module, the system can simulate the unique nonlinear input characteristics of server switching power supplies, including high-order harmonic components and high current peak factor. This testing method overcomes the technical deficiency of traditional linear resistive loads in reproducing current spike impacts, enabling substantial verification of the PDU circuit breaker's resistance to false tripping and the harmonic temperature rise characteristics of the neutral conductor, ensuring effective coverage of test results for practical application scenarios. Attached Figure Description

[0019] Figure 1 This is a diagram of the load machine architecture of the present invention; Figure 2 This is a schematic diagram of the workflow of the present invention; Figure 3 This is a three-dimensional schematic diagram of the load machine of the present invention.

[0020] Among them, 1. Load machine. Detailed Implementation

[0021] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0022] Reference Figures 1-3 , Figure 1 This is a schematic diagram of the overall system architecture of a load cell for PDU testing according to an embodiment of the present invention. The present invention provides a load cell for PDU testing, including: a loss compensation unit, a common DC bus, a virtual power generation unit, a virtual multi-load unit, and a central coordination and control unit.

[0023] The input of the loss compensation unit is connected to the external power grid, and the output is connected to the common DC bus. During system startup, the loss compensation unit pre-charges the common DC bus to establish its voltage. During system operation, it draws active power from the external power grid through closed-loop control to maintain the common DC bus voltage at a preset threshold. The power provided by the loss compensation unit is only used to compensate for the switching losses, conduction losses of the converter inside the load unit 1, and the line losses of the PDU under test.

[0024] The common DC bus serves as the physical link for energy exchange within the load unit 1, connecting to the DC output of the loss compensation unit, the DC input of the virtual power generation unit, and the DC output of the virtual multiplexed load unit. The common DC bus collects supplementary energy from the loss compensation unit and feedback energy from the virtual multiplexed load unit, and provides DC power to the virtual power generation unit.

[0025] The input of the virtual power generator unit is connected to the common DC bus, and the output is used to connect to the power input plug of the PDU under test via a cable. The virtual power generator unit is used to invert the DC voltage on the common DC bus into a controlled three-phase AC voltage, which is then applied as the test power supply to the input of the PDU under test.

[0026] The virtual multiplexer unit comprises multiple parallel channels. Its input terminals connect to multiple output sockets of the PDU under test, and its output terminals connect to the common DC bus. The virtual multiplexer unit controls the current waveform flowing through each output branch of the PDU under test according to a preset load current reference command. The virtual multiplexer unit rectifies the AC power drawn from the PDU under test into DC power and feeds this DC power back into the common DC bus for reuse by the virtual power generation unit.

[0027] The central coordination and control unit establishes bidirectional signal connections with the loss compensation unit, the virtual power generation unit, and the virtual multi-load unit. The central coordination and control unit collects voltage and current sensor signals from each of these units and generates PWM drive signals based on its internal control algorithm. These signals are then used to control the switching on and off of power semiconductor switching devices in each unit via a drive isolation circuit.

[0028] In the architecture, load unit 1 forms a closed-loop energy self-circulation path. The energy flow path is as follows: electrical energy is generated by the virtual power generation unit, transmitted to the virtual multiplexed load unit via the PDU under test, rectified into DC by the virtual multiplexed load unit, injected into the common DC bus, and then flows back to the input terminal of the virtual power generation unit from the common DC bus. The external power grid does not directly participate in the main power cycle, but only provides the energy required for system heat loss to the common DC bus through the loss compensation unit.

[0029] The central coordination and control unit achieves logical coupling between the virtual power generation unit and the virtual multiplexed load unit through a signal link. When the current drawn by the virtual multiplexed load unit changes, the central coordination and control unit can adjust the output voltage characteristics of the virtual power generation unit in real time, thereby reproducing the physical process of dynamic source-load interaction on the PDU under test.

[0030] Reference Figures 1-3 The loss compensation unit specifically includes a grid-side filter circuit, a pre-charge circuit, and a bidirectional AC-DC conversion circuit.

[0031] The grid-side filter circuit is located between the external power grid and the pre-charging circuit to suppress high-frequency switching harmonics from polluting the power grid and to prevent grid-side surge voltages from entering the system. The grid-side filter circuit adopts an LCL-type filter structure, which includes a grid-side inductor. Filter capacitor and converter-side inductor Grid-side inductor One end is connected to the three-phase input terminal of the external power grid, and the other end is connected to a filter capacitor. One end; filter capacitor The other end is connected to the neutral point or ground; the converter-side inductor Series on the filter capacitor Between and the pre-charge circuit.

[0032] The pre-charge circuit is connected in series in the output loop of the grid-side filter circuit to limit the inrush current to the common DC bus capacitor during the initial power-up phase of the system. The pre-charge circuit includes a pre-charge resistor. and pre-charge resistor Parallel bypass contactors At system startup, the bypass contactor... When in the off state, external current flows through the pre-charge resistor. Charge the common DC bus; when the common DC bus voltage reaches a preset threshold (e.g., 85% of the rated voltage), the bypass contactor... Close, pre-charge resistor When short-circuited, the loss compensation unit enters normal operating mode.

[0033] The bidirectional AC-DC converter circuit adopts a three-phase voltage source PWM rectifier topology. Its AC side is connected to the output terminal of the pre-charge circuit, and its DC side is connected to the positive and negative terminals of the common DC bus. The bidirectional AC-DC converter circuit includes three power bridge arms arranged in parallel. Each power bridge arm consists of an upper bridge arm power switch and a lower bridge arm power switch connected in series. Each power switch has a freewheeling diode connected in anti-parallel. The midpoints of the three power bridge arms are respectively connected to the A, B, and C phase lines as AC input terminals.

[0034] In terms of control logic, the loss compensation unit adopts a dual closed-loop control strategy consisting of an outer voltage loop and an inner current loop. The outer voltage loop is used to maintain the common DC bus voltage. The stability of the system is determined by the following governing equation: ; In the formula, This is the reference value for the common DC bus voltage; The bus voltage is sampled in real time; and These are the proportional and integral coefficients of the voltage loop, respectively. This is the reference component of the active current on the grid side; It represents the time differential variable.

[0035] The inner current loop is used to control the actual grid-side current to track the reference current and achieve unity power factor operation. In a synchronous rotating coordinate system, the governing equations for the inner current loop are: ; In the formula, , For grid-side current Axial components; It is usually set to 0 to achieve unity power factor; , This is the feedforward component of the grid voltage; The angular frequency of the power grid; This represents the total filter inductance value. , For the output voltage command of the bidirectional AC-DC converter circuit Axial components; This represents the proportional gain of the inner current loop controller; This represents the integral coefficient of the current inner loop controller; Represents the time-differential variable. This is achieved through space vector pulse width modulation (SVPWM). , It is converted into six PWM drive signals to control the on / off state of each power switching device, thereby achieving precise adjustment of the common DC bus voltage and real-time compensation of system losses.

[0036] Reference Figures 1-3 The common DC bus is not just a simple electrical connection point, but exists as an integrated energy buffer and distribution module, specifically including a positive bus, a negative bus, a DC support capacitor bank, a bus voltage sampling circuit, and a discharge circuit.

[0037] The positive and negative busbars employ a low-inductance laminated busbar structure. This structure consists of parallel and physically bonded positive copper busbar layers, an insulating dielectric layer, and a negative copper busbar layer tightly pressed together. Only a thin insulating dielectric layer separates the positive and negative copper busbar layers. This physical arrangement allows the magnetic fields generated by the current flowing through the positive and negative terminals to cancel each other out, significantly reducing the parasitic inductance of the DC busbar. Low parasitic inductance is crucial for suppressing voltage spikes generated by power switching devices during high-speed switching, contributing to improved electromagnetic compatibility and operational reliability of the system. Multiple terminals extend outward from the positive and negative busbars, which are bolted to the DC ports of the loss compensation unit, the virtual power generation unit, and the virtual multi-load unit, respectively.

[0038] The DC support capacitor bank consists of an array of multiple large-capacity aluminum electrolytic capacitors connected in parallel, bridging the positive and negative busbars. The function of the DC support capacitor bank is to smooth the DC bus voltage. The ripple current is buffered to mitigate power imbalance between the source and load sides, acting as a transient energy pool. To balance voltage distribution and heat dissipation among the capacitors, the electrolytic capacitors are evenly distributed and mechanically fixed to the stacked busbar structure using screw terminals. The total capacitance of the DC bus capacitors... The design must satisfy the following energy balance equation constraints: ; In the formula, This represents the maximum mutation power allowed by the system. For the response time of the control system; and These are the upper and lower limits for the allowable fluctuation of the DC bus voltage, respectively.

[0039] The bus voltage sampling circuit is connected in parallel with the DC support capacitor bank and typically consists of a high-precision resistor divider network and an isolation amplifier (such as a Hall voltage sensor or linear optocoupler). The bus voltage sampling circuit converts the high-voltage DC signal, which can reach hundreds of volts, into a low-voltage analog signal (such as 0-5V) and transmits it to the central coordination and control unit as a feedback variable for voltage closed-loop control.

[0040] The bleeder circuit includes power bleeder resistors connected in series. and discharge switch (A relay or IGBT can be used), this series branch is connected in parallel between the positive and negative busbars. During normal system operation, the discharge switch... It is in the disconnected state. The central coordination and control unit controls the discharge switch in the event of a system shutdown or emergency failure. When closed, the residual charge stored in the DC-supported capacitor bank passes through the discharge resistor. Rapid release to ensure the safety of maintenance personnel. Discharge time constant. The design typically ensures that the bus voltage is reduced to below the safe voltage within a specified time.

[0041] Reference Figures 1-3 The virtual power generation unit serves as the power supply simulation source for the PDU under test. Its core architecture includes a three-phase full-bridge inverter circuit, an LC filter circuit, an output contactor, and source-side voltage and current sensors.

[0042] The three-phase full-bridge inverter circuit is the core stage of power conversion, consisting of six high-power switching devices forming a standard three-phase bridge topology. Its DC input side is connected to a common DC bus, utilizing the stable DC voltage provided by the bus. Driven by high-frequency PWM pulses output from the central coordination control unit, the three-phase full-bridge inverter circuit chops the DC current into pulse-width modulated three-phase AC square wave voltages. To improve waveform quality and reduce switching losses, the switching frequency is typically set between 10kHz and 20kHz.

[0043] An LC filter circuit is connected to the AC output side of a three-phase full-bridge inverter circuit to filter out high-frequency harmonic components in the PWM square wave and restore a low-distortion sinusoidal AC voltage. The LC filter circuit includes three filter inductors. and three filter capacitors Three filter inductors One end is connected to the neutral points of the three AC outputs of the inverter bridge, and the other end is connected to three filter capacitors. One end. Three filter capacitors. The other end is connected to a common neutral point N, which is directly led out and connected to the neutral terminal of the power input plug of the PDU under test, thus providing a standard three-phase four-wire (3P+N) power supply environment for the PDU under test. Filtering parameters and The selection must ensure the filter's cutoff frequency. The following relationship must be satisfied to balance fundamental frequency transmission and harmonic attenuation: ; In the formula, This is the fundamental frequency (usually 50Hz or 60Hz). This is the switching frequency of the inverter circuit; Indicates the cutoff frequency of the filter; This represents the inductance value of a single-phase filter inductor in an LC filter circuit. This indicates the capacitance value of a single-phase filter capacitor in an LC filter circuit.

[0044] The output contactor is connected in series between the output of the LC filter circuit and the connector of the PDU under test, serving as a physical isolation device. In the event of system incompetence or a serious fault, the output contactor disconnects, cutting off power to the PDU under test and ensuring operational safety.

[0045] The source voltage and current sensor is installed in the output circuit after the LC filter circuit to acquire the instantaneous three-phase voltage values ​​applied to the input terminal of the PDU under test in real time. and the instantaneous value of input current These sampled signals are sent back to the central coordination and control unit to construct a voltage dual-closed-loop control system.

[0046] The control objective of the virtual power generation unit is to output a high-precision sinusoidal voltage and possess the ability to simulate power grid disturbances. In standard mode, its reference voltage vector... It is a sine wave with constant amplitude and frequency. To achieve source-load linkage, a virtual impedance algorithm is embedded in the control logic of the virtual power generation unit. Its actual output voltage references the command. Revised to: ; In the formula, and These are preset programmable virtual resistors and virtual inductors, respectively; For real-time feedback of load current; This indicates the corrected actual output voltage reference command; Indicates the rated voltage amplitude; Indicates the symbol for sine trigonometric functions; Indicates the angular frequency of the power grid; This represents the time variable. Through this control strategy, the virtual power generation unit can simulate the voltage drop caused by line impedance. When the load current increases, the output voltage automatically drops in accordance with physical laws, thus realistically reproducing the impact of "weak grid" conditions on the PDU in an off-grid testing environment.

[0047] Reference Figures 1-3 The virtual multi-load unit adopts a modular, multi-channel parallel hardware architecture, which is designed to simulate the electrical characteristics of multiple output jacks of the PDU under test independently.

[0048] The virtual multi-path load cell comprises multiple physically independent load channel modules, each connected to an output socket of the PDU under test. This one-to-one connection allows the system to differentiate the power, power factor, and harmonic characteristics of each load channel, thereby accurately simulating the load combinations of different server racks in a real data center environment.

[0049] The specific circuit structure of each load channel module is the same, and they all include an AC-side boost inductor. Single-phase H-bridge PWM rectifier circuit, DC-side protection fuse And load-side voltage and current sensors.

[0050] The single-phase H-bridge PWM rectifier circuit is the core actuator for load simulation, consisting of four power semiconductor switching devices connected in an H-bridge topology. Its DC output (i.e., the DC side of the H-bridge) is protected by a pair of DC-side fuses. The positive and negative busbars are connected in parallel to the common DC busbar, respectively. DC side protection fuses. Its function is to quickly disconnect the connection between the branch and the common DC bus when a shoot-through short-circuit fault occurs in a certain H-bridge, so as to prevent the fault from spreading and affecting other branches or causing the bus voltage to collapse.

[0051] AC-side boost inductor A boost inductor is connected in series between the output jack of the PDU under test and the midpoint of one AC input bridge arm of the single-phase H-bridge PWM rectifier circuit. On the one hand, it acts as a filter to smooth the high-frequency ripple current generated by the PWM switching action; on the other hand, as an energy storage element for energy conversion, it works with the switching action of the H-bridge to "pump" the AC side power to the DC bus side.

[0052] The load-side voltage and current sensors are installed on the AC input circuit of the single-phase H-bridge PWM rectifier circuit to collect the actual current flowing through this branch in real time. and port voltage .

[0053] In terms of control strategy, the virtual multiplexed load unit employs current waveform synthesis technology to simulate nonlinear loads. For the first... Each load channel has a current control target that is not a simple sine wave, but rather a fundamental wave and up to [missing information - likely a specific frequency range]. A complex waveform formed by the superposition of subharmonics. Reference current command. It is generated by the central coordination and control unit according to the following formula: ; In the formula, For the first Road load The amplitude of the second harmonic; The corresponding phase angle; Indicates the first Instantaneous reference current command value for each load channel; Indicates the highest order (upper limit) of harmonic synthesis; Represents the summation variable The set of possible values; Indicates the symbol for sine trigonometric functions; Indicates the angular frequency of the power grid; Represents a time variable.

[0054] To ensure the actual current To achieve zero steady-state error tracking of the complex reference commands described above, this embodiment employs a proportional resonant (PR) controller. Compared to the traditional PI controller, the PR controller has infinite gain at the resonant frequency, enabling zero steady-state error tracking of AC signals. The control equations are as follows: ; In the formula, For proportional gain; For the first The resonant gain of the subharmonic; The fundamental angular frequency; The resonant bandwidth; This represents the transfer function of the proportional resonant controller in the complex frequency domain; Represents the summation variable The set of possible values; Represent the complex variables in the Laplace transform; Representing complex variables The square of , i.e., the second-order differential operator; This indicates the current harmonic order. By adjusting the PWM duty cycle, the single-phase H-bridge PWM rectifier circuit can force the input current to exhibit a preset "peak" or "distortion" shape, thereby realistically simulating the electrical characteristics of the front-end rectifier circuit of a server switching power supply (SMPS), and feeding the absorbed active power back to the common DC bus after rectification, thus realizing the recycling of energy.

[0055] Reference Figures 1-3 The central coordination and control unit, acting as the "brain" of the entire load unit 1, is responsible for the coordinated control and data processing of all power conversion units. Its hardware circuitry mainly includes a multi-channel analog signal acquisition circuit, a digital signal processor (DSP) core board, and a PWM drive isolation circuit.

[0056] The multi-channel analog signal acquisition circuit is used to receive analog sensing signals from various parts of the system, including the common DC bus voltage. Grid-side current of loss compensation unit Source voltage of the virtual power generation unit With current and the load current of each branch of the virtual multi-load unit. This circuit contains multi-stage operational amplifiers used to condition, filter, and level-shift the weak signal output from the sensor to match the DSP's AD conversion input range (typically 0-3.3V). To improve noise immunity, the analog signal passes through a second-order low-pass filter (LPF) with an adjustable cutoff frequency before entering the DSP to filter out noise near the switching frequency.

[0057] The digital signal processor (DSP) core board features a high-performance 32-bit floating-point microcontroller that integrates a high-precision analog-to-digital converter (ADC) and a high-resolution pulse-width modulation (PWM) generator. The DSP core board is responsible for executing all complex control algorithms, including the aforementioned SVPWM modulation, virtual impedance calculation, harmonic current synthesis, and dual-loop regulation operations.

[0058] The PWM drive isolation circuit is connected between the PWM output pin of the digital signal processor and the gate of the switching device in each power unit. Since the DSP operates on the low-voltage side (3.3V logic level) while the power devices operate on the high-voltage side (DC bus voltage can reach 800V), strict electrical isolation is necessary. This embodiment uses an optocoupler-isolated drive chip or a magnetically isolated drive chip, which not only achieves signal level conversion and power amplification (enhancing the PWM signal to a +15V / -5V drive pulse), but also provides microsecond-level short-circuit protection (desaturation detection). Once an overcurrent shoot-through is detected in the IGBT, the drive chip immediately blocks the PWM output and feeds back a fault signal to the DSP.

[0059] At the control logic level, the central coordination and control unit operates source-load impedance dynamic coupling control logic, which is crucial for achieving physical linkage of the system. This logic establishes a mathematical mapping between virtual power sources and virtual loads through software algorithms. Data aggregation: Real-time summation of instantaneous current sampling values ​​uploaded by all load channel modules to calculate the total load current. .

[0060] Virtual voltage drop calculation: based on a preset virtual resistance and virtual inductance Calculate the voltage drop vector generated by this total current across the virtual line impedance. .

[0061] Reference correction: Adjust the standard sinusoidal voltage reference value. Subtract the calculated virtual voltage drop The corrected power supply voltage reference command is obtained. .

[0062] ; In the formula, This indicates the corrected instantaneous value of the power supply voltage reference command; This represents the instantaneous value of the standard sinusoidal voltage reference value; This represents the instantaneous value of the total load current; and These are preset programmable virtual resistors and virtual inductors, respectively; This represents the differential operator that takes the derivative with respect to time.

[0063] The DSP controls the operation of the virtual power generation unit according to the modified instructions. This process is completed entirely in the digital domain at an extremely high update frequency (e.g., 20kHz), ensuring that when the analog current at the load changes abruptly, the voltage at the source can generate a corresponding physical drop with almost no delay, thereby achieving tight coupling between the source and the load at the electrical level.

[0064] Reference Figures 1-3 , Figure 2 This is a system control logic and workflow diagram of a PDU test load machine 1 according to an embodiment of the present invention. The diagram details the complete timing logic from system power-on startup to entering steady-state testing and then to dynamic simulation, ensuring the safety and accuracy of the coordinated operation of each unit.

[0065] Step S100, System Initialization and Self-Test: After the auxiliary power is turned on, the central coordination control unit first executes the power-on self-test procedure. The self-test includes: checking whether the signals of each sensor are within the zero bias range, verifying whether all communication links are normal, confirming that the PWM drive signal is in a blocked state, and checking whether there is a short circuit fault on the DC bus. If any test fails, the system will be locked in a fault state and report an error code; if the self-test passes, it will enter the standby ready state.

[0066] Step S200, Common DC Bus Pre-charging: Upon receiving the start command, the central coordination control unit closes the external input circuit breaker. At this time, the bypass contactor remains open, and the external power grid charges the DC support capacitor bank on the common DC bus through the pre-charging resistor. The central coordination control unit monitors the bus voltage rise rate in real time. When the bus voltage reaches a preset percentage (e.g., 85%) of the rated voltage and tends to stabilize, pre-charging is determined to be complete. The bypass contactor is then closed, short-circuiting the pre-charging resistor, allowing the loss compensation unit to be directly connected to the power grid.

[0067] Step S300: Establish bus voltage regulation control: After the bypass contactor closes, the central coordination control unit activates the bidirectional AC-DC conversion control algorithm of the loss compensation unit. This algorithm controls the DC bus voltage to stabilize at the target value through the voltage outer loop and controls the grid-side power factor to be close to 1 through the current inner loop. At this time, the common DC bus voltage is established and maintained at the rated operating point, providing a stable energy reference for the subsequent operation of the source-load units.

[0068] Step S400, Virtual Power Supply Soft Start: After the bus voltage stabilizes, the central coordination control unit releases the PWM blockade on the virtual power supply generation unit. To avoid impacting the PDU under test, the virtual power supply output voltage executes soft start logic, meaning the output voltage amplitude linearly increases from zero to the rated value within a set time (e.g., 1 second). After the output voltage stabilizes, the output contactor is closed to apply power to the input terminal of the PDU under test.

[0069] Step S500: Load Model Loading and Waveform Synthesis: The operator sends test configuration parameters via the host computer, including the RMS current value, power factor, harmonic order, and amplitude of each load. Based on these parameters, the central coordination control unit generates an independent current reference command for each channel of the virtual multi-load unit. Subsequently, the single-phase H-bridge PWM rectification control of each load channel module is activated, and each channel begins to draw current from the PDU under test according to its respective reference command. At this time, the system enters energy self-circulation mode; the energy transmitted by the PDU under test is rectified and fed back to the DC bus, and then output by the virtual power inverter.

[0070] Step S600: Execute source-load impedance dynamic coupling control: During steady-state operation, the central coordination and control unit executes the source-load dynamic coupling algorithm in parallel. The system collects the total current value of all load channels in real time and calculates the transient voltage drop generated by the current on the virtual line impedance based on preset virtual resistance and virtual inductance parameters. The calculated virtual voltage drop is superimposed on the voltage control loop of the virtual power generation unit in real time. If a step change in load current is detected (e.g., simulating server startup impact), the output voltage of the virtual power supply will immediately generate a voltage drop response conforming to physical laws; conversely, if the load is unloaded, the voltage will generate an overshoot response. Through this real-time negative feedback mechanism, the system continuously simulates the physical interaction characteristics between the source-end power grid and the load-end during the test until the test end command is issued, at which point the system executes the shutdown procedure in reverse order.

Claims

1. A load cell for PDU testing, characterized in that, include: A common DC bus serves as the central link for energy interaction within the load machine (1); The loss compensation unit has an input end for connecting to the external power grid and an output end for connecting to the common DC bus. It is used to establish and maintain the voltage stability of the common DC bus and to compensate for the power loss during the operation of the load machine (1). The virtual power generation unit has its input end connected to the common DC bus and its output end connected to the power input plug of the PDU under test. It is used to invert the DC power on the common DC bus into AC voltage to drive the PDU under test. The virtual multi-load unit has an input terminal for connecting to multiple output jacks of the PDU under test and an output terminal for connecting to the common DC bus. It is used to absorb the current flowing through the PDU under test according to a preset model and to rectify the absorbed power and feed it back to the common DC bus. The central coordination and control unit establishes signal connections with the virtual power generation unit, the virtual multi-load unit, and the loss compensation unit respectively, and is used to control the power conversion process of each unit. The loss compensation unit specifically includes: The grid-side filter circuit, whose input is connected to the external power grid, is used to filter out high-frequency switching ripple; A pre-charging circuit, connected in series in the output circuit of the grid-side filter circuit, includes a pre-charging resistor and a bypass contactor connected in parallel with the pre-charging resistor; A bidirectional AC-DC converter circuit, wherein the AC side is connected to the pre-charge circuit and the DC side is connected to the common DC bus; The bidirectional AC-DC converter circuit is used to control the amplitude of the active current drawn from the external power grid according to the DC bus voltage reference value. The common DC bus specifically includes: The positive bus and the negative bus extend to the DC ports of the loss compensation unit, the virtual power generation unit and the virtual multi-load unit, respectively. A DC support capacitor bank is composed of multiple electrolytic capacitors connected in parallel, and the DC support capacitor bank is connected across the positive busbar and the negative busbar; The bus voltage sampling circuit is connected in parallel with the DC support capacitor bank, and the signal output terminal of the bus voltage sampling circuit is connected to the central coordination and control unit. A discharge circuit includes a discharge resistor and a discharge switch connected in series, and the discharge circuit is connected in parallel between the positive bus and the negative bus. The virtual power generation unit includes: The three-phase full-bridge inverter circuit consists of six power switching devices, and the DC input side of the three-phase full-bridge inverter circuit is connected to the common DC bus. An LC filter circuit, the input of which is connected to the AC output side of the three-phase full-bridge inverter circuit; An output contactor is connected between the output terminal of the LC filter circuit and the power input plug of the PDU under test. A source voltage and current sensor is installed on the output circuit of the LC filter circuit, and the signal output terminal of the source voltage and current sensor is connected to the central coordination and control unit. The virtual multiplexed load unit includes: Multiple load channel modules are connected in parallel, and each load channel module is connected to one output jack of the PDU under test. Each of the load channel modules includes an AC-side boost inductor, a single-phase H-bridge PWM rectifier circuit, and a load-side voltage and current sensor connected in series at the input. The AC input terminal of the single-phase H-bridge PWM rectifier circuit is connected to the output jack of the PDU under test through the AC side boost inductor, and the DC output terminal of the single-phase H-bridge PWM rectifier circuit is connected in parallel to the common DC bus. The load-side voltage and current sensor is installed on the AC input circuit of the single-phase H-bridge PWM rectifier circuit, and the signal output terminal of the load-side voltage and current sensor is connected to the central coordination and control unit. The central coordination and control unit specifically includes: A multi-channel analog signal acquisition circuit, whose input terminals are respectively connected to the voltage and current sensor signal output terminals in the loss compensation unit, the virtual power generation unit, and the virtual multi-load unit, is used to convert the acquired analog electrical signals into digital signals. A digital signal processor, connected to the multi-channel analog signal acquisition circuit, is used to receive the digital signal and generate a PWM control signal based on the built-in impedance coupling control logic. The PWM drive isolation circuit has its input terminal connected to the digital signal processor, and its output terminal connected to the control gates of the power switching devices in the loss compensation unit, the virtual power generation unit, and the virtual multi-load unit, respectively, for amplifying and isolating the PWM control signal and transmitting it to each power switching device.

2. The load cell for PDU testing according to claim 1, characterized in that, The bidirectional AC-DC converter circuit includes three power bridge arms connected in parallel. Each power bridge arm consists of an upper bridge arm power switch and a lower bridge arm power switch connected in series. Each upper bridge arm power switch and lower bridge arm power switch is connected in anti-parallel with a freewheeling diode. The midpoint of the three power bridge arms serves as the AC input terminal of the bidirectional AC-DC converter circuit and is connected to the pre-charge circuit.

3. The load cell for PDU testing according to claim 1, characterized in that, The positive and negative busbars adopt a stacked busbar structure, which includes a physically bonded and electrically isolated positive copper busbar layer, an insulating dielectric layer, and a negative copper busbar layer; the multiple electrolytic capacitors in the DC support capacitor group are mechanically fixed to the stacked busbar structure by screw terminals.

4. A load cell for PDU testing according to claim 1, characterized in that, The LC filter circuit includes three filter inductors and three filter capacitors; one end of each of the three filter inductors is connected to one of the three AC output terminals of the three-phase full-bridge inverter circuit, and the other end of each of the three filter inductors is connected to one end of each of the three filter capacitors and the input terminal of the output contactor; the other ends of the three filter capacitors are connected to a common neutral point, which is connected to the neutral terminal of the power input plug of the PDU under test.

5. A load cell for PDU testing according to claim 1, characterized in that, The single-phase H-bridge PWM rectifier circuit includes four metal-oxide-semiconductor field-effect transistors or insulated-gate bipolar transistors connected in an H-bridge topology; the DC output terminal of the single-phase H-bridge PWM rectifier circuit is connected to the positive bus and negative bus of the common DC bus through a pair of DC-side fuses respectively; the AC-side boost inductor is connected in series between the output jack of the PDU under test and the midpoint of one AC input bridge arm of the single-phase H-bridge PWM rectifier circuit.

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