Wide bandgap semiconductor multi-probe test full-path dynamic synchronous calibration system and method

Abstract

The application relates to the technical field of electrical testing of semiconductor devices, and discloses a wide-bandgap semiconductor multi-probe test full-path dynamic synchronous calibration system and method. In the wafer-level probe test process, the transmission path between the probe needle tip, the probe card interface, the connecting cable, the signal conditioning circuit and the data acquisition end is divided into multiple link segments; bidirectional calibration excitation is applied to each link segment to form link segment differential characteristics; temperature, contact pressure, mechanical vibration, electromagnetic field and probe wear data are acquired to form multi-source mapping data; the probe-level calibration sample is compared with the reference calibration sample and the historical calibration sample to generate a link segment error source sequence; a synchronous calibration instruction package is generated according to the sequence, and a migration error link segment is identified through back-reading calibration residual error to update the probe-level calibration sample.

Description

Technical Field

[0001] This invention relates to the field of electrical testing technology for semiconductor devices, and in particular to a dynamic synchronous calibration system and method for the entire path of multi-probe testing of wide-bandgap semiconductors. Background Technology

[0002] Wide bandgap semiconductor devices mainly include silicon carbide devices and gallium nitride devices, which are typically used in power electronics and radio frequency communications applications under high voltage, high frequency, or high temperature conditions. During device manufacturing, wafer-level electrical testing is a crucial step in determining whether the electrical parameters of semiconductor devices meet design requirements. This type of testing is usually performed using a probe testing system, which generally includes a test head, probe card, multiple probes, a stage for supporting the wafer, connecting cables, signal conditioning circuitry, and a data acquisition terminal. During testing, the probes contact the pads or conductive areas on the wafer under test (DUT), and the test signal is transmitted to the DUT via the probe card and probes. The electrical signal after testing then enters the testing instrument or data acquisition terminal through the corresponding signal transmission path.

[0003] In existing technologies, time-domain reflectometry (TDR) is used to calibrate wafer probe testing systems. For example, US8952711B2 discloses a wafer probing method that uses TDR to calibrate the wafer probe testing system, check the continuity between the probe and the wafer conductor, and identify faults. In this method, the probes of the probe card can contact high-resistivity regions on the wafer or a dummy wafer, and TDR measurements are performed under different states—disconnected and connected—to the probe head. The probe fixture delay or contact state is determined based on the different measurement results. This type of method can reflect the connection status and propagation delay of the wafer probe testing system to a certain extent.

[0004] However, in wafer-level probe testing of wide-bandgap semiconductor devices, the testing process typically involves parallel contact of multiple probes and acquisition of multi-channel electrical signals. The contact state between the probe tip and the wafer, the probe card interface state, the transmission state of the connecting cables, the signal conditioning circuit state, and the input state of the data acquisition terminal can all affect electrical test data such as current, voltage, phase, or delay. Existing schemes based on time-domain reflectometry or single-calibration typically focus on detecting probe contact, fixture delay, or test path connectivity, making it difficult to simultaneously reflect response changes at different transmission positions during continuous probe testing, as well as the combined effects of temperature, contact pressure, mechanical vibration, electromagnetic fields, and probe wear on the test signal.

[0005] Furthermore, in multi-probe parallel testing, the signal transmission path, contact pressure, cable routing, and local electromagnetic environment may differ for each probe. If calibration is performed solely based on the overall measurement results or a single delay parameter, it becomes difficult to distinguish whether the error originates primarily from the probe tip, probe card interface, connecting cable, signal conditioning circuit, or data acquisition end. When temperature changes, probe wear, mechanical vibration, or electromagnetic interference persist during testing, the completed calibration results may not match subsequent test conditions, causing the residual error after calibration to vary across different transmission locations.

[0006] Therefore, the main technical problem that needs to be solved in wafer-level probe testing of wide bandgap semiconductor devices is: how to synchronously correlate the segmented response anomalies from the probe tip to the data acquisition end, multi-physics field disturbances and probe wear status during multi-probe electrical testing, and identify the link segment changes of the error source after calibration to determine the corresponding calibration control quantity. Summary of the Invention

[0007] To overcome the above-mentioned technical defects, the purpose of this invention is to provide a dynamic synchronous calibration system and method for the entire path of wide bandgap semiconductor multi-probe testing.

[0008] This invention discloses a dynamic synchronous calibration method for the entire path of wide-bandgap semiconductor multi-probe testing, comprising:

[0009] In the wafer-level probe testing process of wide bandgap semiconductor devices, probe numbers are configured for the probes participating in the test, signal transmission link numbers are configured for the signal transmission paths corresponding to the probes, and a global synchronization timestamp is configured for the wafer-level probe test by a global synchronization clock.

[0010] The probe tip, probe card interface, connecting cable, signal conditioning circuit, and data acquisition terminal are sequentially designated as acquisition nodes. The transmission paths between adjacent acquisition nodes are designated as link segments, and each link segment is assigned a link segment number. Specifically, the link segment between the probe tip and the probe card interface is defined as the tip contact link segment, the link segment between the probe card interface and the connecting cable is defined as the interface transmission link segment, the link segment between the connecting cable and the signal conditioning circuit is defined as the cable transmission link segment, and the link segment between the signal conditioning circuit and the data acquisition terminal is defined as the acquisition input link segment.

[0011] Acquire the baseline calibration sample and historical calibration sample, and configure the preset direction response tolerance, preset arrival time tolerance, preset mapping tolerance and readback time window;

[0012] A bidirectional calibration stimulus is applied to each link segment to obtain forward node response data and reverse node response data, forming a link segment differential feature that includes directional response differences and arrival time differences. The link segment differential feature is then bound to the probe number, signal transmission link number, link segment number, and global synchronization timestamp.

[0013] Acquire temperature data, contact pressure data, mechanical vibration data, electromagnetic field data, and probe wear data, and map them to the corresponding probe number and signal transmission link number to form multi-source mapping data. Combine the multi-source mapping data with the link segment differential features under the same global synchronization timestamp to form a probe-level calibration sample.

[0014] The probe-level calibration sample is compared with the reference calibration sample and historical calibration sample. When the difference in directional response of the same link segment exceeds the preset directional response tolerance, the difference in arrival time exceeds the preset arrival time tolerance, and at least one data in the multi-source mapping data associated with the same link segment exceeds the corresponding preset mapping tolerance under the same global synchronization timestamp, a link segment error source sequence is generated.

[0015] Based on the link segment error source sequence, position adjustment, electrical parameter adjustment and signal delay adjustment are generated and encapsulated into a synchronous calibration instruction package with the same trigger timestamp;

[0016] After executing the synchronous calibration command package, the differential characteristics of the verification link segment are reconstructed within the readback time window. The differential characteristics of the verification link segment are compared with the differential characteristics of the link segment before executing the synchronous calibration command package to obtain the calibration residual, and the residual link segment corresponding to the calibration residual is determined. When the residual link segment does not belong to the link segment error source sequence, the residual link segment is used as the migration error link segment to update the probe-level calibration sample.

[0017] Preferably, applying a bidirectional calibration stimulus to each link segment includes:

[0018] According to the transmission sequence from the probe tip to the data acquisition end, the first calibration excitation is input to the preceding acquisition node of each link segment, and the response data of the preceding node is acquired at the following acquisition node.

[0019] Following the transmission sequence from the data acquisition end to the probe tip, the second calibration excitation is input to the next acquisition node, and the response data of the reverse node is acquired at the previous acquisition node.

[0020] The first calibration stimulus is configured in the first synchronous acquisition window, the second calibration stimulus is configured in the second synchronous acquisition window, and the first and second synchronous acquisition windows are written into the link segment differential features.

[0021] Preferably, forming the link segment differential features includes:

[0022] The forward amplitude, forward arrival time, forward DC offset, and forward phase are determined based on the forward node response data; the reverse amplitude, reverse arrival time, reverse DC offset, and reverse phase are determined based on the reverse node response data.

[0023] The amplitude attenuation difference is formed by the forward amplitude and the reverse amplitude, the DC offset difference is formed by the forward DC offset and the reverse DC offset, the phase difference is formed by the forward phase and the reverse phase, and the directional response difference is formed by the amplitude attenuation difference, the DC offset difference and the phase difference.

[0024] The difference in arrival time is caused by the forward arrival time and the reverse arrival time.

[0025] The differences in directional response and arrival time are arranged according to the link segment number to form the link segment differential features.

[0026] Preferably, forming multi-source mapping data includes:

[0027] The temperature data is mapped to the corresponding probe and its adjacent probes based on the probe card coordinates.

[0028] The contact pressure data is mapped to the corresponding probe based on the probe root number;

[0029] The mechanical vibration data is mapped to the probe card area where the corresponding probe is located based on the probe station coordinates.

[0030] The electromagnetic field data is mapped to the corresponding signal transmission link number according to the cable routing path.

[0031] Map probe wear data to the corresponding probe based on the probe number;

[0032] The mapped temperature data, contact pressure data, mechanical vibration data, electromagnetic field data, and probe wear data are identified as multi-source mapped data. The multi-source mapped data and the link segment differential features under the same global synchronization timestamp are written into the probe-level calibration sample.

[0033] Preferably, the reference calibration sample includes reference link segment differential characteristics and reference multi-source mapping data obtained during standard calibration piece testing;

[0034] The reference multi-source mapping data includes reference temperature mapping data, reference contact pressure mapping data, reference mechanical vibration mapping data, reference electromagnetic field mapping data, and reference probe wear mapping data;

[0035] Historical calibration samples include the historical link segment error source sequence generated in historical wafer-level probe tests for the same probe number, historical synchronization calibration instruction packets, historical calibration residuals, and historical global synchronization timestamps;

[0036] The probe-level calibration sample calls the corresponding reference calibration sample and historical calibration sample according to the probe number, signal transmission link number, link segment number and global synchronization timestamp.

[0037] Preferably, generating the link segment error source sequence includes:

[0038] The preset benchmark tolerance is configured according to the benchmark calibration sample and the link segment differential characteristics, and the preset mapping tolerance is configured according to the benchmark multi-source mapping data and the multi-source mapping data.

[0039] The differential characteristics of link segments in the probe-level calibration samples are compared with the differential characteristics of reference link segments, and the link segments that exceed the corresponding preset reference tolerance are identified as candidate error link segments.

[0040] The multi-source mapping data corresponding to the candidate error link segment is compared with the benchmark multi-source mapping data, and the link segment that exceeds the corresponding preset mapping tolerance is identified as the candidate disturbance link segment.

[0041] Link segments that simultaneously belong to both candidate error link segments and candidate disturbance link segments are identified as sources of link segment error.

[0042] When there is one link segment error source, that link segment error source is used as the link segment error source sequence; when there are at least two link segment error sources, at least two link segment error sources are arranged according to the transmission order from the probe tip to the data acquisition end to form a link segment error source sequence.

[0043] Preferably, determining the source of link segment error further includes:

[0044] The global synchronization timestamp corresponding to the current probe-level calibration sample is determined as the current global synchronization timestamp, and the historical global synchronization timestamp in the historical calibration sample that is adjacent to the current global synchronization timestamp and earlier in time is determined as the previous global synchronization timestamp.

[0045] When both the first link segment and the second link segment are identified as candidate error link segments, and the transmission order of the first link segment from the probe tip to the data acquisition end is before that of the second link segment, the forward node response data of the first link segment is used as the input reference data of the second link segment.

[0046] When the direction of the arrival time difference of the second link segment between the current global synchronization timestamp and the previous global synchronization timestamp is consistent with the direction of the arrival time difference of the input reference data between the current global synchronization timestamp and the previous global synchronization timestamp, the first link segment is written into the link segment error source sequence, and the second link segment is written into the transmission link segment list.

[0047] When the direction of the arrival time difference of the second link segment between the current global synchronization timestamp and the previous global synchronization timestamp is inconsistent with the direction of the arrival time difference of the input reference data between the current global synchronization timestamp and the previous global synchronization timestamp, the first link segment and the second link segment are respectively written into the link segment error source sequence.

[0048] Preferably, generating the position adjustment, electrical parameter adjustment, and signal delay adjustment based on the link segment error source sequence includes:

[0049] When the link segment error source sequence includes the tip contact link segment, the Z-axis displacement adjustment is generated based on the contact pressure data and probe wear data corresponding to the tip contact link segment.

[0050] When the link segment error source sequence includes the interface transmission link segment, the X-axis displacement adjustment, Y-axis displacement adjustment and Z-axis displacement adjustment are generated based on the temperature data and mechanical vibration data corresponding to the interface transmission link segment.

[0051] When the link segment error source sequence includes cable transmission link segments, a signal delay adjustment amount is generated based on the arrival time difference and electromagnetic field data corresponding to the cable transmission link segment.

[0052] When the link segment error source sequence includes the acquisition input link segment, the gain adjustment, DC offset adjustment and sampling phase adjustment are generated based on the amplitude attenuation difference, DC offset difference and phase difference corresponding to the acquisition input link segment;

[0053] The position adjustment includes X-axis displacement adjustment, Y-axis displacement adjustment and Z-axis displacement adjustment, and the electrical parameter adjustment includes gain adjustment, DC offset adjustment and sampling phase adjustment. For adjustment amounts not triggered by the link segment error source sequence, the corresponding adjustment amount is set as the reference hold amount.

[0054] Preferably, the packaged synchronization calibration instruction packet includes:

[0055] The position adjustment, electrical parameter adjustment, and signal delay adjustment corresponding to the link segment error source sequence are written into the same instruction packet body. Among them, the adjustment amount not triggered by the link segment error source sequence is written into the instruction packet body as the reference hold amount.

[0056] Write the corresponding probe number, corresponding signal transmission link number, link segment error source sequence, trigger timestamp, execution sequence number, readback time window and execution interlock identifier into the main body of the instruction packet to form a synchronous calibration instruction packet;

[0057] Multiple synchronous calibration instruction packets with the same trigger timestamp are sorted by probe number and written into the synchronous transmission queue.

[0058] Preferably, the execution of the synchronization calibration instruction package includes:

[0059] When the trigger timestamp arrives, a displacement control command containing position adjustment is output to adjust the triaxial displacement of the corresponding probe, an electrical control command containing electrical parameter adjustment is output to adjust the signal conditioning parameters of the corresponding probe, and a delay control command containing signal delay adjustment is output. When the interlock flag is enabled, the displacement control command, electrical control command, and delay control command under the same probe number are executed synchronously at the same trigger timestamp. Within the readback time window, the corresponding link segment is triggered to re-acquire node response data.

[0060] Preferably, determining the migration error link segment includes:

[0061] The differential characteristics of the verification link segment are formed based on the node response data re-collected within the readback time window;

[0062] The differential characteristics of the reviewed link segment are compared with the differential characteristics of the link segment before the execution of the synchronization calibration command packet to determine the residual link segment corresponding to the calibration residual.

[0063] When the residual link segment belongs to the link segment error source sequence, the calibration residual is written into the historical calibration sample of the corresponding link segment;

[0064] When the residual link segment does not belong to the link segment error source sequence, the residual link segment is identified as the migration error link segment and added to the link segment error source sequence.

[0065] Preferably, updating the probe-level calibration sample includes:

[0066] The link segment error source sequence after adding the migration error link segment is determined as the updated link segment error source sequence;

[0067] Regenerate the synchronization calibration instruction packet based on the updated link segment error source sequence;

[0068] Write the regenerated synchronous calibration instruction package, the corresponding calibration residual, the verified link segment differential characteristics, and the migration error link segment into the probe-level calibration sample with the same probe number.

[0069] Update the historical calibration samples in the probe-level calibration samples to the call samples for the next wafer-level probe test.

[0070] Preferably, it also includes an abnormal link segment processing step:

[0071] When the same link segment is identified as a migration error link segment in N consecutive readback time windows, the link segment is marked as an abnormal link segment, where N is an integer greater than or equal to 2;

[0072] Stop the process of inputting node response data of abnormal link segments into the process of generating the link segment error source sequence;

[0073] Call the differential features of the link segment adjacent to the abnormal link segment and located under the same signal transmission link number to generate abnormal link segment compensation data;

[0074] Abnormal link segment compensation data is written into the probe-level calibration sample, and abnormal link segment markers are written into the synchronous calibration instruction packet.

[0075] Preferably, it also includes an initial calibration step for the next wafer-level probe test:

[0076] Retrieve the updated link segment error source sequence, synchronization calibration instruction packet, and calibration residual from the updated historical calibration samples;

[0077] The initial synchronization calibration instruction package is generated based on the updated link segment error source sequence, the synchronization calibration instruction package, and the calibration residual.

[0078] Before the next wafer-level probe test begins, the initial synchronization calibration instruction packet is written into the synchronization transmission queue;

[0079] During the next wafer-level probe test, the differential characteristics of the verification link segment formed after executing the initial synchronization calibration instruction package will be written into the probe-level calibration sample with the corresponding probe number.

[0080] In view of this, the present invention also provides a dynamic synchronous calibration system for the entire path of wide bandgap semiconductor multi-probe testing, comprising:

[0081] The numbering configuration module is used to configure probe numbers for probes participating in the test and to configure signal transmission link numbers for the signal transmission paths corresponding to the probes.

[0082] The global synchronization clock module is used to configure global synchronization timestamps and trigger timestamps for wafer-level probe testing;

[0083] The link segment acquisition module is used to sequentially configure the probe tip, probe card interface, connecting cable, signal conditioning circuit, and data acquisition terminal as acquisition nodes, configure the transmission path between adjacent acquisition nodes as link segments, define the link segment between the probe tip and the probe card interface as the tip contact link segment, define the link segment between the probe card interface and the connecting cable as the interface transmission link segment, define the link segment between the connecting cable and the signal conditioning circuit as the cable transmission link segment, and define the link segment between the signal conditioning circuit and the data acquisition terminal as the acquisition input link segment. It applies bidirectional calibration excitation to each link segment and acquires forward node response data and reverse node response data.

[0084] The differential feature construction module is used to form link segment differential features based on forward node response data and reverse node response data, and bind the link segment differential features with probe number, signal transmission link number, link segment number and global synchronization timestamp;

[0085] The mapping data construction module is used to acquire temperature data, contact pressure data, mechanical vibration data, electromagnetic field data and probe wear data, and map them to the corresponding probe number and signal transmission link number to form multi-source mapping data;

[0086] The calibration sample management module is used to acquire benchmark calibration samples and historical calibration samples, form probe-level calibration samples based on link segment differential characteristics and multi-source mapping data, and call up benchmark calibration samples and historical calibration samples.

[0087] The tolerance configuration module is used to configure the preset directional response tolerance, preset arrival time tolerance, preset mapping tolerance, and readback time window.

[0088] The error source determination module is used to generate a link segment error source sequence when the directional response difference in the same link segment exceeds the preset directional response tolerance, the arrival time difference exceeds the preset arrival time tolerance, and at least one of the multi-source mapping data associated with the link segment exceeds the corresponding preset mapping tolerance under the same global synchronization timestamp.

[0089] The synchronization instruction encapsulation module is used to generate position adjustment, electrical parameter adjustment and signal delay adjustment based on the link segment error source sequence, and encapsulate them into a synchronization calibration instruction package with the same trigger timestamp;

[0090] The probe execution module is used to adjust the position, electrical parameters, and signal delay of the corresponding probe according to the synchronous calibration instruction package;

[0091] The readback update module is used to reconstruct the differential features of the verification link segment within the readback time window, compare the differential features of the verification link segment with the differential features of the link segment before executing the synchronization calibration command packet to obtain the calibration residual, and determine the residual link segment corresponding to the calibration residual; when the residual link segment does not belong to the link segment error source sequence, the residual link segment is used as the migration error link segment update probe-level calibration sample.

[0092] Compared with existing technologies, the above technical solution has the following advantages:

[0093] 1. This invention divides the transmission path between the probe tip, probe card interface, connecting cable, signal conditioning circuit and data acquisition terminal into link segments and forms link segment differential characteristics for each link segment. This allows the test error generated during wafer-level probe testing to correspond to a specific transmission location, avoiding the problem of difficulty in distinguishing the source of error when calibrating based solely on the overall test results or a single delay parameter. This improves the accuracy of link error location in multi-probe electrical testing of wide-bandgap semiconductor devices.

[0094] 2. This invention forms multi-source mapping data from temperature data, contact pressure data, mechanical vibration data, electromagnetic field data, and probe wear data, and together with the link segment differential characteristics under the same global synchronization timestamp, constitutes a probe-level calibration sample. This enables link segment response anomalies to correspond to multi-physics field disturbances and probe wear states during actual testing, thereby improving the reliability of error source judgment under high temperature, high pressure, and high frequency probe testing environments.

[0095] 3. This invention generates a sequence of link segment error sources based on probe-level calibration samples, reference calibration samples, and historical calibration samples, and generates position adjustment, electrical parameter adjustment, and signal delay adjustment accordingly. This enables the probe position, electrical conditioning parameters, and signal delay to be calibrated for different link segment error sources, reducing the calibration inconsistency caused by independent adjustments between different calibration objects.

[0096] 4. This invention encapsulates the position adjustment amount, electrical parameter adjustment amount, and signal delay adjustment amount into a synchronous calibration instruction package with the same trigger timestamp, and performs synchronous triggering through an interlocking method. This enables the displacement execution, electrical parameter adjustment, and delay compensation under the same probe number in multi-probe testing to be executed in a unified timing sequence, thereby improving the consistency of synchronous calibration in multi-channel parallel probe testing. Attached Figure Description

[0097] Figure 1 This is a schematic diagram of the physical topology of the signal transmission link for the entire path of wide-bandgap semiconductor multi-probe testing provided in an embodiment of the present invention;

[0098] Figure 2 This is a schematic diagram of a heterogeneous layout of a multi-source sensor for wide-bandgap semiconductor multi-probe testing provided in an embodiment of the present invention;

[0099] Figure 3 This is a timing diagram of the bidirectional calibration excitation and synchronous acquisition window provided in an embodiment of the present invention;

[0100] Figure 4 This is a schematic diagram of waveform comparison for link segment differential feature extraction provided in an embodiment of the present invention;

[0101] Figure 5This is a timing diagram of the error migration tracing process provided in an embodiment of the present invention;

[0102] Figure 6 This is a schematic diagram of the three-dimensional position closed-loop adjustment state of the multi-probe provided in an embodiment of the present invention;

[0103] Figure 7 This is a schematic diagram of the dynamic synchronous calibration method for the entire path of wide bandgap semiconductor multi-probe testing provided in an embodiment of the present invention;

[0104] Figure 8 This is a schematic diagram of the logic flow for determining the source of link segment error provided in an embodiment of the present invention;

[0105] Figure 9 This is a schematic diagram of the synchronous calibration instruction interlock execution process provided in an embodiment of the present invention;

[0106] Figure 10 This is a schematic diagram of the residual evaluation and migration error update process provided in an embodiment of the present invention;

[0107] Figure 11 This is a schematic diagram of the module connection of the wide bandgap semiconductor multi-probe testing full-path dynamic synchronous calibration system provided in an embodiment of the present invention. Detailed Implementation

[0108] The following description, in conjunction with the accompanying drawings, illustrates the specific implementation process of the wide-bandgap semiconductor multi-probe testing full-path dynamic synchronous calibration system and method. Without departing from the essence of this technical solution, those skilled in the art can make adaptive adjustments to the specific device model, acquisition frequency, tolerance value, interface form, and actuator type.

[0109] This embodiment applies to wafer-level probe testing of wide-bandgap semiconductor devices. The test object can be a silicon carbide power diode, a silicon carbide MOSFET, a gallium nitride RF device, or other wide-bandgap semiconductor devices. Test items can include electrical parameters such as leakage current, on-resistance, threshold voltage, breakdown voltage, gate charge, high-frequency phase response, and pulse switching delay. This probe testing process falls under the category of semiconductor device electrical testing. The test system includes a probe station, probe card, multiple probes, connecting cables, signal conditioning circuitry, data acquisition terminal, global synchronization clock, host computer, and execution control unit.

[0110] like Figure 1As shown, in this embodiment, the probe tip, probe card interface, connecting cable, signal conditioning circuit, and data acquisition terminal are sequentially designated as acquisition nodes, and the transmission paths between adjacent acquisition nodes are designated as link segments. Specifically, the link segment between the probe tip and the probe card interface is defined as the tip contact link segment, the link segment between the probe card interface and the connecting cable is defined as the interface transmission link segment, the link segment between the connecting cable and the signal conditioning circuit is defined as the cable transmission link segment, and the link segment between the signal conditioning circuit and the data acquisition terminal is defined as the acquisition input link segment. Each probe participating in the probe test is assigned a probe number, each signal transmission path extending from the probe tip to the data acquisition terminal is assigned a signal transmission link number, and each link segment is assigned a link segment number. This numbering method is used to correspond the link segment differential characteristics, multi-source mapping data, benchmark calibration samples, and historical calibration samples corresponding to the same probe.

[0111] In one implementation, probe numbers are generated according to their array positions on the probe card; for example, the probe in the first row and first column corresponds to probe number P-001, and the probe in the first row and second column corresponds to probe number P-002. Signal transmission link numbers are generated according to the test channels of the data acquisition terminal; for example, the signal transmission path connected to the first test channel corresponds to signal transmission link number C-001. Link segment numbers are generated according to the transmission order; for example, the tip contact link segment corresponds to link segment number S1, the interface transmission link segment corresponds to link segment number S2, the cable transmission link segment corresponds to link segment number S3, and the acquisition input link segment corresponds to link segment number S4. The above numbering method is for illustrative purposes only and does not limit the numbering format in actual engineering.

[0112] like Figure 2 As shown, in this embodiment, a temperature sensor array is arranged on the probe card substrate, a contact pressure sensor is arranged at or near the root of each probe, a mechanical vibration sensor is arranged at the probe stage base, probe stage support mechanism, or probe card clamping structure, and an electromagnetic field sensor is arranged around the connecting cable or in the cable bundle transition area. The temperature sensors can be platinum resistance temperature sensors, thin-film temperature sensors, or integrated temperature sensors. The contact pressure sensors can be piezoresistive pressure sensors, piezoelectric pressure sensors, or miniature force sensors. The mechanical vibration sensors can be accelerometers, laser Doppler vibrators, or displacement sensors. The electromagnetic field sensors can be near-field electromagnetic probes, broadband electric field sensors, or magnetic field probes. Probe wear data can be formed by combining contact resistance change data, tip current distribution data, and Z-axis contact displacement data, or by combining tip image detection data and contact resistance change data.

[0113] In this embodiment, before starting wafer-level probe testing, the probe testing system configures a reference calibration sample and a historical calibration sample. The reference calibration sample originates from standard calibration chip testing, which can be a semiconductor test calibration chip with standard resistance, standard capacitance, standard open circuit, standard short circuit, and standard transmission line structures. The historical calibration sample originates from historical link segment error source sequences, historical synchronization calibration instruction packets, historical calibration residuals, and historical global synchronization timestamps generated in historical wafer-level probe tests for the same probe number. The reference calibration sample includes reference link segment differential characteristics and reference multi-source mapping data, including reference temperature mapping data, reference contact pressure mapping data, reference mechanical vibration mapping data, reference electromagnetic field mapping data, and reference probe wear mapping data. The historical calibration sample is used to determine the previous global synchronization timestamp during subsequent wafer-level probe testing and to recall recorded link segment error sources and calibration residuals.

[0114] like Figure 3 As shown, a global synchronization clock is used to configure a global synchronization timestamp, trigger timestamp, first synchronization acquisition window, second synchronization acquisition window, and readback time window for wafer-level probe testing. The global synchronization clock can be provided by a rubidium atomic clock, a temperature-controlled crystal oscillator, a PXIe backplane clock, or other low-jitter synchronization clock sources. In one embodiment, the global synchronization clock is distributed to the link segment acquisition module, differential feature construction module, mapping data construction module, synchronization command encapsulation module, and probe execution module via a PXIe backplane synchronization trigger line, fiber optic synchronization distribution line, or low-jitter clock fan-out circuit. The global synchronization timestamp is written into the acquired data in the form of a data frame, which includes at least the test batch identifier, wafer number, probe number, signal transmission link number, link segment number, and time count value. The trigger timestamp is derived from the global synchronization timestamp and is used to trigger the latching and execution of the synchronization calibration command packet at the corresponding time. Thus, the link segment differential features, multi-source mapping data, synchronization calibration command packet, and readback results can correspond under the same time base.

[0115] In this embodiment, a bidirectional calibration stimulus is applied to each link segment. The default implementation of the bidirectional calibration stimulus is a time-domain reflected step pulse, which is injected into the corresponding link segment through a directional coupler, a miniature switch matrix, or a calibration switch built into the probe card. Alternatively, the bidirectional calibration stimulus can also use a pulse edge calibration signal, a frequency-domain swept sine signal, or a pseudo-random binary sequence calibration signal. By default, the bidirectional calibration stimulus is injected using the test interval of normal probe testing; when the test cycle does not allow for setting an independent test interval, the calibration stimulus can be injected outside the normal test frequency band using frequency division multiplexing, or a small-amplitude calibration stimulus can be superimposed on a common-mode channel that does not affect the test state of the device under test using common-mode injection.

[0116] Specifically, following the transmission order from the probe tip to the data acquisition terminal, a first calibration stimulus is input to the preceding acquisition node of each link segment, and the forward node response data is acquired at the following acquisition node; similarly, following the transmission order from the data acquisition terminal to the probe tip, a second calibration stimulus is input to the following acquisition node, and the reverse node response data is acquired at the preceding acquisition node. The first calibration stimulus is configured in the first synchronous acquisition window, and the second calibration stimulus is configured in the second synchronous acquisition window. Both the first and second synchronous acquisition windows contain the link segment differential characteristics, enabling subsequent processing to identify the time windows corresponding to the forward and reverse node response data.

[0117] like Figure 4 As shown, the link segment differential characteristics are formed by forward node response data and reverse node response data. Forward amplitude, forward arrival time, forward DC offset, and forward phase are determined based on the forward node response data; reverse amplitude, reverse arrival time, reverse DC offset, and reverse phase are determined based on the reverse node response data. Amplitude attenuation difference is formed by forward and reverse amplitude, DC offset difference by forward and reverse DC offset, and phase difference by forward and reverse phase. The amplitude attenuation difference, DC offset difference, and phase difference together constitute the directional response difference; arrival time difference is formed by forward and reverse arrival times. The directional response difference and arrival time difference are arranged according to the link segment number, forming the link segment differential characteristics. The units for forward and reverse amplitude can be millivolts or decibels, the unit for arrival time can be picoseconds, the unit for DC offset can be microvolts, and the unit for phase can be degrees.

[0118] In one specific implementation, the amplitude attenuation difference is determined according to the following formula:

[0119]

[0120] in, This indicates the difference in amplitude attenuation, expressed in dB or mV. This indicates the forward amplitude, which originates from the forward node response data within the first synchronous acquisition window; This indicates the reverse amplitude, which originates from the reverse node response data within the second synchronous acquisition window.

[0121] The time difference of arrival is determined by the following formula:

[0122]

[0123] in, This indicates the difference in arrival times, expressed in ps. This indicates the forward arrival time, which is derived from the forward node response data within the first synchronous acquisition window; This indicates the reverse arrival time, which is derived from the reverse node response data within the second synchronous acquisition window.

[0124] The DC offset difference is determined by the following formula:

[0125]

[0126] in, Indicates the difference in DC offset, in μV; This indicates the forward DC offset, which originates from the forward node response data within the first synchronous acquisition window; This indicates the reverse DC offset, which originates from the reverse node response data within the second synchronous acquisition window.

[0127] Phase difference is determined by the following formula:

[0128]

[0129] in, Indicates phase difference, in degrees; This indicates the forward phase, which originates from the forward node response data within the first synchronous acquisition window; This indicates the reverse phase, which originates from the response data of the reverse node within the second synchronous acquisition window.

[0130] In this embodiment, the multi-source mapping data is formed according to the physical arrangement relationship. Specifically, temperature data is mapped to the corresponding probe and its adjacent probes according to the probe card coordinates; contact pressure data is mapped to the corresponding probe according to the probe root number; mechanical vibration data is mapped to the probe card area where the corresponding probe is located according to the probe station coordinates; electromagnetic field data is mapped to the corresponding signal transmission link number according to the connecting cable routing path; and probe wear data is mapped to the corresponding probe according to the probe number. The mapped temperature data, contact pressure data, mechanical vibration data, electromagnetic field data, and probe wear data are determined as multi-source mapping data and are written into the probe-level calibration sample together with the link segment differential characteristics under the same global synchronization timestamp.

[0131] In one implementation, temperature data is mapped to probe numbers using a nearest neighbor mapping method. This means the temperature data from the temperature sensor closest to the target probe is used as the temperature data for that target probe, or a weighted average of multiple temperature sensor data around the target probe is used as the corresponding temperature data. Contact pressure data is mapped one-to-one with probe numbers according to the probe root number. Mechanical vibration data is mapped to the probe card area according to the probe stage coordinate region. Electromagnetic field data is mapped to the signal transmission link number according to the connection cable routing path. Probe wear data is directly written into the probe-level calibration sample corresponding to the same probe number.

[0132] Table 1 presents one preset tolerance configuration method. The preset tolerance can be determined jointly by standard calibration chip testing, historical wafer-level probe test data, and equipment factory calibration data. In one implementation, the reference link segment differential characteristics and reference multi-source mapping data for each link segment are first obtained through standard calibration chip testing. Then, based on the data fluctuation range, acquisition hardware resolution, and test noise level in several consecutive stable tests, preset directional response tolerance, preset arrival time tolerance, and preset mapping tolerance are configured. The preset directional response tolerance includes at least one of amplitude attenuation tolerance, DC offset tolerance, and phase difference tolerance; different link segments can select the corresponding amplitude attenuation tolerance, DC offset tolerance, or phase difference tolerance based on the main error type.

[0133] Table 1. Multiphysics Mapping Tolerance and Response Tolerance Configuration Table

[0134] Needle tip contact link segment Contact pressure data, probe wear data Contact pressure ±0.5mN; contact resistance variation ±8mΩ 5ps Amplitude attenuation difference: 0.10 dB; DC offset difference: 8 μV Interface transmission link segment Temperature data, mechanical vibration data Temperature ±2.0℃; Displacement vibration ±2nm 10ps Phase difference 0.5°; amplitude attenuation difference 0.15dB. Cable transmission link segment Electromagnetic field data, time of arrival difference Electric field strength ±1.5V / m; magnetic field strength ±0.03mT 12ps Phase difference 0.8°; amplitude attenuation difference 0.20dB. Input link segment acquisition Amplitude attenuation difference, DC offset difference, phase difference Input offset ±12μV; sampling phase ±0.6° 8ps Amplitude attenuation difference: 0.12 dB; DC offset difference: 10 μV; Phase difference: 0.6°

[0135] In this embodiment, the probe-level calibration sample is compared with the reference calibration sample and historical calibration samples. When the directional response difference of the same link segment exceeds the preset directional response tolerance, the arrival time difference exceeds the preset arrival time tolerance, and at least one piece of data in the multi-source mapping data associated with the same link segment exceeds the corresponding preset mapping tolerance under the same global synchronization timestamp, a link segment error source sequence is generated. The link segment error source sequence is used to represent the link segments identified as error sources in the current probe test state and their transmission order.

[0136] In one specific implementation, the differential characteristics of link segments in the probe-level calibration samples are first compared with the differential characteristics of reference link segments, and link segments exceeding the corresponding preset reference tolerance are identified as candidate error link segments. Next, the multi-source mapping data corresponding to the candidate error link segments are compared with the reference multi-source mapping data, and link segments exceeding the corresponding preset mapping tolerance are identified as candidate disturbance link segments. Then, link segments that simultaneously belong to both candidate error link segments and candidate disturbance link segments are identified as link segment error sources. When there is one link segment error source, this link segment error source is used as the link segment error source sequence; when there are at least two link segment error sources, at least two link segment error sources are arranged according to the transmission order from the probe tip to the data acquisition end to form a link segment error source sequence.

[0137] Table 2 presents a truth table for an error source location and determination logic.

[0138] Table 2 Truth Table for Error Source Location Judgment Logic

[0139] A1 Needle tip contact link segment Contact pressure data and probe wear data are out of tolerance. There is no transmission relationship with the previous link segment. The needle tip contact link segment is written into the link segment error source sequence. A2 Cable transmission link segment Electromagnetic field data out of tolerance The direction of change is inconsistent with the input reference data. Write the cable transmission link segment into the link segment error source sequence. A3 Interface transmission link segment, cable transmission link segment Temperature data out of tolerance The direction of change in the arrival time of the cable transmission link segment is consistent with the input reference data of the interface transmission link segment. Write the interface transmission link segment into the link segment error source sequence, and write the cable transmission link segment into the transmission link segment list. A4 Input link segment acquisition Sampling phase out of tolerance The direction of change is inconsistent with the previous link segment. The collected input link segments are written into the link segment error source sequence. A5 Needle tip contact link segment, data acquisition input link segment Both contact pressure data and sampling phase are out of tolerance. The two change in different directions. The needle tip contact link segment and the acquisition input link segment are respectively written into the link segment error source sequence.

[0140] In one implementation, when both the first link segment and the second link segment are identified as candidate error link segments, and the transmission sequence of the first link segment from the probe tip to the data acquisition end precedes that of the second link segment, the forward node response data of the first link segment is used as the input reference data for the second link segment. The global synchronization timestamp corresponding to the current probe-level calibration sample is determined as the current global synchronization timestamp, and the historical global synchronization timestamp adjacent to and earlier than the current global synchronization timestamp in the historical calibration samples is determined as the previous global synchronization timestamp. When the direction of the arrival time difference between the second link segment and the previous global synchronization timestamp is consistent with the direction of the arrival time difference of the input reference data between the current global synchronization timestamp and the previous global synchronization timestamp, the first link segment is written into the link segment error source sequence, and the second link segment is written into the transmission link segment list. When the direction of the arrival time difference between the second link segment and the previous global synchronization timestamp is inconsistent with the direction of the arrival time difference of the input reference data between the current global synchronization timestamp and the previous global synchronization timestamp, the first link segment and the second link segment are respectively written into the link segment error source sequence. This processing can be used to distinguish between transmission variations caused by upstream link segments and multiple independent link segment error sources.

[0141] In this embodiment, position adjustment, electrical parameter adjustment, and signal delay adjustment are generated based on the link segment error source sequence. When the link segment error source sequence includes a needle tip contact link segment, a Z-axis displacement adjustment is generated based on the contact pressure data and probe wear data corresponding to that needle tip contact link segment. When the link segment error source sequence includes an interface transmission link segment, X-axis, Y-axis, and Z-axis displacement adjustments are generated based on the temperature data and mechanical vibration data corresponding to that interface transmission link segment. When the link segment error source sequence includes a cable transmission link segment, a signal delay adjustment is generated based on the arrival time difference and electromagnetic field data corresponding to that cable transmission link segment. When the link segment error source sequence includes an acquisition input link segment, gain adjustment, DC offset adjustment, and sampling phase adjustment are generated based on the amplitude attenuation difference, DC offset difference, and phase difference corresponding to that acquisition input link segment. Position adjustment includes X-axis displacement adjustment, Y-axis displacement adjustment, and Z-axis displacement adjustment. Electrical parameter adjustment includes gain adjustment, DC offset adjustment, and sampling phase adjustment. For adjustments not triggered by the link segment error source sequence, the corresponding adjustment amount is set as the baseline hold-in amount.

[0142] In one calculation example, the interface transmission link segment experiences lateral thermal deformation in the probe card interface area due to temperature changes. The X-axis displacement adjustment and Y-axis displacement adjustment can be determined according to the following formula:

[0143]

[0144]

[0145] in, This indicates the X-axis displacement adjustment, in μm. This indicates the Y-axis displacement adjustment, in μm. This represents the equivalent length of the probe card interface area in the X-axis direction, in μm. This represents the equivalent length of the probe card interface area in the Y-axis direction, in μm. The coefficient of linear expansion of the probe card substrate material, expressed in units of 1. ; This indicates the current temperature data, in °C. This represents the reference temperature mapping data, in °C.

[0146] For example, the equivalent length of the probe card interface area in the X-axis direction is 20000 μm, the equivalent length of the probe card interface area in the Y-axis direction is 15000 μm, and the coefficient of linear expansion of the probe card substrate material is... The current temperature is 252℃, and the reference temperature mapping is 250℃. Substituting into the above calculation formula, the X-axis displacement adjustment is -0.52μm, and the Y-axis displacement adjustment is -0.39μm. The negative sign indicates that the displacement adjustment direction is opposite to the thermal expansion direction. The triaxial displacement actuator drives the piezoelectric ceramic or other micro-displacement actuator according to the X-axis and Y-axis displacement adjustments.

[0147] The signal delay adjustment amount for the cable transmission link segment can be determined according to the following formula:

[0148]

[0149] in, This indicates the signal delay adjustment amount, measured in ps. This indicates the current time difference of arrival, in ps (ps). This indicates the difference in baseline arrival time, expressed in ps.

[0150] For example, if the current arrival time difference is 18 ps and the reference arrival time difference is 4 ps, then the signal delay adjustment is -14 ps. This signal delay adjustment is written to the corresponding channel via a programmable delay line, so that the propagation delay of the cable transmission link segment returns to the state corresponding to the reference arrival time difference.

[0151] The gain adjustment amount for the input link segment can be determined according to the following formula:

[0152]

[0153] in, This indicates the gain adjustment amount, in dB. Indicates the gain conversion factor; This indicates the current amplitude attenuation difference, in dB. This indicates the difference in baseline amplitude attenuation, expressed in dB.

[0154] For example, if the current amplitude attenuation difference is 0.32dB, the reference amplitude attenuation difference is 0.08dB, and the gain conversion factor is 1, then the gain adjustment is -0.24dB. The signal conditioning parameter adjustment unit adjusts the gain of the programmable gain amplifier accordingly. The DC offset adjustment can be determined based on the difference between the current DC offset difference and the reference DC offset difference, and the sampling phase adjustment can be determined based on the difference between the current phase difference and the reference phase difference.

[0155] like Figure 6 As shown, when the probe tip contact link segment is written into the link segment error source sequence, the probe execution module can adjust the Z-axis contact displacement based on contact pressure data and probe wear data. In one embodiment, the Z-axis displacement adjustment amount can be determined according to the following formula:

[0156]

[0157] in, This indicates the Z-axis displacement adjustment, in μm. This represents the contact pressure conversion factor, with units of μm / mN; This indicates the current contact pressure data, in mN. This represents the baseline contact pressure mapping data, in mN; Indicates the probe wear conversion factor; This indicates the current probe wear data, in μm; This represents the wear mapping data of the reference probe, in μm.

[0158] For example, if the current contact pressure data is 0.8 mN higher than the reference contact pressure mapping data, and the current probe wear data is 0.03 μm higher than the reference probe wear mapping data, with a contact pressure conversion factor of 0.12 μm / mN and a probe wear conversion factor of 0.5, then the Z-axis displacement adjustment is -0.111 μm. The probe execution module executes this Z-axis displacement adjustment through a triaxial displacement execution unit.

[0159] In this embodiment, the synchronous calibration instruction package is used to send different types of adjustment quantities to the corresponding execution end at the same trigger timestamp. For example... Figure 9As shown, the synchronous calibration command packet includes a main body. The main body includes an identification field, an adjustment field, a timing field, and an interlock field. The identification field includes the corresponding probe number, the corresponding signal transmission link number, and the link segment error source sequence. The adjustment field includes position adjustment, electrical parameter adjustment, and signal delay adjustment; adjustments not triggered by the link segment error source sequence are written to the adjustment field as reference hold values. The timing field includes a trigger timestamp, execution sequence number, and readback time window. The execution sequence number is used to determine the register loading order of different execution units before the same trigger timestamp arrives, without changing the common trigger time of each execution unit. The interlock field includes an execution interlock identifier. Multiple synchronous calibration command packets with the same trigger timestamp are sorted by probe number and written to the synchronous transmission queue.

[0160] In one embodiment, the probe execution module includes a three-axis displacement execution unit, a signal conditioning parameter adjustment unit, and a delay adjustment unit. The three-axis displacement execution unit can be a piezoelectric ceramic actuator, a voice coil actuator, or a microelectromechanical displacement actuator. The signal conditioning parameter adjustment unit can include a programmable gain amplifier, a digital potentiometer, and a DC offset compensation circuit. The delay adjustment unit can use a programmable delay line, a phase interpolator, or a clock phase adjustment circuit. When the trigger timestamp arrives, a displacement execution sub-instruction containing a position adjustment amount is sent to the three-axis displacement execution unit of the corresponding probe, an electrical execution sub-instruction containing an electrical parameter adjustment amount is sent to the signal conditioning parameter adjustment unit of the corresponding probe, and a delay execution sub-instruction containing a signal delay adjustment amount is sent to the delay adjustment unit of the corresponding probe. When the execution interlock flag is enabled, the displacement execution sub-instruction, electrical execution sub-instruction, and delay execution sub-instruction under the same probe number enter the execution state at the same trigger timestamp.

[0161] Interlocking can be implemented via the synchronous trigger line of the PXIe backplane bus or via FPGA synchronous triggering logic. In one implementation, displacement execution sub-instructions, electrical execution sub-instructions, and delayed execution sub-instructions are first written into the latch registers of the corresponding execution units. When the trigger timestamp arrives, the global synchronization clock generates a trigger signal on the same rising edge, and each latch register simultaneously outputs the corresponding sub-instruction to reduce the internal response time difference between different actuators. This interlocking execution method is suitable for synchronous calibration in multi-probe parallel probe testing.

[0162] like Figure 10As shown, after executing the synchronous calibration command package, the node response data of the corresponding link segment is re-acquired within the readback time window, and a verification link segment differential feature is formed based on the re-acquired node response data. The verification link segment differential feature is compared with the link segment differential feature before executing the synchronous calibration command package to determine the calibration residual and the corresponding residual link segment. When the residual link segment belongs to the link segment error source sequence, the calibration residual is written into the historical calibration sample of the corresponding link segment. When the residual link segment does not belong to the link segment error source sequence, the residual link segment is identified as a migration error link segment and added to the link segment error source sequence.

[0163] In one calculation example, the calibration residual can be determined according to the following formula:

[0164]

[0165] in, Indicates calibration residual; This represents the eigenvalue in the differential characteristics of the verified link segment; This represents the characteristic value in the differential characteristics of the link segment before executing the synchronous calibration command packet. For different characteristics, the calibration residuals corresponding to directional response differences, arrival time differences, DC offset differences, and phase differences can be calculated separately. The residual link segment can be determined as follows: the calibration residual of each link segment is compared with the residual tolerance of the corresponding link segment, and the link segment with the largest calibration residual exceeding the residual tolerance is determined as the residual link segment; when the calibration residuals of multiple link segments all exceed the residual tolerance, the set of residual link segments is determined according to the transmission order from the probe tip to the data acquisition end, and each link segment in the set of residual link segments is determined to be a link segment error source sequence; for link segments that do not belong to the link segment error source sequence, they are determined as migration error link segments.

[0166] For example, before executing the synchronous calibration command package, the arrival time difference of the cable transmission link segment was 18 ps. After reconstructing the differential characteristics of the verification link segment within the readback time window, the arrival time difference of the cable transmission link segment decreased to 7 ps, but the phase difference of the acquisition input link segment changed from 0.3° to 1.2°. At this point, the original link segment error source sequence only included the cable transmission link segment, while the differential characteristics of the verification link segment showed that the calibration residual mainly corresponded to the acquisition input link segment. Therefore, the acquisition input link segment was identified as the migration error link segment and added to the link segment error source sequence. This allows for the identification of link segment changes that cause errors after calibration.

[0167] like Figure 5As shown, within multiple consecutive readback time windows, errors may migrate from the cable transmission link segment to the acquisition input link segment. This phenomenon can be caused by signal edge shift due to electromagnetic disturbances in the cable transmission link segment, which, after being amplified by the signal conditioning circuit, manifests as sampling phase deviation at the data acquisition end. In this case, if only delay compensation is applied to the cable transmission link segment, phase error may still remain in the acquisition input link segment. Therefore, this embodiment re-evaluates the residual link segment by checking the differential characteristics of the verification link segment within the readback time window, and updates the probe-level calibration sample with the migrated error link segment.

[0168] When updating the probe-level calibration sample, the link segment error source sequence after adding the migration error link segment is determined as the updated link segment error source sequence. A new synchronization calibration instruction package is generated based on the updated link segment error source sequence. The regenerated synchronization calibration instruction package, the corresponding calibration residual, the verified link segment differential characteristics, and the migration error link segment are written into the probe-level calibration sample with the same probe number. The historical calibration samples in the probe-level calibration sample are updated as the call samples for the next wafer-level probe test. Thus, before the next wafer-level probe test begins, the updated link segment error source sequence, the synchronization calibration instruction package, and the calibration residual can be called from the updated historical calibration sample. Based on these data, an initial synchronization calibration instruction package is generated and written into the synchronization transmission queue. During the next wafer-level probe test, the verified link segment differential characteristics formed after executing the initial synchronization calibration instruction package are written into the probe-level calibration sample with the corresponding probe number.

[0169] This embodiment can also include an abnormal link segment processing step. When the same link segment is identified as a migration error link segment within N consecutive readback time windows, the link segment is marked as an abnormal link segment, where N is an integer greater than or equal to 2. N can be set according to the test cycle time, equipment noise level, number of acquisition channels, and test reliability requirements, and commonly ranges from 2 to 5. The process of inputting the node response data of the abnormal link segment into the generation of the link segment error source sequence is stopped. The differential characteristics of the link segment adjacent to the abnormal link segment and located under the same signal transmission link number are invoked to generate abnormal link segment compensation data. In one implementation, when the abnormal link segment has a preceding and following adjacent link segment under the same signal transmission link number, abnormal link segment compensation data is generated based on the differential characteristics of the preceding and following adjacent link segments. When the abnormal link segment has only one adjacent link segment, abnormal link segment compensation data is generated based on the differential characteristics of that adjacent link segment and historical calibration samples. Then, the abnormal link segment compensation data is written into the probe-level calibration sample, and the abnormal link segment mark is written into the synchronous calibration instruction packet.

[0170] like Figure 7As shown, the main process of full-path dynamic synchronous calibration in this embodiment includes: configuring probe number, signal transmission link number, global synchronization timestamp, reference calibration sample, historical calibration sample, preset tolerance and readback time window; dividing link segments; applying bidirectional calibration excitation; forming link segment differential characteristics; forming multi-source mapping data; generating probe-level calibration samples; determining the link segment error source sequence; encapsulating synchronous calibration instruction package; executing synchronous calibration instruction package; reading back and verifying link segment differential characteristics; determining calibration residual and migration error link segments; and updating probe-level calibration samples.

[0171] like Figure 8 As shown, the link segment error source determination logic takes link segment differential characteristics and multi-source mapping data as input. This logic first determines candidate error link segments, then determines candidate disturbance link segments, and takes the intersection of the candidate error link segments and the candidate disturbance link segments as the link segment error source. For multiple candidate error link segments, it further distinguishes between the original link segment error source and the propagating link segment based on the arrival time change direction relationship between the previous global synchronization timestamp and the current global synchronization timestamp. This determination can be implemented using a threshold comparator and lookup table logic in the FPGA, or it can be implemented using host computer software combined with a high-speed acquisition card. To ensure the processing matches the closed-loop hardware of semiconductor device probe testing, this embodiment prioritizes using a hardware threshold comparator, lookup table unit, and synchronization trigger logic to determine the link segment error source sequence.

[0172] like Figure 11As shown, the wide-bandgap semiconductor multi-probe testing full-path dynamic synchronous calibration system in this embodiment includes a numbering configuration module, a global synchronization clock module, a link segment acquisition module, a differential feature construction module, a mapping data construction module, a calibration sample management module, a tolerance configuration module, an error source determination module, a synchronization instruction encapsulation module, a probe execution module, and a readback update module. The numbering configuration module configures probe numbers for the probes participating in the test and configures signal transmission link numbers for the corresponding signal transmission paths of the probes. The global synchronization clock module configures global synchronization timestamps and trigger timestamps for wafer-level probe testing. The link segment acquisition module configures acquisition nodes and link segments, and acquires forward node response data and reverse node response data. The differential feature construction module forms link segment differential features. The mapping data construction module forms multi-source mapping data. The calibration sample management module acquires benchmark calibration samples and historical calibration samples, and forms probe-level calibration samples. The tolerance configuration module configures preset directional response tolerances, preset arrival time tolerances, preset mapping tolerances, and readback time windows. The error source determination module generates a link segment error source sequence. The synchronization command encapsulation module encapsulates synchronization calibration command packages. The probe execution module adjusts the position, electrical parameters, and signal delay of the corresponding probes. The readback update module reconstructs the differential characteristics of the verification link segments, determines the calibration residuals and migration error link segments, and updates the probe-level calibration samples.

[0173] To verify the technical effectiveness of this embodiment, comparative tests were conducted on a set of wide-bandgap semiconductor probe test prototypes. The test object was a 1200V silicon carbide MOSFET wafer, the test temperature was 250℃, the probe card included 256 parallel test channels, and the test signals included DC leakage current test signals, on-resistance test signals, and 10MHz high-frequency phase test signals. Comparative Example 1 used a time-domain reflectometry method similar to that in the background art for test path calibration and fixture delay calibration; Comparative Example 2 only performed single-point dynamic calibration for the probe tip contact state; the embodiment used the full-path closed-loop synchronous calibration method of this embodiment. All three schemes were tested under the same probe station, the same probe card, the same data acquisition terminal, the same temperature conditions, and the same test voltage conditions. The test results are shown in Table 3.

[0174] Table 3. Comparison of Testing Accuracy of Wide Bandgap Semiconductor Probes at 250℃

[0175] 1200V，250℃ Leakage current test uncertainty ±85pA ±26pA ±3.2pA 250℃, gate voltage 15V Uncertainty of on-resistance test ±5.1% ±1.8% ±0.42% 10MHz, high temperature hold for 30 minutes Phase test deviation ±4.6° ±1.7° ±0.12° 256-channel parallel testing Inter-channel triggering deviation ±120ps ±45ps ±6ps Continuous testing of 100 wafers Post-calibration residual drift ±38ps ±18ps ±3ps 250℃, high dv / dt pulse test Error Sources: Positioning Error Rate 18.50% 9.60% 1.80%

[0176] As shown in Table 3, in high-temperature, high-voltage, and high-frequency probe testing scenarios for wide-bandgap semiconductor devices, compared to a single calibration of the test path, this embodiment, through a combination of link segment differential characteristics, multi-source mapping data, link segment error source sequences, synchronous calibration command packets, and readback residual updates, can segment and locate link segment error sources during multi-probe parallel testing, and can identify the link segments with migrated errors after calibration. This processing method can reduce the dynamic errors corresponding to electrical test data such as current, voltage, phase, and delay.

[0177] In practical applications, if the device under test (DUT) is a gallium nitride (GaN) RF device, the phase difference, amplitude attenuation difference, and arrival time difference between the cable transmission link segment and the acquisition input link segment can be used as the main judgment features. If the DUT is a silicon carbide (SiC) power device, the contact pressure data of the probe tip contact link segment, probe wear data, and arrival time difference of the cable transmission link segment can be used as the main judgment features. For low-frequency DC testing, the use of phase difference can be reduced, and amplitude attenuation difference, DC offset difference, and contact pressure data can be mainly used to determine the source of link segment error. For RF probe testing, the judgment priority of phase difference and arrival time difference in the differential characteristics of the link segment can be increased.

[0178] In other implementations, the bidirectional calibration excitation can be replaced by a frequency-domain sweep signal instead of a time-domain step pulse, and the link segment differential characteristics can be composed of scattering parameters, group delay, amplitude and phase response, and DC offset. The three-axis displacement actuator can be a piezoelectric ceramic actuator, a miniature voice coil actuator, or a MEMS displacement actuator. The global synchronization timestamp can be provided by a PXIe backplane clock or by an external high-stability clock source distributed via fiber optic cable. Any process capable of link segment partitioning, bidirectional response acquisition, multi-source mapping, error source sequence generation, synchronous calibration command packet execution, and residual update during wafer-level probe testing can be used to implement the corresponding full-path dynamic synchronous calibration process.

[0179] In one system implementation, such as Figure 11 As shown, the wide-bandgap semiconductor multi-probe testing full-path dynamic synchronous calibration system includes a numbering configuration module, a global synchronization clock module, a link segment acquisition module, a differential feature construction module, a mapping data construction module, a calibration sample management module, a tolerance configuration module, an error source determination module, a synchronization command encapsulation module, a probe execution module, and a readback update module. These modules can be integrated into the probe testing equipment's control host, PXIe data acquisition chassis, FPGA control board, probe station controller, and signal conditioning board, or they can be implemented by two or more of these hardware units working together.

[0180] The numbering configuration module is used to assign probe numbers to each probe participating in the test before the start of wafer-level probe testing, and to assign signal transmission link numbers to the signal transmission paths corresponding to each probe. The numbering configuration module is also used to establish a correspondence between probe numbers and probe card array positions, test channels, and data acquisition terminal channels, ensuring that the same probe can be uniquely identified during subsequent link segment acquisition, multi-source mapping, synchronous calibration, and readback updates.

[0181] The global synchronization clock module is used to configure global synchronization timestamps and trigger timestamps for wafer-level probe testing. The global synchronization clock module can employ a PXIe backplane synchronization clock, a temperature-controlled crystal oscillator clock, an external high-stability synchronization clock, or a fiber-optic distributed synchronization clock. The global synchronization timestamp is used to mark the acquisition time of link segment differential characteristics, multi-source mapping data, probe-level calibration samples, and readback data. The trigger timestamp is used to control the latching and execution of synchronization calibration command packets at the corresponding time.

[0182] The link segment acquisition module is used to sequentially configure the probe tip, probe card interface, connecting cable, signal conditioning circuit, and data acquisition terminal as acquisition nodes, and to configure the transmission paths between adjacent acquisition nodes as link segments. Specifically, the link segment acquisition module defines the link segment between the probe tip and the probe card interface as the tip contact link segment, the link segment between the probe card interface and the connecting cable as the interface transmission link segment, the link segment between the connecting cable and the signal conditioning circuit as the cable transmission link segment, and the link segment between the signal conditioning circuit and the data acquisition terminal as the acquisition input link segment. The link segment acquisition module is also used to apply bidirectional calibration excitation to each link segment and acquire forward node response data and reverse node response data.

[0183] The differential feature construction module is used to form link segment differential features based on forward and reverse node response data. Specifically, the differential feature construction module determines directional response differences and arrival time differences based on the forward and reverse node response data, and binds the link segment differential features to the probe number, signal transmission link number, link segment number, and global synchronization timestamp. Directional response differences may include at least one of amplitude attenuation differences, DC offset differences, and phase differences.

[0184] The mapping data construction module acquires temperature data, contact pressure data, mechanical vibration data, electromagnetic field data, and probe wear data, and maps this data to the corresponding probe number and signal transmission link number to form multi-source mapping data. Specifically, the mapping data construction module can map temperature data according to probe card coordinates, contact pressure data according to probe root number, mechanical vibration data according to probe platform coordinates, electromagnetic field data according to connecting cable routing path, and probe wear data according to probe number.

[0185] The calibration sample management module is used to acquire benchmark calibration samples and historical calibration samples, and to form probe-level calibration samples based on link segment differential characteristics and multi-source mapping data. Benchmark calibration samples can originate from standard calibration chip tests, while historical calibration samples can originate from historical link segment error source sequences, historical synchronization calibration command packets, historical calibration residuals, and historical global synchronization timestamps generated during historical wafer-level probe tests for the same probe number. The calibration sample management module is also used to write the updated probe-level calibration samples into the historical calibration samples after a readback update, for use by the next wafer-level probe test.

[0186] The tolerance configuration module is used to configure preset directional response tolerance, preset arrival time tolerance, preset mapping tolerance, and readback time window. The preset directional response tolerance may include at least one of amplitude attenuation tolerance, DC offset tolerance, and phase difference tolerance; the preset mapping tolerance may include temperature mapping tolerance, contact pressure mapping tolerance, mechanical vibration mapping tolerance, electromagnetic field mapping tolerance, and probe wear mapping tolerance. These tolerances can be determined jointly by the test results of the standard calibration piece, the historical test fluctuation range, and the equipment's acquisition resolution.

[0187] The error source determination module compares probe-level calibration samples with benchmark calibration samples and historical calibration samples. When the directional response difference of the same link segment exceeds a preset directional response tolerance, the arrival time difference exceeds a preset arrival time tolerance, and at least one piece of data in the multi-source mapping data associated with the link segment exceeds the corresponding preset mapping tolerance under the same global synchronization timestamp, the error source determination module generates a link segment error source sequence. For multiple candidate error link segments, the error source determination module can also distinguish link segment error sources and propagating link segments based on the direction of arrival time change between the current global synchronization timestamp and the previous global synchronization timestamp.

[0188] The synchronization command encapsulation module generates position adjustment, electrical parameter adjustment, and signal delay adjustment based on the link segment error source sequence, and encapsulates them into a synchronization calibration command package with the same trigger timestamp. The synchronization calibration command package may include an identification field, an adjustment field, a timing field, and an interlock field; wherein, the identification field includes the corresponding probe number, the corresponding signal transmission link number, and the link segment error source sequence; the adjustment field includes the position adjustment, electrical parameter adjustment, and signal delay adjustment; the timing field includes the trigger timestamp, the execution sequence number, and the readback time window; and the interlock field includes an execution interlock identifier.

[0189] The probe execution module is used to adjust the position, electrical parameters, and signal delay of the corresponding probe according to the synchronous calibration instruction package. The probe execution module may include a three-axis displacement execution unit, a signal conditioning parameter adjustment unit, and a delay adjustment unit. The three-axis displacement execution unit performs X-axis, Y-axis, and Z-axis displacement adjustments; the signal conditioning parameter adjustment unit performs gain, DC offset, and sampling phase adjustments; and the delay adjustment unit performs signal delay adjustments. When the execution interlock flag is enabled, the displacement execution sub-instruction, electrical execution sub-instruction, and delay execution sub-instruction enter the execution state at the same trigger timestamp.

[0190] The readback update module reconstructs the differential characteristics of the verification link segment within the readback time window and compares these characteristics with those before the execution of the synchronization calibration command packet to obtain the calibration residuals and determine the residual link segments. When a residual link segment does not belong to the link segment error source sequence, the readback update module identifies it as a migration error link segment and writes it into the probe-level calibration sample. The readback update module also updates the link segment error source sequence based on the migration error link segments and uses the updated probe-level calibration sample as the calling sample for the next wafer-level probe test.

[0191] In actual operation, the numbering configuration module first configures the probe number and signal transmission link number; the global synchronization clock module provides a unified time reference; the link segment acquisition module and differential feature construction module form the link segment differential features; the mapping data construction module forms multi-source mapping data; the calibration sample management module generates probe-level calibration samples; the error source determination module determines the link segment error source sequence; the synchronization instruction encapsulation module generates a synchronization calibration instruction package; the probe execution module performs the corresponding displacement adjustment, electrical parameter adjustment, and signal delay adjustment; and the readback update module updates the probe-level calibration samples based on the readback results. Thus, this system can achieve full-path dynamic synchronous calibration during multi-probe testing of wide-bandgap semiconductor devices.

[0192] It should be noted that the embodiments of the present invention have better implementability and are not intended to limit the present invention in any way. Any person skilled in the art may use the above-disclosed technical content to change or modify it into equivalent effective embodiments. However, any modifications or equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention shall still fall within the scope of the technical solution of the present invention.

Claims

1. A dynamic synchronous calibration method for the entire path of wide-bandgap semiconductor multi-probe testing, characterized in that, include: In the wafer-level probe testing process of wide bandgap semiconductor devices, probe numbers are configured for the probes participating in the test, signal transmission link numbers are configured for the signal transmission paths corresponding to the probes, and a global synchronization timestamp is configured for the wafer-level probe test by a global synchronization clock. The probe tip, probe card interface, connecting cable, signal conditioning circuit, and data acquisition terminal are sequentially designated as acquisition nodes. The transmission paths between adjacent acquisition nodes are designated as link segments, and each link segment is assigned a link segment number. Specifically, the link segment between the probe tip and the probe card interface is defined as the tip contact link segment, the link segment between the probe card interface and the connecting cable is defined as the interface transmission link segment, the link segment between the connecting cable and the signal conditioning circuit is defined as the cable transmission link segment, and the link segment between the signal conditioning circuit and the data acquisition terminal is defined as the acquisition input link segment. Acquire the baseline calibration sample and historical calibration sample, and configure the preset direction response tolerance, preset arrival time tolerance, preset mapping tolerance and readback time window; A bidirectional calibration stimulus is applied to each link segment to obtain forward node response data and reverse node response data, forming a link segment differential feature that includes directional response differences and arrival time differences. The link segment differential feature is then bound to the probe number, the signal transmission link number, the link segment number, and the global synchronization timestamp. Temperature data, contact pressure data, mechanical vibration data, electromagnetic field data, and probe wear data are acquired and mapped to the corresponding probe number and signal transmission link number to form multi-source mapping data. The multi-source mapping data is combined with the link segment differential features under the same global synchronization timestamp to form a probe-level calibration sample. The probe-level calibration sample is compared with the reference calibration sample and the historical calibration sample. When the difference in directional response of the same link segment exceeds the preset directional response tolerance, the difference in arrival time exceeds the preset arrival time tolerance, and at least one data in the multi-source mapping data associated with the same link segment exceeds the corresponding preset mapping tolerance under the same global synchronization timestamp, a link segment error source sequence is generated. Based on the link segment error source sequence, position adjustment amount, electrical parameter adjustment amount, and signal delay adjustment amount are generated and encapsulated into a synchronous calibration instruction package with the same trigger timestamp; After executing the synchronous calibration instruction package, the differential features of the verification link segment are reconstructed within the readback time window. The differential features of the verification link segment are compared with the differential features of the link segment before executing the synchronous calibration instruction package to obtain the calibration residual, and the residual link segment corresponding to the calibration residual is determined. When the residual link segment does not belong to the link segment error source sequence, the residual link segment is used as the migration error link segment to update the probe-level calibration sample.

2. The method for dynamic synchronous calibration of the entire path of wide bandgap semiconductor multi-probe testing according to claim 1, characterized in that, Applying bidirectional calibration excitation to each link segment includes: According to the transmission sequence from the probe tip to the data acquisition end, the first calibration excitation is input to the preceding acquisition node of each link segment, and the response data of the preceding node is acquired at the following acquisition node. According to the transmission sequence from the data acquisition end to the probe tip, the second calibration excitation is input to the next acquisition node, and the response data of the reverse node is acquired at the previous acquisition node; The first calibration stimulus is configured in the first synchronous acquisition window, the second calibration stimulus is configured in the second synchronous acquisition window, and the first synchronous acquisition window and the second synchronous acquisition window are written into the link segment differential feature.

3. The method for dynamic synchronous calibration of the entire path of wide bandgap semiconductor multi-probe testing according to claim 2, characterized in that, The formation of the link segment differential features includes: The forward amplitude, forward arrival time, forward DC offset, and forward phase are determined based on the forward node response data; the reverse amplitude, reverse arrival time, reverse DC offset, and reverse phase are determined based on the reverse node response data. The amplitude attenuation difference is formed by the forward amplitude and the reverse amplitude, the DC offset difference is formed by the forward DC offset and the reverse DC offset, the phase difference is formed by the forward phase and the reverse phase, and the directional response difference is constituted by the amplitude attenuation difference, the DC offset difference and the phase difference. The arrival time difference is formed by the forward arrival time and the reverse arrival time; The directional response difference and the arrival time difference are arranged according to the link segment number to form the link segment differential feature.

4. The method for dynamic synchronous calibration of the entire path of wide bandgap semiconductor multi-probe testing according to claim 1, characterized in that, The formation of the multi-source mapping data includes: The temperature data is mapped to the corresponding probe and its adjacent probes based on the probe card coordinates. The contact pressure data is mapped to the corresponding probe based on the probe root number; The mechanical vibration data is mapped to the probe card area where the corresponding probe is located based on the probe station coordinates. The electromagnetic field data is mapped to the corresponding signal transmission link number according to the routing path of the connecting cable. Map the probe wear data to the corresponding probe based on the probe number; The mapped temperature data, contact pressure data, mechanical vibration data, electromagnetic field data, and probe wear data are identified as the multi-source mapped data, and the multi-source mapped data, together with the link segment differential features under the same global synchronization timestamp, are written into the probe-level calibration sample.

5. The method for dynamic synchronous calibration of the entire path of wide bandgap semiconductor multi-probe testing according to claim 4, characterized in that, The benchmark calibration sample includes benchmark link segment differential features and benchmark multi-source mapping data obtained during standard calibration piece testing; The reference multi-source mapping data includes reference temperature mapping data, reference contact pressure mapping data, reference mechanical vibration mapping data, reference electromagnetic field mapping data, and reference probe wear mapping data; The historical calibration samples include the historical link segment error source sequence generated in historical wafer-level probe tests for the same probe number, historical synchronization calibration instruction packets, historical calibration residuals, and historical global synchronization timestamps. The probe-level calibration sample calls the corresponding benchmark calibration sample and historical calibration sample according to the probe number, signal transmission link number, link segment number and global synchronization timestamp.

6. The method for dynamic synchronous calibration of the entire path of wide bandgap semiconductor multi-probe testing according to claim 5, characterized in that, Generating the link segment error source sequence includes: The preset benchmark tolerance is configured according to the benchmark calibration sample and the link segment differential characteristics, and the preset mapping tolerance is configured according to the benchmark multi-source mapping data and the multi-source mapping data. The link segment differential features in the probe-level calibration sample are compared with the reference link segment differential features, and the link segments that exceed the corresponding preset reference tolerance are identified as candidate error link segments. The multi-source mapping data corresponding to the candidate error link segment is compared with the benchmark multi-source mapping data, and the link segment that exceeds the corresponding preset mapping tolerance is determined as the candidate disturbance link segment. Link segments that simultaneously belong to both the candidate error link segments and the candidate disturbance link segments are identified as the source of link segment error. When there is one link segment error source, the link segment error source is used as the link segment error source sequence; when there are at least two link segment error sources, the at least two link segment error sources are arranged according to the transmission order from the probe tip to the data acquisition end to form the link segment error source sequence.

7. The method for dynamic synchronous calibration of the entire path of wide bandgap semiconductor multi-probe testing according to claim 6, characterized in that, Determining the source of the link segment error also includes: The global synchronization timestamp corresponding to the current probe-level calibration sample is determined as the current global synchronization timestamp, and the historical global synchronization timestamp in the historical calibration sample that is adjacent to the current global synchronization timestamp and earlier in time is determined as the previous global synchronization timestamp. When both the first link segment and the second link segment are identified as candidate error link segments, and the transmission order of the first link segment from the probe tip to the data acquisition end is before that of the second link segment, the forward node response data of the first link segment is used as the input reference data of the second link segment. When the direction of the arrival time difference between the second link segment and the previous global synchronization time stamp is consistent with the direction of the arrival time difference between the input reference data and the previous global synchronization time stamp, the first link segment is written into the link segment error source sequence, and the second link segment is written into the transmission link segment list. When the direction of the arrival time difference between the second link segment and the previous global synchronization timestamp is inconsistent with the direction of the arrival time difference between the input reference data and the previous global synchronization timestamp, the first link segment and the second link segment are respectively written into the link segment error source sequence.

8. The method for dynamic synchronous calibration of the entire path of wide bandgap semiconductor multi-probe testing according to claim 6, characterized in that, The position adjustment, electrical parameter adjustment, and signal delay adjustment are generated based on the link segment error source sequence, including: When the link segment error source sequence includes the needle tip contact link segment, a Z-axis displacement adjustment is generated based on the contact pressure data and probe wear data corresponding to the needle tip contact link segment. When the link segment error source sequence includes the interface transmission link segment, the X-axis displacement adjustment, Y-axis displacement adjustment and Z-axis displacement adjustment are generated based on the temperature data and mechanical vibration data corresponding to the interface transmission link segment. When the link segment error source sequence includes the cable transmission link segment, a signal delay adjustment amount is generated based on the arrival time difference and electromagnetic field data corresponding to the cable transmission link segment. When the link segment error source sequence includes the acquisition input link segment, gain adjustment, DC offset adjustment and sampling phase adjustment are generated based on the amplitude attenuation difference, DC offset difference and phase difference corresponding to the acquisition input link segment; The position adjustment amount includes the X-axis displacement adjustment amount, the Y-axis displacement adjustment amount, and the Z-axis displacement adjustment amount; the electrical parameter adjustment amount includes the gain adjustment amount, the DC offset adjustment amount, and the sampling phase adjustment amount; for adjustment amounts not triggered by the link segment error source sequence, the corresponding adjustment amount is set as the reference hold amount.

9. The method for dynamic synchronous calibration of the entire path of wide bandgap semiconductor multi-probe testing according to claim 8, characterized in that, Encapsulating the synchronous calibration instruction package includes: The position adjustment amount, electrical parameter adjustment amount, and signal delay adjustment amount corresponding to the link segment error source sequence are written into the same instruction packet body, wherein the adjustment amount not triggered by the link segment error source sequence is written into the instruction packet body with the reference holding amount; The corresponding probe number, the corresponding signal transmission link number, the link segment error source sequence, the trigger timestamp, the execution sequence number, the readback time window, and the execution interlock identifier are written into the main body of the instruction packet to form the synchronous calibration instruction packet. Multiple synchronous calibration instruction packets with the same trigger timestamp are sorted by probe number and written into the synchronous transmission queue.

10. A dynamic synchronous calibration system for the entire testing path of a wide-bandgap semiconductor multi-probe, characterized in that, include: The numbering configuration module is used to configure probe numbers for probes participating in the test and to configure signal transmission link numbers for the signal transmission paths corresponding to the probes. The global synchronization clock module is used to configure global synchronization timestamps and trigger timestamps for wafer-level probe testing; The link segment acquisition module is used to sequentially configure the probe tip, probe card interface, connecting cable, signal conditioning circuit, and data acquisition terminal as acquisition nodes, configure the transmission path between adjacent acquisition nodes as link segments, define the link segment between the probe tip and the probe card interface as the tip contact link segment, define the link segment between the probe card interface and the connecting cable as the interface transmission link segment, define the link segment between the connecting cable and the signal conditioning circuit as the cable transmission link segment, and define the link segment between the signal conditioning circuit and the data acquisition terminal as the acquisition input link segment. It applies bidirectional calibration excitation to each link segment and acquires forward node response data and reverse node response data. The differential feature construction module is used to form link segment differential features based on the forward node response data and the reverse node response data, and bind the link segment differential features with probe number, signal transmission link number, link segment number and global synchronization timestamp; The mapping data construction module is used to acquire temperature data, contact pressure data, mechanical vibration data, electromagnetic field data and probe wear data, and map them to the corresponding probe number and signal transmission link number to form multi-source mapping data; The calibration sample management module is used to acquire benchmark calibration samples and historical calibration samples, form probe-level calibration samples based on the link segment differential characteristics and the multi-source mapping data, and call up the benchmark calibration samples and the historical calibration samples. The tolerance configuration module is used to configure the preset directional response tolerance, preset arrival time tolerance, preset mapping tolerance, and readback time window. The error source determination module is used to generate a link segment error source sequence when the directional response difference in the same link segment exceeds the preset directional response tolerance, the arrival time difference exceeds the preset arrival time tolerance, and at least one data in the multi-source mapping data associated with the link segment exceeds the corresponding preset mapping tolerance under the same global synchronization timestamp. The synchronization instruction encapsulation module is used to generate position adjustment, electrical parameter adjustment and signal delay adjustment based on the link segment error source sequence, and encapsulate them into a synchronization calibration instruction package with the same trigger timestamp; The probe execution module is used to adjust the position, electrical parameters, and signal delay of the corresponding probe according to the synchronous calibration instruction package; The readback update module is used to reconstruct the differential features of the verification link segment within the readback time window, compare the differential features of the verification link segment with the differential features of the link segment before executing the synchronous calibration instruction packet to obtain the calibration residual, and determine the residual link segment corresponding to the calibration residual; when the residual link segment does not belong to the link segment error source sequence, the residual link segment is used as the migration error link segment to update the probe-level calibration sample.

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