A low-power bandgap reference start-up circuit based on output voltage feedback

Abstract

The application discloses a low-power band-gap reference starting circuit based on output voltage feedback, comprising: a reference voltage generation module which generates a preset threshold value according to a reference voltage; a delay control module which generates a delay control signal slowly rising with time when starting power; a first low-pass filter unit which outputs a first filter signal; and a second low-pass filter unit which outputs a reference voltage without overshoot; thus, two reference voltages with fixed voltage difference and containing power-on overshoot are synchronously generated by a buffer unit, and a slowly rising delay control signal S2 is generated by charging a capacitor with a diode; the first filter signal which is reduced in part overshoot and staggered in time is obtained by filtering and delaying S1; and the reference voltage output by the circuit slowly rises from the stable voltage after the overshoot ends, so that the power-on overshoot is completely eliminated, and the reference voltage output is completely without overshoot.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit design technology, and in particular to a low-power bandgap reference startup circuit based on output voltage feedback. Background Technology

[0002] Bandgap reference circuits are crucial modules in power management integrated circuits, widely used in LDOs, DC-DC converters, RF circuits, and high-precision A / D and D / A converters. Their basic function is to provide a reference voltage that is virtually independent of the chip's input voltage and temperature for use by other modules. A bandgap reference circuit mainly consists of a startup circuit, a core circuit, and an operational amplifier circuit. Because traditional bandgap reference circuit modules exhibit overshoot during power-on, which can interfere with other modules, soft-start technology to eliminate overshoot has emerged. Soft-start effectively prevents permanent damage caused by overshoot.

[0003] Soft-start technology allows the output voltage to rise slowly or at a certain slope, thereby mitigating or eliminating the effects of overshoot and enabling the circuit to start up quickly and stably. It also automatically shuts down when the voltage is close to the reference value. Currently, a common soft-start method involves the circuit starting to operate when the chip powers on. A current source biased by a current mirror charges a capacitor in the reference module circuit, activating the reference circuit. When the reference voltage reaches a certain threshold, a detection signal shuts down the soft-start circuit, thus having no further impact on the reference circuit. While common soft-start methods can suppress overshoot, they cannot completely eliminate it.

[0004] To overcome the aforementioned problems, patent CN 117639472 A discloses a reference soft-start circuit and method independent of power supply startup speed. To reduce output voltage noise and improve power supply rejection characteristics, a low-pass RC filter needs to be added to the output of the buffer. While this patent achieves reference soft-start regardless of power supply startup speed using an acceleration circuit with a simple circuit structure, the output voltage build-up slope is not low enough in the initial soft-start phase, resulting in a large startup inrush current that can damage subsequent circuitry.

[0005] In summary, existing soft-start technologies for eliminating power-on overshoot require further improvement. Summary of the Invention

[0006] The purpose of this invention is to overcome the shortcomings of the prior art and provide a low-power bandgap reference start-up circuit based on output voltage feedback to achieve a smooth rise in output voltage.

[0007] The objective of this invention is achieved through the following technical solution:

[0008] This application discloses a low-power bandgap reference startup circuit based on output voltage feedback, comprising: a reference voltage generation module, which synchronously generates a first reference voltage and a second reference voltage according to a reference voltage, wherein the voltage value of the first reference voltage is higher than the voltage value of the second reference voltage, and the voltage difference between the first reference voltage and the second reference voltage is greater than a preset threshold; a delay control module, which generates a delay control signal that slowly increases over time during power-on startup; and a first low-pass filter unit, which includes a first switch and a second capacitor, wherein the control terminal of the first switch receives the delay control signal, the input terminal of the first switch receives the first reference voltage, and the first switch is configured to switch from a turn-off state to a turn-on state when the delay control signal reaches a first turn-on threshold of the first switch. In the on-state, the first switch acts as a filter resistor, working together with the second capacitor to implement a low-pass filter function, so as to output a first filter signal at the output terminal of the first switch; the second low-pass filter unit includes a second switch and a third capacitor, the control terminal of the second switch receives the first filter signal, and the input terminal of the second switch receives the second reference voltage, with the preset threshold as the second conduction threshold of the second switch; the second switch is configured to switch from the off state to the on state when the voltage difference between the first filter signal and the second reference voltage reaches the second conduction threshold of the second switch, and the on-state second switch acts as a filter resistor, working together with the third capacitor to implement a low-pass filter function, so as to output a reference voltage without overshoot at the output terminal of the second switch.

[0009] Furthermore, the voltage values ​​of the delay control signal, the first reference voltage, and the second reference voltage are configured such that, during the entire power-on startup process, the voltage difference between the first filter signal and the second reference voltage only reaches the second conduction threshold of the second switch after the power-on overshoot phase ends, so that the second switch turns on after the overshoot and outputs a reference voltage without overshoot.

[0010] Furthermore, the reference voltage generation module includes: an operational amplifier, a PMOS transistor MP1, a first resistor, a second resistor, and a third resistor; the inverting input terminal of the operational amplifier receives the reference voltage, and the output terminal of the operational amplifier is connected to the gate of the PMOS transistor MP1; the source of the PMOS transistor MP1 is connected to a power supply, and the drain of the PMOS transistor MP1 is connected to ground via the first resistor, the second resistor, and the third resistor in series; one end of the interconnection between the second resistor and the third resistor is connected to the non-inverting input terminal of the operational amplifier to provide a feedback voltage; the one end of the interconnection between the drain of the PMOS transistor and the first resistor outputs the first reference voltage, and the one end of the interconnection between the first resistor and the second resistor outputs the second reference voltage.

[0011] Furthermore, the voltage difference between the first reference voltage and the second reference voltage is determined by the resistance value of the second resistor, and the voltage difference is set to be slightly higher than the second turn-on threshold voltage of the second switch.

[0012] Furthermore, the delay control module includes: a diode composed of at least one MOSFET, a switching transistor connected in series with the diode, and at least one charging capacitor; the anode of the diode is connected to a power supply, the cathode of the diode is connected to one end of the charging capacitor through the switching transistor, and the other end of the charging capacitor is grounded; the switching transistor is turned on under the control of an enable signal, and the power supply charges the charging capacitor through the diode, thereby generating the delay control signal at the end where the charging capacitor and the switching transistor are connected.

[0013] Furthermore, the diode is a PMOS transistor with its gate and drain shorted, and multiple PMOS transistors can be connected in series to adjust the charging current.

[0014] Furthermore, the charging capacitor includes a capacitor element and an NMOS transistor MN2. The source and drain of the NMOS transistor MN2 are both grounded to serve as a capacitor, and the gate of the NMOS transistor MN2 is connected to one end of the charging capacitor to increase the capacitance value.

[0015] Furthermore, the delay control module also includes a discharge switch transistor connected in parallel with the charging capacitor. The gate of the discharge switch transistor is controlled by a signal that is inversely phase with the enable signal, and is used to discharge the charging capacitor when it is not enabled.

[0016] Furthermore, both the first and second switching transistors are NMOS transistors; the gate of the first switching transistor is its control terminal, its source is its input terminal, its drain is its output terminal, and its drain is connected to one end of the second capacitor; the gate of the second switching transistor is its control terminal, its source is its input terminal, its drain is its output terminal, and its drain is connected to one end of the third capacitor; the other ends of both the second and third capacitors are grounded.

[0017] Furthermore, in the power-on mode, the delay control module automatically charges as the power supply voltage rises, generating the delay control signal; or in the enable signal power-on mode, after the power supply stabilizes, an external enable signal triggers the delay control module to start charging, generating the delay control signal.

[0018] The beneficial effects of this invention are:

[0019] Two reference voltages, S1 and S3, with a fixed voltage difference and both containing power-on overshoot, are synchronously generated by a buffer unit. A slowly rising delayed control signal S2 is generated by charging a capacitor using a diode. S2 first controls the switch in the first low-pass filter unit to turn on after a certain delay and act as a resistor, filtering and delaying S1 to obtain a first filtered signal S4 that reduces some of the overshoot and is time-staggered. By setting the voltage difference between S1 and S3 to be slightly higher than the threshold voltage of the switch in the second low-pass filter unit, and utilizing the delay and overshoot attenuation characteristics of S4 relative to S1, the voltage difference between S4 and S3 is always lower than the second conduction threshold of the second switch during the entire power-on overshoot phase, and the second low-pass filter unit remains off. Only when the power-on overshoot is completely over does the voltage difference between S4 and S3 reach the threshold, and the second switch turns on and acts as a resistor, forming a low-pass filter with the capacitor to smooth S3. At this point, the reference voltage output by the circuit slowly rises from the stable voltage after the overshoot ends, thus completely eliminating power-on overshoot and outputting a reference voltage with no overshoot. Attached Figure Description

[0020] Figure 1 A simplified schematic diagram of a low-power bandgap reference startup circuit based on output voltage feedback according to some embodiments of this application;

[0021] Figure 2 The circuit diagram is an exemplary low-power bandgap reference startup circuit based on output voltage feedback according to this application;

[0022] Figure 3This is a schematic diagram of power-on overshoot according to some embodiments of this application;

[0023] Figure 4 For the corresponding Figure 2 A schematic diagram illustrating the power-on state of an exemplary low-power bandgap reference startup circuit based on output voltage feedback;

[0024] Figure 5 This is a schematic diagram illustrating the enable power-on overshoot according to some embodiments of this application;

[0025] Figure 6 For the corresponding Figure 2 The diagram illustrates the enable / power-on state of an exemplary low-power bandgap reference startup circuit based on output voltage feedback. Detailed Implementation

[0026] The technical solution of the present invention will be clearly and completely described below with reference to the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0027] This application provides a low-power bandgap reference startup circuit based on output voltage feedback, including a reference voltage generation module, a delay control module, a first low-pass filter unit, and a second low-pass filter unit.

[0028] like Figure 1 The reference voltage generation module receives a reference voltage VREF at its input terminal, outputs a first reference voltage S1 at its first output terminal, and outputs a second reference voltage S3 at its second output terminal. The reference voltage generation module synchronously generates the first reference voltage S1 and the second reference voltage S3 based on the reference voltage. The voltage value of the first reference voltage S1 is higher than the voltage value of the second reference voltage S3, and the voltage difference between the first reference voltage S1 and the second reference voltage S3 is greater than a preset threshold, which is the second turn-on threshold voltage of the second switch in the second low-pass filter unit. The delay control module's enable port receives an enable signal EN, and its output terminal outputs a delay control signal S2. This delay control signal S2 rises slowly over time during power-on. The enable signal EN is also connected to the second input port of the first low-pass filter unit and the first input port of the second low-pass filter unit, respectively, to cooperate with the delay control module to put these two filter units into a closed state when the enable signal is invalid.

[0029] Specifically, the first low-pass filter unit includes a first switch and a second capacitor C2. Its first input terminal is connected to the first output terminal of the reference voltage generation module to receive the first reference voltage S1. Its second input terminal is connected to the enable port, and its third input terminal is connected to the output terminal of the delay control module to receive the delay control signal S2. Its output terminal outputs the first filter signal S4. The control terminal of the first switch receives the delay control signal S2, and the input terminal of the first switch receives the first reference voltage S1. The first switch is configured to switch from the off state to the on state when the delay control signal S2 reaches the first conduction threshold of the first switch. After conduction, the first switch acts as a filter resistor, together with the second capacitor C2, to realize the low-pass filtering function, so as to output the first filter signal S4 at the output terminal of the first switch. The second low-pass filter unit includes a second switch and a third capacitor C3. Its first input terminal is connected to the enable port, its second input terminal is connected to the second output terminal of the reference voltage generation module to receive the second reference voltage S3, and its third input terminal is connected to the output terminal of the first low-pass filter unit to receive the first filter signal S4. Its output terminal outputs a reference voltage VREF_Out without overshoot. The control terminal of the second switch receives the first filter signal S4, and the input terminal of the second switch receives the second reference voltage S3. The second conduction threshold of the second switch is set to the aforementioned preset threshold. The second switch is configured to switch from the off state to the on state when the voltage difference between the first filter signal S4 and the second reference voltage S3 reaches the second conduction threshold of the second switch. After conduction, the second switch acts as a filter resistor, working together with the third capacitor C3 to achieve the low-pass filtering function, so as to output a reference voltage without overshoot at the output terminal of the second switch.

[0030] Furthermore, the voltage values ​​of the aforementioned delay control signal S2, the first reference voltage S1, and the second reference voltage S3 are configured such that, during the entire power-on startup process, the voltage difference between the first filter signal S4 and the second reference voltage S3 only reaches the second conduction threshold of the second switch after the power-on overshoot phase ends, so that the second switch turns on after the overshoot and outputs a reference voltage without overshoot.

[0031] Understandably, two reference voltages, S1 and S3, with a fixed voltage difference and both containing power-on overshoot, are synchronously generated by a buffer unit. A diode charges a capacitor to generate a slowly rising, delayed control signal S2. S2 first controls the switch in the first low-pass filter unit to turn on after a certain delay and act as a resistor, filtering and delaying S1 to obtain a first filtered signal S4 that reduces some of the overshoot and is time-staggered. By setting the voltage difference between S1 and S3 slightly higher than the threshold voltage of the switch in the second low-pass filter unit, and utilizing the delay and overshoot attenuation characteristics of S4 relative to S1, the voltage difference between S4 and S3 is always lower than the second conduction threshold of the second switch during the entire power-on overshoot phase, and the second low-pass filter unit remains off. Only when the power-on overshoot is completely over does the voltage difference between S4 and S3 reach the threshold, the second switch turns on and acts as a resistor, forming a low-pass filter with the capacitor to smooth S3. At this point, the reference voltage output by the circuit slowly rises from the stable voltage after the overshoot ends, thus completely eliminating power-on overshoot and outputting a reference voltage with no overshoot.

[0032] It is worth noting that the aforementioned first and second switching transistors can be NMOS transistors, which will be discussed later. Figure 2 The specific examples shown will illustrate this.

[0033] In this embodiment, the reference voltage generation module synchronously generates two reference voltage signals. Figure 2 Specifically, it includes an operational amplifier, a PMOS transistor MP1, a first resistor R1, a second resistor R2, and a third resistor R3. The inverting input of the operational amplifier serves as the input of the reference voltage generation module and is connected to the reference voltage VREF. The output of the operational amplifier is connected to the gate of the PMOS transistor MP1. The source of the PMOS transistor MP1 is connected to the power supply, and the drain of the PMOS transistor MP1 is connected to one end of the first resistor R1. The second resistor R2 is connected to the other end of the first resistor R1 and one end of the third resistor R3, and the other end of the third resistor R3 is grounded. The interconnected end of the second resistor R2 and the third resistor R3 is connected to the non-inverting input of the operational amplifier, providing a feedback voltage Vfb. The interconnected end of the drain of the PMOS transistor MP1 and the first resistor R1 serves as the first output of the reference voltage generation module, outputting the first reference voltage S1; the interconnected end of the first resistor R1 and the second resistor R2 serves as the second output of the reference voltage generation module, outputting the second reference voltage S3. By setting the value of the feedback resistor, the voltage difference between the first reference voltage S1 and the second reference voltage S3 is determined by the value of the second resistor R2, and this voltage difference is set to be slightly higher than the second turn-on threshold voltage of the second switch in the second low-pass filter unit.

[0034] The delay control module includes a diode consisting of at least one MOSFET, a switching transistor connected in series with the diode, and at least one charging capacitor. The diode is a PMOS transistor with its gate and drain shorted, and multiple PMOS transistors can be connected in series; for example, the diode is a PMOS transistor with its gate and drain shorted, and multiple diodes can be connected in series to adjust the charging current; Figure 2 Two diodes, PMOS transistors MP2 and MP3, are connected in series. The gate and drain of diode MP3 are connected to the source of diode MP2. The gate and drain of diode MP2 are connected to the power supply, meaning the anode of the diode is connected to the power supply, and the cathode of the diode is connected to the switching transistor. The switching transistor is PMOS transistor MP4, whose source is connected to the source (cathode) of diode MP3, its gate is connected to the enable signal ENb, and its drain serves as the output of the delay control signal S2. The charging capacitor includes capacitor C1 and an NMOS transistor MN2 used as a capacitor. The gate of NMOS transistor MN2 is connected to the drain of MP4 and one end of capacitor C1. The source and drain of NMOS transistor MN2 are both grounded, thus acting as a capacitor in parallel with capacitor C1 to increase the capacitance value and save layout area.

[0035] In some embodiments, the delay control module further includes a discharge switch transistor, specifically... Figure 2 In the first PMOS transistor, MN1 has its drain connected to the drain of MP4 and one end of capacitor C1, its gate connected to the enable signal ENn, and its source grounded. The gate of MP4 is connected to the enable signal ENb. ENb and ENn are inverted voltage signals that work together to enable control. When ENn is high and ENb is low, MN1 conducts, discharging the capacitor and turning off MP4. When power is applied, ENb is low, MP4 conducts, ENn is low, and MN1 is off. The power supply charges capacitors C1 and MN2 through diodes. Because the charging current is very small, the voltage across the capacitors, i.e., the delay control signal S2, rises slowly from zero, providing a delay. It is necessary to ensure that the difference between the delay control signal S2 and the first reference voltage S1 is greater than the turn-on threshold voltage of the first switch in the first low-pass filter unit so that the first low-pass filter unit can be turned on smoothly.

[0036] Figure 2In the first low-pass filter unit, the first switching transistor is an NMOS transistor MN3. Its gate serves as the control terminal of the first switching transistor, connected to the delay control signal S2; its source serves as the input terminal of the first switching transistor, connected to the first reference voltage S1; and its drain serves as the output terminal of the first switching transistor, outputting the first filtered signal S4. One end of the second capacitor C2 is connected to the drain of MN3, and the other end is grounded. When the delay control signal S2 has not reached the first turn-on threshold voltage of MN3, MN3 is in the off state. At this time, the first switching transistor acts as a switch and is open, and the first low-pass filter unit does not work. When the delay control signal S2 rises to the first turn-on threshold voltage of MN3, MN3 begins to conduct and is in the subthreshold region. After conduction, MN3 acts as a filter resistor, forming a low-pass filter circuit with the second capacitor C2 to filter the first reference voltage S1 and output the first filtered signal S4. This first filtered signal S4, relative to the first reference voltage S1, has undergone the time delay caused by the delay control signal S2 and has also reduced some of the power-on overshoot through filtering.

[0037] In the second low-pass filter unit, the second switch is an NMOS transistor MN4. Its gate serves as the control terminal of the second switch and is connected to the first filter signal S4; its source serves as the input terminal of the second switch and is connected to the second reference voltage S3; its drain serves as the output terminal of the second switch, outputting a reference voltage VREF_Out without overshoot. One end of the third capacitor C3 is connected to the drain of MN4, and the other end is grounded. When the voltage difference between the first filter signal S4 and the second reference voltage S3 does not reach the second turn-on threshold voltage of MN4, MN4 is in the off state, and the second low-pass filter unit does not work. Its second turn-on threshold voltage is set to the aforementioned preset threshold, and the difference between the first reference voltage S1 and the second reference voltage S3 is configured to be higher than this threshold.

[0038] Therefore, in this embodiment, during power-on, the first reference voltage S1 and the second reference voltage S3 rise synchronously, and the difference between them is... The voltage gradually rises and eventually stabilizes, a phase that includes an overshoot process. The first filtered signal S4 is the first reference voltage after delay and partial overshoot elimination. Therefore, during the voltage rise and overshoot period, the difference between the first filtered signal S4 and the second reference voltage S3... Always less than until the output stabilizes Only equals This configuration ensures that the power-on overshoot phase ends when the difference between the first filtered signal S4 and the second reference voltage S3 reaches the second turn-on threshold voltage of MN4. At this point, MN4 begins to conduct and is in the subthreshold region. The second switch acts as a filter resistor, forming a low-pass filter circuit with the third capacitor C3 to filter the second reference voltage S3. A slowly rising reference voltage VREF_Out with no overshoot is output from the drain of the second switch. This circuit, through two stages of filtering and delay, finally outputs a voltage signal with no overshoot, effectively eliminating power-on overshoot. It has a simple structure and saves layout area.

[0039] In detail, the low-power bandgap reference startup circuit based on output voltage feedback has two startup modes: power-on mode and enable signal power-on mode.

[0040] In power-on mode, when the power supply is turned on, the first switching transistor MN3 and the second switching transistor MN4 in the first and second low-pass filter units are both off. Only the reference voltage generation module and the delay control module are working. The power supply voltage begins to charge capacitor C1 through a small current from the diode. When the charging voltage reaches the threshold voltage of NMOS transistor MN2, MN2 begins to act as a capacitor. At this time, the charging speed is slower than when MN2 is not turned on, and the delay control signal S2 rises slowly. At this time, the first low-pass filter unit is not yet turned on. When the voltage difference between the gate and source of MN3 reaches the turn-on threshold of the NMOS transistor, MN3 begins to slowly conduct and enters the subthreshold region. At this time, the first switching transistor acts as a resistor and forms a low-pass filter circuit with the second capacitor C2. The first low-pass filter unit starts to work, and the first filter signal S4 begins to rise slowly following the first reference voltage S1. At this time, the second switch MN4 in the second low-pass filter unit is still in the off state. When the voltage difference between the gate and source of MN4 reaches its threshold voltage, MN4 will start to conduct and be in the subthreshold region. At this time, the second switch acts as a resistor and forms a low-pass filter circuit with the third capacitor C3. The output voltage of the second low-pass filter unit rises slowly to form a reference voltage VREF_Out without overshoot.

[0041] For example, refer to Figure 3 and Figure 4 As shown, in the power-on sequence, there is a significant overshoot between the first reference voltage S1 and the second reference voltage S3 at the moment of power-on. Figure 3 As shown, the reference voltages S1 and S3 are as follows: Figure 3 The red and green lines show obvious overshoot, but after passing through this circuit, the final overshoot-free reference voltage VREF_Out rises slowly as the power supply voltage increases, such as... Figure 4 The gray-yellow line shown completely eliminates overshoot.

[0042] In the enable signal power-on mode, the power supply voltage is already stable. When power is enabled, if the enable signal EN is at ground level, the delay control module, the first low-pass filter unit, and the second low-pass filter unit are all in the off state. The small current flowing through the power supply via the diode is disconnected by the switching transistor, and both ends of the charging capacitor are pulled to ground potential. When the enable signal EN turns high, the normal connection from the diode to the charging capacitor is established, and charging of the capacitor begins. At the same time, the reference voltage generation module also starts.

[0043] When the charging voltage reaches the threshold voltage of NMOS transistor MN2, MN2 begins to act as a capacitor. At this time, the charging speed is slower than when MN2 is not turned on. At this time, the delay control signal S2 is slowly rising, and the first low-pass filter circuit has not yet been turned on.

[0044] When the voltage difference between the source and gate of transistor MN3 reaches the turn-on threshold of the NMOS transistor, MN3 slowly begins to conduct. Since MN3 is in the subthreshold region at this time, the first low-pass filter circuit starts up. At this point, NMOS transistor MN3 begins to act as a resistor, and the first low-pass filter circuit begins to work. The first filter signal S4 at the output port of the first low-pass filter circuit begins to rise slowly, following the first reference voltage S1 at the first output port of the reference voltage generation module. Meanwhile, the second low-pass filter circuit unit is still off. When the voltage difference between the gate and source of transistor MN4 reaches the threshold voltage, MN4 begins to conduct and is in the subthreshold region. At this time, MN4 acts as a resistor, forming a low-pass filter circuit unit together with the third capacitor C3. The output voltage of the second-stage low-pass filter circuit unit rises slowly, forming an overshoot-free reference voltage VREF_Out.

[0045] refer to Figure 5 and Figure 6 When EN is first enabled and powered on, the generated reference voltages S1 and S3 show a significant overshoot, such as Figure 5 As shown, the generated reference voltages S1 and S3, i.e., the red and green lines, have obvious overshoot. However, in this embodiment, the final output VREF_Out voltage after grounding has no overshoot and the overshoot has been completely eliminated. Figure 6 The gray-yellow lines shown.

[0046] The above description is merely a preferred embodiment of the present invention. It should be understood that the present invention is not limited to the forms disclosed herein and should not be construed as excluding other embodiments. It can be used in various other combinations, modifications, and environments, and can be altered within the scope of the concept described herein through the above teachings or related technologies or knowledge. Modifications and variations made by those skilled in the art that do not depart from the spirit and scope of the present invention should be within the protection scope of the appended claims.

Claims

1. A low-power bandgap reference startup circuit based on output voltage feedback, characterized in that, include: A reference voltage generation module synchronously generates a first reference voltage and a second reference voltage based on a reference voltage. The voltage value of the first reference voltage is higher than that of the second reference voltage, and the voltage difference between the first reference voltage and the second reference voltage is greater than a preset threshold. A delay control module that generates a delay control signal that rises slowly over time when the device is powered on. The first low-pass filter unit includes a first switch and a second capacitor. The control terminal of the first switch receives the delay control signal, and the input terminal of the first switch receives the first reference voltage. When the delay control signal reaches the first conduction threshold of the first switch, the first switch changes from the off state to the on state. The first switch after conduction acts as a filter resistor and together with the second capacitor, it realizes the low-pass filtering function so as to output a first filter signal at the output terminal of the first switch. The second low-pass filter unit includes a second switch and a third capacitor. The control terminal of the second switch receives the first filter signal, and the input terminal of the second switch receives the second reference voltage. Furthermore, the preset threshold is used as the second turn-on threshold for the second switch, and the voltage difference between the first reference voltage and the second reference voltage is set to be slightly higher than the second turn-on threshold of the second switch. By utilizing the delay and overshoot attenuation characteristics of the first filtered signal relative to the first reference voltage, the voltage difference between the first filtered signal and the second reference voltage is always lower than the second conduction threshold of the second switch during the entire power-on overshoot phase. The second low-pass filter unit remains off, and the voltage difference between the first filtered signal and the second reference voltage only reaches the second conduction threshold after the power-on overshoot has completely ended. When the voltage difference between the first filtered signal and the second reference voltage reaches the second turn-on threshold of the second switch, the second switch changes from the off state to the on state. The turned-on second switch acts as a filter resistor, and together with the third capacitor, it realizes the low-pass filtering function so as to output a reference voltage without overshoot at the output terminal of the second switch.

2. The low-power bandgap reference startup circuit based on output voltage feedback according to claim 1, characterized in that, The reference voltage generation module includes: an operational amplifier, a PMOS transistor MP1, a first resistor, a second resistor, and a third resistor; The inverting input terminal of the operational amplifier receives the reference voltage, and the output terminal of the operational amplifier is connected to the gate of the PMOS transistor MP1; the source of the PMOS transistor MP1 is connected to the power supply, and the drain of the PMOS transistor MP1 is connected to ground after being connected in series with the first resistor, the second resistor and the third resistor. One end of the second resistor and the third resistor is connected to the positive input terminal of the operational amplifier to provide a feedback voltage; the one end of the PMOS transistor drain connected to the first resistor outputs the first reference voltage, and the one end of the first resistor and the second resistor connected to each other outputs the second reference voltage.

3. The low-power bandgap reference startup circuit based on output voltage feedback according to claim 2, characterized in that, The voltage difference between the first reference voltage and the second reference voltage is determined by the resistance value of the second resistor.

4. The low-power bandgap reference startup circuit based on output voltage feedback according to claim 1, characterized in that, The delay control module includes: a diode composed of at least one MOSFET, a switching transistor connected in series with the diode, and at least one charging capacitor; The anode of the diode is connected to the power supply, and the cathode of the diode is connected to one end of the charging capacitor through the switching transistor. The other end of the charging capacitor is grounded. The switching transistor is turned on under the control of the enable signal, and the power supply charges the charging capacitor through the diode, thereby generating the delay control signal at the end of the charging capacitor connected to the switching transistor.

5. The low-power bandgap reference startup circuit based on output voltage feedback according to claim 4, characterized in that, The diode is a PMOS transistor with its gate and drain shorted, and multiple PMOS transistors can be connected in series to adjust the charging current.

6. The low-power bandgap reference startup circuit based on output voltage feedback according to claim 4, characterized in that, The charging capacitor includes a capacitor element and an NMOS transistor MN2. The source and drain of the NMOS transistor MN2 are both grounded to act as a capacitor. The gate of the NMOS transistor MN2 is connected to one end of the charging capacitor to increase the capacitance value.

7. The low-power bandgap reference startup circuit based on output voltage feedback according to claim 4, characterized in that, The delay control module further includes a discharge switch transistor connected in parallel with the charging capacitor. The gate of the discharge switch transistor is controlled by a signal that is inversely phase with the enable signal, and is used to discharge the charging capacitor when it is not enabled.

8. The low-power bandgap reference startup circuit based on output voltage feedback according to claim 1, characterized in that, Both the first and second switching transistors are NMOS transistors; The gate of the first switch is the control terminal of the first switch, the source of the first switch is the input terminal of the first switch, the drain of the first switch is the output terminal of the first switch, and the drain of the first switch is connected to one end of the second capacitor. The gate of the second switch is the control terminal of the second switch, the source of the second switch is the input terminal of the second switch, the drain of the second switch is the output terminal of the second switch, and the drain of the second switch is connected to one end of the third capacitor; the other ends of the second capacitor and the third capacitor are both grounded.

9. The low-power bandgap reference startup circuit based on output voltage feedback according to claim 1, characterized in that, In the power-on mode, the delay control module automatically charges as the power supply voltage rises, generating the delay control signal; Alternatively, in the power-on mode with the enable signal, after the power supply stabilizes, the delay control module is triggered by an external enable signal to start charging and generate the delay control signal.

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