A differential full color chip, full color chip, full color chip

Abstract

The application discloses a differential full-color chip, a full-color chip and a full-color external chip, wherein the three kinds of chips all comprise a pair of differential parallel data line networks and a pair of differential series data line networks; the pair of differential parallel data line networks and the pair of differential series data line networks can independently transmit key data information or GRB color gray information, and are hot backups of each other; the chip data line of the application adopts a differential transmission mode, so that high-speed transmission and long-distance transmission of data can be realized, and the anti-interference capability is improved.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit chips, and in particular to a differential full-color control chip, a control device chip, and a control external color chip. Background Technology

[0002] Existing keyboards commonly use integrated circuit chips. Several keys on the keyboard are connected to the MCU in series (such as cascading or daisy chain) (e.g., 2023112245865, an integrated circuit chip with a data cable, keys and mechanical keyboard), or in parallel (e.g., 2025103919285, an integrated circuit chip with an address code, keys and mechanical keyboard). However, regardless of the connection method used, information is ultimately transmitted via a single bus to connect to the MCU.

[0003] Single-bus transmission has the following disadvantages:

[0004] 1. The transmission rate is slow and high-speed transmission cannot be achieved. The root cause is that the single bus uses open-drain output + pull-up resistor, which will generate passive pull-up RC delay. Since keyboards usually have hundreds of keys, the accumulated error of capacitors will make the delay problem more prominent. Therefore, in high-speed mode, the total capacitance of the bus must not exceed 300pF, which is difficult for a single bus keyboard to meet.

[0005] 2. It has weak anti-interference ability. Summary of the Invention

[0006] The purpose of this invention is to overcome the shortcomings and deficiencies of the prior art and provide a differential full-color chip.

[0007] Another object of the present invention is to provide a differential controller chip.

[0008] Another object of the present invention is to provide a differential full-color chip.

[0009] The objective of this invention is achieved through the following technical solution:

[0010] A differential full-color control chip, comprising GRB LEDs, integrates a control signal interface circuit, a GRB color driving circuit, an address code memory, and a series-parallel differential communication circuit; it includes control signal interface pins, power supply pins, ground pins, parallel differential positive line pins, parallel differential negative line pins, series differential positive line input pins, series differential positive line output pins, series differential negative line input pins, and series differential negative line output pins; the power supply pin is used to supply power to the differential full-color control chip, and the ground pin is used for signal grounding and power grounding;

[0011] The control signal interface pins are connected to external control signal communication. The control signal interface circuit is responsible for processing external control signals and connecting them to the differential full-color chip serial-parallel differential communication circuit.

[0012] The series differential positive line input pins and series differential positive line output pins of n differential full-color chips are cascaded to form a differential series positive data line network DIN+(1)-DOUT+(n). The two ends of the differential series positive data line network DIN+(1) and DOUT+(n) are connected to the MCU respectively.

[0013] The series differential negative line input pins and series differential negative line output pins of n differential full-color chips are cascaded to form a differential series negative data line network DIN-(1)-DOUT-(n). The two ends of the differential series negative data line network DIN-(1) and DOUT-(n) are connected to the MCU respectively.

[0014] The differential serial positive data line network DIN+(1)-DOUT+(n) and the differential serial negative data line network DIN-(1)-DOUT-(n) constitute a pair of differential serial data line networks. The differential serial data line network can transmit key data information or GRB color grayscale information.

[0015] The power supply pins of n differential full-color chips are connected in parallel to share the power network VCC, the ground pins are connected in parallel to share the ground network GND, the differential positive lines are connected in parallel to form a differential parallel positive data line network DIO+, and the differential negative lines are connected in parallel to form a differential parallel negative data line network DIO-.

[0016] The differential parallel positive data line network DIO+ and the differential parallel negative data line network DIO- constitute a pair of differential parallel data line networks. The differential parallel data line network can transmit key data information or GRB color grayscale information.

[0017] The differential full-color chip has two differential communication networks consisting of a pair of differential serial data line networks and another pair of differential parallel data line networks, which serve as hot backups for each other.

[0018] The address code of the differential full-color chip is written using a pair of differential serial data lines. After the differential full-color chips are cascaded, they will naturally form natural sequence bits 1, 2, 3...n. The natural sequence bits are written into the corresponding differential full-color chip address code memory as the address code communication of the differential full-color chip.

[0019] Another objective of this invention is achieved through the following technical solution:

[0020] A differential quantizer chip integrates a control signal interface circuit, an address code memory, and a serial-parallel differential communication circuit; it includes control signal interface pins, a power supply pin, a ground pin, a parallel differential positive line pin, a parallel differential negative line pin, a series differential positive line input pin, a series differential positive line output pin, a series differential negative line input pin, and a series differential negative line output pin; the power supply pin is used to supply power to the differential quantizer chip, and the ground pin is used for signal grounding and power grounding;

[0021] The control signal interface pins are connected to external control signal communication. The control signal interface circuit is responsible for processing external control signals and connecting them to the differential controller chip's serial-parallel differential communication circuit.

[0022] The series differential positive input pins and series differential positive output pins of n differential controller chips are cascaded to form a differential series positive data line network DIN+(1)-DOUT+(n). The two ends of the differential series positive data line network DIN+(1) and DOUT+(n) are connected to the MCU respectively.

[0023] The series differential negative line input pins and series differential negative line output pins of n differential controller chips are cascaded to form a differential series negative data line network DIN-(1)-DOUT-(n). The two ends of the differential series negative data line network DIN-(1) and DOUT-(n) are connected to the MCU respectively.

[0024] The differential series positive data line network DIN+(1)-DOUT+(n) and the differential series negative data line network DIN-(1)-DOUT-(n) constitute a pair of differential series data line networks, which can transmit key data information;

[0025] The power supply pins of n differential controller chips are connected in parallel to share the power network VCC, the ground pins are connected in parallel to share the ground network GND, the differential positive lines are connected in parallel to form a differential parallel positive data line network DIO+, and the differential negative lines are connected in parallel to form a differential parallel negative data line network DIO-.

[0026] The differential parallel positive data line network DIO+ and the differential parallel negative data line network DIO- constitute a pair of differential parallel data line networks, which can transmit key data information;

[0027] The differential controller chip consists of a pair of differential serial data line networks and another pair of differential parallel data line networks, which constitute two pairs of differential communication networks and serve as hot backups for each other.

[0028] The address code of the differential controller chip is written using a pair of differential serial data lines. After the differential controller chips are cascaded, they will naturally form natural sequence bits 1, 2, 3...n. The natural sequence bits are written into the address code memory of the corresponding differential controller chip as the address code communication of the differential controller chip.

[0029] Another objective of this invention is achieved through the following technical solution:

[0030] A differential color-changing chip integrates a control signal interface circuit, a GRB color-changing driver circuit, an address code memory, and a serial-parallel differential communication circuit. It includes a control signal interface pin, a power supply pin, a ground pin, a parallel differential positive line pin, a parallel differential negative line pin, a series differential positive line input pin, a series differential positive line output pin, a series differential negative line input pin, a series differential negative line output pin, a G pin, an R pin, and a B pin. The power supply pin supplies power to the differential color-changing chip, and the ground pin is used for signal grounding and power grounding. The G pin, R pin, and B pin are respectively connected to an external green LED, a red LED, and a blue LED.

[0031] The control signal interface pins are connected to external control signal communication. The control signal interface circuit is responsible for processing external control signals and connecting them to the differential control chip serial-parallel differential communication circuit.

[0032] The series differential positive line input pins and series differential positive line output pins of n differential-type control chips are cascaded to form a differential series positive data line network DIN+(1)-DOUT+(n). The two ends of the differential series positive data line network DIN+(1) and DOUT+(n) are connected to the MCU respectively.

[0033] The series differential negative line input pins and series differential negative line output pins of n differential control chips are cascaded to form a differential series negative data line network DIN-(1)-DOUT-(n). The two ends of the differential series negative data line network DIN-(1) and DOUT-(n) are connected to the MCU respectively.

[0034] The differential serial positive data line network DIN+(1)-DOUT+(n) and the differential serial negative data line network DIN-(1)-DOUT-(n) constitute a pair of differential serial data line networks. The differential serial data line network can transmit key data information or GRB color grayscale information.

[0035] The power supply pins of n differential control chips are connected in parallel to share the power network VCC, the ground pins are connected in parallel to share the ground network GND, the differential positive lines are connected in parallel to form a differential parallel positive data line network DIO+, and the differential negative lines are connected in parallel to form a differential parallel negative data line network DIO-.

[0036] The differential parallel positive data line network DIO+ and the differential parallel negative data line network DIO- constitute a pair of differential parallel data line networks. The differential parallel data line network can transmit key data information or GRB color grayscale information.

[0037] The differential-type Yuquan external color chip has two differential communication networks consisting of a pair of differential serial data line networks and another pair of differential parallel data line networks, which serve as hot backups for each other.

[0038] The address code of the differential control chip is written using a pair of differential serial data lines. After the differential control chips are cascaded, they will naturally form natural sequence bits 1, 2, 3...n. The natural sequence bits are written into the corresponding differential control chip address code memory as the address code communication of the differential control chip.

[0039] Furthermore, the chip transmits data through a custom differential protocol. In a pair of differential serial data line networks or a pair of differential parallel data line networks, the positive data line network transmits data and the negative data line network is used to verify the data transmitted by the positive data line network, or the negative data line network transmits data and the positive data line network is used to verify the data transmitted by the negative data line network.

[0040] Furthermore, the chip has one or more control signal interface pins.

[0041] Furthermore, the signals received by the control signal interface pin include electrical signals, optical signals, magnetic induction signals, switch signals, capacitive touch signals, and inductive induction signals, as well as digital signals or analog voltage signals provided by the MCU; in terms of physical connection, the control signal interface pin can be connected to phototubes, magnetic induction sensors, mechanical switches, touch sensing devices, and inductive induction devices.

[0042] Furthermore, the control signal interface circuit processes the signals received by the control signal interface pins as described above. The pull-up resistor value connected to the control signal interface pins inside the chip can be set by the program, and different received signals are processed by the corresponding program circuit.

[0043] Furthermore, when the signal received by the control signal interface pin is an optical signal, the light source of the optical signal is obtained by any combination of 1 out of 4, 2 out of 4, 3 out of 4, or 4 out of 4 selected from green LEDs, red LEDs, blue LEDs, and infrared IR lamps.

[0044] Furthermore, a keyboard includes a plurality of keys, each key comprising any of the aforementioned chips, and also includes an external mechanical triggering device connected to the chips via a control signal interface pin; the external mechanical triggering device is a mechanical switch.

[0045] Alternatively, it may also include an external optical path triggering device, which is connected to the chip via a control signal interface pin; the external optical path triggering device is a split-type dual-optical-path push-button switch, and the photosensitive element of the split-type dual-optical-path push-button switch serves as a light receiving element.

[0046] Alternatively, it may also include an external magnetic circuit triggering device, which is connected to the chip via a control signal interface pin; the external magnetic circuit triggering device includes a magnetic element and a magnetic induction chip corresponding to the magnetic element;

[0047] Alternatively, it may also include an external touch triggering device, which is connected to the chip via a control signal interface pin;

[0048] Alternatively, it may include an external inductor, which is connected to the chip via a control signal interface pin.

[0049] Furthermore, a switch, each switch comprising any of the aforementioned chips, wherein several switches are used in conjunction with each other.

[0050] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0051] 1. The differential full-color chip, full-color chip, and full-color external chip of this invention abandon the traditional single-bus transmission method and creatively adopt the differential transmission method. It does not require a clock signal line, has a higher transmission speed and a longer distance. The differential method has a large noise tolerance and can reliably identify signals with a lower voltage swing. It supports high-speed, full-speed, and ultra-high-speed USB. At the same speed, it has a longer transmission line than single-ended transmission.

[0052] 2. The differential full-color control chip, control chip, and control external color chip of the present invention have strong anti-interference capabilities. Each chip includes a pair of differential parallel data line networks (DIO+ and DIO-) and a pair of differential serial data line networks (DIN+(1)-DOUT+(n) and DIN-(1)-DOUT-(n)). Both the pair of differential parallel data line networks and the pair of differential serial data line networks can independently transmit key data information or GRB color grayscale information, and they are hot backups for each other.

[0053] Two lines (a pair of differential series data lines or a pair of differential parallel data lines) carry signals of equal magnitude but opposite phase. External electromagnetic interference will couple to both lines simultaneously. At the receiving end, the difference is subtracted, and the interference is directly canceled out. This is especially effective for long lines, inside chassis, and near power lines, reducing the likelihood of packet loss and transmission errors.

[0054] 3. This invention uses a differential full-color control chip, a full-color control device chip, and a full-color control external chip as a series-parallel differential communication circuit. The series and parallel connections serve as hot standby for each other. This hot standby is not a simple repetitive dual-series hot standby, nor is it the same as a simple dual-parallel hot standby. The series-parallel hot standby has stronger complementarity, better hot standby effect, and more stable performance.

[0055] 4. The present invention uses a differential full-color control chip, a full-color control device chip, and a full-color control external chip. The coding can be completed by the differential serial data network formed by the cascading of the chips themselves. It does not require any external fixtures, which simplifies the process, improves reliability and stability, and reduces manufacturing costs.

[0056] 5. To minimize power consumption, the control signal interface pins of this invention operate in a time-division multiplexing manner: when detecting a button, it is an input port (INPUT); when not detecting a button, the control signal interface pins are output ports (OUTPUT), capable of outputting a low level, and the button is in a zero-power state.

[0057] 6. The overall circuit of this invention, composed of a differential full-color control chip, a full-color control chip, and a full-color control external chip, is simpler. The MCU with USB function can be externally placed at the line terminal, making the heart of the keyboard less susceptible to contamination by external liquids and dust. The MCU has good reliability, and the reliability and stability of the keyboard are further enhanced.

[0058] 7. The differential full-color chip and full-color external chip of this invention have built-in GRB LEDs as keycap indicators, making them simpler to use and reducing the PCB space occupied by the components. Attached Figure Description

[0059] Figure 1 This is a functional schematic diagram of the differential full-color chip described in Embodiment 1 of the present invention.

[0060] Figure 2 This is a functional diagram of n differential full-color control chips as described in Embodiment 1 of the present invention after they are connected.

[0061] Figure 3 This is a functional schematic diagram of the differential control chip in Embodiment 2 of the present invention.

[0062] Figure 4 This is a functional diagram of n differential control chips as described in Embodiment 2 of the present invention after they are connected.

[0063] Figure 5 This is a functional schematic diagram of the differential full-color chip described in Embodiment 3 of the present invention.

[0064] Figure 6 This is a functional diagram of n differential full-color chips as described in Embodiment 3 of the present invention after they are connected. Detailed Implementation

[0065] The present invention will be further described in detail below with reference to the embodiments and accompanying drawings, but the embodiments of the present invention are not limited thereto.

[0066] Example 1

[0067] like Figure 1 A differential full-color LED chip is disclosed, comprising GRB LEDs and infrared IR LEDs, and integrating a control signal interface circuit, a GRB color driving circuit, an address code memory, a series-parallel differential communication circuit, and an infrared IR on / off driving circuit. It includes a control signal interface pin, a power supply pin, a ground pin, a parallel differential positive line pin, a parallel differential negative line pin, a series differential positive line input pin, a series differential positive line output pin, a series differential negative line input pin, and a series differential negative line output pin. The power supply pin supplies power to the differential full-color LED chip, and the ground pin is used for signal grounding and power grounding. The infrared IR LEDs act as a light source, generating light signals that are transmitted to the control signal interface pin for reception.

[0068] The control signal interface pins are connected to external control signal communication. The control signal interface circuit is responsible for processing external control signals and connecting them to the differential full-color chip serial-parallel differential communication circuit.

[0069] The chip has one or more control signal interface pins. These pins can be used for input, output, or simultaneous input and output. When the control signal interface pin is used for input, it receives external control signals. In this case, the control signal interface circuit processes the external control signals and connects them to the serial-parallel differential communication circuit. When the control signal interface pin is used for output, the serial-parallel differential communication circuit outputs control signals to the control signal interface pin through the control signal interface circuit.

[0070] like Figure 2 The series differential positive line input pins and series differential positive line output pins of n differential full-color chips are cascaded to form a differential series positive data line network DIN+(1)-DOUT+(n). The two ends of the differential series positive data line network DIN+(1) and DOUT+(n) are connected to the MCU respectively.

[0071] The series differential negative line input pins and series differential negative line output pins of n differential full-color chips are cascaded to form a differential series negative data line network DIN-(1)-DOUT-(n). The two ends of the differential series negative data line network DIN-(1) and DOUT-(n) are connected to the MCU respectively.

[0072] The differential serial positive data line network DIN+(1)-DOUT+(n) and the differential serial negative data line network DIN-(1)-DOUT-(n) constitute a pair of differential serial data line networks. The differential serial data line network can transmit key data information or GRB color grayscale information.

[0073] The power supply pins of n differential full-color chips are connected in parallel to share the power network VCC, the ground pins are connected in parallel to share the ground network GND, the differential positive lines are connected in parallel to form a differential parallel positive data line network DIO+, and the differential negative lines are connected in parallel to form a differential parallel negative data line network DIO-.

[0074] The differential parallel positive data line network DIO+ and the differential parallel negative data line network DIO- constitute a pair of differential parallel data line networks. The differential parallel data line network can transmit key data information or GRB color grayscale information.

[0075] The differential full-color chip has two differential communication networks consisting of a pair of differential serial data line networks and another pair of differential parallel data line networks, which serve as hot backups for each other.

[0076] A pair of differential series data line networks and a pair of differential parallel data line networks transmit data information simultaneously. In practical applications, GRB color grayscale information is transmitted on the series data line network, while button data information is transmitted on the parallel data line network. This improves the scanning frequency of the buttons, GRB LEDs, and infrared IR LEDs to achieve the highest stability and reliability. The data communication networks are switched intelligently and instantly only in the extreme case of failure of one side.

[0077] The address code of the differential full-color chip is written using a pair of differential serial data lines. After the differential full-color chips are cascaded, they will naturally form natural sequence bits 1, 2, 3...n. The natural sequence bits are written into the corresponding differential full-color chip address code memory as the address code communication of the differential full-color chip.

[0078] The chip transmits data via a custom differential protocol. In a pair of differential serial data line networks or a pair of differential parallel data line networks, the positive data line network transmits data, and the negative data line network is used to verify the data transmitted by the positive data line network, or the negative data line network transmits data, and the positive data line network is used to verify the data transmitted by the negative data line network.

[0079] 1. Differential serial data cable network transmission of button information

[0080] The data is encoded as follows: start packet + command packet + information packet + checksum + end packet are set sequentially; wherein:

[0081] The start packet consists of several repeated combinations of "0" and "1" (e.g., 01010101). In the start state or standby state, the waveform is kept high by default. "0" is displayed as an inverted state on the waveform, and "1" is displayed as a held state. The time occupied by one "0" is equal to the time occupied by one "1", which is denoted as T1. This is the time occupied by one symbol in all information packets, thus completing the synchronization of data transmission without the need for the chip to set an additional clock line and clock signal to complete the data synchronization transmission. Moreover, the duration of T1 can be customized (1 microsecond, 2 microseconds).

[0082] The command packet is a key command packet; the command packet is 8-bit data, and the first 4 bits and the last 4 bits are inverses of each other; for example: 00111100;

[0083] The information packet uses M bits to represent the key state. A 0 in each bit indicates that the key is not pressed, and a 1 indicates that the key is pressed. If there are several consecutive "1"s, a "0" is forcibly added after them. For example, a "0" is forcibly added after every 7 consecutive "1"s (i.e., "1111111"), thereby eliminating accumulated errors and achieving time synchronization. For example, "1111111011111110".

[0084] The parity bit is checked using a parity check method. For example, even parity (if the number of 1s in the packet is even, then the parity bit = 0) or odd parity (if the number of 1s in the packet is even, then the parity bit = 1).

[0085] The termination package can be customized, for example, 00110011.

[0086] Assuming a differential cascaded data line network, the positive data line network transmits the following data: 01010101 00111100 1111111011111110 0 00110011;

[0088] The negative data line network should be: 10101010 11000011 0000000100000001 1 11001100;

[0090] When the data on the negative data line network is completely opposite to the data on the positive data line network, the data transmitted by the positive data line network is correct; otherwise, it is incorrect and the entire data line is discarded.

[0091] In a pair of differential serial data line networks, data can also be transmitted by the negative data line network and verified by the positive data line network, in the same way as above.

[0092] 2. Differential parallel data cable network transmission of button information

[0093] In a differential parallel data line network, the information packet, based on the differential serial data line network encoding method, also needs to have a custom address code added at the beginning position, including a start address code and an end address code. Each address code is 10 bits (such as D9-D0), forming 1024 different address codes, supporting a maximum of 1024 keys. Therefore, the encoding method for transmitting key information in a differential parallel data line network becomes: start packet + command packet + start address code + end address code + information packet + parity bit + end packet are set in sequence.

[0094] Assuming a differential parallel data line network, the positive data line network transmits the following data: 01010101 00111100 0000000001 0000001110 1111111011111110 0 00110011;

[0096] This indicates that the key information being transmitted is from the 1st key (address code 0000000001) to the 14th key (address code 0000001110);

[0097] The negative data line network should be: 10101010 11000011 1111111110 1111110001 0000000100000001 1 11001100;

[0099] When the data on the negative data line network is completely opposite to the data on the positive data line network, the data transmitted by the positive data line network is correct; otherwise, it is incorrect and the entire data line is discarded.

[0100] 3. Differential serial data line network for transmitting GRB color grayscale information

[0101] Unlike differential serial data line network transmission of button data information, the command packet is a light command packet; and the information packet is 24-bit GRB color grayscale information, which includes GRB LED color information, light grayscale information and light current information, all of which are 8 bits.

[0102] The encoding method for transmitting GRB color grayscale information via differential serial data line network is as follows: start packet + command packet (light command packet) + information packet + check bit + end packet are set in sequence.

[0103] 4. Differential parallel data line network transmission of GRB color grayscale information

[0104] Unlike the differential serial data line network for transmitting GRB color grayscale information, the information packet, in addition to the differential serial data line network encoding method, also needs to add a custom address code at the beginning position, namely the start address code and the end address code, both of which are 10 bits.

[0105] The encoding method for transmitting GRB color grayscale information via differential parallel data line network is as follows: start packet + command packet (light command packet) + start address code + end address code + information packet + check bit + end packet are set in sequence.

[0106] The setting method for the start address code and end address code is the same as in "2. Differential parallel data line network transmission of button information", and will not be repeated here.

[0107] In the data encoding method, the start packet has a clock synchronization function (therefore, the chip does not need to set a clock internally, and the chip pins do not need to set clock line pins); the command packet can be customized, for example, it consists of 4 valid bits + 4 inverse bits. When the sending end sends a command packet to the receiving end, the receiving end checks whether the corresponding bits of the valid bits and inverse bits of the command packet are opposite to determine the accuracy of the command transmission: if they are opposite, the command transmission is correct, and the receiving end also determines whether the information packet meets the requirements; if they are not opposite, the command transmission is incorrect, and the data is discarded. The check bit is used to verify the correctness of the information packet. In addition to parity check, the verification methods can also use parity sum check, CRC16 check, checksum check, etc. (in this case, it is called a check packet).

[0108] A keyboard includes several optical axes, wherein the control signal interface pins of the differential full-color chip are connected to photosensitive elements under the optical axes for receiving optical switching signals.

[0109] A switch, each switch including the differential full-color chip, wherein a plurality of switches are used in conjunction with each other.

[0110] Example 2

[0111] like Figure 3 A differential balancing chip is disclosed, comprising an infrared (IR) LED and integrating a control signal interface circuit, an address code memory, a series-parallel differential communication circuit, and an infrared (IR) on / off drive circuit. It includes a control signal interface pin, a power supply pin, a ground pin, a parallel differential positive line pin, a parallel differential negative line pin, a series differential positive line input pin, a series differential positive line output pin, a series differential negative line input pin, and a series differential negative line output pin. The power supply pin supplies power to the differential balancing chip, and the ground pin is used for signal grounding and power grounding. The infrared (IR) LED acts as a light source, generating an optical signal that is transmitted to the control signal interface pin for reception.

[0112] The control signal interface pins are connected to external control signal communication. The control signal interface circuit is responsible for processing external control signals and connecting them to the differential controller chip's serial-parallel differential communication circuit.

[0113] like Figure 4 The series differential positive line input pins and series differential positive line output pins of n differential controller chips are cascaded to form a differential series positive data line network DIN+(1)-DOUT+(n). The two ends of the differential series positive data line network DIN+(1) and DOUT+(n) are connected to the MCU respectively.

[0114] The series differential negative line input pins and series differential negative line output pins of n differential controller chips are cascaded to form a differential series negative data line network DIN-(1)-DOUT-(n). The two ends of the differential series negative data line network DIN-(1) and DOUT-(n) are connected to the MCU respectively.

[0115] The differential series positive data line network DIN+(1)-DOUT+(n) and the differential series negative data line network DIN-(1)-DOUT-(n) constitute a pair of differential series data line networks, which can transmit key data information;

[0116] The power supply pins of n differential controller chips are connected in parallel to share the power network VCC, the ground pins are connected in parallel to share the ground network GND, the differential positive lines are connected in parallel to form a differential parallel positive data line network DIO+, and the differential negative lines are connected in parallel to form a differential parallel negative data line network DIO-.

[0117] The differential parallel positive data line network DIO+ and the differential parallel negative data line network DIO- constitute a pair of differential parallel data line networks, which can transmit key data information;

[0118] The differential controller chip consists of a pair of differential serial data line networks and another pair of differential parallel data line networks, which constitute two pairs of differential communication networks and serve as hot backups for each other.

[0119] The address code of the differential controller chip is written using a pair of differential serial data lines. After the differential controller chips are cascaded, they will naturally form natural sequence bits 1, 2, 3...n. The natural sequence bits are written into the address code memory of the corresponding differential controller chip as the address code communication of the differential controller chip.

[0120] Compared to Example 1, Example 2's differential controller chip does not contain GRB LEDs and does not integrate GRB color driving circuitry; correspondingly, the differential series data line network or differential parallel data line network does not need to transmit GRB color grayscale information.

[0121] Example 3

[0122] like Figure 5 A differential LED chip is disclosed, comprising an infrared (IR) LED bead and integrating a control signal interface circuit, a GRB (Gradient RGB) color driving circuit, an address code memory, a series-parallel differential communication circuit, and an infrared (IR) on / off driving circuit. It includes a control signal interface pin, a power supply pin, a ground pin, a parallel differential positive line pin, a parallel differential negative line pin, a series differential positive line input pin, a series differential positive line output pin, a series differential negative line input pin, a series differential negative line output pin, a G pin, an R pin, and a B pin. The power supply pin supplies power to the differential LED chip, and the ground pin is used for signal grounding and power grounding. The G pin, R pin, and B pin are respectively connected to an external green LED, a red LED, and a blue LED. The infrared (IR) LED bead acts as a light source, generating a light signal that is transmitted to the control signal interface pin for reception.

[0123] The control signal interface pins are connected to external control signal communication. The control signal interface circuit is responsible for processing external control signals and connecting them to the differential control chip serial-parallel differential communication circuit.

[0124] like Figure 6 The series differential positive line input pins and series differential positive line output pins of n differential control chips are cascaded to form a differential series positive data line network DIN+(1)-DOUT+(n). The two ends of the differential series positive data line network DIN+(1) and DOUT+(n) are connected to the MCU respectively.

[0125] The series differential negative line input pins and series differential negative line output pins of n differential control chips are cascaded to form a differential series negative data line network DIN-(1)-DOUT-(n). The two ends of the differential series negative data line network DIN-(1) and DOUT-(n) are connected to the MCU respectively.

[0126] The differential serial positive data line network DIN+(1)-DOUT+(n) and the differential serial negative data line network DIN-(1)-DOUT-(n) constitute a pair of differential serial data line networks. The differential serial data line network can transmit key data information or GRB color grayscale information.

[0127] The power supply pins of n differential control chips are connected in parallel to share the power network VCC, the ground pins are connected in parallel to share the ground network GND, the differential positive lines are connected in parallel to form a differential parallel positive data line network DIO+, and the differential negative lines are connected in parallel to form a differential parallel negative data line network DIO-.

[0128] The differential parallel positive data line network DIO+ and the differential parallel negative data line network DIO- constitute a pair of differential parallel data line networks. The differential parallel data line network can transmit key data information or GRB color grayscale information.

[0129] The differential-type Yuquan external color chip has two differential communication networks consisting of a pair of differential serial data line networks and another pair of differential parallel data line networks, which serve as hot backups for each other.

[0130] The address code of the differential control chip is written using a pair of differential serial data lines. After the differential control chips are cascaded, they will naturally form natural sequence bits 1, 2, 3...n. The natural sequence bits are written into the corresponding differential control chip address code memory as the address code communication of the differential control chip.

[0131] Compared to Example 1, Example 3 features an externally mounted differential full-color chip GRB LED.

[0132] In Examples 1 to 3, the control signal interface pin is used to receive optical switch signals. In addition to the infrared IR lamp beads that can provide the optical switch signals (the infrared IR lamp beads ensure that the optical axis can still work intermittently after the visible light is turned off, and the keyboard MCU controls the light source to emit light), the optical switch signals can also be any one of G, R, and B, or any combination of 2 out of 4, 3 out of 4, or 4 out of 4 from green LEDs, red LEDs, blue LEDs, and infrared IR lamp beads.

[0133] Simultaneously, the light source providing the light switch signal can also be used as the button backlight, realizing dual light paths, i.e., "one light for two uses". The light source can be built into the chip or set outside the chip (such as the Yuquan external color chip in Example 3, the infrared IR lamp bead can also be internal or external). See the following examples, which will not be repeated here:

[0134] For example, the technical solution of the patent publication number CN121709462A and the patent application title "Dual light path light switch keyboard with light-shielding silicone spring sheet and light guide plate as light source" has an LED light source of light guide plate that can position and provide emission light source. One path directly provides backlight for the keycap characters, and the other path provides emission light source for the light switch, thereby forming a dual light path for each key.

[0135] For example, the technical solution with patent publication number CN121939970A and patent application title "A dual-optical-path keyboard with a silicone spring sheet that can block light" uses GRB in its chip as the light source. One path directly illuminates the characters on the keycaps, and the other path directly illuminates the photosensitive element directly below the silicone spring sheet through the silicone spring sheet. This is a single light source with two uses.

[0136] For example, the technical solution with patent publication number CN121996078A and patent application title "A PCB with Direct Mountable Dual-Path Optical Axis, Dual-Path Optical Axis and Keyboard" uses a chip as the emitting light source of the dual-path light guide, one path providing the emitting light source for the light switch and the other path illuminating the characters of the keycaps. The photosensitive element receives the emitting light source from the light switch, and the dual-path optical axis is directly mounted on the PCB.

[0137] In Examples 1 to 3, the signals received by the control signal interface pin of the chip can be, in addition to optical signals, electrical signals, magnetic induction signals, switch signals, capacitive touch signals, inductive induction signals, digital signals given by the MCU, or analog voltage signals; in terms of physical connection, the control signal interface pin can be connected to phototubes, magnetic induction sensors, mechanical switches, touch sensing devices, and inductive induction devices.

[0138] The control signal interface circuit processes the signals received by the control signal interface pins as described above. The pull-up resistor value connected to the control signal interface pins inside the chip can be set by the program, and different program circuits are selected to process different received signals.

[0139] Correspondingly, a keyboard includes a plurality of keys. In addition to the chip and the external optical triggering device, the external optical triggering device can also be replaced by an external mechanical triggering device, an external magnetic triggering device, an external touch triggering device, or an external inductive sensing device.

[0140] The external optical path triggering device is connected to the chip through a control signal interface pin; the external optical path triggering device is a split dual-optical-path push-button switch, and the photosensitive element of the split dual-optical-path push-button switch serves as a light receiving element.

[0141] An external mechanical triggering device is connected to the chip via a control signal interface pin; the external mechanical triggering device is a mechanical switch.

[0142] An external magnetic circuit triggering device is connected to the chip via a control signal interface pin; the external magnetic circuit triggering device includes a magnetic element and a magnetic induction chip corresponding to the magnetic element;

[0143] An external touch triggering device is connected to the chip via a control signal interface pin;

[0144] An external inductor is connected to the chip via a control signal interface pin.

[0145] For example, a keyboard includes several capacitive shafts. The control signal interface pins of the chip are connected to the electrodes under the capacitive shafts. When a human hand touches the keycap electrode, a new coupling capacitor is formed with the electrode, which is equivalent to being connected in parallel with the original electrode capacitor, resulting in an increase in the total capacitance and a decrease in the charging and discharging frequency. By measuring the change in oscillation frequency or charging and discharging time, the touch event can be determined. A significant decrease in frequency (or a longer period) means that a human hand has touched the key, thus recognizing that the key has been pressed.

[0146] In Examples 1 to 3, it should be noted that in the same electrical system, all networks with the same name (such as VCC, GND, DIO+, DIO-, DIN+(1)-DOUT+(n), ​​DIN-(1)-DOUT-(n)) are connected together in terms of electrical characteristics.

[0147] Existing keyboards use the USB protocol (differential protocol) for transmitting key information via USB. However, the key information is still transmitted via serial single-bus communication protocol (e.g., 2025228407987, a hot-standby multi-color integrated circuit chip capable of transmitting and receiving control signals; when transmitting data via USB to the chip, serial single-bus communication protocol is used, while differential protocol is used on the other side). In contrast, this invention uses a differential communication protocol when transmitting key information via USB (see...). Figure 2 (on the right side of the USB port) enables high-speed data transmission, has stronger anti-interference capabilities, differential signals cancel each other out, significantly reduces the electromagnetic waves radiated outward, does not interfere with surrounding circuits, does not exceed standards, and meets USB and safety EMC requirements; moreover, power fluctuations, ground bounce noise, and common-mode interference have almost no impact on differential signals, greatly improving circuit stability.

[0148] The above embodiments are preferred embodiments of the present invention, but the embodiments of the present invention are not limited to the above embodiments. Any changes, modifications, substitutions, combinations, or simplifications made without departing from the spirit and principle of the present invention shall be considered equivalent substitutions and shall be included within the protection scope of the present invention.

Claims

1. A differential full-color chip, characterized in that, The differential full-color chip contains GRB LEDs and integrates a control signal interface circuit, a GRB color driving circuit, an address code memory, and a series-parallel differential communication circuit; it includes control signal interface pins, power supply pins, ground pins, parallel differential positive line pins, parallel differential negative line pins, series differential positive line input pins, series differential positive line output pins, series differential negative line input pins, and series differential negative line output pins; The power pin is used to power the differential full-color chip, and the ground pin is used for signal grounding and power grounding. The control signal interface pins are connected to external control signal communication. The control signal interface circuit is responsible for processing external control signals and connecting them to the differential full-color chip serial-parallel differential communication circuit. The series differential positive line input pins and series differential positive line output pins of n differential full-color chips are cascaded to form a differential series positive data line network DIN+(1)-DOUT+(n). The two ends of the differential series positive data line network DIN+(1) and DOUT+(n) are connected to the MCU respectively. The series differential negative line input pins and series differential negative line output pins of n differential full-color chips are cascaded to form a differential series negative data line network DIN-(1)-DOUT-(n). The two ends of the differential series negative data line network DIN-(1) and DOUT-(n) are connected to the MCU respectively. The differential serial positive data line network DIN+(1)-DOUT+(n) and the differential serial negative data line network DIN-(1)-DOUT-(n) constitute a pair of differential serial data line networks. The differential serial data line network can transmit key data information or GRB color grayscale information. The power supply pins of n differential full-color chips are connected in parallel to share the power network VCC, the ground pins are connected in parallel to share the ground network GND, the differential positive lines are connected in parallel to form a differential parallel positive data line network DIO+, and the differential negative lines are connected in parallel to form a differential parallel negative data line network DIO-. The differential parallel positive data line network DIO+ and the differential parallel negative data line network DIO- constitute a pair of differential parallel data line networks. The differential parallel data line network can transmit key data information or GRB color grayscale information. The differential full-color chip has two differential communication networks consisting of a pair of differential serial data line networks and another pair of differential parallel data line networks, which serve as hot backups for each other. The address code of the differential full-color chip is written using a pair of differential serial data lines.

2. A differential control chip, characterized in that, The differential controller chip integrates a control signal interface circuit, an address code memory, and a series-parallel differential communication circuit; including control signal interface pins, power supply pins, ground pins, parallel differential positive line pins, parallel differential negative line pins, series differential positive line input pins, series differential positive line output pins, series differential negative line input pins, and series differential negative line output pins. The power pin is used to power the differential controller chip, and the ground pin is used for signal grounding and power grounding. The control signal interface pins are connected to external control signal communication. The control signal interface circuit is responsible for processing external control signals and connecting them to the differential controller chip's serial-parallel differential communication circuit. The series differential positive input pins and series differential positive output pins of n differential controller chips are cascaded to form a differential series positive data line network DIN+(1)-DOUT+(n). The two ends of the differential series positive data line network DIN+(1) and DOUT+(n) are connected to the MCU respectively. The series differential negative line input pins and series differential negative line output pins of n differential controller chips are cascaded to form a differential series negative data line network DIN-(1)-DOUT-(n). The two ends of the differential series negative data line network DIN-(1) and DOUT-(n) are connected to the MCU respectively. The differential series positive data line network DIN+(1)-DOUT+(n) and the differential series negative data line network DIN-(1)-DOUT-(n) constitute a pair of differential series data line networks, which can transmit key data information; The power supply pins of n differential controller chips are connected in parallel to share the power network VCC, the ground pins are connected in parallel to share the ground network GND, the differential positive lines are connected in parallel to form a differential parallel positive data line network DIO+, and the differential negative lines are connected in parallel to form a differential parallel negative data line network DIO-. The differential parallel positive data line network DIO+ and the differential parallel negative data line network DIO- constitute a pair of differential parallel data line networks, which can transmit key data information; The differential controller chip consists of a pair of differential serial data line networks and another pair of differential parallel data line networks, which constitute two pairs of differential communication networks and serve as hot backups for each other. The address code of the differential controller chip is written using a pair of differential serial data lines.

3. A differential full-color chip, characterized in that, The differential color-changing chip integrates a control signal interface circuit, a GRB color-changing driver circuit, an address code memory, and a series-parallel differential communication circuit. It includes control signal interface pins, power supply pins, ground pins, parallel differential positive line pins, parallel differential negative line pins, series differential positive line input pins, series differential positive line output pins, series differential negative line input pins, series differential negative line output pins, G pins, R pins, and B pins. The power supply pins provide power to the differential color-changing chip, and the ground pins are used for signal grounding and power grounding. The G pins, R pins, and B pins are connected to external green LEDs, red LEDs, and blue LEDs, respectively. The control signal interface pins are connected to external control signal communication. The control signal interface circuit is responsible for processing external control signals and connecting them to the differential control chip serial-parallel differential communication circuit. The series differential positive line input pins and series differential positive line output pins of n differential-type control chips are cascaded to form a differential series positive data line network DIN+(1)-DOUT+(n). The two ends of the differential series positive data line network DIN+(1) and DOUT+(n) are connected to the MCU respectively. The series differential negative line input pins and series differential negative line output pins of n differential control chips are cascaded to form a differential series negative data line network DIN-(1)-DOUT-(n). The two ends of the differential series negative data line network DIN-(1) and DOUT-(n) are connected to the MCU respectively. The differential serial positive data line network DIN+(1)-DOUT+(n) and the differential serial negative data line network DIN-(1)-DOUT-(n) constitute a pair of differential serial data line networks. The differential serial data line network can transmit key data information or GRB color grayscale information. The power supply pins of n differential control chips are connected in parallel to share the power network VCC, the ground pins are connected in parallel to share the ground network GND, the differential positive lines are connected in parallel to form a differential parallel positive data line network DIO+, and the differential negative lines are connected in parallel to form a differential parallel negative data line network DIO-. The differential parallel positive data line network DIO+ and the differential parallel negative data line network DIO- constitute a pair of differential parallel data line networks. The differential parallel data line network can transmit key data information or GRB color grayscale information. The differential-type Yuquan external color chip has two differential communication networks consisting of a pair of differential serial data line networks and another pair of differential parallel data line networks, which serve as hot backups for each other. The address code of the differential-type full-color chip is written using a pair of differential serial data lines.

4. The chip according to any one of claims 1 to 3, characterized in that, The chip transmits data via a custom differential protocol. In a pair of differential serial data line networks or a pair of differential parallel data line networks, the positive data line network transmits data, and the negative data line network is used to verify the data transmitted by the positive data line network, or the negative data line network transmits data, and the positive data line network is used to verify the data transmitted by the negative data line network.

5. The chip according to any one of claims 1 to 3, characterized in that, The chip has one or more control signal interface pins.

6. The chip according to any one of claims 1 to 3, characterized in that, The signals received by the control signal interface pins include electrical signals, optical signals, magnetic induction signals, switch signals, capacitive touch signals, and inductive induction signals, as well as digital signals or analog voltage signals provided by the MCU. In terms of physical connection, the control signal interface pins can be connected to phototubes, magnetic induction sensors, mechanical switches, touch sensing devices, and inductive induction devices.

7. The chip according to claim 6, characterized in that, The control signal interface circuit processes the signals received by the control signal interface pin as described in claim 6. The pull-up resistor value connected to the control signal interface pin inside the chip can be set by the program, and different received signals are processed by the corresponding program circuit.

8. The chip according to claim 6, characterized in that, When the signal received by the control signal interface pin is an optical signal, the light source of the optical signal is any combination of 1 out of 4, 2 out of 4, 3 out of 4, or 4 out of 4 selected from green LEDs, red LEDs, blue LEDs, and infrared IR lamps.

9. A keyboard comprising a plurality of keys, characterized in that, The button includes the chip as described in any one of claims 1 to 3, and further includes an external mechanical triggering device, which is connected to the chip via a control signal interface pin; the external mechanical triggering device is a mechanical switch; Alternatively, it may also include an external optical path triggering device, which is connected to the chip via a control signal interface pin; the external optical path triggering device is a split-type dual-optical-path push-button switch, and the photosensitive element of the split-type dual-optical-path push-button switch serves as a light receiving element. Alternatively, it may also include an external magnetic circuit triggering device, which is connected to the chip via a control signal interface pin; the external magnetic circuit triggering device includes a magnetic element and a magnetic induction chip corresponding to the magnetic element; Alternatively, it may also include an external touch triggering device, which is connected to the chip via a control signal interface pin; Alternatively, it may include an external inductor, which is connected to the chip via a control signal interface pin.

10. A switch, characterized in that, Each switch includes the chip as described in any one of claims 1 to 3, and the plurality of switches are used in conjunction with each other.

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