A method and system for permanent magnet motor switching protection based on bus stability

Abstract

The application discloses a kind of based on bus stability permanent magnet motor switching protection method and system, specifically relates to permanent magnet motor frequency conversion switching control technical field, for solving the problem that existing switching method is under power grid non-stationary condition synchronous regulation excitation bus oscillation causes switching failure;By collecting inverter DC bus voltage signal and extracting bus low-frequency oscillation component in the phase of waiting, the damping ratio sequence is extracted by window modal identification of bus low-frequency oscillation component, when the damping ratio reverse trend shows that the dissipation capacity of oscillation mode continues to attenuate and the damping ratio is positive, it is judged that the damping ratio appears reverse trend, the condition probability that damping ratio appears reverse trend is obtained under the condition that the phase-locked loop regulation step length exceeds step length threshold, when the mutation amplitude of condition probability exceeds preset probability mutation threshold, it is confirmed that the phase-locked loop regulation is excitation source and increases the phase-locked loop damping time constant, after the amplitude of bus low-frequency oscillation component is below stable threshold, the synchronous switching of frequency conversion power supply to power grid is executed.

Description

Technical Field

[0001] This invention relates to the field of frequency conversion switching control technology for permanent magnet motors, and more specifically, to a method and system for switching protection of permanent magnet motors based on bus stability. Background Technology

[0002] Permanent magnet synchronous motors (PMSMs) are widely used in industrial drives due to their high efficiency and high power density. To reduce starting shock, a frequency converter (VDC) is typically used for soft starting. Once the motor speed approaches the power frequency synchronous speed, it is switched to the power frequency grid through synchronization detection. This method of starting with a VDC and then switching back to the power frequency utilizes the excellent starting performance of the VDC while avoiding the losses and capacity limitations of the VDC during long-term operation. Existing PSM switching control methods mainly revolve around matching the three synchronization elements of voltage amplitude, frequency, and phase. These methods continuously track the grid voltage through components such as phase-locked loops (PLLs) and adjust the VDC output to make the motor's back electromotive force (EMF) consistent with the grid. When the synchronization conditions are met, the VDC is disconnected and the power frequency contactor is connected to complete the switching. The default premise of this approach is that the power grid is in a relatively stable state, and the control objective during the synchronization adjustment process is limited to achieving static matching at the moment of switching.

[0003] However, in industrial power grid environments with impulsive loads or frequent voltage fluctuations, the grid voltage is not consistently stable but often accompanied by low-frequency fluctuations. To match the constantly changing grid phase, the frequency converter needs to repeatedly fine-tune the motor speed. The large inertia load connected to the motor will convert this repeated speed adjustment into low-frequency power disturbances on the DC bus, causing oscillations of the bus voltage at the same or similar frequencies. When the frequency of this bus oscillation approaches that of the grid's own voltage fluctuations, the two form energy coupling through the inverter and rectifier, resulting in large swings in the DC bus voltage. This severely disrupts the synchronization judgment conditions and may even prevent the switching process from being completed. Even if the switching is forcibly executed, the drastic changes in the bus voltage will introduce abnormal electromagnetic transients at the moment of switching, endangering the safety of the motor, frequency converter, and bus capacitor bank. Existing switching methods do not consider the hidden defect that the synchronization regulation itself may become an excitation source of bus instability under non-stable grid conditions, and lack control means to actively maintain the stability of the DC bus voltage and ensure reliable synchronization switching during the switching process. Summary of the Invention

[0004] In order to overcome the above-mentioned defects of the prior art, the present invention provides a method and system for switching protection of permanent magnet motors based on bus stability to solve the problems mentioned in the background art.

[0005] To achieve the above objectives, the present invention provides the following technical solution: A method for switching protection of a permanent magnet motor based on busbar stability includes the following steps: S1: When the inverter drives the permanent magnet synchronous motor to complete the soft start and enter the synchronization waiting stage, the inverter DC bus voltage signal is collected. S2: Extract the low-frequency oscillation component of the bus from the inverter DC bus voltage signal; S3: Perform window-by-window mode identification on the low-frequency oscillation component of the bus to extract the damping ratio sequence of the oscillation mode. When the reversal trend of the damping ratio sequence indicates that the dissipation capacity of the oscillation mode continues to decay and the damping ratio is still positive, it is determined that the damping ratio has a reversal trend. S4: Obtain the conditional probability that the damping ratio reverses when the phase-locked loop adjustment step size exceeds the step size threshold. When the abrupt change of the conditional probability relative to the conditional probability when the phase-locked loop adjustment step size does not exceed the step size threshold exceeds the preset probability abrupt change threshold, confirm that the phase-locked loop adjustment is the excitation source for oscillation damping decay. S5: When it is confirmed that the phase-locked loop adjustment is the excitation source for oscillation damping attenuation, increase the damping time constant of the loop filter in the synchronous phase-locked loop to attenuate the low-frequency oscillation component of the bus. S6: After the amplitude of the low-frequency oscillation component of the bus drops below the stable threshold, the permanent magnet synchronous motor is switched from variable frequency power supply to the power frequency grid.

[0006] Furthermore, S1 includes: During the process of synchronous phase-locked loop tracking and adjusting the phase of the power frequency grid, the voltage across the inverter DC bus capacitor is continuously sampled at a fixed sampling frequency to obtain the sampling sequence of the inverter DC bus voltage signal.

[0007] Furthermore, S2 includes: Bandpass filtering is applied to the sampling sequence of the inverter DC bus voltage signal; The passband frequency range of the bandpass filter covers the subsynchronous oscillation frequency band of the power grid and the electromechanical oscillation frequency band caused by synchronous regulation; The low-frequency oscillation component of the DC bus, which characterizes the low-frequency power disturbance of the DC bus, is separated from the bandpass filtered signal.

[0008] Furthermore, S3 includes: Slide a time window on the low-frequency oscillation component of the bus, identify the mode parameters of the signal in each time window, obtain the oscillation mode damping ratio corresponding to each time window, and arrange the oscillation mode damping ratios of each time window in chronological order to form a damping ratio sequence. The damping ratio is determined to have a reversal trend when the difference between adjacent damping ratios in the damping ratio sequence is performed. This is done when multiple consecutive difference values ​​are negative and all damping ratios in the corresponding damping ratio sequence are positive.

[0009] Furthermore, when performing difference operations on adjacent damping ratios in the damping ratio sequence, the least squares linear fitting method is used to estimate the slope of multiple consecutive damping ratios in the damping ratio sequence. When the slope of the fitted line is negative for multiple consecutive sliding time windows and all damping ratios in the damping ratio sequence are still positive within each sliding time window, it is determined that the damping ratio shows a reversal trend. The number of consecutive damping ratios selected when estimating the slope is consistent with the window length of the sliding time window, and the slope of the fitted line characterizes the decay rate of the oscillation mode dissipation capability.

[0010] Furthermore, S4 includes: Record the correspondence between the adjustment step size of each phase-locked loop adjustment and the reversal trend of the damping ratio. Calculate the frequency of the first occurrence of the damping ratio reversal trend in the total number of times the phase-locked loop adjustment step size exceeds the step size threshold, and the frequency of the second occurrence of the damping ratio reversal trend in the total number of times the phase-locked loop adjustment step size does not exceed the step size threshold. The first conditional probability is obtained by dividing the first occurrence frequency by the total number of times the corresponding phase-locked loop adjustment step size exceeds the step size threshold, and the second occurrence frequency is obtained by dividing the corresponding phase-locked loop adjustment step size not exceeding the step size threshold. When the difference between the first conditional probability and the second conditional probability exceeds the preset probability mutation threshold, the phase-locked loop is confirmed to be the excitation source for oscillation damping attenuation.

[0011] Furthermore, S5 includes: After confirming that the phase-locked loop (PLL) adjustment is the excitation source for oscillation damping attenuation, a damping time constant value larger than the current value is written to the damping time constant register of the loop filter in the synchronous PLL. The increased damping time constant enhances the loop filter's ability to suppress high-frequency variation components in the PLL adjustment step sequence.

[0012] Furthermore, the increased damping time constant value written to the damping time constant register of the loop filter in the synchronous phase-locked loop is progressively determined based on the abrupt change amplitude of the first conditional probability and the second conditional probability when the phase-locked loop is confirmed to be adjusted as an excitation source for oscillating damping attenuation. The larger the abrupt change amplitude, the larger the increase in the damping time constant value, and there is a positive correlation between the increase and the abrupt change amplitude.

[0013] Furthermore, S6 includes: The instantaneous amplitude of the low-frequency oscillation component of the busbar after the damping time constant is continuously monitored. The instantaneous amplitude is compared with the stability threshold. When the instantaneous amplitude is lower than the stability threshold in multiple consecutive sliding time windows, the power frequency contactor is closed and the inverter output contactor is disconnected to complete the synchronous switching of the permanent magnet synchronous motor from the inverter power supply to the power frequency grid.

[0014] On the other hand, the present invention provides a permanent magnet motor switching protection system based on busbar stability, comprising the following modules: The signal acquisition module is used to acquire the inverter DC bus voltage signal when the inverter drives the permanent magnet synchronous motor to complete the soft start and enter the synchronization waiting stage. The oscillation extraction module is used to extract the low-frequency oscillation component of the inverter DC bus voltage signal; The trend determination module is used to perform window-by-window mode identification of the low-frequency oscillation component of the bus and extract the damping ratio sequence of the oscillation mode. When the reversal trend of the damping ratio sequence indicates that the dissipation capacity of the oscillation mode is continuously decreasing and the damping ratio is still positive, it is determined that the damping ratio has a reversal trend. The excitation confirmation module is used to obtain the conditional probability that the damping ratio will reverse under the condition that the phase-locked loop adjustment step size exceeds the step size threshold. When the change amplitude of the conditional probability relative to the conditional probability when the phase-locked loop adjustment step size does not exceed the step size threshold exceeds the preset probability change threshold, the phase-locked loop adjustment is confirmed as the excitation source for oscillation damping decay. The damping adjustment module is used to increase the damping time constant of the loop filter in the synchronous phase-locked loop to attenuate the low-frequency oscillation component of the bus when it is confirmed that the phase-locked loop adjustment is the excitation source for oscillation damping attenuation. The switching execution module is used to perform synchronous switching of the permanent magnet synchronous motor from variable frequency power supply to power grid after the amplitude of the low frequency oscillation component of the bus drops below the stable threshold.

[0015] Compared with the prior art, the present invention has the following beneficial effects: 1. Taking the voltage stability of the DC bus during the switching process of the permanent magnet synchronous motor as the core of the control, the evolution trend of the damping ratio of the low-frequency oscillation mode of the bus is identified sequentially. Before the switching action is executed, the hidden risk of bus instability caused by the synchronous regulation itself is captured in advance. Unlike the conventional approach of only monitoring the voltage amplitude, the damping ratio sequence of the oscillation mode is extracted from the bus voltage signal. The reverse trend of the damping ratio is used to quantitatively characterize the continuous decay of the system's dissipation capacity. The statistical dependence between the change of damping ratio and the adjustment step size of the phase-locked loop is incorporated into the judgment logic. Thus, the excitation source of the bus oscillation is accurately located to the synchronous regulation link itself. The cognitive path of tracing the source before intervention avoids the control lag or mis-regulation problems that may be introduced by blindly applying damping when the excitation source is unknown.

[0016] 2. After confirming the excitation source, the damping time constant of the synchronous phase-locked loop filter is adjusted in a targeted manner instead of cutting off the synchronous channel or blocking the switching. The incremental increase of the damping time constant is related to the amplitude of the conditional probability change when the excitation source is confirmed, so that the strength of the damping intervention is matched with the significance of the excitation effect. The orderly switching of the power frequency contactor and the inverter output contactor is only performed after the amplitude of the low-frequency oscillation component of the bus falls back below the stable threshold and is verified by a continuous time window. This ensures that the permanent magnet synchronous motor smoothly transitions between the variable frequency power supply and the power frequency grid power supply. The dynamic adjustment of the motor switching control parameters is the focus, which falls under the category of motor control. This solves the risk of switching failure caused by the instability of the synchronous adjustment excitation bus under non-stable grid conditions. Attached Figure Description

[0017] Figure 1 This is a flowchart of a permanent magnet motor switching protection method based on busbar stability according to the present invention; Figure 2 This is a schematic diagram of the structure of a permanent magnet motor switching protection system based on busbar stability according to the present invention. Detailed Implementation

[0018] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0019] Example 1: Figure 1 This invention provides a method for switching protection of a permanent magnet motor based on bus stability, which includes the following steps: S1: When the inverter drives the permanent magnet synchronous motor to complete the soft start and enter the synchronization waiting stage, the inverter DC bus voltage signal is collected. S2: Extract the low-frequency oscillation component of the bus from the inverter DC bus voltage signal; S3: Perform window-by-window mode identification on the low-frequency oscillation component of the bus to extract the damping ratio sequence of the oscillation mode. When the reversal trend of the damping ratio sequence indicates that the dissipation capacity of the oscillation mode continues to decay and the damping ratio is still positive, it is determined that the damping ratio has a reversal trend. S4: Obtain the conditional probability that the damping ratio reverses when the phase-locked loop adjustment step size exceeds the step size threshold. When the abrupt change of the conditional probability relative to the conditional probability when the phase-locked loop adjustment step size does not exceed the step size threshold exceeds the preset probability abrupt change threshold, confirm that the phase-locked loop adjustment is the excitation source for oscillation damping decay. S5: When it is confirmed that the phase-locked loop adjustment is the excitation source for oscillation damping attenuation, increase the damping time constant of the loop filter in the synchronous phase-locked loop to attenuate the low-frequency oscillation component of the bus. S6: After the amplitude of the low-frequency oscillation component of the bus drops below the stable threshold, the permanent magnet synchronous motor is switched from variable frequency power supply to the power frequency grid.

[0020] In the specific implementation of S1, when the inverter drives the permanent magnet synchronous motor to complete the soft start and enter the synchronization waiting stage, the speed of the permanent magnet synchronous motor has been increased by the inverter to near the synchronous speed of the power grid. The contactor on the inverter output side remains closed, while the power grid contactor on the power grid side remains open. The synchronization phase-locked loop (PLL) begins to track and adjust the phase of the power grid. The PLL obtains the instantaneous phase of the power grid voltage signal from the power grid side through a voltage sensor and uses the instantaneous phase of the power grid voltage signal as the target value for phase tracking. During the complete process of the PLL tracking and adjusting the phase of the power grid, the acquisition of the inverter's DC bus voltage signal is performed synchronously and in parallel. The acquisition of the inverter's DC bus voltage signal does not depend on the adjustment result of the PLL, and the acquisition of the inverter's DC bus voltage signal and the adjustment process of the PLL overlap in time.

[0021] The specific method for acquiring the inverter DC bus voltage signal is as follows: A DC voltage sensor connected to both ends of the inverter DC bus capacitor continuously samples the voltage across the capacitor. The input terminals of the DC voltage sensor are connected to the positive and negative busbars of the inverter DC bus capacitor, respectively. The DC voltage sensor converts the voltage across the inverter DC bus capacitor into an analog voltage signal linearly proportional to the voltage amplitude. The analog voltage signal is filtered and amplitude-adapted by a signal conditioning circuit before being sent to the analog-to-digital converter (ADC). The ADC performs analog-to-digital conversion on the analog voltage signal at a fixed sampling frequency, which is pre-stored in the parameter register of the inverter controller. The fixed sampling frequency is set based on the highest frequency component of the subsynchronous oscillation band of the power grid to be extracted from the inverter DC bus voltage signal. The fixed sampling frequency is specifically set to an integer multiple of this highest frequency component; for example, the integer multiple is an integer greater than or equal to 4, such as 4, 5, or 8 times the highest frequency component. Each time the analog-to-digital converter (ADC) completes an analog-to-digital conversion, it outputs a digital value, which is the instantaneous sampled value of the voltage across the inverter's DC bus capacitor at the current sampling moment. The instantaneous sampled values ​​output by the ADC at multiple consecutive sampling moments are sequentially stored in the inverter controller's sampling buffer, forming a sampling sequence of the inverter's DC bus voltage signal. Each sampled value in the sampling sequence carries a timestamp corresponding to its sampling moment, which is automatically recorded by the inverter controller's system clock at the moment the analog-to-digital conversion is completed. The sampling sequence of the inverter's DC bus voltage signal is continuously updated in the sampling buffer. Subsequent steps read the sampling sequence from the sampling buffer to extract the low-frequency oscillation component of the bus.

[0022] In the specific implementation of S2, the sampling sequence of the inverter DC bus voltage signal is bandpass filtered. This bandpass filtering is performed in the digital signal processor (DSP) of the inverter controller. The DSP reads the sampling sequence of the inverter DC bus voltage signal from the sampling buffer storage area. The time stamp carried by each sample value in the sampling sequence is used to determine the time base for the bandpass filtering. The passband frequency range of the bandpass filter covers the subsynchronous oscillation frequency band of the power grid and the electromechanical oscillation frequency band caused by synchronous regulation. The subsynchronous oscillation frequency band of the power grid is predetermined based on the actual subsynchronous oscillation frequency distribution of the industrial power grid in environments with impulsive loads or frequent voltage fluctuations. The electromechanical oscillation frequency band caused by synchronous regulation is predetermined based on the electromechanical oscillation frequency distribution caused by the large inertia load connected to the permanent magnet synchronous motor when the motor speed is repeatedly fine-tuned by the synchronous phase-locked loop. The lower cutoff frequency of the subsynchronous oscillation band of the power grid is set to a frequency value that is lower than the rated frequency of the power grid and higher than zero Hz. For example, the lower cutoff frequency of the subsynchronous oscillation band of the power grid is set to 5 Hz, 8 Hz or 10 Hz. The upper cutoff frequency of the subsynchronous oscillation band of the power grid is set to a frequency value that is lower than the rated frequency of the power grid. For example, the upper cutoff frequency of the subsynchronous oscillation band of the power grid is set to the frequency value obtained by subtracting 2 Hz or 5 Hz from the rated frequency of the power grid. The electromechanical oscillation frequency band caused by synchronization is determined based on the natural oscillation frequency of the electromechanical system composed of the permanent magnet synchronous motor and the large inertia load. The natural oscillation frequency of the electromechanical system is calculated by combining the rotational inertia parameters of the permanent magnet synchronous motor, the rotational inertia parameters of the large inertia load, and the electromagnetic stiffness coefficient of the permanent magnet synchronous motor. The rotational inertia parameters of the permanent magnet synchronous motor are obtained from the nameplate data or factory test report of the permanent magnet synchronous motor. The rotational inertia parameters of the large inertia load are obtained from the mechanical design parameters of the large inertia load. The electromagnetic stiffness coefficient of the permanent magnet synchronous motor is calculated based on the rated torque and rated flux parameters of the permanent magnet synchronous motor. The lower cutoff frequency of the electromechanical oscillation frequency band caused by synchronization is set as the natural oscillation frequency of the electromechanical system minus a frequency offset. The upper cutoff frequency of the electromechanical oscillation frequency band caused by synchronization is set as the natural oscillation frequency of the electromechanical system plus the frequency offset. For example, the frequency offset is 1 Hz, 2 Hz, or 3 Hz. The lower cutoff frequency of the passband frequency range of the bandpass filter is taken as the smaller value between the lower cutoff frequency of the subsynchronous oscillation band of the power grid and the lower cutoff frequency of the electromechanical oscillation band caused by synchronous regulation. The upper cutoff frequency of the passband frequency range of the bandpass filter is taken as the larger value between the upper cutoff frequency of the subsynchronous oscillation band of the power grid and the upper cutoff frequency of the electromechanical oscillation band caused by synchronous regulation. The passband frequency range of the bandpass filter continuously covers the subsynchronous oscillation band of the power grid and the electromechanical oscillation band caused by synchronous regulation.

[0023] The bandpass filter is selected as a finite impulse response (FIR) filter. The FIR coefficients are pre-calculated using the window function method or equiripple design method based on the passband frequency range, stopband attenuation requirements, and phase linearity requirements, and stored in the filter coefficient register of the inverter controller. The digital signal processor (DSP) sequentially feeds the sampled values ​​from the inverter DC bus voltage signal sampling sequence into the tapped delay lines of the FIR filter. The FIR filter performs a multiplication and accumulation operation on the sampled values ​​in the tapped delay lines and the corresponding coefficients in the filter coefficient register. The output of this multiplication and accumulation operation is the filtered value of the bandpass-filtered signal at the current sampling time. In the bandpass-filtered signal, frequency components outside the passband frequency range are attenuated, while frequency components within the passband frequency range are retained.

[0024] The specific method for separating the low-frequency oscillation component representing the DC bus low-frequency power disturbance from the bandpass-filtered signal is as follows: The digital signal processor completely extracts the bandpass-filtered signal from the time-domain signal corresponding to the sampling sequence of the inverter DC bus voltage signal. The extracted bandpass-filtered signal is directly used as the low-frequency oscillation component representing the DC bus low-frequency power disturbance. The low-frequency oscillation component and the sampling sequence of the inverter DC bus voltage signal correspond one-to-one in terms of time labels. The time label of each sample value in the low-frequency oscillation component is the same as the time label of the corresponding sample value in the sampling sequence of the inverter DC bus voltage signal. The low-frequency oscillation component reflects the time-domain waveform characteristics of the low-frequency power disturbance on the DC bus caused by the repeated fine-tuning of the motor speed by the synchronous phase-locked loop and converted by the large inertia load. The larger amplitude part of the low-frequency oscillation component corresponds to the peak value of the low-frequency power disturbance, and the smaller amplitude part corresponds to the valley value of the low-frequency power disturbance. The low-frequency oscillation component of the bus is stored in the data buffer storage area of ​​the inverter controller. The subsequent steps read the low-frequency oscillation component of the bus from the data buffer storage area to perform window-by-window mode identification and extract the damping ratio sequence of the oscillation mode.

[0025] In the specific implementation of S3, the low-frequency oscillation component of the bus is read from the data buffer storage area. A sliding time window is applied to the low-frequency oscillation component of the bus. The length of the sliding time window is determined according to the period corresponding to the lower cutoff frequency of the electromechanical oscillation frequency band caused by the synchronous regulation. The length of the sliding time window is set to an integer multiple of the period corresponding to the lower cutoff frequency of the electromechanical oscillation frequency band caused by the synchronous regulation, for example, 2, 3, or 4 times the period corresponding to the lower cutoff frequency of the electromechanical oscillation frequency band caused by the synchronous regulation. The sliding time window slides forward on the low-frequency oscillation component of the bus with a fixed sliding step size. The sliding step size is determined according to the sampling period of the low-frequency oscillation component of the bus, for example, 1, 2, or 5 times the sampling period of the low-frequency oscillation component of the bus. Each sliding step size extracts a sub-signal of the low-frequency oscillation component of the bus within the sliding time window. The extracted sub-signal is the signal within one time window. Modal parameter identification is performed on the signal within each time window using the Prony analysis method. The Prony analysis method fits the signal within a time window to a linear combination of complex exponential decay functions. These functions are powers of the sum of the damping factor and angular frequency multiplied by time, where the amplitude is the base of the natural logarithm. The Prony analysis method determines the order of the signal subspace by constructing a sample covariance matrix of the signal within the time window and performing singular value decomposition (SVD). The order of the signal subspace is determined by the number of singular values ​​exceeding a preset threshold, which is set as a percentage of the largest singular value (e.g., 5%, 10%, or 15%). After determining the order of the signal subspace, the Prony analysis method extracts the damping factor and angular frequency of the dominant oscillation mode within the time window by solving a system of linear prediction equations. The coefficients of the linear prediction equations are solved using the least squares method. The dominant oscillation mode is the oscillation mode with the highest energy within the time window. The damping ratio of the dominant oscillation mode is obtained by taking the negative of the ratio of the damping factor of the dominant oscillation mode to the magnitude of its angular frequency. This damping ratio is then used as the damping ratio of the oscillation mode corresponding to a time window. The damping ratios of the oscillation modes for each time window are arranged in chronological order of their appearance on the low-frequency oscillation components of the busbar, forming a damping ratio sequence. Each element in the damping ratio sequence represents the damping ratio of the oscillation mode corresponding to a time window, and the order of the elements in the damping ratio sequence corresponds exactly to the sliding order of the sliding time windows on the low-frequency oscillation components of the busbar.

[0026] A difference operation is performed on adjacent damping ratios in the damping ratio sequence. The difference operation is performed by subtracting the damping ratio of the oscillation mode corresponding to the previous time window from the damping ratio of the oscillation mode corresponding to the next time window, resulting in a difference value. This difference operation is performed on each pair of adjacent damping ratios in the damping ratio sequence, resulting in a difference value sequence. When multiple consecutive difference values ​​appear in the difference value sequence and all corresponding damping ratios in the damping ratio sequence are positive, a damping ratio reversal trend is determined. The number of consecutive difference values ​​is preset, set to the integer part of the quotient obtained by dividing the length of the sliding time window by the sliding step size. For example, the number of consecutive difference values ​​is set to the integer part of the quotient being 3, 5, or 7, taking the corresponding value.

[0027] The least squares linear fitting method is used to estimate the slope of multiple consecutive damping ratios in the damping ratio sequence. The number of consecutive damping ratios is consistent with the window length of the sliding time window, which is the number of sampling points of the low-frequency oscillation component of the bus included within the time length of the sliding time window. Multiple consecutive damping ratios are sequentially extracted from the damping ratio sequence to form a fitting data set. Least squares linear fitting is performed on the damping ratio values ​​in the fitting data set. The slope of the fitted line is determined by minimizing the sum of the squares of the vertical distances from each damping ratio value in the fitting data set to the fitted line. Least squares linear fitting is performed on the number of consecutive damping ratios corresponding to the window length of each complete sliding time window in the damping ratio sequence to obtain the slope sequence. When the slope of the fitted line corresponding to multiple consecutive sliding time windows in the slope sequence is negative and all damping ratios in the damping ratio sequence within each sliding time window are still positive, it is determined that the damping ratio has reversed its trend. The number of consecutive sliding time windows is preset, for example, 3, 4, or 5.

[0028] In the specific implementation of S4, during the process of the synchronous phase-locked loop (PLL) tracking and adjusting the phase of the power grid, the PLL generates a PLL adjustment step size each time it outputs an adjustment amount. The PLL adjustment step size is defined as the absolute value of the phase adjustment amount output by the PLL between two adjacent adjustment actions. The PLL adjustment step size is obtained from the output terminal of the loop filter of the synchronous PLL. Each time the synchronous PLL completes an adjustment action, the value at the output terminal of the loop filter is read and the absolute value is taken as a record of one PLL adjustment step size. Each PLL adjustment step size has a timestamp of the recording time, which is automatically recorded by the system clock of the inverter controller when reading the PLL adjustment step size. The determination result of the damping ratio reversal trend is obtained from the step of determining the damping ratio reversal trend. Each time the damping ratio reversal trend is determined, a reversal trend flag is generated, which contains the timestamp of the determination time. Align the time stamp of the phase-locked loop (PLL) adjustment step size with the time stamp of the reversal trend indicator. Set the tolerance for time stamp alignment to half of the recording period of the PLL adjustment step size. When the difference between the time stamp of the PLL adjustment step size and the time stamp of the reversal trend indicator is less than the tolerance for time stamp alignment, record the PLL adjustment step size and the reversal trend indicator as a set of correspondences.

[0029] A step size threshold is preset to distinguish the magnitude of the phase-locked loop (PLL) adjustment step size. This threshold is determined based on the statistical average of the PLL adjustment step size during steady-state operation of the permanent magnet synchronous motor (PMSM) in the synchronization waiting phase. The step size threshold is set as the product of the statistical average of the PLL adjustment step size over several adjustment cycles prior to the synchronization waiting phase and a proportional coefficient. The proportional coefficient is determined based on the allowable fluctuation range of the PLL adjustment step size, for example, a value of 1.2, 1.5, or 2.0. During the synchronization waiting phase, records of the correlation between the PLL adjustment step size and the damping ratio showing a reversal trend are continuously accumulated. The number of times the damping ratio shows a reversal trend among the total number of times the PLL adjustment step size exceeds the step size threshold is taken as the first occurrence frequency. Simultaneously, the number of times the damping ratio shows a reversal trend among the total number of times the PLL adjustment step size does not exceed the step size threshold is taken as the second occurrence frequency. The total number of times the phase-locked loop (PLL) adjustment step size exceeds the step size threshold is the number of times the PLL adjustment step size value is greater than the step size threshold. The total number of times the PLL adjustment step size does not exceed the step size threshold is the number of times the PLL adjustment step size value is less than or equal to the step size threshold. The statistical process continues during the concurrent waiting phase. Each time a new set of corresponding records is added, the total number of times the PLL adjustment step size exceeds the step size threshold, the total number of times the PLL adjustment step size does not exceed the step size threshold, and the cumulative values ​​of the first and second occurrence frequencies are updated.

[0030] The first conditional probability is obtained by dividing the first occurrence frequency by the total number of times the PLL adjustment step size exceeds the step size threshold. This first conditional probability represents the probability that the damping ratio will reverse when the PLL adjustment step size exceeds the step size threshold. The second conditional probability is obtained by dividing the second occurrence frequency by the total number of times the PLL adjustment step size does not exceed the step size threshold. This second conditional probability represents the probability that the damping ratio will reverse when the PLL adjustment step size does not exceed the step size threshold. The calculation of the first and second conditional probabilities is repeated after each update of the cumulative value.

[0031] A preset probability mutation threshold is established to determine the significance of the difference between the first conditional probability and the second conditional probability. This threshold is determined based on the statistical distribution of the conditional probability difference when there is no coupling between the phase-locked loop (PLL) adjustment and the low-frequency oscillation component of the bus during the synchronization waiting phase of the permanent magnet synchronous motor. For example, the preset probability mutation threshold can be set to 1.5 or 2 times the maximum value of the difference between the first and second conditional probabilities during the statistical period when there is no coupling. The difference obtained by subtracting the second conditional probability from the first conditional probability is compared with the preset probability mutation threshold. When the difference exceeds the preset probability mutation threshold, the PLL adjustment is confirmed as the excitation source for oscillation damping attenuation. When the difference does not exceed the preset probability mutation threshold, the corresponding relationship records continue to be accumulated and the first and second conditional probabilities are updated until the synchronization waiting phase ends or the PLL adjustment is confirmed as the excitation source for oscillation damping attenuation.

[0032] In the specific implementation of S5, after confirming that the phase-locked loop (PLL) adjustment is the excitation source for oscillation damping attenuation, the inverter controller's digital signal processor writes a damping time constant value, larger than the current value, to the damping time constant register of the loop filter in the synchronous PLL. The damping time constant register of the loop filter in the synchronous PLL is a readable and writable storage unit. The damping time constant value stored in the register directly determines the suppression strength of the loop filter against high-frequency variation components in the PLL adjustment step sequence. Before increasing the damping time constant, the register stores a current value. This current value is the default damping time constant value written during PLL initialization when the permanent magnet synchronous motor enters the synchronization waiting phase after soft starting, or the damping time constant value written during the synchronization waiting phase due to the previous adjustment. The digital signal processor first reads the current value from the damping time constant register of the loop filter in the synchronous phase-locked loop (PLL). Then, it adds the current value to an increment to obtain the increased damping time constant value, or multiplies the current value by a gain coefficient to obtain the increased damping time constant value. Finally, it writes the increased damping time constant value back to the damping time constant register of the loop filter in the synchronous PLL, overwriting the current value. The increased damping time constant enhances the ability of the loop filter in the synchronous PLL to suppress high-frequency variation components in the PLL adjustment step sequence. The attenuation of higher-frequency fluctuation components in the PLL adjustment step sequence increases with the increase of the damping time constant, thereby reducing the low-frequency power disturbance amplitude on the DC bus caused by the repeated adjustment actions of the synchronous PLL due to low-frequency fluctuations in the power grid voltage, achieving the purpose of attenuating the low-frequency oscillation components of the bus.

[0033] The increased damping time constant value, written to the damping time constant register of the loop filter in the synchronous phase-locked loop (PLL), is progressively determined based on the abrupt changes in the first and second conditional probabilities when confirming the PLL's adjustment as an excitation source for oscillatory damping attenuation. The abrupt change amplitude is defined as the difference between the first and second conditional probabilities, calculated during the step of confirming the PLL's adjustment as an excitation source for oscillatory damping attenuation. A positive correlation is pre-established between the abrupt change amplitude and the increase in the damping time constant value. This positive correlation is established by dividing the abrupt change amplitude into multiple amplitude intervals from smallest to largest, with each interval corresponding to an increase. The larger the upper limit of the amplitude interval, the larger the corresponding increase. The amplitude intervals are divided based on integer multiples of a preset probability abrupt change threshold. For example, the amplitude intervals are divided into intervals greater than and less than twice the preset probability abrupt change threshold, intervals greater than or equal to twice the preset probability abrupt change threshold and less than three times the preset probability abrupt change threshold, and intervals greater than or equal to three times the preset probability abrupt change threshold. The corresponding increments are set as the product of the current value of the damping time constant and a proportional value. For example, the increment for the interval greater than the preset probability mutation threshold and less than twice the preset probability mutation threshold is the product of the current value of the damping time constant and the first proportional value. The increment for the interval greater than or equal to twice the preset probability mutation threshold and less than three times the preset probability mutation threshold is the product of the current value of the damping time constant and the second proportional value. The increment for the interval greater than or equal to three times the preset probability mutation threshold is the product of the current value of the damping time constant and the third proportional value. The first proportional value is less than the second proportional value and the third proportional value. For example, the first proportional value is 0.2, the second proportional value is 0.5, and the third proportional value is 1.0. When the phase-locked loop is adjusted to be the excitation source for oscillating damping attenuation, the calculated sudden change amplitude is compared with each sudden change amplitude interval to determine the sudden change amplitude interval into which the sudden change amplitude falls. Based on the determined sudden change amplitude interval, the corresponding increment is found. The current value of the damping time constant is added to the found increment to obtain the increased value of the damping time constant. Then, the increased value of the damping time constant is written into the damping time constant register of the loop filter in the synchronous phase-locked loop.

[0034] In the specific implementation of S6, after increasing the damping time constant of the loop filter in the synchronous phase-locked loop, the digital signal processor of the inverter controller continuously monitors the instantaneous amplitude of the low-frequency oscillation component of the bus. The low-frequency oscillation component of the bus is read from the data buffer storage area of ​​the inverter controller. The digital signal processor extracts the amplitude of the read low-frequency oscillation component by taking the absolute value of the sampled value of the low-frequency oscillation component at the current sampling time to obtain the instantaneous amplitude of the low-frequency oscillation component. The digital signal processor performs an instantaneous amplitude extraction operation once in each sampling period, and the instantaneous amplitude of the low-frequency oscillation component of the bus is updated synchronously with the sampled value of the low-frequency oscillation component of the bus.

[0035] A stability threshold is pre-set to determine whether the amplitude of the low-frequency oscillation component of the bus has decayed to a safe level that allows for synchronous switching. The stability threshold is set based on the statistical average amplitude of the residual fluctuation component in the inverter's DC bus voltage signal when the permanent magnet synchronous motor is operating in steady state under direct power supply from the power grid. During the initial installation and commissioning phase or periodic maintenance phase of the permanent magnet synchronous motor, it is switched to direct power supply from the power grid and enters steady-state operation. The inverter's DC bus voltage signal is collected, and the residual fluctuation component is extracted. The amplitude of the residual fluctuation component is statistically averaged to obtain its statistical mean. The stability threshold is set as the product of the statistical mean amplitude of the residual fluctuation component and a safety margin coefficient. The safety margin coefficient is determined based on the allowable upper limit of the switching inrush current; for example, the safety margin coefficient may be 1.5, 2.0, or 3.0.

[0036] The digital signal processor (DSP) compares the instantaneous amplitude of the low-frequency oscillation component (LVOC) extracted in each sampling period with a stability threshold. This comparison is performed immediately after the instantaneous amplitude of the LVOC is extracted in each sampling period. When the instantaneous amplitude of the LVOC is less than the stability threshold, a "below-amplitude" flag is generated, which is valid for the current sampling period. The DSP records the occurrence of the "below-amplitude" flag within multiple consecutive sliding time windows. The length of the sliding time window is the same as the length of the sliding time window used for window-by-window mode identification of the LVOC, and the sliding step size is also the same as the sliding step size used for window-by-window mode identification. The DSP maintains a continuous time window counter, which counts the number of complete sliding time windows through which the instantaneous amplitude of the LVOC remains below the stability threshold. When the instantaneous amplitude of the LVOC is below the stability threshold in all sampling periods within a sliding time window, the continuous time window counter is incremented by 1. When the instantaneous amplitude of the low-frequency oscillation component of the bus is greater than or equal to the stability threshold within at least one sampling period in a sliding time window, the continuous time window counter is reset to zero and restarts counting. The count value of the continuous time window counter represents the number of consecutive time windows in which the instantaneous amplitude of the low-frequency oscillation component of the bus is lower than the stability threshold in multiple consecutive sliding time windows.

[0037] A threshold number of continuous time windows is preset, which is used to determine the criterion that the low-frequency oscillation component of the bus has stabilized and decayed. The threshold number is determined based on the response delay time from the increase of the damping time constant of the permanent magnet synchronous motor to the start of decay of the amplitude of the low-frequency oscillation component of the bus, and the upper limit of the allowable switching wait time. The threshold number is set as the integer part of the quotient obtained by dividing the response delay time by the length of the sliding time window, plus an additional window number. The additional window number is determined based on the upper limit of the allowable switching wait time; for example, the additional window number can be 3, 5, or 7. When the count value of the continuous time window counter reaches the threshold number, it is confirmed that the amplitude of the low-frequency oscillation component of the bus has decreased to below the stabilization threshold and has remained stable for a sufficient duration. The inverter controller then generates a switching command.

[0038] After generating a switching command, the frequency converter controller first closes the power frequency contactor on the mains grid side, and then opens the frequency converter output contactor on the output side. The timing of the operation of the power frequency contactor and the frequency converter output contactor is controlled by the switching control signals output from the digital input / output interface of the frequency converter controller. The digital input / output interface first sends a closing control signal to the drive coil of the power frequency contactor. After the drive coil of the power frequency contactor is energized, the main contacts of the power frequency contactor close, and the stator winding of the permanent magnet synchronous motor is connected to the mains grid. After a preset dead time delay following the closing of the main contacts of the power frequency contactor, the digital input / output interface sends a disconnection control signal to the drive coil of the frequency converter output contactor. After the drive coil of the frequency converter output contactor is de-energized, the main contacts of the frequency converter output contactor open, and the stator winding of the permanent magnet synchronous motor is disconnected from the output terminal of the frequency converter. The preset dead time delay is determined based on the closing action time of the power frequency contactor and the opening action time of the inverter output contactor. For example, the preset dead time delay is set to the closing action time of the power frequency contactor plus a safety margin, which can be 5 milliseconds, 10 milliseconds, or 15 milliseconds. After the power frequency contactor closes and the inverter output contactor opens, the synchronous switching of the permanent magnet synchronous motor from inverter power supply to the power frequency grid is completed.

[0039] Example 2: Figure 2 A schematic diagram of a permanent magnet motor switching protection system based on busbar stability is provided according to the present invention. The system includes the following modules: The signal acquisition module is used to acquire the inverter DC bus voltage signal when the inverter drives the permanent magnet synchronous motor to complete the soft start and enter the synchronization waiting stage. The oscillation extraction module is used to extract the low-frequency oscillation component of the inverter DC bus voltage signal; The trend determination module is used to perform window-by-window mode identification of the low-frequency oscillation component of the bus and extract the damping ratio sequence of the oscillation mode. When the reversal trend of the damping ratio sequence indicates that the dissipation capacity of the oscillation mode is continuously decreasing and the damping ratio is still positive, it is determined that the damping ratio has a reversal trend. The excitation confirmation module is used to obtain the conditional probability that the damping ratio will reverse under the condition that the phase-locked loop adjustment step size exceeds the step size threshold. When the change amplitude of the conditional probability relative to the conditional probability when the phase-locked loop adjustment step size does not exceed the step size threshold exceeds the preset probability change threshold, the phase-locked loop adjustment is confirmed as the excitation source for oscillation damping decay. The damping adjustment module is used to increase the damping time constant of the loop filter in the synchronous phase-locked loop to attenuate the low-frequency oscillation component of the bus when it is confirmed that the phase-locked loop adjustment is the excitation source for oscillation damping attenuation. The switching execution module is used to perform synchronous switching of the permanent magnet synchronous motor from variable frequency power supply to power grid after the amplitude of the low frequency oscillation component of the bus drops below the stable threshold.

[0040] All calculations involved in the embodiments are dimensionless numerical calculations, and the preset parameters and thresholds in the calculations are set by those skilled in the art according to the actual situation.

[0041] The above embodiments can be implemented, in whole or in part, by software, hardware, firmware, or any other combination thereof. When implemented using software, the above embodiments can be implemented, in whole or in part, in the form of a computer program product.

[0042] Those skilled in the art will recognize that the modules and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and inventive constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0043] In addition, the functional modules in the various embodiments of this application can be integrated into one processing module, or each module can exist physically separately, or two or more modules can be integrated into one module.

[0044] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of modules is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple modules or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or modules may be electrical, mechanical, or other forms.

[0045] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

[0046] In conclusion, the above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for switching protection of a permanent magnet motor based on busbar stability, characterized in that, Includes the following steps: S1: When the inverter drives the permanent magnet synchronous motor to complete the soft start and enter the synchronization waiting stage, the inverter DC bus voltage signal is collected. S2: Extract the low-frequency oscillation component of the bus from the inverter DC bus voltage signal; S3: Perform window-by-window mode identification on the low-frequency oscillation component of the bus to extract the damping ratio sequence of the oscillation mode. When the reversal trend of the damping ratio sequence indicates that the dissipation capacity of the oscillation mode continues to decay and the damping ratio is still positive, it is determined that the damping ratio has a reversal trend. S4: Obtain the conditional probability that the damping ratio reverses when the phase-locked loop adjustment step size exceeds the step size threshold. When the abrupt change of the conditional probability relative to the conditional probability when the phase-locked loop adjustment step size does not exceed the step size threshold exceeds the preset probability abrupt change threshold, confirm that the phase-locked loop adjustment is the excitation source for oscillation damping decay. S5: When it is confirmed that the phase-locked loop adjustment is the excitation source for oscillation damping attenuation, increase the damping time constant of the loop filter in the synchronous phase-locked loop to attenuate the low-frequency oscillation component of the bus. S6: After the amplitude of the low-frequency oscillation component of the bus drops below the stable threshold, the permanent magnet synchronous motor is switched from variable frequency power supply to the power frequency grid.

2. The method for switching protection of a permanent magnet motor based on busbar stability according to claim 1, characterized in that, S1 includes: During the process of synchronous phase-locked loop tracking and adjusting the phase of the power frequency grid, the voltage across the inverter DC bus capacitor is continuously sampled at a fixed sampling frequency to obtain the sampling sequence of the inverter DC bus voltage signal.

3. The method for switching protection of a permanent magnet motor based on busbar stability according to claim 1, characterized in that, S2 include: Bandpass filtering is applied to the sampling sequence of the inverter DC bus voltage signal; The passband frequency range of the bandpass filter covers the subsynchronous oscillation frequency band of the power grid and the electromechanical oscillation frequency band caused by synchronous regulation; The low-frequency oscillation component of the DC bus, which characterizes the low-frequency power disturbance of the DC bus, is separated from the bandpass filtered signal.

4. The method for switching protection of a permanent magnet motor based on busbar stability according to claim 1, characterized in that, S3 include: Slide a time window on the low-frequency oscillation component of the bus, identify the mode parameters of the signal in each time window, obtain the oscillation mode damping ratio corresponding to each time window, and arrange the oscillation mode damping ratios of each time window in chronological order to form a damping ratio sequence. The damping ratio is determined to have a reversal trend when the difference between adjacent damping ratios in the damping ratio sequence is performed. This is done when multiple consecutive difference values ​​are negative and all damping ratios in the corresponding damping ratio sequence are positive.

5. The method for switching protection of a permanent magnet motor based on busbar stability according to claim 4, characterized in that, When performing difference operations on adjacent damping ratios in the damping ratio sequence, the least squares linear fitting method is used to estimate the slope of multiple consecutive damping ratios in the damping ratio sequence. When the slope of the fitted line is negative for multiple consecutive sliding time windows and all damping ratios in the damping ratio sequence are still positive within each sliding time window, it is determined that the damping ratio has a reversal trend. The number of consecutive damping ratios selected when estimating the slope is consistent with the window length of the sliding time window, and the slope of the fitted line characterizes the decay rate of the oscillation mode dissipation capability.

6. The method for switching protection of a permanent magnet motor based on busbar stability according to claim 1, characterized in that, S4 include: Record the correspondence between the adjustment step size of each phase-locked loop adjustment and the reversal trend of the damping ratio. Calculate the frequency of the first occurrence of the damping ratio reversal trend in the total number of times the phase-locked loop adjustment step size exceeds the step size threshold, and the frequency of the second occurrence of the damping ratio reversal trend in the total number of times the phase-locked loop adjustment step size does not exceed the step size threshold. The first conditional probability is obtained by dividing the first occurrence frequency by the total number of times the corresponding phase-locked loop adjustment step size exceeds the step size threshold, and the second occurrence frequency is obtained by dividing the corresponding phase-locked loop adjustment step size not exceeding the step size threshold. When the difference between the first conditional probability and the second conditional probability exceeds the preset probability mutation threshold, the phase-locked loop is confirmed to be the excitation source for oscillation damping attenuation.

7. The method for switching protection of a permanent magnet motor based on busbar stability according to claim 1, characterized in that, S5 include: After confirming that the phase-locked loop (PLL) adjustment is the excitation source for oscillation damping attenuation, a damping time constant value larger than the current value is written to the damping time constant register of the loop filter in the synchronous PLL. The increased damping time constant enhances the loop filter's ability to suppress high-frequency variation components in the PLL adjustment step sequence.

8. The method for switching protection of a permanent magnet motor based on busbar stability according to claim 7, characterized in that, The increased damping time constant value written to the damping time constant register of the loop filter in the synchronous phase-locked loop is progressively determined based on the abrupt change amplitude of the first conditional probability and the second conditional probability when the phase-locked loop is confirmed to be adjusted as the excitation source of oscillation damping attenuation. The larger the abrupt change amplitude, the larger the increase in the damping time constant value. There is a positive correlation between the increase and the abrupt change amplitude.

9. A method for switching protection of a permanent magnet motor based on busbar stability according to claim 1, characterized in that, S6 include: The instantaneous amplitude of the low-frequency oscillation component of the busbar after the damping time constant is continuously monitored. The instantaneous amplitude is compared with the stability threshold. When the instantaneous amplitude is lower than the stability threshold in multiple consecutive sliding time windows, the power frequency contactor is closed and the inverter output contactor is disconnected to complete the synchronous switching of the permanent magnet synchronous motor from the inverter power supply to the power frequency grid.

10. A permanent magnet motor switching protection system based on busbar stability, used to implement the permanent magnet motor switching protection method based on busbar stability as described in any one of claims 1-9, characterized in that, Includes the following modules: The signal acquisition module is used to acquire the inverter DC bus voltage signal when the inverter drives the permanent magnet synchronous motor to complete the soft start and enter the synchronization waiting stage. The oscillation extraction module is used to extract the low-frequency oscillation component of the inverter DC bus voltage signal; The trend determination module is used to perform window-by-window mode identification of the low-frequency oscillation component of the bus and extract the damping ratio sequence of the oscillation mode. When the reversal trend of the damping ratio sequence indicates that the dissipation capacity of the oscillation mode is continuously decreasing and the damping ratio is still positive, it is determined that the damping ratio has a reversal trend. The excitation confirmation module is used to obtain the conditional probability that the damping ratio will reverse under the condition that the phase-locked loop adjustment step size exceeds the step size threshold. When the change amplitude of the conditional probability relative to the conditional probability when the phase-locked loop adjustment step size does not exceed the step size threshold exceeds the preset probability change threshold, the phase-locked loop adjustment is confirmed as the excitation source for oscillation damping decay. The damping adjustment module is used to increase the damping time constant of the loop filter in the synchronous phase-locked loop to attenuate the low-frequency oscillation component of the bus when it is confirmed that the phase-locked loop adjustment is the excitation source for oscillation damping attenuation. The switching execution module is used to perform synchronous switching of the permanent magnet synchronous motor from variable frequency power supply to power grid after the amplitude of the low frequency oscillation component of the bus drops below the stable threshold.

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