A dual-mode timing control method and system for bypass switching of a high-voltage frequency converter
Patent Information
- Application Number
- CN202610774120.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-06-01
- Publication Date
- 2026-08-21
AI Technical Summary
并联运行期间若同步条件超限,会产生有功或无功环流,触发过流保护导致切换失败
[0098](6)参数存储模块:存储实测的时序参数、
、
。
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Figure CN122621085A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of high-voltage frequency converter control technology, and in particular to a dual-mode timing control method and system for bypass switching of high-voltage frequency converters. Background Technology
[0002] After completing the soft start of the motor, the cascaded high-voltage frequency converter needs to switch the motor load from the frequency converter output to direct grid supply in order to reduce operating losses and extend the service life of the power unit. This switching process involves the timing coordination of the frequency converter output contactor and the bypass contactor, and the current surge at the switching moment directly affects the contactor life and the motor's operating stability.
[0003] In existing technologies, bypass switching typically employs a fixed timing pattern: after the inverter output synchronizes with the grid, the bypass contactor is closed first; after the contactor has engaged, the inverter's PWM output is blocked and the inverter contactor is disconnected. This method involves a time window during the switching process where the inverter operates in parallel with the grid. This requires the inverter output to maintain continuous synchronization with the grid in frequency, amplitude, and phase during the parallel operation, placing high demands on the accuracy of the phase-locked loop (PLL) control. If synchronization conditions are exceeded during parallel operation, active or reactive circulating currents may be generated, triggering overcurrent protection and causing switching failure.
[0004] For applications with strict on-site switching time requirements (e.g., ≤10ms), the total switching time of the above parallel transition mode (typically 80~100ms) cannot meet the requirements. Although the switching time can be shortened by first blocking the inverter and then closing the bypass contactor, in the topology of the H-bridge cascaded output with an inductor connected in series, after blocking the PWM, the inductor freewheeling current maintains continuous current, and there is still residual current on the inverter side when the bypass contactor closes. The closing impact depends on the difference between the residual current and the grid current. If the phase of the blocking time is inappropriate, the impact current may exceed the rated value of the contactor.
[0005] Furthermore, in existing technologies, key parameters such as the contactor's mechanical action delay time and the inductor's freewheeling decay time are typically based on empirical values or typical values from device datasheets, without being measured and adaptively tuned for actual hardware. This leads to deviations between timing parameters and actual operating conditions, increasing switching risks. Existing technologies also lack a systematic design for the delay of the PWM lockout moment relative to the current zero-crossing point, and lack a basis for determining this delay parameter and an analysis of its technical effects.
[0006] Therefore, a bypass switching control method is needed that can adaptively select the switching mode according to the on-site switching time requirements, take into account both the needs of fast switching and smooth switching while ensuring that the switching impact is controllable, and can perform actual measurement and tuning of key timing parameters (including zero-crossing delay parameters). Summary of the Invention
[0007] The purpose of this invention is to provide a dual-mode timing control method for bypass switching of high-voltage frequency converters. This method allows for flexible selection between fast and smooth switching, and the key timing parameters are tuned based on actual hardware measurements, while also taking into account the effects of switching time and switching impact.
[0008] The above-mentioned technical objective of the present invention is achieved through the following technical solution:
[0009] This invention provides a dual-mode timing control method for bypass switching of a high-voltage frequency converter, comprising the following steps:
[0010] Step S1: Switching mode selection. Based on the preset switching time threshold T... th Select the switching mode. The mode selection criterion is:
[0011]
[0012]
[0013] In the formula, The system-allowed switching time, in milliseconds; This is the switching time threshold, in milliseconds (ms). The calculation formula is:
[0014]
[0015] In the formula, The measured value of the bypass contactor's engagement delay is given in milliseconds (ms). n This represents the time margin, with a value ranging from 10 to 30 ms.
[0016] Step S2: Synchronization Condition Determination. Before performing the switchover, the synchronization status between the inverter output and the power grid must be continuously monitored. The determination conditions are as follows:
[0017] Judgment condition 1:
[0018] The expression for frequency range:
[0019]
[0020] In the formula, The inverter output frequency, in Hz; The lower limit of the frequency is set at 49.0 Hz. The upper limit of the frequency is set at 50.5Hz.
[0021] Judgment condition 2:
[0022] The expression for voltage deviation:
[0023]
[0024] In the formula, The effective value of the inverter output voltage, in V; This is the effective value of the grid voltage, in V. This is the allowable voltage deviation value, taken as 0.03 (i.e., 3%).
[0025] Judgment condition 3:
[0026] The expression for phase difference:
[0027]
[0028] In the formula, Phase difference between the inverter output voltage and the mains voltage, in degrees (°). This is the allowable phase difference value, which is 5°.
[0029] Synchronous confirmation conditions: The above three conditions must be met consecutively for a period of time. ≥10ms is considered to meet the synchronization condition, where Synchronization time, unit: ms.
[0030] Table 1 below shows the synchronization judgment parameter table:
[0031] Table 1 Synchronization Judgment Parameter Table
[0032]
[0033] Step S3: Execution of the "Match First, Disconnect Later" Mode (Mode 1). When the "Match First, Disconnect Later" mode is selected, the following timing sequence is followed:
[0034] (1) At time t0: The controller issues a bypass contactor closing command.
[0035] (2) t0~t1 stage: waiting for the bypass contactor to engage, duration is:
[0036]
[0037] During this phase, the frequency converter maintains output synchronization with the power grid and monitors synchronization conditions in real time. If any condition exceeds the limit, the switching process is terminated and an alarm signal is issued.
[0038] (3) At time t1: Read the closing signal of the auxiliary contact of the bypass contactor, and proceed to the next stage after confirming that the signal is valid.
[0039] (4) t1~t2 stage: Detect the zero-crossing point of the inverter output current. The following criteria are used for zero-crossing point detection:
[0040]
[0041] In the formula, The instantaneous value of the output current at the current sampling moment, in A; The instantaneous value of the output current at the previous sampling time, in A.
[0042] Delay after zero crossing detected Execute the PWM blocking instruction:
[0043]
[0044] In the formula, The value range is 50~200μs.
[0045] (5) t2~t3 stage: waiting for the inductor freewheeling current to decay, the duration is:
[0046]
[0047] In the formula, The measured freewheeling decay time is expressed in milliseconds (ms).
[0048] (6) At time t3: Detect the effective value of the inverter output current. When the following conditions are met, issue an inverter contactor disconnection command:
[0049]
[0050] In the formula, The effective value of the inverter output current, in A; Rated current of the frequency converter, unit: A; This is the current threshold coefficient, with a value ranging from 0.03 to 0.08.
[0051] Step S4: Execution of the break-then-make mode (Mode 2). When the break-then-make mode is selected, the following timing sequence is followed:
[0052] (1) At time t0: Detect the zero-crossing point of the inverter output current. Use the same zero-crossing detection criterion as in step S3. After detecting the zero-crossing point, delay... Execute the PWM lockout instruction.
[0053] (2) t0~t1 stage: Read the power unit status feedback through the communication interface to confirm that all units have completed PWM blocking. Set the confirmation timeout:
[0054]
[0055] (3) At time t1: Issue the bypass contactor closing command.
[0056] (4) t1~t2 stage: waiting for the bypass contactor to engage, the duration is the measured value. e During this stage, the inductor's freewheeling current naturally decreases.
[0057] (5) At time t2: Confirm that the bypass contactor auxiliary contact closure signal is valid and the switching is complete.
[0058] Table 2 below shows the timing control parameters:
[0059] Table 2 Timing Control Parameters
[0060]
[0061] Step S5: Measure key timing parameters. Before system commissioning, measure the following parameters and write them to the controller's non-volatile memory:
[0062] Measured parameter 1: Bypass contactor engagement delay Measurement method: The time interval from the output of the closing command to the closing of the auxiliary contact is measured using an oscilloscope or logic analyzer. The measurement is repeated 10 times and the average value is taken.
[0063] Measured parameter 2: Inverter contactor breaking delay Measurement method: The contact status is determined by the main circuit current signal based on the time interval from the output of the disconnection command to the opening of the main contacts. The measurement is repeated 10 times and the average value is taken.
[0064] Measured parameter 3: Inductor freewheeling decay time Measurement method: From PWM shutdown to output current drop to rated value. The measurement was performed at intervals of 10 times, under rated load conditions, and repeated 5 times to obtain the average value.
[0065] Table 3 below shows the measured parameter record table:
[0066] Table 3 Record of Measured Parameters
[0067]
[0068] The present invention also provides a system for implementing the above method, comprising:
[0069] Step S6: Zero-crossing delay parameter The determination of [the target] and its technical purpose.
[0070] Zero-crossing delay parameter Defined as: the delay time between the moment the current zero-crossing signal is detected and the moment the IGBT blocking command is executed. The value of is composed of the following three parts:
[0071] = + +
[0072] In the formula, Zero-crossing detection response time, in μs; The unit for blocking command communication transmission time is μs; Safety margin time, unit: μs.
[0073] (1) Zero-crossing detection response time The determination
[0074] The zero-crossing detection response time is jointly determined by the secondary side filtering delay of the current transformer, the AD sampling period, and the zero-crossing discrimination algorithm. This invention employs a continuous N-point (N≥2) sign change criterion, meaning that a zero-crossing event is confirmed only after the current sign has flipped at N consecutive sampling points, thus avoiding false judgments caused by noise. At the sampling frequency... Under the conditions:
[0075] =N /
[0076] when When =10kHz and N=2, =200μs; when =20kHz, N=3 =150μs.
[0077] (2) Blocking command communication transmission time The determination
[0078] It depends on the controller architecture. For a DSP+FPGA two-layer architecture, Includes SPI bus transmission time and FPGA instruction parsing time:
[0079] = / +
[0080] In the formula, The instruction frame length (in bits). This is the SPI clock frequency (Hz). FPGA resolution time (μs).
[0081] when =32bit =10MHz =5μs, =3.2+5=8.2μs, rounded to 10μs.
[0082] (3) Safety margin time The determination
[0083] The safety margin compensates for the following uncertainties: phase deviation between the zero-crossing detection time and the actual current zero-crossing time, device parameter temperature drift, and controller interrupt response jitter. The value range is 10~50μs.
[0084] (4) Typical values
[0085] In summary, the above three parts The typical value range is 50~200μs. For a system with a sampling frequency of 10kHz and a DSP+FPGA architecture, the typical value is:
[0086] =200+10+40=250μs (When taking the upper limit of 200μs, the actual system should be trimmed accordingly).
[0087] In actual engineering, The setting is determined by the following method: Before the system is put into operation, perform multiple trial switching (without actually closing the bypass contactor) under rated load conditions, record the time difference from the zero-crossing detection signal to the actual IGBT turn-off, take the maximum value and add 20% margin as the final setting value.
[0088] (5) Set zero-crossing delay Technical objectives
[0089] Set to zero latency The following three technical effects will be achieved:
[0090] First, suppress the current surge when the bypass contactor closes. In the break-before-close mode, after PWM blocking, the inductor freewheeling current begins to decay from the instantaneous current value at the moment of blocking. If the blocking moment happens to be near the current peak, the initial freewheeling current value is large and the decay time is long, resulting in a high residual current when the bypass contactor closes, leading to a large closing surge. This is achieved by delaying the closing time near the zero-crossing point. The subsequent blocking makes the instantaneous current at the moment of blocking close to zero, the initial value of the freewheeling current is extremely small, and the current rapidly decays to a negligible level, thereby enabling the bypass contactor to close under near-zero current conditions and significantly reducing the inrush current.
[0091] Second, suppress bus voltage spikes during IGBT turn-off. When the IGBT hard-turns off at the current peak, the stray inductance L in the main circuit... σ The induced voltage generated is u=L σ• di / dt, this voltage spike superimposed on the DC bus voltage, may cause overvoltage damage to the device or trigger malfunctions of the protection system. When turning off near the zero crossing, because the initial current value is close to zero, the amplitude of di / dt is significantly reduced, and the voltage spike is reduced synchronously, improving the safety margin of the device.
[0092] Third, it reduces the arc energy of the contactor contacts, thus extending the contactor's service life. The arc energy generated by the contactor contacts at the moment of closing or opening is proportional to the square of the current flowing through them (W). arc ∝I²). When operating near the zero point, the current between the contacts is close to zero, the arc energy is reduced by more than two orders of magnitude, significantly reducing contact erosion and extending the mechanical life of the contactor.
[0093] (1) Main controller: performs switching mode selection, synchronization condition judgment, and timing state machine;
[0094] (2) Synchronous detection module: Collects grid voltage and inverter output voltage, and calculates frequency difference, amplitude difference and phase difference;
[0095] (3) Current detection module: collects the output current of the frequency converter and provides zero-crossing signal and effective value;
[0096] (4) Contactor drive module: outputs the opening / closing commands of the bypass contactor and the inverter contactor, and collects the status of the auxiliary contacts;
[0097] (5) PWM blocking interface: sends a blocking command to the power unit and receives the blocking confirmation status;
[0098] (6) Parameter storage module: Stores the measured timing parameters , , .
[0099] The beneficial effects of this invention are as follows: By providing two selectable switching modes, this invention controls the switching impact while meeting different switching time requirements; the "make first, then disconnect" mode utilizes parallel transition to ensure smooth switching, suitable for occasions where longer switching times are permissible; the "disconnect first, then make" mode reduces residual current through zero-crossing blocking, shortening the switching time while keeping the closing impact within an acceptable range. Through actual measurements of contactor action delay and inductor freewheeling decay time, the timing parameters are matched with the actual hardware, reducing the switching risk caused by parameter deviations. Attached Figure Description
[0100] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0101] Figure 1 This is a flowchart of the dual-mode bypass switching of the high-voltage frequency converter of the present invention.
[0102] Figure 2 This is a schematic diagram of the high-voltage frequency converter bypass switching control system of the present invention.
[0103] Figure 3 This is the timing diagram of the first-close-then-disconnect mode of the present invention.
[0104] Figure 4 This is the timing diagram of the break-then-reconnect mode of the present invention. Detailed Implementation
[0105] The technical solution of the present invention will now be clearly and completely described with reference to specific embodiments. Obviously, the described embodiments are merely some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.
[0106] like Figure 1 The diagram shown is a flowchart of the dual-mode bypass switching of a high-voltage frequency converter, illustrating the complete process from switching initiation, mode selection, synchronization judgment, timing execution to switching completion, including judgment branches and exception handling paths.
[0107] analyze Figure 1 It can be seen that the main process of the method of the present invention is as follows:
[0108] Step 1: Receive the switch startup command;
[0109] Step 2: Read the system's allowed switching time ;
[0110] Step 3: Judgment and Relationship, select mode 1 or mode 2;
[0111] Step 4: Enter the synchronization condition judgment loop;
[0112] Step 5: Continuously monitor the three conditions: frequency, voltage, and phase; if these conditions are continuously met... Time, enter the corresponding mode for sequential execution;
[0113] Step 6: Confirm the status switch after execution;
[0114] Step 7: Output switching complete signal
[0115] analyze Figure 1 The exception handling branch is known to be:
[0116] Step 1: Synchronization condition timeout (not met within 5 seconds) → Abort handover, alarm;
[0117] Step 2: Synchronization conditions exceed limits during handover → handover aborted, alarm triggered;
[0118] Step 3: Auxiliary contact feedback timeout → Fault handling, alarm;
[0119] Step 4: Power unit feedback timeout → Fault handling, alarm.
[0120] Therefore, Figure 1 The complete operation process of dual-mode switching is demonstrated. After receiving the switching initiation command, the system reads the allowed switching time. Compare it with the time threshold The system compares these parameters and selects either the synchronization switching mode or the current zero-crossing mode accordingly. After entering mode selection, a synchronization condition judgment loop is initiated, continuously monitoring three parameters: frequency difference, voltage amplitude difference, and phase difference. The system will activate when all three parameters continuously meet the set time. Then, the timing state machine enters the corresponding mode to execute the contactor switching action. After the switching action is completed, the switching status is confirmed through auxiliary contact feedback, and a switching completion signal is output. The process includes four types of abnormal handling branches: switching is aborted and an alarm is triggered if the synchronization condition is not met within 5 seconds during the waiting phase; switching is aborted and an alarm is triggered if the synchronization condition exceeds the limit during the switching process; fault handling is initiated and an alarm is triggered if the auxiliary contact feedback times out; and fault handling is initiated and an alarm is triggered if the power unit blocking confirmation feedback times out. Each abnormal branch has a retry judgment node, which selects to return to restart or exit the alarm according to the actual situation.
[0121] This technical solution adopts a dual-mode design, selects an appropriate switching sequence according to the actual working conditions, controls the waiting time with measured parameters, and confirms the status through multiple feedbacks, so as to adapt to different switching time requirements and load characteristics.
[0122] like Figure 2 The diagram shows the structure of the bypass switching control system for a high-voltage frequency converter, illustrating the connection relationships and signal flow between the controller, power unit, frequency converter contactor, bypass contactor, auxiliary contacts, current detection unit, and voltage detection unit.
[0123] The control system's module composition and signal connections are as follows: The main controller is centrally located, responsible for mode selection, synchronization judgment, and the operation of the timing state machine. The voltage detection unit, current detection module, and synchronization detection module on the left collect the grid voltage, inverter output voltage, output current, and zero-crossing signal, respectively, and calculate the frequency difference, amplitude difference, and phase difference before transmitting them to the main controller. The contactor drive module on the right receives the main controller's closing / opening commands, controls the operation of the bypass contactor and inverter contactor, and simultaneously feeds back the auxiliary contact status to the main controller. The PWM blocking interface sends blocking commands to the power unit and receives blocking confirmation status. The parameter storage module reads and writes measured timing parameters with the main controller. All modules form a closed-loop control system through detection signals, control commands, and status feedback, supporting the execution of dual-mode timing.
[0124] like Figure 3 The timing diagram for the "make-then-break" mode shown illustrates the control signals, contactor states, current changes, and time relationships at times t0 to t3. The horizontal axis represents time, and the vertical axis, from top to bottom, represents: bypass contactor command, bypass contactor auxiliary contact state, inverter contactor command, PWM blocking signal, and output current waveform. The parameters involved are:
[0125] t0 (closing command): 0.00ms
[0126] t1 (contactor closed): 80.00ms
[0127] - 80.00ms
[0128] Zero crossing detection time: 85.00ms
[0129] t2 (PWM off): 85.10ms
[0130] - 0.100ms
[0131] t3 (contactor breaking): 91.10ms
[0132] - 6.00ms
[0133] Current threshold: 5.00A (5.0% of rated current)
[0134] Total switching time: 91.10ms
[0135] Based on the timing parameters of the pre-connection-after-disconnection mode and combined with Figure 3 see, Figure 3 The timing control method for the "close first, disconnect later" mode demonstrated is as follows: first, a closing command is issued to the bypass contactor, and then the contactor is waited for to complete its engagement (the duration is the actual measured value). After confirming closure via auxiliary contact signal, the output current is detected at zero-crossing point and delayed. Then the PWM is blocked, and then the inductor freewheeling current is allowed to decay to below the set threshold (the duration is measured in the actual test). Finally, the inverter contactor disconnection command is issued. This timing sequence ensures that the bypass path is established first, the inverter side disconnects near the current zero-crossing point, and the inverter contactor is disconnected after the freewheeling decay is completed. The waiting time at each stage is controlled by measured parameters, and the status is confirmed by auxiliary contact feedback and current detection.
[0136] like Figure 4 The diagram shown is a timing diagram for the disconnect-then-make mode, displaying the control signals, contactor states, current changes, and time relationships at each time point t0 to t2. The horizontal axis represents time, and the vertical axis, from top to bottom, represents: PWM blocking signal, power unit feedback signal, bypass contactor command, bypass contactor auxiliary contact state, and output current waveform. The parameters involved are:
[0137] Zero crossing detection time: 0.00ms
[0138] t0 (PWM lockout): 0.15ms
[0139] - 0.150ms
[0140] t1 (blocking confirmation / closing command): 1.65ms
[0141] - 1.50ms
[0142] t2 (Contactor Closure / Completion): 81.65ms
[0143] - 80.00ms
[0144] Total switching time: 81.65ms
[0145] PWM lockout to switching completion: 81.50ms
[0146] Based on the timing parameters of the disconnect-then-make mode and combined with Figure 4 see, Figure 4 The timing control method for the break-before-make mode demonstrated is as follows: detect the zero-crossing point of the output current and delay it. Then a PWM lockout command is issued, and the lockout completion is confirmed by reading the power unit status feedback (timeout period is...). After confirmation, a bypass contactor closing command is issued and the system waits for it to engage (the duration is the actual measured value). During this period, the inductor freewheeling current naturally decays, and finally the switching is completed by confirming the closing of the bypass contactor through the auxiliary contact signal. This timing ensures that the inverter PWM is first blocked near the current zero crossing point, and the bypass path is established only after confirmation by the power unit feedback. The waiting time at each stage is controlled by measured parameters, and the status is confirmed by the power unit feedback and the auxiliary contact feedback.
[0147] contrast Figure 3 and Figure 4 The following conclusions can be drawn: The operation sequence of the two modes is reversed. In the "make-then-disconnect" mode, the PWM is blocked and the inverter is disconnected only after the bypass path is established, thus maintaining a continuous current path. In the "disconnect-then-make" mode, the bypass path is established only after the PWM is blocked, resulting in a freewheeling decay stage. In the "make-then-disconnect" mode, the PWM is blocked after the bypass contactor closes at the zero-crossing point, and then the inverter contactor is disconnected after the freewheeling decays to the threshold. In the "disconnect-then-make" mode, the PWM is blocked near the zero-crossing point and confirmed by feedback from the power unit, and then the bypass contactor is engaged during the freewheeling decay process. The two modes have different status confirmation methods. The "make-then-disconnect" mode relies on auxiliary contact feedback and current detection, while the "disconnect-then-make" mode adds a power unit status feedback confirmation step. The choice of which mode to use depends on the load's requirements for current continuity and the specific operating conditions of the system.
[0148] Example 1: Switching between make-before-break mode in a 10kV / 1200kW cascaded frequency converter
[0149] (I) System Configuration and Technical Parameters
[0150] This embodiment uses a cascaded high-voltage frequency converter with a voltage level of 10kV and a rated power of 1200kW. The topology is a single-phase 8-unit cascaded configuration, with an output inductor connected in series on the output side of each phase, and the inductance is 3mH. The application is a soft-start system for water pumps, and the process requires that the switching time not exceed 100ms, and the inrush current during the switching process must be controlled within 1.2 times the rated current.
[0151] Rated current The calculation is as follows:
[0152]
[0153] In the formula, Rated power (kW) The rated line voltage (kV) Rated line current (A).
[0154] The inductive reactance of the output inductor at the rated frequency of 50Hz for:
[0155]
[0156] In the formula, The power grid frequency (Hz) The output inductance (H) is 3mH. It is the inductive impedance (Ω).
[0157] (II) Measurement and setting of timing parameters
[0158] (1) Bypass contactor closing time test
[0159] A bypass contactor of model CJ40-630A with a rated current of 630A and a control voltage of DC110V was selected. The closing time was tested in a laboratory environment. The test method was as follows: the rated control voltage was applied across the contactor coil, and the rising edge of the control signal and the closing edge of the auxiliary contact DO signal were recorded simultaneously using an oscilloscope. The time difference between the two was the closing time.
[0160] Repeat the test 5 times and record the data as shown in Table S1-1 (for reference):
[0161] Table S1-1 records data
[0162]
[0163] Taking into account factors such as contactor contact aging, ambient temperature changes, and control voltage fluctuations, a 5ms margin was added to the maximum value of 79ms to finally determine the bypass contactor closing time parameter. for:
[0164]
[0165] In the formula, The closing time of the bypass contactor is in milliseconds (ms).
[0166] (2) Frequency converter contactor breaking time test
[0167] The inverter-side contactor is model CJ40-400A, with a rated current of 400A. During the breaking time test, a breaking command is issued with the contactor carrying its rated current. A high-speed camera, in conjunction with a current sensor, records the moment the main contacts physically open, thus measuring the breaking time. It is 32ms, that is:
[0168]
[0169] In the formula, The switching time of the inverter contactor is in milliseconds (ms).
[0170] (3) Current decay time test
[0171] When the inverter is operating under rated load, if the PWM signal is suddenly blocked, the output current decays exponentially due to the freewheeling current in the output inductor. A current decay threshold coefficient is set. That is, when the current decays to 5% of the rated value, it is determined that the decay is complete.
[0172] The current decay process conforms to the discharge characteristics of an RL circuit, and the theoretical decay time constant τ is:
[0173]
[0174] In the formula, The load equivalent resistance (Ω) is given.
[0175] Load equivalent resistance calculate:
[0176]
[0177] Time constant τ:
[0178]
[0179] Theoretical value of the time required for current to decay to 5% for:
[0180]
[0181] In actual testing, the time required for the current RMS value to drop to 5% of the rated value from PWM lockout was 6.2ms, significantly longer than the theoretical value. This is because the actual load is inductive, and parasitic capacitance exists between cascaded units, forming an LC resonant circuit, which prolongs the current decay time. Therefore, decay time Use the measured values, that is:
[0182]
[0183] In the formula, The current decay time is 1 / 2 m.
[0184] (4) Parameter storage
[0185] The above measured parameters were programmed into the internal Flash memory of the TMS320F28335 controller using the DSP development environment. The memory address allocation is shown in Table S1-2 below (for reference):
[0186] Table S1-2 Storage Address Allocation
[0187]
[0188] (III) Switching Mode Selection Logic
[0189] (1) Determination of time threshold
[0190] Based on the measured closing time of the bypass contactor ms, setting the time threshold for mode selection for:
[0191]
[0192] In the formula, This is a time margin (ms), with a value of 20ms.
[0193] (2) Mode selection criteria
[0194] System allows switching time The host computer issues the instructions based on the process requirements. In this embodiment, The mode selection logic is as follows:
[0195]
[0196] In this embodiment, ms Theoretically, synchronous switching mode should be selected for milliseconds (ms). However, considering the limitation of inrush current in practical applications (<1.2 times the rated current), if synchronous switching mode (disconnect first, then close) is used, a large inrush current may be caused by phase deviation at the moment the bypass contactor closes. Simulation calculations show that when the phase difference is 5°, the peak inrush current is approximately 1.35 times the rated current, exceeding the allowable range. Therefore, this embodiment adopts the zero-crossing current mode (close first, then disconnect), waiting for the current to decay to a low level before disconnecting the inverter contactor to avoid exceeding the inrush current limit.
[0197] (3) Switching time estimation
[0198] When using the "connect first, disconnect later" mode, the total switching time is... Includes the following stages:
[0199]
[0200] In the formula, This is the time (ms) to wait for the current to cross zero.
[0201] Current zero-crossing interval For half a power frequency cycle:
[0202]
[0203] In the worst case, Approximately 10ms. Therefore, the total switching time is... The estimate is:
[0204]
[0205] Estimated time The time limit of 100ms is exceeded, but this mode (make-before-break mode) is still used due to the inrush current limit.
[0206] (iv) Setting and monitoring of synchronization conditions
[0207] (1) Synchronization criterion parameters
[0208] The criteria parameters for the synchronization detection module are set as shown in Table S1-3 below:
[0209] Table S1-3 sets the criteria parameters for the synchronization detection module.
[0210]
[0211] (2) Frequency detection
[0212] The inverter output voltage is tracked in real time via a phase-locked loop module. and the frequency of the grid voltage Their calculation formulas are:
[0213]
[0214]
[0215] In the formula, The inverter output voltage phase (rad) The grid voltage phase (rad).
[0216] Inverter output voltage and the frequency of the grid voltage Criterion for meeting the conditions:
[0217]
[0218] (3) Voltage amplitude detection
[0219] Collect the instantaneous values of the three-phase voltage and calculate the voltage amplitude through dq transformation. The expression is:
[0220]
[0221] Voltage deviation The expression is:
[0222]
[0223] Voltage meets the condition criteria:
[0224]
[0225] (4) Phase difference detection
[0226] Calculate phase difference The expression is:
[0227]
[0228] Normalize the phase difference to Interval, phase satisfying condition criterion:
[0229]
[0230] (5) Synchronization process record
[0231] During the soft start process of the water pump, the inverter output frequency It rises according to a linear law, that is:
[0232]
[0233] In the formula, Hz is the starting frequency. Hz is the rated frequency. s is the frequency rise time.
[0234] When the frequency rises to 49.5Hz (approximately At time s), the synchronization detection module starts working. The phase-locked loop tracks the grid phase and adjusts the inverter output phase. After about 1.2s, the phase difference converges to... Within. Monitoring records show that from If the three conditions of frequency, voltage, and phase are met continuously for more than 10ms starting from s, the main controller sets the switching ready flag.
[0235] (v) The execution process of first combining and then disconnecting
[0236] (1) Detailed timing table
[0237] The detailed timing table is shown in Table S1-4 below:
[0238] Table S1-4 Detailed Timing Table
[0239]
[0240] (2) Analysis of critical moments
[0241] At t=0ms: The DSP controller outputs a high level to the bypass contactor drive module through the GPIO port, energizing the contactor coil. At this time, the inverter maintains normal output, with the effective current value being 98% of the rated value and the phase difference within ±3°.
[0242] t=0 to 84ms: During the contactor core engagement process, the phase-locked loop module continuously monitors the phase difference, recording a maximum offset of ±4.2°, which does not exceed the 5° threshold and meets the synchronization condition. The effective current value fluctuation range is 96%~99% of the rated value.
[0243] t=84ms: The auxiliary contact DO signal changes from low to high. The DSP detects this signal through the DI channel, confirming that the bypass contactor has engaged. At this time, the main contacts are closed, and the bypass branch is connected in parallel with the inverter branch for power supply.
[0244] t=84.3ms: The current detection module (sampling frequency 10kHz) captures the zero-crossing point of the A-phase current. After a 100μs delay (considering the FPGA instruction transmission time), the DSP sends a PWM blocking instruction to the FPGA.
[0245] From t=84.4 to 90.6 ms: All IGBTs in the power unit are turned off, and the output current forms a freewheeling loop through the load under the action of the 3mH output inductor. The effective value of the current decays exponentially, and the measured data of the decay curve matches the simulation curve well.
[0246] t=90.6ms: The effective value of the current drops to 4.8% of the rated value, which meets the requirements. Based on the criteria, the DSP issues a disconnect command for the inverter contactor.
[0247] t=90.6 to 122.6ms: The contactor performs the disconnection action, the main contacts physically open, the switching process is completed, and the load completes the conversion from inverter power supply to bypass power supply.
[0248] (vi) Verification of switching effect
[0249] (1) Current impulse test
[0250] Record the bypass side current waveform using an oscilloscope (sampling rate 100 kS / s). When ms is the PWM lockout time, the current amplitude jumps, with a jump amplitude of approximately 8%, corresponding to the inrush current multiple. for:
[0251]
[0252] RMS value of impulse current for:
[0253]
[0254] satisfy Technical requirements.
[0255] (2) Time switching verification
[0256] Actual switchover time point:
[0257] 1) From the issuance of the closing command to the PWM blocking: 84.4ms;
[0258] 2) PWM lockout until inverter contactor disconnection completes: 122.6 - 84.4 = 38.2 ms;
[0259] 3) Total switching time: 122.6ms.
[0260] Although it exceeded the allowable 100ms, it met the inrush current limit and did not trigger the system overcurrent protection (the overcurrent threshold is set to 1.5 times the rated current).
[0261] (3) Comparative analysis
[0262] The comparison results obtained from the analysis are shown in Table S1-5 below:
[0263] Comparison results in Table S1-5
[0264]
[0265] The actual total switching time was 9.6ms shorter than the estimated value. The main reason is that the actual waiting time for the current to cross zero was only 0.3ms, which is much less than the worst case of 10ms.
[0266] (VII) Conclusion
[0267] This embodiment verifies the application of the "make-before-disconnect" mode in bypass switching of a 10kV / 1200kW cascaded frequency converter. Key parameters such as contactor operating time and current decay time were determined through actual measurements, and synchronization criteria and timing control procedures were set accordingly. Actual measurement data during the switching process shows that the inrush current was controlled at 1.08 times the rated current, meeting process requirements, and no protection action was triggered; the switching process was continuous and controllable. This embodiment provides a reference for parameter setting and timing control for bypass switching of high-voltage frequency converters of similar voltage and power levels.
[0268] Example 2: Switching between disconnect-before-make mode in a 6kV / 800kW cascaded frequency converter
[0269] (I) System Configuration and Technical Parameters
[0270] This embodiment uses a cascaded high-voltage frequency converter with a voltage level of 6kV and a rated power of 800kW. The topology is a single-phase 5-unit cascaded configuration, with an output inductor connected in series on the output side of each phase, and the inductance is 2mH. The application is a soft-start system for wind turbines, and the contract technical requirements stipulate that the switching time should not exceed 10ms, and the inrush current during the switching process should be controlled within 1.5 times the rated current.
[0271] Rated current The calculation is as follows:
[0272]
[0273] In the formula, Rated power (kW) The rated line voltage (kV) Rated line current (A).
[0274] The inductive reactance of the output inductor at the rated frequency of 50Hz for:
[0275]
[0276] In the formula, The power grid frequency (Hz) For the output inductance (H), It is the inductive impedance (Ω).
[0277] Load equivalent resistance for:
[0278]
[0279] (II) Measurement and setting of timing parameters
[0280] (1) Bypass contactor closing time test
[0281] A bypass contactor of model CJ20-400A with a rated current of 400A and a control voltage of DC110V was selected. The test method was the same as in Example 1, using an oscilloscope to simultaneously record the control signal and the auxiliary contact DO signal. After multiple measurements, the maximum value was taken and a margin was added to determine the closing time parameter of the bypass contactor. for:
[0282]
[0283] In the formula, The closing time of the bypass contactor is in milliseconds (ms).
[0284] (2) Frequency converter contactor breaking time test
[0285] The inverter-side contactor performs a breaking action under rated current conditions; the actual breaking time is measured. for:
[0286]
[0287] In the formula, The switching time of the inverter contactor is in milliseconds (ms).
[0288] (3) Current decay time test
[0289] When the inverter is operating under rated load, if the PWM signal is suddenly blocked, the output current will decrease due to the freewheeling current in the output inductor. A current attenuation threshold coefficient is set. .
[0290] The theoretical value of the current decay time constant τ is:
[0291]
[0292] Theoretical value of the time required for the current to decay to 5%. for:
[0293]
[0294] In actual testing, the time required for the current to drop from PWM lockout to 5% of the rated value was 4.8ms, significantly greater than the theoretical value. This is because the wind turbine load has a large inertia, and parasitic parameters exist between cascaded units, forming a multi-order RC network, which prolongs the current decay process. Current decay time Use the measured values, that is:
[0295]
[0296] In the formula, The current decay time is 1 / 2 m.
[0297] (4) PWM lockout confirmation time test
[0298] This system adopts a DSP+FPGA dual-layer control architecture. After the DSP sends a PWM blocking command to the FPGA via the SPI bus, it needs to read the FPGA's uplink status frame to confirm the blocking status of all six power units. Actual measurement confirmation process:
[0299] 1) SPI bus clock frequency: 10MHz;
[0300] 2) Single status frame length: 32 bits;
[0301] 3) Polling period: 100μs;
[0302] 4) Confirmation time for setting all 6 unit status bits to 1: 0.8ms.
[0303] Considering communication jitter and software processing delays, set an acknowledgment time. for:
[0304]
[0305] In the formula, PWM lockout confirmation time (ms).
[0306] (5) Zero-crossing delay parameter The determination
[0307] According to the method described in step S6 of the present invention, the zero-crossing delay parameter of this embodiment is determined.
[0308] Zero-crossing detection response time The sampling frequency f of this system s =10kHz, zero-crossing detection uses the criterion of consecutive two-point sign change (N=2), then: =N / =2 / 10000=200μs=0.2ms;
[0309] Blocking command communication transmission time Given an SPI bus clock frequency of 10MHz, an instruction frame length of 32 bits, and an FPGA parsing time of approximately 5μs: =32 / (10×10 6 )+5×10⁻ 6 =3.2μs + 5μs = 8.2μs ≈ 10μs
[0310] Safety margin time Considering the interrupt response jitter (±15μs) and the phase delay of the current transformer (approximately 10μs) in this system, we take: =40μs;
[0311] Zero-crossing delay parameter calculate:
[0312] = + + =200 + 10 + 40 = 250 μs
[0313] Considering that in the actual system, after the zero-crossing detection signal is processed by the DSP interrupt service routine, some The time consumed in the interrupt response is actually the delay from zero-crossing detection confirmation to the issuance of the blocking command: (Actual) = 150μs
[0314] This value was verified using the following setting method: Five test blocks were performed under rated load operating conditions (without closing the bypass contactor). The time difference from the rising edge of the zero-crossing detection signal to the falling edge of the IGBT gate drive signal was recorded using an oscilloscope. The measured results are shown in Table S2-0 below:
[0315] Table S2-0 Zero-crossing Delay Measured Data
[0316]
[0317] Final setting =150μs. This delay ensures that the PWM lockout occurs approximately 150μs after the current zero-crossing point, at which time the instantaneous current value is approximately:
[0318] i( )= ·sin(2πf· =√2×77.0×sin(2π×50×150×10⁻) 6 )=108.9×sin(0.0471)=108.9×0.0471≈5.1A
[0319] That is, the instantaneous current at the moment of blocking is about 5.1A, which is only 4.7% of the rated peak value, close to zero, and meets the technical requirements of zero-crossing blocking.
[0320] The technical purpose of setting this zero-crossing delay is: 1) to make the instantaneous current value close to zero at the moment of PWM blocking, the initial value of freewheeling is extremely small, the current decays rapidly to a negligible level, the bypass contactor closes under near-zero current conditions, and the inrush current is greatly reduced; 2) to avoid the bus voltage spike generated by the hard turn-off of IGBT at the current peak, and improve the safety margin of the device; 3) to reduce the contactor contact arc energy and extend the mechanical life of the contactor.
[0321] (6) Parameter summary table
[0322] The parameter summary table is shown in Table S2-1 below:
[0323] Table S2-1 Parameter Summary Table
[0324]
[0325] (III) Switching Mode Selection Logic
[0326] (1) Determination of time threshold
[0327] Based on the measured closing time of the bypass contactor ms, setting the time threshold for mode selection for:
[0328]
[0329] In the formula, This is a time margin (ms), with a value of 20ms.
[0330] (2) Mode selection criteria
[0331] System allows switching time As determined by the contract's technical requirements, in this embodiment, The mode selection logic is as follows:
[0332]
[0333] In this embodiment, ms ms, select the break-then-reunite mode.
[0334] (3) Switching time estimation
[0335] When using the disconnect-then-reconnect mode, the total switching time is Includes the following stages:
[0336]
[0337] In the formula, The time (ms) to wait for the current to cross zero; This represents the instruction transmission delay (ms).
[0338] Interval between zero points of current This is half a power frequency cycle, that is:
[0339]
[0340] In the worst case, The total handover time is approximately 10ms, with a command transmission delay of about 0.15ms. The estimate is:
[0341]
[0342] Although this time exceeds the allowable 10ms, it is the shortest switching time achievable under current hardware conditions due to the limitations of the contactor's mechanical characteristics.
[0343] (4) Time comparison between the two modes
[0344] Table S2-2 below shows a time comparison table for the two modes:
[0345] Table S2-2 shows a time comparison table for the two modes.
[0346]
[0347] The disconnect-then-connect mode can shorten the switching time by about 23% compared to the connect-then-disconnect mode.
[0348] (iv) Setting and monitoring of synchronization conditions
[0349] (1) Synchronization criterion parameters
[0350] The criteria parameters for the synchronous detection module are set the same as in Example 1, as shown in Table S2-3 below:
[0351] Table S2-3 Criterion Parameters of Synchronous Detection Module
[0352]
[0353] (2) Synchronization process record
[0354] During the soft start process of the wind turbine, the inverter output frequency increases linearly, with a rise time of 30 seconds. When the frequency reaches 49.8Hz (approximately...),... At time s), the synchronization detection module starts working. The phase-locked loop tracks the grid phase and adjusts the inverter output phase. After about 1.5s, the phase difference converges to... Within. Monitoring records show that from If the three conditions of frequency, voltage, and phase are met continuously for more than 10ms starting from s, the main controller sets the switching ready flag.
[0355] (v) Execution process of first breaking and then combining
[0356] (1) Detailed timing table
[0357] The detailed timing table is shown in Table S2-4 below:
[0358] Table S2-4 Detailed Timing Table
[0359]
[0360] (2) Analysis of critical moments
[0361] t=0ms: The current detection module (sampling frequency 10kHz) detects the zero-crossing point of the A-phase current, at which point the instantaneous current value is less than 2A. The DSP determines that the synchronization condition is met and receives the switching start command, triggering the disconnect-then-make mode timing state machine.
[0362] t=0.15ms: The DSP delays by Δt after detecting the zero crossing. zero =150μs, the PWM lockout command is sent to the FPGA via the SPI bus. This delay ensures that the instantaneous current value is still near the zero-crossing point at the lockout moment (approximately 5.1A, 4.7% of the rated peak value), avoiding the generation of bus voltage spikes when turning off the IGBT at the current peak, and also keeping the initial value of the freewheeling current extremely small, which is beneficial for rapid current decay. The SPI bus operates in master mode with a clock frequency of 10MHz, and the transmission time of the 32-bit command frame is approximately 3.2μs. Including the DSP software processing and FPGA parsing time, the total delay is approximately 150μs.
[0363] From t=0.15 to 0.90ms: The DSP polls the FPGA uplink status frame at a period of 100μs, with each frame containing the blocking status bits of 6 power units. When all status bits are 1, the PWM blocking is confirmed to be complete. In actual testing, the confirmation was completed on the 8th poll (t=0.90ms).
[0364] t=1.15ms: After the blocking confirmation is completed, the DSP outputs a high level to the bypass contactor drive module through the GPIO port, and the contactor coil is energized and begins to engage. At this time, because the PWM is blocked near the zero crossing point, the initial freewheeling current is only about 5.1A, which has decreased to 3.8A after about 1ms of decay.
[0365] From t=1.15 to 63.15ms: The bypass contactor performs a mechanical engagement action, which lasts for approximately 62ms. During this period, since the PWM is blocked near the zero-crossing point, the initial value of the freewheeling current is extremely small, and the output current rapidly decays to a negligible level under the discharge law of the RL circuit.
[0366] The comparison between the measured data and the simulated curves of the current decay curve is shown in Table S2-5 below:
[0367] Table S2-5 Comparison of measured and simulated current decay curves
[0368]
[0369] Note: Since the blocking time is chosen near the zero crossing, the initial value of the freewheeling current is only 5.1A (4.7% of the rated peak value). Compared with blocking at the current peak (initial value 108.9A), the attenuation starting point is reduced by 95.3%, and the current decays to a negligible level within about 5ms.
[0370] t=63.15ms: The bypass contactor auxiliary contact DO signal is detected to change from low to high, confirming that the main contacts have closed. At this time, the inverter side current has decayed to near zero (≈0A), and the bypass side current is supplied by the power grid, completing the conversion from inverter power supply to bypass power supply.
[0371] (3) Comparative analysis of the effects of zero-crossing delay
[0372] To verify zero latency The technical effects are compared in the following two scenarios:
[0373] Scenario A: Blocking near the current zero-crossing point (in this embodiment, =150μs)
[0374] Instantaneous current at the moment of blocking: 5.1A
[0375] Residual current at bypass closing time (t=63.15ms): ≈0A
[0376] Closing inrush current multiple: 0.83 times the rated value
[0377] Scenario B: Assume blocking at the current peak (no zero-crossing delay control)
[0378] Instantaneous current at the moment of shutdown: 108.9A (rated peak value)
[0379] Freewheel decay time constant τ=L / R load =44.4μs, but the actual decay time is 4.8ms.
[0380] Residual current at bypass closing time (t=63.15ms): Since the decay time is much less than 62ms, the residual current is also close to zero.
[0381] However, the di / dt experienced by the IGBT increases significantly during the blockade, and the bus voltage spike increases.
[0382] Comparative conclusion: The core value of zero-crossing delay lies in reducing the current stress and bus voltage spike at the moment of IGBT turn-off, rather than merely reducing the residual current at the moment of closing (because the contactor operating time is much longer than the freewheeling decay time, the residual current at closing is close to zero in both cases). Specifically: IGBT turn-off voltage spike: Let the stray inductance L in the main circuit be... σ =0.5μH, when turned off at the peak current, di / dt≈108.9A / 1μs=108.9A / μs, voltage spike u=L σ ·di / dt=0.5×108.9=54.5V; when turning off near the zero crossing, di / dt≈5.1A / 1μs=5.1A / μs, and the voltage spike u=0.5×5.1=2.6V, which is reduced by 95.2%.
[0383] Contactor contact arc energy: In the make-before-break mode, at the moment the inverter contactor breaks, if the current has decayed to near zero, the contact arc energy W is... arc ∝I²≈0; If the peak value is broken, W arc ∝108.9²=11859 (relative value), the difference is significant.
[0384] (4) Timing Flowchart
[0385] The timing flow of the disconnect-then-reconnect mode can be described as follows:
[0386] 1) Receive the switch start command and enter the timing state machine;
[0387] 2) Wait for the current to cross zero-crossing detection signal;
[0388] 3) Delay after zero crossing detected =150μs, send PWM lockout command (purpose: to ensure that the current is close to zero at the lockout time and reduce the IGBT turn-off voltage spike).
[0389] 4) Poll the FPGA status frame and wait for confirmation that all cells are locked;
[0390] 5) After the blockade is confirmed, issue a bypass contactor closing command;
[0391] 6) Wait for the bypass contactor auxiliary contact to close;
[0392] 7) When a closing signal is detected, set the switching completion flag.
[0393] (vi) Verification of switching effect
[0394] (1) Current impulse test
[0395] Record the current waveform at the instant the bypass contactor closes (t=63.15ms) using an oscilloscope (sampling rate 100kS / s). The blocking time is chosen to be near the current zero-crossing point. =150μs), the initial value of the freewheeling current is only 5.1A. After 62ms of decay, the current is close to zero. The bypass contactor closes under near-zero current conditions with minimal impact.
[0396] Analysis of measured current waveform:
[0397] 1) Instantaneous current before closing: ≈0A (the freewheeling current on the inverter side has been completely attenuated);
[0398] 2) Peak current of the first cycle after closing the circuit breaker: 90.8A;
[0399] 3) Peak rated current: I rated,peak = √2×77.0 = 108.9A.
[0400] After the circuit breaker is closed, the current is directly supplied to the load from the power grid. The effective value corresponding to the first cycle peak value of 90.8A is:
[0401] I surge,rms = 90.8 / √2 = 64.2A
[0402] Impact current multiple k surge (Based on effective values) is:
[0403] k surge = I surge,rms / I rated = 64.2 / 77.0 = 0.83
[0404] This value is less than 1.0, indicating that the effective value of the current after closing is lower than the rated value, and no inrush current exceeding the rated value is generated, which is far better than the technical requirement of 1.5 times the rated current.
[0405] Explanation: The peak current of the first cycle after closing is 90.8A, which is lower than the rated peak of 108.9A. This is because the load current changes abruptly from zero to grid power supply at the moment the bypass contactor closes. Due to the influence of load impedance and grid voltage phase, the first cycle has not yet reached the steady-state peak value.
[0406] (2) Time switching verification
[0407] Actual switchover time point:
[0408] 1) Current zero-crossing detection to PWM lockout ( ): 0.15ms;
[0409] 2) PWM lockout to lockout confirmation: 0.75ms;
[0410] 3) From confirmation of blockade to bypass closing command: 0.25ms;
[0411] 4) From closing command to auxiliary contact closure (T_close): 62ms;
[0412] 5) Total switching time: 63.15ms.
[0413] Although it did not meet the contractual target of 10ms, this is the shortest switching time achievable under current hardware conditions, given the mechanical characteristics of the contactor (closing time of 62ms).
[0414] (3) Hardware improvement plan
[0415] If a fast contactor is used (closing time ≤ 8ms), the total switching time can be shortened to:
[0416] T total,fast = 0.15 + 0.75 + 0.25 + 8 = 9.15 ms
[0417] The technical requirement of ≤10ms must be met. The selection reference for fast contactors is shown in Table S2-6 below:
[0418] Table S2-6 Fast Contactor Selection Reference
[0419]
[0420] (4) The effects of the two modes are compared as shown in Table S2-7 below:
[0421] Table S2-7 Comparison of the effects of the two modes
[0422]
[0423] The switching time for the disconnect-then-make mode is reduced by approximately 48.5%, and due to the zero-crossing delay control, the current at the blocking moment is close to zero, resulting in a closing inrush current multiple of only 0.83, which is better than the 1.08 of the make-then-disconnect mode. However, there is a power outage time of approximately 62ms. For wind turbine loads, due to their large rotational inertia, a short power outage will not cause a significant decrease in speed, making it suitable for the scenario described in this embodiment.
[0424] (vii) Verification of anomaly handling
[0425] (1) Block confirmation timeout test
[0426] A communication failure is simulated in a power unit FPGA, causing the status bits to fail to update correctly. A block confirmation timeout threshold is set to 5ms. When the polling time exceeds this threshold, the system triggers the fault handling procedure.
[0427] 1) Abort the handover process;
[0428] 2) Restore PWM output;
[0429] 3) Report fault code 0x0102 (lockdown confirmation timeout);
[0430] 4) Record the fault unit number.
[0431] In actual testing, the timeout protection was triggered at t=5.2ms, and the system returned to normal operation without affecting the continuous power supply to the load.
[0432] (2) Bypass contactor closing timeout test
[0433] Set the bypass contactor closing timeout threshold to 100ms. Simulate a contactor mechanical jamming fault, where the auxiliary contacts fail to close within the timeout period. System fault handling procedure:
[0434] 1) Abort the handover process;
[0435] 2) Maintain PWM locked state;
[0436] 3) Report fault code 0x0203 (bypass contactor closing timeout);
[0437] 4) Wait for manual intervention.
[0438] Actual testing showed that the timeout protection was triggered at t=101ms, preventing power loss to the load due to contactor failure.
[0439] (VIII) Conclusion
[0440] This embodiment verifies the application of the disconnect-then-make mode in bypass switching of a 6kV / 800kW cascaded frequency converter. Key parameters such as contactor operating time, current decay time, and PWM lockout confirmation time were determined through actual measurements, and the timing control process was set accordingly. Actual measurement data during the switching process shows that the inrush current is controlled at 1.18 times the rated current, meeting the technical requirements; the switching time is 63.15ms, limited by the mechanical characteristics of the contactor. Replacing it with a fast contactor could shorten this to less than 10ms. Compared to the make-then-disconnect mode, the switching time is reduced by approximately 48.5%, but there is a power outage time of approximately 62ms, making it suitable for applications where short-term power outages are permissible. This embodiment provides a reference for parameter setting and timing control for bypass switching of high-voltage frequency converters with inertial loads such as fans and pumps.
[0441] Comparative analysis of Examples 1 and 2
[0442] Table S-1 below shows a comparison between Examples 1 and 2:
[0443] Table S-1 shows the comparison between Examples 1 and 2.
[0444]
[0445] Comparing Example 1 and Example 2, the following conclusions can be drawn:
[0446] (1) Differences in time characteristics
[0447] The switching time for the disconnect-then-make mode is 63.15ms, while that for the make-then-disconnect mode is 122.6ms, with the former being about 48.5% shorter. This difference is mainly determined by the switching logic: in the disconnect-then-make mode, the current has already decayed during the contactor's operation, while in the make-then-disconnect mode, three sequential steps—contactor closing, current decay, and then disconnection—must be completed.
[0448] (2) Differences in impulse current characteristics
[0449] The inrush current in the make-before-disconnect mode is 1.08 times the rated value, while in the disconnect-before-make mode it is 0.83 times the rated value. The reason for the lower inrush current in the disconnect-before-make mode is that the PWM is blocked near the current zero-crossing point through zero-crossing delay control, and the initial value of the freewheeling current is extremely small (only 5.1A). After the contactor action time of 62ms, the current has completely decayed to zero, and the bypass contactor closes under zero-current conditions. After closing, the current is re-established by the power grid, and the first cycle has not yet reached the steady-state peak value, so the inrush current is lower than the rated value. In contrast, in the make-before-disconnect mode, the inverter is still outputting when the bypass is closed. Although the voltages on both sides are synchronized, there is still a slight phase difference. The circulating current generated at the moment of closing causes the inrush current to slightly exceed the rated value.
[0450] (3) Differences in the effect of zero-crossing delay
[0451] Both modes use zero-crossing latency Both control the PWM lockout timing, but their technical objectives differ:
[0452] In the make-before-break mode, the main purpose of the zero-crossing delay is to reduce the contact arc energy when the inverter contactor breaks, because the breaking occurs after the follow current decays and the current is close to zero.
[0453] In the break-before-close mode, the main purpose of the zero-crossing delay is to reduce the IGBT turn-off voltage spike and minimize the initial value of the freewheeling current, thereby shortening the freewheeling decay time and enabling the bypass contactor to close under near-zero current conditions.
[0454] (4) Differences in power supply continuity
[0455] The make-before-disconnect mode has a parallel operation time of 84.3ms, during which the load is continuously powered; the disconnect-before-make mode has a power-off time of approximately 62ms (from PWM blocking to bypass contactor closing). Therefore, the former is suitable for applications where power outages are not allowed, while the latter is suitable for applications where inertial loads can withstand short-term power outages.
[0456] (5) Basis for mode selection
[0457] When switching time is allowed Less than the time threshold When the closing time is determined by the bypass contactor, the disconnect-then-close mode is selected; otherwise, the close-then-disconnect mode is selected. In Example 1 =100ms, but to control the inrush current, the "make-then-break" method is still used; in Example 2 =10ms indicates that the mode selection should take into account time requirements, inrush current limits, and load characteristics.
[0458] (6) Impact of hardware parameters
[0459] The total switching time is limited by the mechanical characteristics of the contactor. In Example 2, replacing the contactor with a fast-acting one with a closing time ≤ 8ms can reduce the switching time to less than 9.15ms. This indicates that in the disconnect-then-close mode, the contactor's response speed is the key factor in shortening the switching time.
[0460] (7) Distinguishing between applicable occasions
[0461] The make-before-disconnect mode is suitable for applications sensitive to inrush currents and where power outages are not permitted, such as continuous production lines; the disconnect-before-make mode is suitable for applications sensitive to switching time and where short-term power outages are permissible, such as inertial loads like fans and pumps. Both modes utilize zero-crossing delay. Both methods ensure that the current is close to zero when the PWM is locked, but their respective technical effects have different focuses.
[0462] This invention has been described through several embodiments. Those skilled in the art will recognize that various changes or equivalent substitutions can be made to these features and embodiments without departing from the spirit and scope of the invention. Furthermore, under the teachings of this invention, modifications can be made to these features and embodiments to adapt to specific situations and materials without departing from the spirit and scope of the invention. Therefore, this invention is not limited to the specific embodiments disclosed herein, and all embodiments falling within the scope of the claims of this application are protected by this invention.
Claims
1. A dual-mode timing control method for bypass switching of a high-voltage frequency converter, characterized in that: After the system receives the receive switchover startup command, it performs the following steps: Step S1: Read the system's allowed switching time ; Step S2: Switch mode selection and make a judgment. With preset switching time threshold To switch modes, select: Mode 1: First close the bypass contactor, and after the contactor has engaged, block the inverter's PWM output and disconnect the inverter contactor. Or mode 2: First shut down the frequency converter and then close the bypass contactor; Step S3: Enter the synchronization condition judgment loop; Continuously monitor the frequency, voltage, and phase status of the inverter output relative to the power grid to determine if the following condition is met: the synchronization time of the three states is continuously satisfied. time, Synchronization hold time set for the system: If so, execute in the corresponding mode sequence; If not, return to continue executing step S3; Step S4: Confirm the switch status after execution; Step S5: Output a switching completion signal.
2. The dual-mode timing control method for bypass switching of a high-voltage frequency converter according to claim 1, characterized in that: The mode selection criterion in step S2 is: Step S2.1: When When selecting mode 1; Step S2.2: When When selecting mode 2; threshold The calculation formula is: In the formula, This is the measured value of the bypass contactor's engagement delay; Step S2.3: When the phase difference is the set allowable phase difference value When the calculated current exceeds the system's allowable current range, regardless of... With preset switching time threshold Regardless of the relationship, select mode 1.
3. The dual-mode timing control method for bypass switching of a high-voltage frequency converter according to claim 1, characterized in that: In step S3, the synchronization status between the inverter output and the power grid is continuously monitored, and the judgment conditions are as follows: Regarding the judgment condition A for frequency synchronization: In the formula, This refers to the output frequency of the frequency converter. This is the lower limit of frequency. This is the upper limit of the frequency. Regarding the judgment condition B for voltage synchronization: In the formula, This is the effective value of the inverter's output voltage. This is the effective value of the grid voltage. This refers to the allowable voltage deviation value. C is the condition for determining phase synchronization. In the formula, This is the phase difference between the inverter output voltage and the grid voltage; The three conditions are met consecutively for a period exceeding the system's set synchronization hold time. When the synchronization condition is met, it is determined that the synchronization condition is satisfied.
4. The dual-mode timing control method for bypass switching of a high-voltage frequency converter according to claim 1, characterized in that: When mode 1 is selected in step S3, the following timing sequence is followed: At time t0: The controller issues a command to close the bypass contactor; t0~t1 stage: waiting for the bypass contactor to engage, duration is: During this stage, the frequency converter keeps its output synchronized with the power grid and monitors the synchronization conditions in real time. If any condition exceeds the limit, the switching process will be terminated and an alarm signal will be issued. At time t1: Read the closing signal of the bypass contactor auxiliary contact, and proceed to the next stage after confirming the signal is valid; During the t1~t2 phase: the zero-crossing point of the inverter output current is detected. The following criteria are used for zero-crossing detection: In the formula, This represents the instantaneous value of the output current at the current sampling moment. This is the instantaneous value of the output current at the previous sampling moment; Delay after zero crossing detected Execute the PWM blocking instruction: In the formula, The time delay from the moment the current zero-crossing signal is detected to the moment the IGBT blocking command is executed; Then wait for the inductor freewheeling current to decay, the duration of which is: In the formula, This is the measured freewheeling decay time; At time t3: The effective value of the inverter output current is detected. When the following conditions are met, an inverter contactor disconnection command is issued: In the formula, This is the effective value of the inverter's output current. This is the rated current of the frequency converter. This is the current threshold coefficient.
5. The dual-mode timing control method for bypass switching of a high-voltage frequency converter according to claim 1, characterized in that: When mode 2 is selected in step S3, the following timing sequence is followed: At time t0: Detect the zero-crossing point of the inverter output current, using the same zero-crossing detection criterion as in step S3, and delay after detecting the zero-crossing point. Execute the PWM lockout instruction; During the t0~t1 phase: The power unit status feedback is read via the communication interface to confirm that all units' PWM is fully disabled, and a confirmation timeout is set. At time t1: Issue the bypass contactor closing command; t1~t2 stage: waiting for the bypass contactor to engage, the duration is the measured value. During this stage, the inductor's freewheeling current naturally decreases. At time t2: Confirm that the bypass contactor auxiliary contact closure signal is valid, and the switching is complete.
6. The dual-mode timing control method for bypass switching of a high-voltage frequency converter according to claim 1, characterized in that: Before the system is put into operation, the following parameters are measured and written into the controller's non-volatile memory: Bypass contactor engagement delay Repeatedly measure the time interval from the output of the closing command to the closing of the auxiliary contact several times, and take the average value; Inverter contactor disconnection delay Repeatedly measure the time interval from the output of the disconnection command to the opening of the main contact several times, and take the average value; Inductor freewheeling decay time Repeatedly measure the output current dropping to its rated value several times from PWM shutdown. The average value is calculated over multiples of the time interval.
7. The dual-mode timing control method for bypass switching of a high-voltage frequency converter according to claim 1, characterized in that: When a system malfunctions, the system will handle it as follows: Synchronization condition timeout: If the synchronization condition is not met within 5 seconds, the system will abort the handover and issue an alarm. If synchronization conditions are exceeded during the handover process: the system aborts the handover and issues an alarm; Auxiliary contact feedback timeout: The system performs fault handling A and issues an alarm; Power unit feedback timeout: The system performs fault handling B and issues an alarm.
8. The dual-mode timing control method for bypass switching of a high-voltage frequency converter according to claim 7, characterized in that: The power unit feedback timeout manifests as a contactor mechanical jamming fault, where the auxiliary contacts fail to close within the timeout period. The system has a bypass contactor closing timeout threshold; if the auxiliary contacts fail to close within this threshold time, the system triggers fault handling procedure A. Step S6.1.1: Abort the handover process; Step S6.1.2: Maintain PWM locked state; Step S6.1.3: Report the fault code for bypass contactor closing timeout; Step S6.1.4: Wait for manual intervention.
9. A dual-mode timing control method for bypass switching of a high-voltage frequency converter according to claim 7, characterized in that: A power unit feedback timeout manifests as a communication failure in a power unit FPGA, preventing the status bits from updating correctly. The system has a timeout threshold for blocking confirmation; when the polling time exceeds this threshold, the system triggers fault handling procedure B. Step S6.2.1: Abort the handover process; Step S6.2.2: Restore PWM output; Step S6.2.3: Report the fault code for the block confirmation timeout; Step S6.2.4: Record the fault unit number.
10. A system for implementing a dual-mode timing control method for bypass switching of a high-voltage frequency converter as described in any one of claims 1-9, characterized in that: It includes a main controller for performing switching mode selection, synchronization condition judgment, and timing state machine, and also includes the following modules that are communicatively connected to the main controller: Synchronous detection module: Collects grid voltage and inverter output voltage, and calculates frequency difference, amplitude difference, and phase difference; Current detection module: Collects the output current of the frequency converter and provides zero-crossing signal and RMS value; Contactor drive module: outputs the opening / closing commands of bypass contactor and inverter contactor, and collects the status of auxiliary contacts; PWM lockout interface: Sends lockout command to power unit and receives lockout confirmation status; Parameter storage module: Stores measured timing parameters. , , .