A circuit structure for improving linearity of a stacked mixer
Patent Information
- Application Number
- CN202610792556.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-06-03
- Publication Date
- 2026-08-21
AI Technical Summary
[0005]综上所述，如图3所示的堆叠型Class-AB混频器的线性度和效率很差，如何提高堆叠型Class-AB混频器的线性度和效率成为了一个重要问题
[0013] 1. This invention achieves an equivalent linear transconductance structure by introducing an operational amplifier, a PMOS current source, and an NMOS current mirror. Therefore, the input baseband voltage v BB This invention avoids generating nonlinear voltage at the input of the stacked mixer, effectively solving the problem of nonlinear input signal in the stacked mixer structure under Class-AB operating mode; 2. This invention introduces capacitor C1, along with transistor M... N1R The drain and source terminals are connected in parallel, which can power transistor M during the negative half-cycle of the local oscillator signal. N1R A portion of the drain AC voltage is fed into transistor M. N0R The drain terminal of the accelerating transistor M N0R The shutdown of transistor M N1R With transistor M N0R The shutdown synchronization will not reduce the load on transistor M.N1R The generated nonlinear voltage component improves the efficiency and linearity of the mixer.
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Figure CN122621118A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of communication system technology and relates to a circuit structure for improving the linearity of a stacked mixer. Background Technology
[0002] With the continuous development of wireless communication technology, higher demands are being placed on communication speeds to meet the needs of various fields for high-speed communication and interconnection. For communication, the linearity of the communication system determines whether signals can be transmitted without errors, while the maximum output power of the communication system determines the distance that communication can achieve. In the transmitter of a communication system, the mixer functions to convert the baseband signal to the radio frequency domain. For a Mixer-Last transmitter architecture, the performance of the mixer determines the overall performance of the transmitter.
[0003] In a mixer-last transmitter architecture, the mixer is the most power-consuming module. Therefore, to reduce transmitter power consumption and improve efficiency, the mixer often operates in Class-AB mode. For a mixer operating in Class-AB mode, nonlinearity primarily originates from the gate of the mixer tail diode. For example... Figure 1 The diagram shows a classic upconverter structure, with the baseband signal V... BB The signal is input to the mixer through the tail diode M0 and mixed with the local oscillator signal at the switching transistors M1 and M2. When the mixer is operating in Class-AB mode, the baseband input voltage waveform of the mixer is as follows: Figure 2 As shown, the bias voltage of the baseband input signal is slightly higher than the threshold voltage V of the transistor. TH At this time, the input signal V BB If the mixer is not fully conducting within a single cycle, it will enter the cutoff region, generating a strong voltage nonlinearity signal at the input tail transistor. Furthermore, after mixing, the mixer's output signal will be significantly distorted, increasing the nonlinear spectral components and affecting the overall transmitter linearity, thus degrading signal quality. To improve the linearity of Class-AB mixers, existing methods primarily involve introducing a source degradation resistor at the source of the mixer's tail transistor. However, this introduced source degradation resistor generates a voltage drop, resulting in a decrease in the mixer's output power.
[0004] In addition, such as Figure 1 The basic mixer structure shown has a low output power due to transistor voltage limitations. To improve the mixer's output power, a stacked mixer structure can be used, such as... Figure 3As shown. By stacking a transistor M3 in the tail diode, the mixer's output point can withstand higher supply voltages, and the mixer's output voltage swing can be larger, thereby increasing output power. However, for applications such as... Figure 3 The stacked mixer structure shown still exhibits voltage nonlinearity at the gate of transistor M0 when operating in Class-AB mode. Simultaneously, when the local oscillator (LO) swing is large, during the negative half-cycle of the LO signal, as the connection point between the sources of transistors M1 and M2 transitions from high voltage to zero voltage, transistor M3 enters the cutoff region earlier than transistor M0. At this time, transistor M0 remains in the saturation region. This results in a dead zone in the mixer's tail transistor where the voltage is not yet turned off and the current still exists, reducing mixer efficiency and increasing its nonlinearity.
[0005] In summary, such as Figure 3 The stacked Class-AB mixer shown has poor linearity and efficiency, so how to improve the linearity and efficiency of the stacked Class-AB mixer has become an important issue. Summary of the Invention
[0006] To address the aforementioned problems in the prior art, this invention employs a circuit structure to improve the linearity of a stacked mixer, comprising: a resistor, an operational amplifier, a PMOS current source, an NMOS current mirror, and a stacked mixer; the NMOS current mirror comprises: an NMOS transistor M. N0 and NMOS transistor M N1 One end of the resistor is connected to the baseband input voltage, and the other end is connected to the non-inverting input of the operational amplifier and the NMOS transistor M. N1 The drain of the operational amplifier; the inverting input of the operational amplifier is connected to the bias voltage V. DS0 The input terminal of the PMOS current source is connected to the power supply VDD, and the output terminal is connected to the NMOS transistor M. N1 The drain of the NMOS transistor M; N1 Gate connection bias voltage V CG Source-connected NMOS transistor M N0 The drain of the NMOS transistor M N0 The gate of the mixer is connected to the output of the operational amplifier, and the source is grounded; the input of the stacked mixer is connected to the bias voltage V. CG and the output of the operational amplifier.
[0007] Stacked mixers include: tailpipe M N1R Tailpipe M N0R Switch M1 and switch M2; tail tube M N0R The gate is connected to the output of the operational amplifier, the source is grounded, and the drain is connected to the tail transistor M. N1R The source electrode; tailpipe MN1R Gate connection bias voltage V CG The drain is connected to the source of switching transistors M1 and M2, and the gate of switching transistors M1 and M2 is connected to the local oscillator signal.
[0008] Tailpipe M N0R and transistor M N0 The channel lengths are equal, and the tailpipe M N1R and transistor M N1 The lengths of the channels are equal.
[0009] Tailpipe M N0R Aspect ratio and transistor M N0 The ratio of the width to the length is equal to the tailpipe M. N1R Aspect ratio and transistor M N1 The ratio of width to length.
[0010] The stacked mixer also includes capacitor C1; one end of capacitor C1 is connected to the tail tube M. N1R The drain of the first electrode is connected to the tail tube M at the other end. N1R The source pole.
[0011] PMOS current sources include: PMOS transistor M P0 and PMOS transistor M P1 PMOS transistor M P1 The source is connected to the power supply VDD, and the gate is connected to the bias voltage V. B1 Drain-connected PMOS transistor M P0 The source of the PMOS transistor; P0 Gate connection bias voltage V B2 Drain-connected NMOS transistor M N1 The drain electrode.
[0012] Beneficial effects:
[0013] 1. This invention achieves an equivalent linear transconductance structure by introducing an operational amplifier, a PMOS current source, and an NMOS current mirror. Therefore, the input baseband voltage v BB This invention avoids generating nonlinear voltage at the input of the stacked mixer, effectively solving the problem of nonlinear input signal in the stacked mixer structure under Class-AB operating mode; 2. This invention introduces capacitor C1, along with transistor M... N1R The drain and source terminals are connected in parallel, which can power transistor M during the negative half-cycle of the local oscillator signal. N1R A portion of the drain AC voltage is fed into transistor M. N0R The drain terminal of the accelerating transistor M N0R The shutdown of transistor M N1R With transistor M N0R The shutdown synchronization will not reduce the load on transistor M.N1R The generated nonlinear voltage component improves the efficiency and linearity of the mixer. Attached Figure Description
[0014] Figure 1 A schematic diagram of a basic mixer structure provided for an embodiment of the present invention;
[0015] Figure 2 This is a schematic diagram of the baseband input waveform of a Class-AB type Mixer provided in an embodiment of the present invention;
[0016] Figure 3 A schematic diagram of the circuit of the stacked Mixer provided in an embodiment of the present invention;
[0017] Figure 4 A schematic diagram of a circuit structure for improving the linearity of a stacked mixer provided in an embodiment of the present invention;
[0018] Figure 5 This is a schematic diagram of a differential circuit structure for improving the linearity of a stacked mixer, provided by an embodiment of the present invention. Detailed Implementation
[0019] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0020] like Figure 4 As shown, this embodiment of the invention employs a circuit structure to improve the linearity of a stacked mixer, including: resistor R I Operational amplifiers, PMOS current sources, NMOS current mirrors, and stacked mixers; the NMOS current mirror includes: NMOS transistor M N0 and NMOS transistor M N1 ;
[0021] resistor R I One end is connected to the baseband input voltage V BB The other end is connected to the non-inverting input of the operational amplifier and the NMOS transistor M. N1 The drain of the operational amplifier; the inverting input of the operational amplifier is connected to the bias voltage V. DS0 The input terminal of the PMOS current source is connected to the power supply VDD, and the output terminal is connected to the NMOS transistor M. N1 The drain of the NMOS transistor M; N1 Gate connection bias voltage V CG Source-connected NMOS transistor MN0 The drain of the NMOS transistor M N0 The gate of the mixer is connected to the output of the operational amplifier, and the source is grounded; the input of the stacked mixer is connected to the bias voltage V. CG and the output of the operational amplifier.
[0022] PMOS current sources include: PMOS transistor M P0 and PMOS transistor M P1 PMOS transistor M P1 The source is connected to the power supply VDD, and the gate is connected to the bias voltage V. B1 Drain-connected PMOS transistor M P0 The source of the PMOS transistor; P0 Gate connection bias voltage V B2 Drain-connected NMOS transistor M N1 The drain electrode.
[0023] bias voltage V DS0 The value of V needs to ensure the operational amplifier functions properly. Optionally, V DS0 The DC voltage value is equal to that of transistor M N1 The drain DC voltage ensures the baseband input voltage V. BB The current flowing through the resistor flows into the feedback loop; bias voltage V CG V B0 V B1 The value of M needs to be guaranteed to ensure that transistor M N1、 M P1、 M P0 The work is in the saturation zone.
[0024] Stacked mixers include: tailpipe M N1R Tailpipe M N0R Capacitor C1, switching transistor M1 and switching transistor M2; tail transistor M N0R The gate is connected to the output of the operational amplifier, the source is grounded, and the drain is connected to the tail transistor M. N1R The source electrode; tailpipe M N1R Gate connection bias voltage V CG The drain of transistor M1 is connected to the source of transistor M2; the drain of transistors M1 and M2 outputs the RF output signal, and the gate of transistors M1 and M2 is connected to the local oscillator signal LO. P LO N One end of capacitor C1 is connected to tail tube M. N1R The drain of the first electrode is connected to the tail tube M at the other end. N1R The source pole.
[0025] Tailpipe M N0R and transistor M N0 The channel lengths are equal, and the tailpipe MN1R and transistor M N1 The channel lengths are equal; tailpipe M N0R Aspect ratio and transistor M N0 The ratio of the width to the length is equal to the tailpipe M. N1R Aspect ratio and transistor M N1 The ratio of width to length; tailpipe M N0R The aspect ratio of transistor M is N0 The width-to-length ratio is K times, and the tailpipe is M. N1R The aspect ratio of transistor M is N1 The aspect ratio is K times, where K is an integer greater than 1.
[0026] Working principle:
[0027] The circuit structure shown can solve two problems existing in the stacked mixer structure. The first problem is that when the stacked mixer is operating in Class-AB, transistor M... 0R The input gate has a voltage nonlinearity problem; the second problem is that when the stacked mixer operates during the negative half-cycle of the local oscillator signal, transistor M... N1R It will be more than transistor M N0R It enters the cutoff region first, at which point transistor M exists. N1R Turn off but transistor M N0R While still in operation, this results in unnecessary power consumption and nonlinearity in the mixer's tail tube.
[0028] Regarding the first question: From a circuit principle perspective, when the operational amplifier has sufficiently high gain within its operating bandwidth, the operational amplifier input satisfies the assumption of "virtual short, virtual open". At this time, the input AC current i... B1 Equal to baseband input voltage v BB Divide by resistance R I PMOS transistor M P0 and M P1 The bias current I generated by the constructed PMOS current source PMOS and NMOS transistor M N0 and M N1 The bias current I of the constructed NMOS current mirror N1 Equal, mixer stacked tailpipe M N0R Channel length and transistor M N0 To maintain consistency, the mixer's stacked tailpipe M N1R Channel length and transistor M N1 To maintain consistency, the mixer's stacked tailpipe M N0R The aspect ratio of transistor M is N0 K times, mixer stacked tailpipe M N1R The aspect ratio of transistor M is N1K times, at this point, we can obtain the AC small-signal leakage current i of the mixer stacked tail tube. MIXER It is the input AC current i B1 K times:
[0029] (1)
[0030] As can be seen from formula (1), the AC small-signal current of the stacked tail diode of the mixer is related to the input baseband voltage v. BB It is a linear relationship, although the mixer stacked tailpipe M N0R It is still biased in Class-AB state, but because the current structure proposed in this invention achieves an equivalent linear transconductance structure, the input baseband voltage v BB It will not cause nonlinear voltage at the input of the stacked mixer, effectively solving the problem of nonlinear input signal of the stacked mixer structure in Class-AB operating mode.
[0031] Regarding the second question, based on the structure of the low-voltage cascode transistor, it can be seen that during the negative half-cycle of the local oscillator signal, transistor M... N1R Compared to transistor M N0R First, it enters the cutoff region. This is achieved by introducing capacitor C1, which is connected to transistor M. N1R The drain and source terminals are connected in parallel, which can power transistor M during the negative half-cycle of the local oscillator signal. N1R A portion of the drain AC voltage is fed into transistor M. N0R The drain terminal of the accelerating transistor M N0R The shutdown of transistor M N1R With transistor M N0R The shutdown synchronization will not reduce the load on transistor M. N1R The generated nonlinear voltage component improves the efficiency and linearity of the mixer.
[0032] When the baseband input signal is a differential baseband signal, the following can be used: Figure 5 The circuit structure shown is similar to the single-ended structure, except that the differential baseband signal passes through the input resistor R. I The differential input connected to the operational amplifier specifically includes: the first resistor R I_1 Second resistor R I_2 The system comprises a differential operational amplifier, a first PMOS current source, a second PMOS current source, a first NMOS current mirror, a second NMOS current mirror, and a stacked differential mixer; the first NMOS current mirror includes an NMOS transistor M. N0_1 and NMOS transistor M N1_1 The second NMOS current mirror includes: NMOS transistor M N0_2 and NMOS transistor M N1_2 ;
[0033] First resistor R I_1 Second resistor R I_2 One end is connected to the positive and negative baseband signals of the baseband input signal, respectively, and the first resistor R I_1 Second resistor R I_2 The other end is connected to the non-inverting input and the inverting input of the differential operational amplifier, respectively;
[0034] The input terminal of the first PMOS current source is connected to the power supply VDD, and the output terminal is connected to the NMOS transistor M. N1_1 The drain of the NMOS transistor M; N1_1 Gate connection bias voltage V CG Source-connected NMOS transistor M N0_1 The drain of the NMOS transistor M N0_1 The gate is connected to the non-inverting output of the differential operational amplifier, and the source is grounded;
[0035] The input terminal of the second PMOS current source is connected to the power supply VDD, and the output terminal is connected to the NMOS transistor M. N1_2 The drain of the NMOS transistor M; N1_2 Gate connection bias voltage V CG Source-connected NMOS transistor M N0_2 The drain of the NMOS transistor M N0_2 The gate is connected to the inverting output of the differential operational amplifier, and the source is grounded;
[0036] The bias terminal of the stacked differential mixer is connected to the bias voltage V. CG The non-inverting input terminal is connected to the non-inverting output terminal of the differential operational amplifier, and the inverting input terminal is connected to the inverting output terminal of the differential operational amplifier.
[0037] Stacked differential mixers include: tailpipe M N1R_1 Tailpipe M N1R_2 Tailpipe M N0R_1 Tailpipe M N0R_2 Switching transistor M 1_1 Switching transistor M 1_2 Switching transistor M 2_1 and switching transistor M 2_2 Tailpipe M N0R_1 The gate is connected to the non-inverting output of the differential operational amplifier, the source is grounded, and the drain is connected to the tail transistor M. N1R_1 The source electrode; tailpipe M N1R_1 Gate connection bias voltage V CG Drain connection to switching transistor M 1_1 and switching transistor M 2_1 The source of the switch M 1_1 and switching transistor M2_1 The gate is connected to the local oscillator signal; tail tube M N0R_2 The gate is connected to the inverting output of the differential operational amplifier, the source is grounded, and the drain is connected to the tail transistor M. N1R_2 The source electrode; tailpipe M N1R_2 Gate connection bias voltage V CG Drain connection to switching transistor M 1_2 and switching transistor M 2_2 The source of the switch M 1_2 and switching transistor M 2_2 The gate of the transistor is connected to the local oscillator signal; the switching transistor M 1_1 The drain connection of the switching transistor M 2_2 The drain of the switching transistor M 1_2 The drain connection of the switching transistor M 2_1 The drain of the switching transistor M; 2_1 The drain and switching transistor M 2_2 The drain outputs the radio frequency output signal.
[0038] Stacked differential mixers also include capacitor C 1_1 and C 1_2 Capacitor C 1_1 One end is connected to the tailpipe M N1R_1 The drain of the first electrode is connected to the tail tube M at the other end. N1R_1 The source, capacitor C 1_2 One end is connected to the tailpipe M N1R_2 The drain of the first electrode is connected to the tail tube M at the other end. N1R_2 The source pole.
[0039] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.
Claims
1. A circuit structure for improving the linearity of a stacked mixer, characterized in that, include: Resistors, operational amplifiers, PMOS current sources, NMOS current mirrors, and stacked mixers; The NMOS current mirror includes: NMOS transistor M N0 and NMOS transistor M N1 ; One end of the resistor is connected to the baseband input signal, and the other end is connected to the non-inverting input of the operational amplifier and the NMOS transistor M. N1 The drain of the operational amplifier; the inverting input of the operational amplifier is connected to the bias voltage V. DS0 The input terminal of the PMOS current source is connected to the power supply VDD, and the output terminal is connected to the NMOS transistor M. N1 The drain of the NMOS transistor M; N1 Gate connection bias voltage V CG Source-connected NMOS transistor M N0 The drain of the NMOS transistor M N0 The gate of the mixer is connected to the output of the operational amplifier, and the source is grounded; the input of the stacked mixer is connected to the bias voltage V. CG and the output of the operational amplifier.
2. The circuit structure for improving the linearity of a stacked mixer according to claim 1, characterized in that, Stacked mixers include: tailpipe M N1R Tailpipe M N0R Switch M1 and switch M2; tail tube M N0R The gate is connected to the output of the operational amplifier, the source is grounded, and the drain is connected to the tail transistor M. N1R The source electrode; tailpipe M N1R Gate connection bias voltage V CG The drain is connected to the source of switching transistors M1 and M2, and the gate of switching transistors M1 and M2 is connected to the local oscillator signal.
3. The circuit structure for improving the linearity of a stacked mixer according to claim 2, characterized in that, Tailpipe M N0R and transistor M N0 The channel lengths are equal, and the tailpipe M N1R and transistor M N1 The lengths of the channels are equal.
4. The circuit structure for improving the linearity of a stacked mixer according to claim 2, characterized in that, Tailpipe M N0R Aspect ratio and transistor M N0 The ratio of the width to the length is equal to the tailpipe M. N1R Aspect ratio and transistor M N1 The ratio of width to length.
5. The circuit structure for improving the linearity of a stacked mixer according to claim 2, characterized in that, The stacked mixer also includes capacitor C1; one end of capacitor C1 is connected to the tail tube M. N1R The drain of the first electrode is connected to the tail tube M at the other end. N1R The source pole.
6. The circuit structure for improving the linearity of a stacked mixer according to claim 1, characterized in that, PMOS current sources include: PMOS transistor M P0 and PMOS transistor M P1 PMOS transistor M P1 The source is connected to the power supply VDD, and the gate is connected to the bias voltage V. B1 Drain-connected PMOS transistor M P0 The source of the PMOS transistor; P0 Gate connection bias voltage V B2 Drain-connected NMOS transistor M N1 The drain electrode.
7. The circuit structure for improving the linearity of a stacked mixer according to claim 1, characterized in that, When the baseband input signal is a differential baseband signal, the circuit structure includes: a first resistor, a second resistor, a differential operational amplifier, a first PMOS current source, a second PMOS current source, a first NMOS current mirror, a second NMOS current mirror, and a stacked differential mixer; the first NMOS current mirror includes: an NMOS transistor M. N0_1 and NMOS transistor M N1_1 The second NMOS current mirror includes: NMOS transistor M N0_2 and NMOS transistor M N1_2 ; One end of the first resistor and the second resistor are connected to the inverted baseband signal and the outverted baseband signal of the baseband input signal, respectively, and the other end of the first resistor and the second resistor are connected to the inverted input terminal and the outverted input terminal of the differential operational amplifier, respectively. The input terminal of the first PMOS current source is connected to the power supply VDD, and the output terminal is connected to the NMOS transistor M. N1_1 The drain of the NMOS transistor M; N1_1 Gate connection bias voltage V CG Source-connected NMOS transistor M N0_1 The drain of the NMOS transistor M N0_1 The gate is connected to the non-inverting output of the differential operational amplifier, and the source is grounded; The input terminal of the second PMOS current source is connected to the power supply VDD, and the output terminal is connected to the NMOS transistor M. N1_2 The drain of the NMOS transistor M; N1_2 Gate connection bias voltage V CG Source-connected NMOS transistor M N0_2 The drain of the NMOS transistor M N0_2 The gate is connected to the inverting output of the differential operational amplifier, and the source is grounded; Stacked differential mixer connected to bias voltage V CG The non-inverting output terminal and the inverting output terminal of the differential operational amplifier.
8. The circuit structure for improving the linearity of a stacked mixer according to claim 7, characterized in that, Stacked differential mixers include: tailpipe M N1R_1 Tailpipe M N1R_2 Tailpipe M N0R_1 Tailpipe M N0R_2 Switching transistor M 1_1 Switching transistor M 1_2 Switching transistor M 2_1 and switching transistor M 2_2 Tailpipe M N0R_1 The gate is connected to the non-inverting output of the differential operational amplifier, the source is grounded, and the drain is connected to the tail transistor M. N1R_1 The source electrode; tailpipe M N1R_1 Gate connection bias voltage V CG Drain connection to switching transistor M 1_1 and switching transistor M 2_1 The source of the switch M 1_1 and switching transistor M 2_1 The gate is connected to the local oscillator signal; tail tube M N0R_2 The gate is connected to the inverting output of the differential operational amplifier, the source is grounded, and the drain is connected to the tail transistor M. N1R_2 The source electrode; tailpipe M N1R_2 Gate connection bias voltage V CG Drain connection to switching transistor M 1_2 and switching transistor M 2_2 The source of the switch M 1_2 and switching transistor M 2_2 The gate of the transistor is connected to the local oscillator signal; the switching transistor M 1_1 The drain connection of the switching transistor M 2_2 The drain of the switching transistor M 1_2 The drain connection of the switching transistor M 2_1 The drain of the switching transistor M; 2_1 The drain and switching transistor M 2_2 The drain outputs the radio frequency output signal.