Memory semantic multicast system based on vertical expansion networking

Abstract

This invention relates to the field of computer technology, and more particularly to a memory semantic multicast system based on vertically scaled networking, comprising: a switch and M chips A m A m A is set in m The corresponding first register E m A m The corresponding second register F m and A m The corresponding third register G m The switch has a fourth register, in which each E m The fourth register is used to set the mapping relationship between multicast group numbers and multicast addresses. The fifth register is used to set the mapping relationship between multicast addresses and chip address groups. m Used to set A m The corresponding maximum timeout count threshold, G m Used to record A m The corresponding error response information includes multiple chip addresses in the chip address group. This invention reduces network bandwidth utilization, sender load, and network latency in scenarios where the same data is distributed to multiple receiving nodes based on vertically expanded networking, and improves system scalability.

Description

Technical Field

[0001] This invention relates to the field of computer technology, and in particular to a memory semantic multicast system based on vertically extended networking. Background Technology

[0002] In traditional scale-up networking, when the same data needs to be efficiently and synchronously distributed to multiple receiving nodes, existing technologies typically use unicast or broadcast transmission. If unicast transmission is used, it needs to be sent one by one. If broadcast transmission is used, it will be sent to unwanted nodes, requiring additional processing. However, the above two forms have at least the following disadvantages: (1) Unicast replication causes the same data to be repeatedly transmitted on the source server uplink and network core links, resulting in bandwidth waste; broadcast transmission will flood all ports of the entire network segment, resulting in low network bandwidth utilization. (2) The source server needs to handle multiple times the connection, encapsulation and transmission overhead, which can easily become a bottleneck for performance and scalability, resulting in a heavy load on the sender. (3) Unicast replication may cause inconsistent delays among the receivers due to source server load or network congestion; broadcast may cause unnecessary processing delays, resulting in high and uncertain network latency. (4) An increase in the number of receiving nodes will linearly increase the source server load and network core traffic, making it difficult to expand the scale and resulting in poor system scalability. Therefore, how to reduce network bandwidth utilization, sender load, and network latency in scenarios where the same data is distributed to multiple receiving nodes based on vertically expanded networking, and how to improve system scalability have become urgent technical problems to be solved. Summary of the Invention

[0003] The purpose of this invention is to provide a memory semantic multicast system based on vertically extended networking, which reduces network bandwidth utilization, sender load, and network latency in scenarios where the same data is distributed to multiple receiving nodes based on vertically extended networking, and improves the scalability of the system.

[0004] According to a first aspect of the present invention, a memory semantic multicast system based on vertically extended networking is provided, comprising: a switch and M chips {A1, A2, ..., A...} m ,...,A M}, wherein the switch includes M interfaces, A m For the m-th chip, where m ranges from 1 to M, A m Connect to the m-th interface of the switch; A m A is set in m The corresponding first register E m A m The corresponding second register Fm and A m The corresponding third register G m The switch is equipped with a fourth register, wherein each E m The fourth register is used to set the mapping relationship between multicast group numbers and multicast addresses. F is used to set the mapping relationship between multicast addresses and chip address groups. m Used to set A m The corresponding maximum timeout count threshold, G m Used to record A m The corresponding error response information includes multiple chip addresses in the chip address group; Source A m Used to obtain multicast requests from the system side. The multicast request includes a multicast group number, based on source E. m The mapping relationship between multicast packet numbers and multicast addresses set in the configuration determines the destination multicast address, and destination multicast transmission data is generated based on the destination multicast address and sent to the switch; The switch is used to transmit destination multicast data to each destination A in the destination multicast address based on the mapping relationship between the multicast address and the chip address group set in the fourth register. m ; Objective A m Used to process destination multicast transmission data, and transmitted to source A via the switch. m The system returns a response message, which includes both error and success messages. Source A m Also used in source F m Received destination A within the corresponding maximum timeout count threshold m When returning an error response message, destination A m The returned error response information is logged in source G m In addition, it is also used in applications exceeding source F. m The corresponding maximum timeout count threshold was not received from destination A. m When the response information is returned, generate destination A. m The corresponding error response information is recorded in source G. m In, then according to all purposes A m The corresponding response information is returned to the system side as a response to the multicast request.

[0005] Furthermore, source A m According to all purposes A m The corresponding response information is returned to the system side regarding the multicast request, including: If source A m Received all destinations A m If the response message is successful, then source A mReturn a success response message corresponding to the multicast request to the system side; If source A m Receive at least one destination A m If the error response message is from source A, then... m Return the error response information corresponding to the multicast request to the system side.

[0006] Furthermore, source A m According to all purposes A m The corresponding response information is returned to the system side regarding the multicast request, including: If source A m All received for purpose A m A successful reply message, or an error reply message corresponding to the destination A. m All are source A m The corresponding preset mask A m Then source A m Return a success response message corresponding to the multicast request to the system side; If source A m Receive at least one non-source A m The corresponding preset mask A m Purpose A m If the error response message is from source A, then... m Return the error response information corresponding to the multicast request to the system side.

[0007] Furthermore, the system adds sideband signals to the system bus, and sets multicast identifiers and multicast group numbers in the sideband signals, source A m Used to obtain the corresponding multicast group number in the multicast request through the sideband signal.

[0008] Furthermore, the system bus uses a single channel to set multicast identifiers and multicast group numbers in the sideband signals.

[0009] Furthermore, the system sets a multicast identifier and a multicast group number within a preset address range corresponding to the address signals in the system bus, source A m Used to obtain the corresponding multicast group number in the multicast request through a preset address range corresponding to the address signal in the system bus.

[0010] Furthermore, the system bus uses a complete bus transaction approach to set multicast identifiers and multicast group numbers within a preset address range corresponding to the address signals in the system bus.

[0011] Furthermore, the system bus includes the Advanced Scalable Interface Bus (AXI), the High-Speed ​​Coherence Bus (ACE), the On-Chip Coherence Interconnect Bus (CHI), the High-Speed ​​Extended Interconnect Bus (CXS), and the Distributed Virtual Memory Bus (DVM).

[0012] Furthermore, A m Including A m Corresponding adapter B m A m The corresponding MAC controller C m and A m The corresponding on-chip network D m C m Connected to the m-th interface of the switch; First register E m Second register F m and the third register G m All are set in B m middle; Source D m Used to obtain multicast requests from the system side and transmit them to source B. m ; Source B m Used for source E m The mapping relationship between multicast group numbers and multicast addresses set in the configuration determines the destination multicast address and generates a multicast frame header based on the destination multicast address. Then, it is packaged to generate a MAC frame and sent to the source C. m ; Source C m Used to transmit MAC frames to the switch.

[0013] Compared with existing technologies, this invention has significant advantages and beneficial effects. Through the above technical solution, the memory semantic multicast system based on vertically extended networking provided by this invention achieves considerable technological advancement and practicality, and has broad industrial application value. It has at least the following beneficial effects: This invention sets up a first register, a second register, and a third register in each chip, and a fourth register in the switch. The first register sets up a mapping relationship between multicast group numbers and multicast addresses, and the fourth register sets up a mapping relationship between multicast addresses and chip address groups. This enables the distribution of the same data to multiple receiving nodes via multicast. The second and third registers work together to return the corresponding response information for the multicast request to the system side. This invention reduces network bandwidth utilization, sender load, and network latency in scenarios where the same data is distributed to multiple receiving nodes based on vertically extended networking, and improves the scalability of the system. Attached Figure Description

[0014] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0015] Figure 1 This is a diagram of a memory semantic multicast system architecture based on vertically extended networking, provided for an embodiment of the present invention. Detailed Implementation

[0016] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0017] This invention provides a memory semantic multicast system based on vertically extended networking, such as... Figure 1 As shown, it includes: a switch and M chips {A1, A2, ..., A...} m ,...,A M}, wherein the switch includes M interfaces, A m For the m-th chip, where m ranges from 1 to M, A m It connects to the m-th interface of the switch. It should be noted that the switch can consist of only one switch unit, or it can be implemented based on multiple nested switch units.

[0018] A m A is set in m The corresponding first register E m A m The corresponding second register F m and A m The corresponding third register G m The switch is equipped with a fourth register. Each E m This is used to set the mapping relationship between multicast group numbers and multicast addresses, specifically in E. m A mapping table based on multicast group numbers and multicast addresses is set up. The fourth register is used to set the mapping relationship between multicast addresses and chip address groups, where each chip address group includes multiple chip addresses. Specifically, the mapping table generated by multicast group numbers and multicast addresses can be set in the fourth register. m Used to set A m The corresponding maximum timeout count threshold should be noted; different A values ​​may vary.m The corresponding maximum timeout count thresholds can be the same or different. m Used to record A m The corresponding error response information can be obtained from G on the system side. m Obtain A from m Debug the corresponding error response messages.

[0019] Source A m Used to obtain multicast requests from the system side. The multicast request includes a multicast group number, based on source E. m The mapping relationship between multicast packet numbers and multicast addresses set in the configuration determines the destination multicast address. Based on this destination multicast address, destination multicast transmission data is generated and sent to the switch. It should be noted that source A... m For the source chip that initiates the multicast request, destination A m The target chip for processing the multicast request.

[0020] The switch is used to transmit destination multicast data to each destination A in the destination multicast address based on the mapping relationship between the multicast address and the chip address group set in the fourth register. m .

[0021] Objective A m Used to process destination multicast transmission data, and transmitted to source A via the switch. m Return a response message, which includes both error and success messages.

[0022] This invention provides a first register, a second register, and a third register in each chip, and a fourth register in the switch. The first register sets up a mapping between multicast group numbers and multicast addresses, while the fourth register sets up a mapping between multicast addresses and chip address groups. This enables the distribution of the same data to multiple receiving nodes via multicast. The second and third registers work together to return the corresponding response information to the system side for the multicast request. This invention reduces network bandwidth utilization, sender load, and network latency in scenarios where the same data is distributed to multiple receiving nodes in a vertically scaled network, and improves system scalability. This invention utilizes a memory-based semantic multicast mechanism based on multi-card scale-up networking of switches, employing a single transmission to replace the disadvantages of unicast replication or multicast. By using static registers and corresponding procedures, it is compatible with the system-side bus, significantly reducing complexity compared to traditional solutions, improving the utilization and communication efficiency of the underlying links, and reducing the complexity of system-side scheduling.

[0023] As one example, A m Including A m Corresponding adapter Bm A m The corresponding MAC (Media Access Control Address) controller C m and A m The corresponding on-chip network D m C m Connected to the m-th interface of the switch; First register E m Second register F m and the third register G m All are set in B m middle.

[0024] Source A m The corresponding C m For source C m Source A m The corresponding D m For source D m Source A m The corresponding E m For source E m Source D m Used to obtain multicast requests from the system side and transmit them to source B. m Source B m Used for source E m The mapping relationship between multicast group numbers and multicast addresses set in the configuration determines the destination multicast address and generates a multicast frame header based on the destination multicast address. Then, it is packaged to generate a MAC frame and sent to the source C. m Source C m Used to transmit MAC frames to the switch. Purpose A m The corresponding C m For purpose C m Purpose A m The corresponding D m For purpose D m Purpose A m The corresponding E m For purpose E m The switch transmits the MAC frame to destination C. m Purpose C m Parse the MAC frame and send it to the destination D. m Process it.

[0025] As one example, source A m Also used in source F m Received destination A within the corresponding maximum timeout count threshold m When returning an error response message, destination A m The returned error response information is logged in source G mThis allows the system to easily access error information via registers for debugging. It should be noted that some purposes A m Unable to generate a response message, for example, due to a link error during transmission, or destination A... m In case of errors, etc., to prevent deadlock, source A m Timeout counts can be performed for each multicast operation. Specifically, source A m It is also used in applications exceeding source F. m The corresponding maximum timeout count threshold was not received from destination A. m When the response information is returned, generate destination A. m The corresponding error response information is recorded in source G. m This avoids deadlock. In source A m Received all destinations A m After the corresponding reply, Source A m Also used for all purposes A m The corresponding response information is returned to the system side as a reply to the multicast request. It should be noted that, exceeding the source F... m After the corresponding maximum timeout count threshold, even if source A m Received target A m The corresponding response information also needs to include the purpose A. m The corresponding reply message is discarded. Alternatively, this purpose A can be... m The corresponding reply information is recorded in source G m This is for subsequent debugging.

[0026] As one example, source A m According to all purposes A m The corresponding response information is returned to the system side regarding the multicast request, including: If source A m Received all destinations A m If the response message is successful, then source A m Return a success response message corresponding to the multicast request to the system side, i.e., all destinations A m All requests were successfully processed and returned a success message.

[0027] If source A m Receive at least one destination A m If the error response message is from source A, then... m Returning error response information corresponding to the multicast request to the system side. It should be noted that in this application scenario, as long as a destination A... m If an error message is received, the multicast request is considered unsuccessful, and an error message corresponding to the multicast request is returned to the system. This scenario applies when no single destination A is allowed to participate. mCases where processing was unsuccessful.

[0028] However, in some application scenarios, some objectives A m Whether the processing was successful or not will not affect source A. m It will have an impact, therefore, even if it does not affect source A m Purpose of the influence A m Returning an error response message can also be considered a successful multicast request processing. As one example, source A... m According to all purposes A m The corresponding response information is returned to the system side regarding the multicast request, including: If source A m All received for purpose A m A successful reply message, or an error reply message corresponding to the destination A. m All are source A m The corresponding preset mask A m Then source A m Return a success response message corresponding to the multicast request to the system side. If source A m Receive at least one non-source A m The corresponding preset mask A m Purpose A m If the error response message is from source A, then... m Return the error response information corresponding to the multicast request to the system side.

[0029] As one embodiment, the system adds a sideband signal to the system bus, setting multicast identifiers and multicast group numbers in the sideband signal, and implementing multicast address mapping through the sideband signal. (Source A) m This is used to obtain the corresponding multicast group number in the multicast request through the sideband signal. The system bus includes the Advanced Extensible Interface Bus (AXI), the High-Speed ​​Coherence Bus (ACE), the On-Chip Coherence Interconnect Bus (CHI), the High-Speed ​​Extended Interconnect Bus (CXS), and the Distributed Virtual Memory Bus (DVM), etc.

[0030] As one embodiment, the system sets a multicast identifier and a multicast group number within a preset address range corresponding to the address signals in the system bus, and implements multicast address mapping through the address signal segments in the system bus. (Source A) m Used to obtain the corresponding multicast group number in the multicast request through a preset address range corresponding to the address signal in the system bus.

[0031] As one embodiment, multicast address mapping can also be implemented using a hybrid approach, which combines multicast address mapping via sideband signals and multicast address mapping via address signal segments in the system bus.

[0032] Specifically, sideband signals or unused signals can be added to the system bus for multicast address mapping. Taking the Advanced Extensible Interface (AXI) protocol as an example, source A... m The transmissions received from the system may include sideband signals, such as userbits, used as mappings for multicast addresses. (Source B) m It will generate the corresponding MAC frame header for the multicast address based on the register mapped to the userbit.

[0033] As one embodiment, the system bus uses a single channel to set multicast identifiers and multicast group numbers in the sideband signals, thereby realizing multicast on a channel-by-channel basis, such as the Advanced Scalable Interface Bus (AXI), the High-Speed ​​Coherence Bus (ACE), and the On-Chip Coherence Interconnect Bus (CHI).

[0034] As one embodiment, the system sets a multicast identifier and a multicast group number within a preset address range corresponding to the address signals in the system bus, source A m This is used to retrieve the corresponding multicast group number in a multicast request from a preset address range corresponding to the address signals in the system bus. Using address mapping, the system bus does not need additional sideband signals; only address signals are needed for multicast address mapping. The corresponding address range is used as the mapping for the corresponding multicast address.

[0035] As one embodiment, the system bus uses a complete bus transaction approach to set multicast identifiers and multicast group numbers in the preset address range corresponding to the address signals in the system bus, thereby realizing multicast based on bus transactions, such as system bus transaction protocols like Advanced Extensible Interface Bus (AXI), High-Speed ​​Consistency Bus (ACE), On-Chip Consistency Interconnect Bus (CHI), and High-Speed ​​Extended Interconnect Bus (CXS).

[0036] This invention addresses the limitations of unicast replication and broadcasting in multi-NIC networking by innovatively proposing a memory-based semantic multicast system based on vertically expanded networking. By adding a static register set and utilizing extended strategies for adapter sending and receiving, a multicast scheme for specific network interface cards (NICs) is achieved. This mechanism is compatible with all system buses, such as the AMBA protocol specification, and is applicable to most chips. It expands and enhances the register set, reducing implementation complexity by minimizing system modification requirements. This invention uses the register set to link specific accesses to specific NICs, eliminating the need for complex protocols. This significantly reduces system scheduling complexity and traffic congestion issues caused by unicast replication and broadcasting in multi-NIC networking, promoting optimized system resource allocation and efficient utilization, and significantly enhancing the application value of switch-based networking.

[0037] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the present invention. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of the present invention without departing from the scope of the present invention shall still fall within the scope of the present invention.

Claims

1. A memory-based semantic multicast system based on vertically expanded networking, characterized in that, Includes: a switch and M chips {A1, A2, ..., A...} m ,...,A M }, wherein the switch includes M interfaces, A m For the m-th chip, where m ranges from 1 to M, A m Connect to the m-th interface of the switch; A m A is set in m The corresponding first register E m A m The corresponding second register F m and A m The corresponding third register G m The switch is equipped with a fourth register, wherein each E m The fourth register is used to set the mapping relationship between multicast group numbers and multicast addresses. F is used to set the mapping relationship between multicast addresses and chip address groups. m Used to set A m The corresponding maximum timeout count threshold, G m Used to record A m The corresponding error response information includes multiple chip addresses in the chip address group; Source A m Used to obtain multicast requests from the system side. The multicast request includes a multicast group number, based on source E. m The mapping relationship between multicast packet numbers and multicast addresses set in the configuration determines the destination multicast address, and destination multicast transmission data is generated based on the destination multicast address and sent to the switch; The switch is used to transmit destination multicast data to each destination A in the destination multicast address based on the mapping relationship between the multicast address and the chip address group set in the fourth register. m ; Objective A m Used to process destination multicast transmission data, and transmitted to source A via the switch. m The system returns a response message, which includes both error and success messages. Source A m Also used in source F m Received destination A within the corresponding maximum timeout count threshold m When returning an error response message, destination A m The returned error response information is logged in source G m In addition, it is also used in applications exceeding source F. m The corresponding maximum timeout count threshold was not received from destination A. m When the response information is returned, generate destination A. m The corresponding error response information is recorded in source G. m In the middle, then according to all purposes A m The corresponding response information is returned to the system side as a response to the multicast request.

2. The system according to claim 1, characterized in that, Source A m According to all purposes A m The corresponding response information is returned to the system side regarding the multicast request, including: If source A m Received all destinations A m If the response message is successful, then source A m Return a success response message corresponding to the multicast request to the system side; If source A m Receive at least one destination A m If the error response message is from source A, then... m Return the error response information corresponding to the multicast request to the system side.

3. The system according to claim 1, characterized in that, Source A m According to all purposes A m The corresponding response information is returned to the system side regarding the multicast request, including: If source A m All received for purpose A m A successful reply message, or an error reply message corresponding to the destination A. m All are source A m The corresponding preset mask A m Then source A m Return a success response message corresponding to the multicast request to the system side; If source A m Receive at least one non-source A m The corresponding preset mask A m Purpose A m If the error response message is from source A, then... m Return the error response information corresponding to the multicast request to the system side.

4. The system according to claim 1, characterized in that, The system adds a sideband signal to the system bus, and sets the multicast identifier and multicast group number in the sideband signal, source A. m Used to obtain the corresponding multicast group number in the multicast request through the sideband signal.

5. The system according to claim 1, characterized in that, The system sets a multicast identifier and a multicast group number within a preset address range corresponding to the address signal in the system bus, source A. m Used to obtain the corresponding multicast group number in the multicast request through a preset address range corresponding to the address signal in the system bus.

6. The system according to claim 4 or 5, characterized in that, The system bus uses a single channel to set multicast identifiers and multicast group numbers in the sideband signals.

7. The system according to claim 4 or 5, characterized in that, The system bus uses a complete bus transaction method to set multicast identifiers and multicast group numbers in the preset address range corresponding to the address signals in the system bus.

8. The system according to claim 4 or 5, characterized in that, The system buses include the Advanced Scalable Interface Bus (AXI), the High-Speed ​​Coherence Bus (ACE), the On-Chip Coherence Interconnect Bus (CHI), the High-Speed ​​Extended Interconnect Bus (CXS), and the Distributed Virtual Memory Bus (DVM).

9. The system according to claim 1, characterized in that, A m Including A m Corresponding adapter B m A m The corresponding MAC controller C m and A m The corresponding on-chip network D m C m Connected to the m-th interface of the switch; First register E m Second register F m and the third register G m All are set in B m middle; Source D m Used to obtain multicast requests from the system side and transmit them to source B. m ; Source B m Used for source E m The mapping relationship between multicast group numbers and multicast addresses set in the configuration determines the destination multicast address and generates a multicast frame header based on the destination multicast address. Then, it is packaged to generate a MAC frame and sent to the source C. m ; Source C m Used to transmit MAC frames to the switch.

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