Chip and circuit board cooperative heat dissipation optimization structure

Abstract

The application relates to the technical field of electronic component heat dissipation, and discloses a chip and circuit board cooperative heat dissipation optimization structure which comprises a main circuit board surface bearing a substrate assembly, a peripheral heating area, a main heat dissipation cold area and a heating chip; the top of the heating chip is tightly attached to a heat conduction top cover; the heat conduction top cover extends to form a high-thermal-resistance isolation leg on one side facing the peripheral heating area and leaves a heat backflow prevention gap; the other side downwardly extending main heat conduction leg is connected with a directional heat dissipation extension wing which is tightly attached to the main heat dissipation cold area; a system controller dynamically calculates the cross-layer temperature gradient and the transient thermal resistance state according to the multi-node temperature parameters and real-time power consumption collected by a temperature monitoring assembly; when it is determined that the heat backflow risk is faced, an instruction is sent to the system kernel to execute a frequency reduction operation to forcibly reduce the power consumption. The application realizes asymmetric directional heat transfer, accurately evaluates the physical thermal resistance state, and reduces the power consumption from the source when extreme heat saturation occurs, so that the heat backflow is avoided to cause heat runaway, and the operation safety is ensured.

Description

Technical Field

[0001] This invention relates to the field of heat dissipation technology for electronic components, specifically to an optimized structure for coordinated heat dissipation of chips and circuit boards. Background Technology

[0002] As the performance of electronic devices improves, the independent heat dissipation structure of high-power chips can no longer meet the heat dissipation requirements. The industry's conventional solution is to use the large area of ​​the circuit board to assist in heat dissipation. For example, Chinese invention patent application publication number CN117080185A discloses a chip packaging structure, electronic device, and chip heat dissipation cover. Its design is an integrated heat dissipation cover, which is directly attached to the upper surface of the chip. At the same time, the edge is mechanically fixed to the circuit board and forms a heat conduction interface. While dissipating the heat from the top of the chip, it also conducts some of the heat flow to the heat dissipation pads of the circuit board, thereby constructing a collaborative heat dissipation path from the top surface of the chip to the circuit board.

[0003] However, the aforementioned existing technologies have structural and control logic defects in practical applications. When establishing the thermal connection between the heat sink and the circuit board, the existing design does not isolate different heat-generating areas on the surface of the circuit board. The circuit board has peripheral heat-generating areas such as power supply components, and the heat conduction has bidirectional characteristics. When the temperature of the peripheral heat-generating areas rises sharply, the accumulated heat will flow back to the core heat-generating chip along the side wall of the conventional heat sink, forming a heat backflow phenomenon.

[0004] Furthermore, existing technologies only focus on passively constructing physical heat transfer interfaces. When the heat absorption of the cold zone of the circuit board reaches saturation, the system cannot dynamically sense the transient thermal resistance and cross-layer temperature gradient changes at the physical level. When faced with the risk of thermal channel blockage and severe heat backflow, existing systems lack an active intervention mechanism that directly intervenes in the power consumption of the heat source at the bottom layer of the system, resulting in continuous accumulation of heat and triggering thermal runaway of the equipment. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this invention provides a collaborative heat dissipation optimization structure for chips and circuit boards, which solves the problems in existing technologies where heat accumulation in high-heat areas of the circuit board flows back to the chip, and thermal runaway is caused by the inability to actively reduce the power consumption of the heat source when the heat is saturated.

[0006] To achieve the above objectives, the present invention provides the following technical solution: a collaborative heat dissipation optimization structure for a chip and a circuit board, comprising a carrier substrate assembly; The carrier substrate assembly is provided with a main circuit board, the surface of which is provided with a peripheral heating area and a main heat dissipation area, and a heating chip is mounted on the surface of the main circuit board; the top of the heating chip is closely attached to the heat-conducting top cover of the asymmetric heat-conducting shell. On the side facing the heating area around the main circuit board, the heat-conducting top cover extends downward to form a high thermal resistance isolation leg, and a heat-prevention backflow gap is left between the bottom of the high thermal resistance isolation leg and the main circuit board. A main heat-conducting support leg extends downward from the heat-conducting top cover and contacts the main circuit board, connecting to a directional heat dissipation extension wing that extends horizontally outward, the directional heat dissipation extension wing being in close contact with the main heat dissipation cold zone.

[0007] Furthermore, the heat backflow prevention gap is used to physically block heat from flowing back down to the peripheral heating area; at the same time, the heat backflow prevention gap is used to cut off the physical path of heat accumulation in the peripheral power supply components in the peripheral heating area on the main circuit board flowing back to the heating chip.

[0008] Furthermore, the dominant thermal support leg is used to diffuse the incoming heat laterally along the outwardly extending directional heat dissipation extension wing, and finally it is absorbed and dissipated by the large-area main heat dissipation cold zone that is closely attached to the directional heat dissipation extension wing, thus completing the forced asymmetric directional routing of heat from the high thermal resistance area to the large heat capacity cold zone at the physical level.

[0009] Furthermore, the on-chip temperature sensor with a temperature monitoring component disposed at the heating chip also includes a temperature monitoring component, which includes: an on-chip temperature sensor disposed at the heating chip; a hot zone temperature sensor disposed on the surface of the peripheral heating area; and a cold zone temperature sensor disposed on the surface of the main heat dissipation cold area.

[0010] Furthermore, the on-chip temperature sensor, the hot zone temperature sensor, and the cold zone temperature sensor are all communicatively connected to the system controller; the on-chip temperature sensor, the hot zone temperature sensor, and the cold zone temperature sensor are used to continuously collect the temperature parameters of their respective locations as on-chip temperature parameters, hot zone temperature parameters, and cold zone temperature parameters, and report them to the system controller in real time.

[0011] Furthermore, the system controller is used to dynamically calculate the cross-layer temperature gradient between the heating chip and the main heat dissipation cold zone based on the real-time operating power consumption of the heating chip and the on-chip temperature parameters, the hot zone temperature parameters, and the cold zone temperature parameters, and then deduce the transient thermal impedance state between the heating chip and the main heat dissipation cold zone.

[0012] Furthermore, when the assessment confirms that the current transient thermal impedance is within the normal range, the system controller determines that the heat transfer channel is unobstructed, maintains the high-performance output state of the heat-generating chip, and regulates the external cooling fan to concentrate airflow to the directional heat dissipation extension wing and the main heat dissipation cold zone to accelerate global thermal convection.

[0013] Furthermore, when the main heat dissipation cold zone experiences thermal saturation, causing the cross-layer temperature gradient to exceed a preset gradient threshold, the transient thermal impedance to exceed a preset impedance threshold, or the hot zone temperature sensor detects that the temperature of the peripheral heat-generating zone is greater than or equal to a preset safe temperature threshold, the system controller determines that the system faces the risk of thermal backflow.

[0014] Furthermore, when a risk of thermal backflow is detected, the system controller is used to directly bypass the conventional fan speed control logic and send a forced intervention command to the system kernel. By triggering the non-core module clock gating of the heat-generating chip or performing a frequency reduction operation of dynamic voltage frequency adjustment, the power consumption of the heat source is forcibly reduced, and this continues until the temperature parameter of the hot zone falls back to a temperature range of 5°C to 10°C below the preset safe temperature threshold, and the cross-layer temperature gradient and the transient thermal impedance both fall back to their respective normal ranges.

[0015] Furthermore, the high thermal resistance insulating leg is made of a low thermal conductivity insulating material, with a thermal conductivity at room temperature not exceeding 1.2 W / (m²). K).

[0016] This significantly reduces the axial heat conduction capacity of the support legs themselves, forming a dual blocking mechanism of material body insulation and air layer insulation with the bottom anti-heat backflow gap. This cuts off the solid thermal coupling path between the peripheral heat-generating area and the heat-generating chip, preventing heat backflow from raising the junction temperature of the heat-generating chip. At the same time, it forces the chip heat to be directionally diverted only along the main heat-generating support legs to the main heat dissipation cold area, improving the collaborative heat dissipation efficiency of the chip and the circuit board.

[0017] Furthermore, the high thermal resistance isolation leg is made of any one of modified polyphenylene sulfide (PPS) engineering plastic, closed-cell alumina porous ceramic, or aerogel glass fiber composite board.

[0018] These three types of low thermal conductivity insulating materials can construct a stable and efficient high thermal resistance barrier, enhance the effect of preventing backflow of heat, and ensure the efficient heat dissipation of the chip to the cold area.

[0019] Furthermore, the high thermal resistance isolation leg has 2 to 4 layers of enclosed cavities arranged along the height direction, and the enclosed cavities are filled with normal pressure dry air or argon gas.

[0020] The multi-layered enclosed cavity structure arranged along the height utilizes the extremely low thermal conductivity of the dry air or argon gas at normal pressure inside the cavity to increase the axial thermal resistance of the legs. Together with the heat-prevention gap at the bottom of the legs, it forms a multi-level thermal insulation barrier, further blocking the heat conduction path from the heat-generating area of ​​the circuit board to the heat-generating chip, strengthening the heat-prevention effect, and forcing the chip's heat to be directionally diverted along the main heat-generating legs to the main heat-dissipating cold area, thereby improving the collaborative heat dissipation efficiency of the chip and the circuit board.

[0021] Furthermore, in another alternative embodiment, the high thermal resistance isolation leg is a closed-cell foam-molded porous skeleton structure with a porosity of 65% to 80%, and the internal pores are not interconnected.

[0022] This closed-cell foam-molded porous skeleton structure, with its 65%-80% porosity and internally non-interconnected closed-cell structure, forms a large number of air insulation units inside the support leg, which greatly improves axial thermal resistance and suppresses internal convection heat transfer. It can work together with the heat backflow prevention gap at the bottom of the support leg to form a multi-level thermal barrier, further weakening the heat backflow effect from the heat-generating area of ​​the circuit board to the heat-generating chip, and forcing the chip heat to be directionally diverted along the main heat-generating support leg to the main heat dissipation cold area.

[0023] Furthermore, the height of the heat backflow prevention gap is 0.2mm to 0.4mm, and the bottom end face of the high thermal resistance isolation leg is set parallel to the surface of the main circuit board, with a flatness of no more than 0.05mm.

[0024] The 0.2mm-0.4mm gap height, combined with the parallel arrangement of the bottom end face of the support legs with a flatness of no more than 0.05mm, can ensure that the gap is uniform and there is no solid contact throughout, while adapting to the assembly tolerance of conventional circuit boards. This completely blocks the solid heat conduction path and effectively suppresses air convection heat transfer within the gap, stably ensuring the anti-backflow effect and ensuring the coordinated heat dissipation efficiency of the chip's heat to the main heat dissipation area.

[0025] Furthermore, the sidewall surface of the high thermal resistance isolation leg facing the peripheral heating area is provided with an infrared heat-reflective coating, and the infrared heat-reflective coating has an infrared reflectivity of not less than 92% in the 8 to 14 μm band.

[0026] The infrared heat-reflective coating installed on the side wall of the support leg facing the outer heating area can achieve a reflectivity of no less than 92% in the main infrared radiation band of normal temperature objects at 8-14μm. It effectively blocks the radiative heat transfer path from the outer heating area to the heating chip. Together with the conductive heat insulation structure of the support leg, it forms a double heat blocking barrier, enhances the effect of preventing heat backflow, and ensures the coordinated heat dissipation efficiency of the chip's heat being directionally diverted to the main heat dissipation area.

[0027] Furthermore, a U-shaped elastic compensation bending section is provided in the middle of the high thermal resistance isolation leg; the elastic compensation bending section is used to absorb the thermal deformation difference between the heat-conducting top cover and the main circuit board, and maintain the high stability of the anti-heat backflow gap within the working temperature range of -40℃ to 125℃.

[0028] The U-shaped elastic compensation bending section can absorb the thermal deformation difference between the heat-conducting top cover and the main circuit board, and stably maintain the height of the anti-heat backflow gap within a wide operating temperature range of -40℃ to 125℃. This avoids thermal expansion and contraction causing the bottom of the support leg to contact the circuit board and cause thermal insulation failure, ensuring the long-term reliability of the thermal blocking effect and the directional heat dissipation of the chip, and improving the working stability of the overall collaborative heat dissipation structure.

[0029] Furthermore, the high thermal resistance isolation legs are continuously extended along the edge of the outer heating area to form a semi-enclosed heat insulation barrier, which spatially separates the outer heating area from the heating chip in the horizontal direction.

[0030] The semi-enclosed heat insulation barrier, which extends continuously along the edge of the outer heat-generating area, can achieve spatial thermal decoupling between the outer heat-generating area and the heat-generating chip in the horizontal direction. It upgrades the local heat insulation of the single-point support leg to a surface-area all-round heat barrier, weakens the conduction and radiation heat backflow effect from the high heat-generating area to the chip, strengthens the effect of directional heat dissipation of the chip to the main heat dissipation area, and improves the overall collaborative heat dissipation efficiency.

[0031] Furthermore, the thickness of the directional heat dissipation extension fin decreases linearly from the connection point of the main heat-generating support leg to the outer edge, with a thickness of 1.2mm-2.0mm at the root and 0.8mm-0.4mm at the edge. This gradual thickness perfectly matches the heat flux density's gradual decrease from the root to the edge, which helps to avoid material redundancy while ensuring heat expansion efficiency, thus achieving a lightweight heat dissipation design.

[0032] Furthermore, the directional heat dissipation extension wing is fan-shaped or polygonal flat, with a horizontal projected area not less than 2-5 times the top area of ​​the heat-generating chip, and the wing edge extends 1-3mm beyond the boundary of the main heat dissipation cold zone. This specific shape and area expansion design can utilize the physical space inside the chassis to distribute heat evenly. At the same time, the setting of the wing edge extending beyond the boundary of the cold zone can overcome the edge accumulation effect of heat at the boundary and improve the overall heat capacity utilization rate of the cold zone.

[0033] Furthermore, a layer of thermally conductive interface material is provided between the lower surface of the directional heat dissipation extension wing and the main heat dissipation cold zone. The thickness of the thermally conductive interface material is 0.05-0.15mm, its room temperature thermal conductivity is ≥5W / (m·K), and it is a phase change type or gel type thermally conductive pad.

[0034] By using phase change or gel-type thermal interface materials with specific thickness and high thermal conductivity, the microscopic contact gap between the directional heat dissipation extension fins and the cold zone can be effectively eliminated, achieving low thermal resistance and highly reliable heat transfer.

[0035] Furthermore, the directional heat dissipation extension wing is a copper-aluminum composite plate, wherein the upper layer is a copper layer with a thickness of 0.2-0.5mm, and the lower layer is an aluminum layer with a thickness of 0.5-1.0mm, and the copper layer is integrally formed with the main heat-generating support leg; or the directional heat dissipation extension wing is a graphene / copper composite film with a total thickness of 0.3-0.8mm and an in-plane thermal conductivity ≥800W / (m·K).

[0036] By using copper-aluminum composite plates (copper layer integrally formed with the main heat-dissipating leg) or graphene / copper composite films with ultra-high in-plane thermal conductivity, the lateral thermal resistance of the wing is significantly reduced while ensuring good thermal connection with the leg, allowing heat to diffuse to the main heat dissipation area more quickly and evenly, thus avoiding the thermal conductivity bottleneck of a single metal material.

[0037] By limiting the thickness (0.05-0.15mm), high thermal conductivity (≥5W / (m·K)) and phase change / gel type of the thermal interface material, it is beneficial to eliminate the contact gap between the wing and the cold zone, achieve low thermal resistance and high reliability of heat transfer, ensure that the chip heat is efficiently conducted to the cold zone, and improve the collaborative heat dissipation performance.

[0038] Furthermore, the distal edge of the directional heat dissipation extension wing is provided with at least two snap-fit ​​protrusions, and the main circuit board is provided with snap-fit ​​holes at corresponding positions. The snap-fit ​​protrusions pass through the snap-fit ​​holes and are hooked and fixed, so that the directional heat dissipation extension wing and the main heat dissipation cold zone maintain a constant contact pressure.

[0039] By using the hooks and latches of the protrusions and holes, a constant contact pressure is maintained between the directional heat dissipation extension fins and the main heat dissipation area. This fundamentally eliminates the risk of loosening due to vibration, thermal cycling, or assembly tolerances, ensuring the long-term reliability and stability of the heat dissipation path.

[0040] Furthermore, the upper surface of the directional heat dissipation extension wing is provided with parallel arranged micro straight fins, the fin height is 1.0mm-1.5mm, and the fin surface is coated with a high-radiation heat dissipation coating with an infrared emissivity of not less than 0.9.

[0041] By adding parallel-arranged micro-straight fins to the upper surface of the directional heat dissipation extension fin and coating them with a high-radiation heat dissipation coating, the convective and radiative heat dissipation area is increased, enabling the directional heat dissipation extension fin to obtain an additional high-efficiency secondary heat dissipation capacity on the basis of conduction heat dissipation, thereby further reducing the chip junction temperature and improving the overall heat dissipation margin.

[0042] Furthermore, an anisotropic thermal resistance layer is provided at the connection between the directional heat dissipation extension wing and the main heat support leg. The thermal conductivity of the anisotropic thermal resistance layer along the support leg towards the extension wing is more than N times that in the reverse direction, thus limiting the reverse conduction of heat from the main heat dissipation cold zone to the heat-generating chip.

[0043] By setting an anisotropic thermal resistance layer at the connection point, heat can only be efficiently conducted unidirectionally from the main heat-generating leg to the directional heat dissipation extension wing. The reverse thermal resistance is as high as 5-10 times, for example, more than 8 times, which prevents the heat from the main heat dissipation cold area from flowing back to the heat-generating chip. This achieves unidirectional rectification of heat and further improves the thermal safety of the chip and the heat dissipation efficiency of the system.

[0044] In some embodiments, the system controller has a built-in reinforcement learning model; The state space of the reinforcement learning model includes at least: the on-chip temperature parameter, the hot zone temperature parameter, the cold zone temperature parameter, the real-time power consumption of the heat-generating chip, and the current speed of the external cooling fan; The action space of the reinforcement learning model includes at least: adjusting the speed of the external cooling fan and adjusting the operating frequency or voltage of the heat-generating chip; The reward function of the reinforcement learning model is set as follows: under the premise that all temperature parameters do not exceed their respective safe temperature limits, the comprehensive reward value output by the reward function is obtained by adding the system performance reward item and the fan energy consumption penalty item; wherein, the system performance reward item is the product of the real-time operating frequency of the heat-generating chip and the preset positive weight coefficient, and the fan energy consumption penalty item is the product of the current speed of the external cooling fan and the preset negative weight coefficient. The system controller is used to coordinate the control of the external cooling fan and / or the heat-generating chip according to the optimal action instructions output by the reinforcement learning model, and to continuously iteratively update the parameters of the reinforcement learning model during operation.

[0045] In some embodiments, the system controller is also configured to record and store historical thermal event logs of the heating chip throughout its entire operating lifecycle; The historical thermal event log includes at least the cross-layer temperature gradient, the transient thermal impedance, and the ambient temperature each time the forced intervention command is triggered. The system controller is used to construct a thermal resistance degradation model of the thermal interface between the thermally conductive top cover and the main thermal support leg based on the historical thermal event logs and through statistical regression analysis. The system controller is used to dynamically correct the safe temperature threshold according to the thermal resistance degradation model in order to compensate for the degradation of heat dissipation performance caused by the aging of thermal grease or the reduction of contact pressure. When the thermal resistance degradation model indicates that the thermal resistance of the thermal interface has degraded to a preset replacement threshold, the system controller issues a maintenance alarm signal.

[0046] This invention provides a collaborative heat dissipation optimization structure for chips and circuit boards, which has the following beneficial effects: This invention cuts off the reverse heat transfer path from the peripheral heat-generating area to the heat-generating chip by using a high thermal resistance isolation legs and a heat-prevention gap design in the asymmetric thermal conductive shell. The heat is then diffused laterally to the main heat-dissipating cold area through the main thermal support legs and directional heat dissipation extension wings. This asymmetric directional routing structure blocks the backflow of heat accumulated in the surrounding power supply components to the core chip and forces the heat to be transferred to the large heat capacity cold area, thereby improving the overall heat conduction efficiency.

[0047] This invention utilizes multi-node temperature sensors to collect temperature parameters of each region, combines the real-time operating power consumption of the heating chip to dynamically calculate the cross-layer temperature gradient and transient thermal impedance, and introduces a time sliding window algorithm to smooth the sampled data. The calculation mechanism eliminates the physical time lag effect and environmental transient extreme value interference in the heat conduction process, enabling the system to accurately assess the actual heat conduction capacity of the current heat dissipation channel and avoid misjudgments in temperature control scheduling.

[0048] This invention enables the system controller to bypass conventional fan speed control logic and send a forced intervention command to the system kernel to perform hardware-level frequency reduction when the main heat dissipation cold zone is determined to be thermally saturated or the system faces a serious risk of thermal backflow. This underlying intervention mechanism directly and forcibly reduces the power consumption of core components from the source when the external passive heat dissipation capacity reaches its physical limit, preventing the chip from thermal runaway due to continuous heat accumulation and ensuring the safety of equipment operation. Attached Figure Description

[0049] Figure 1 This is a perspective view of the present invention; Figure 2 This is a schematic diagram of the structure of the heat-prevention backflow gap of the present invention; Figure 3 This is a schematic diagram of the structure of the on-chip temperature sensor of the present invention; Figure 4 This is a schematic diagram of the system control module architecture of the present invention; Figure 5 This is a schematic diagram of the chip and circuit board collaborative heat dissipation control method of the present invention; Figure 6 This is a schematic diagram illustrating the implementation steps of the transient data processing and thermal impedance calculation logic of the present invention; Figure 7 This is a schematic diagram showing the temperature comparison curves of the heating chip in the experimental group and the control group of the present invention.

[0050] Among them, 100 is the carrier substrate assembly; 110 is the main circuit board; 120 is the peripheral heating area; 130 is the main heat dissipation area; 200 is the heating element assembly; 210 is the heating chip; 300 is the asymmetric heat-conducting shell; 310 is the heat-conducting top cover; 320 is the high thermal resistance isolation leg; 321 is the heat-prevention backflow gap; 330 is the main heat-conducting leg; 340 is the directional heat dissipation extension wing; 400 is the temperature monitoring assembly; 410 is the on-chip temperature sensor; 420 is the hot zone temperature sensor; 430 is the cold zone temperature sensor; 440 is the power consumption monitoring node; 500 is the system controller; 510 is the data sensing module; 520 is the logic calculation module; 530 is the control execution module; 600 is the external cooling fan; and 700 is the system kernel. Detailed Implementation

[0051] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0052] This invention utilizes an asymmetric thermally conductive shell with high thermal resistance isolation legs and anti-backflow gaps on the high-heat-generating area side to achieve thermal circuit breaking. Simultaneously, on the cold-area side, primary thermal support legs and directional heat dissipation extension wings actively distribute heat into the cold area of ​​the plate surface. This allows the shell to perform the thermal routing scheduling function in two-stage coordinated heat dissipation, rather than simply conducting heat. Please refer to [link to relevant documentation]. Figures 1 to 3 This invention provides a collaborative heat dissipation optimization structure for a chip and a circuit board, comprising: The carrier substrate assembly 100 is provided with a main circuit board 110. The surface of the main circuit board 110 is provided with a peripheral heating area 120 and a main heat dissipation area 130. The heating chip 210 mounted on the surface of the main circuit board 110 belongs to the heating element assembly 200.

[0053] The top of the heating chip 210 is in close contact with the heat-conducting top cover 310 of the asymmetric heat-conducting housing 300; On the side facing the heating area 120 around the main circuit board 110, the heat-conducting top cover 310 extends downward to form a high thermal resistance isolation leg 320, and a heat-preventing backflow gap 321 is left between the bottom of the high thermal resistance isolation leg 320 and the main circuit board 110. The heat-prevention gap 321 utilizes the high thermal resistance of the air layer to physically block heat from flowing back down to the peripheral heating area 120. At the same time, the heat-prevention gap 321 completely cuts off the physical path of the heat accumulated in the peripheral power supply components in the peripheral heating area 120 of the main circuit board 110 flowing back to the heating chip 210.

[0054] The thermally conductive top cover 310 extends downward toward the main heat dissipation cold area 130 and contacts the main circuit board 110 to form a main thermal support leg 330. The main thermal support leg 330 is connected to the outwardly horizontally extending directional heat dissipation extension wing 340. The directional heat dissipation extension wing 340 is in close contact with the large area of ​​the main heat dissipation cold area 130. The main thermal support leg 330 rapidly diffuses the incoming heat laterally along the outwardly horizontally extending directional heat dissipation extension wing 340, and finally it is absorbed and dissipated by the tightly attached large area of ​​the main heat dissipation cold area 130. At the physical level, this completes the forced asymmetric directional routing of heat from the high thermal resistance area to the large heat capacity cold area.

[0055] The collaborative heat dissipation optimization structure also includes a temperature monitoring component 400, which specifically includes: an on-chip temperature sensor 410 located at the heat-generating chip 210; a hot zone temperature sensor 420 located on the surface of the peripheral heat-generating area 120; and a cold zone temperature sensor 430 located on the surface of the main heat dissipation cold zone 130.

[0056] The on-chip temperature sensor 410, the hot zone temperature sensor 420, and the cold zone temperature sensor 430 are all connected to the system controller 500. The on-chip temperature sensor 410, the hot zone temperature sensor 420, and the cold zone temperature sensor 430 continuously collect the temperature parameters of their respective locations as on-chip temperature parameters, hot zone temperature parameters, and cold zone temperature parameters, and report them to the system controller 500 in real time.

[0057] The system controller 500 dynamically calculates the cross-layer temperature gradient between the heating chip 210 and the main heat dissipation cold zone 130 based on the real-time operating power consumption and on-chip temperature parameters, hot zone temperature parameters and cold zone temperature parameters of the heating chip 210, and infers the transient thermal impedance state.

[0058] The system controller 500 introduces a time sliding window algorithm to smooth transient temperature data. The smoothed data eliminates the physical time lag effect and prevents misjudgment caused by local extrema.

[0059] When the assessment confirms that the current transient thermal impedance is within the preset normal thermal impedance range threshold, the system controller 500 determines that the heat transfer channel is smooth, maintains the high-performance output state of the heat-generating chip 210, and regulates the external cooling fan 600 to concentrate airflow to the directional heat dissipation extension wing 340 and the main heat dissipation cold zone 130 to accelerate global thermal convection.

[0060] When the main heat dissipation cold zone 130 becomes thermally saturated, causing a sharp increase in the cross-layer temperature gradient, an abnormal increase in transient thermal impedance, or when the hot zone temperature sensor 420 detects that the temperature of the peripheral heat-generating zone 120 is greater than or equal to the preset safe temperature threshold, the system determines that it faces a serious risk of thermal backflow.

[0061] At this time, the system controller 500 bypasses the conventional fan speed control logic and forces the external cooling fan 600 to run at its maximum speed. At the same time, it sends a forced intervention command to the system kernel 700, which forcibly reduces the power consumption of the heat source by triggering the non-core module clock gating of the heat chip 210 or performing a frequency reduction operation of dynamic voltage and frequency adjustment.

[0062] The mandatory intervention command will continue to be executed until the temperature parameter of the hot zone falls back to the temperature range of 5°C to 10°C below the preset safe temperature threshold, and the cross-layer temperature gradient and transient thermal impedance both fall back to their respective normal ranges.

[0063] Please see Figure 4 In a preferred embodiment of the present invention, a system control module architecture is shown that features a collaborative heat dissipation optimization structure for the chip and the circuit board. The system control module architecture includes: a data sensing module 510, a logic calculation module 520, and a control execution module 530.

[0064] In the data sensing module 510, the on-chip temperature sensor 410, the hot zone temperature sensor 420 and the cold zone temperature sensor 430 serve as input nodes, connected in parallel with the power consumption monitoring node 440 of the heating chip 210 to continuously collect the temperature parameters and real-time operating power consumption of their respective locations, and report them to the system controller 500 in real time through the high-speed internal bus.

[0065] In the logic computing module 520, the system controller 500 receives on-chip temperature parameters, hot zone temperature parameters, cold zone temperature parameters, and real-time operating power consumption data, and then starts the built-in algorithm engine.

[0066] For transient temperature data that exhibits physical time lag characteristics, the system controller 500 introduces a time sliding window algorithm for smoothing and avoids misjudgment of local extrema.

[0067] Subsequently, the system controller 500 continuously calculates the cross-layer temperature gradient between the heat-generating chip 210 and the main heat dissipation cold zone 130 in real time according to the smoothed temperature parameters and real-time operating power consumption, and calculates the transient thermal impedance state based on the cross-layer temperature gradient.

[0068] In the control execution module 530, the output of the system controller 500 establishes control links with the external cooling fan 600 and the system kernel 700 of the heat-generating chip 210, respectively.

[0069] The system controller 500 makes a shunt decision based on the transient thermal impedance state calculated by the logic calculation module 520: When the assessment confirms that the current transient thermal resistance is within the normal range, the system controller 500 determines that the heat transfer channel is unobstructed and controls the external cooling fan 600 to concentrate airflow to the directional heat dissipation extension wing 340 and the main heat dissipation cold zone 130 through the conventional control bus, so as to maintain the high-performance output state of the heat-generating chip 210 and accelerate global thermal convection.

[0070] When the main heat dissipation cold zone 130 becomes thermally saturated, causing a sharp increase in the cross-layer temperature gradient, an abnormal increase in transient thermal resistance, or when the hot zone temperature sensor 420 detects that the temperature of the peripheral heat-generating zone 120 is greater than or equal to the preset safe temperature threshold, the system controller 500 determines that there is a risk of thermal backflow.

[0071] At this time, the system controller 500 switches to the highest control authority and bypasses the normal fan speed control logic, forcibly locking the external cooling fan to run at the maximum speed. At the same time, it sends a forced intervention command to the system kernel 700, which forcibly reduces the power consumption of the heat source by triggering the non-core module clock gating of the heat chip 210 or performing a frequency reduction operation of dynamic voltage and frequency adjustment.

[0072] The system continuously executes forced intervention commands in a loop until the temperature parameters of the hot zone fall back to a temperature range 5°C to 10°C below the preset safe temperature threshold, and the cross-layer temperature gradient and transient thermal impedance both fall back to their respective normal ranges, thus achieving closed-loop protection.

[0073] like Figure 5 As shown, this embodiment of the invention provides a chip and circuit board collaborative heat dissipation control method, including the following steps: S10 continuously collects the on-chip temperature parameters of the heating chip 210, the hot zone temperature parameters of the surface of the peripheral heating area 120, and the cold zone temperature parameters of the surface of the main heat dissipation cold area 130, and obtains the real-time operating power consumption of the heating chip 210. S20 introduces a time sliding window algorithm to smooth transient temperature data, and dynamically calculates the cross-layer temperature gradient between the heat-generating chip 210 and the main heat dissipation cold zone 130 based on real-time operating power consumption and on-chip temperature parameters, hot zone temperature parameters and cold zone temperature parameters, and infers the transient thermal impedance state. S30, when the assessment confirms that the current transient thermal resistance is within the normal range, maintain the high-performance output state of the heat-generating chip 210, and regulate the external cooling fan 600 to concentrate airflow to the directional heat dissipation extension wing 340 and the main heat dissipation cold zone 130. S40: When the main heat dissipation cold zone 130 becomes thermally saturated, causing a sharp increase in the cross-layer temperature gradient, an abnormal increase in transient thermal resistance, or the temperature of the peripheral heat dissipation zone 120 to be greater than or equal to the safe temperature threshold, the external cooling fan is forced to run at full speed. At the same time, a forced intervention command is sent to the system kernel 700 to perform a frequency reduction operation to forcibly reduce the power consumption of the heat source until the temperature parameter of the hot zone falls back to the temperature range of 5°C to 10°C below the preset safe temperature threshold, and the cross-layer temperature gradient and transient thermal resistance both fall back to their respective normal ranges.

[0074] See Figure 6 In specific implementations, steps S10 to S40 provided by the present invention may include the following steps: In specific implementation, the system polls the on-chip temperature sensor 410, hot zone temperature sensor 420 and cold zone temperature sensor 430 through the hardware communication bus according to a preset sampling period to obtain the on-chip temperature parameters at the heating chip 210, the hot zone temperature parameters on the surface of the peripheral heating zone 120 and the cold zone temperature parameters on the surface of the main heat dissipation cold zone 130, respectively. In this embodiment, the preset sampling period ranges from 10 milliseconds to 100 milliseconds.

[0075] The configuration of the serial peripheral interface or integrated circuit bus protocol used for the underlying communication of the sensor is done by conventional register read / write settings through the hardware manual. The underlying communication mechanism is a well-known technology in this field.

[0076] In step S201, executed by the time-sliding window smoothing module, the system controller 500 introduces a time-sliding window algorithm to smooth transient temperature data in the buffer queue that exhibits physical time lag and contains environmental noise. The smoothing process includes: establishing a fixed-length data window, removing old sampled data as new sampled data slides in, performing moving average calculations on various temperature parameters within the window, and obtaining smoothed on-chip temperature parameters, hot zone temperature parameters, and cold zone temperature parameters. The smoothing process filters out transient acquisition extrema and avoids misjudgments by the control end. The formula for calculating the moving average is: ; In the formula, The temperature parameter after smoothing; The set sliding window data length, the value range of which is 5 to 20; This is the sequence number of the sampling period within the sliding window; For the first in the window The original temperature parameters for each sampling period.

[0077] In step S202, executed by the transient thermal impedance and temperature gradient calculation module, the system controller 500 calculates the transient thermal impedance state based on the cross-layer temperature gradient and the real-time operating power consumption of the heat-generating chip 210. The transient thermal impedance characterizes the actual resistance of the current physical heat dissipation channel to heat flow. The system calculates the transient thermal impedance based on Ohm's law of thermodynamics. The formula for calculating the transient thermal impedance is: ; In the formula, Transient thermal impedance; The calculated cross-layer temperature gradient; Real-time operating power consumption with timestamps aligned with temperature data.

[0078] In step S203 executed by the multidimensional safety threshold logic comparison module, the system controller 500 is pre-configured with a normal thermal impedance range threshold. The normal thermal impedance range threshold is determined based on the calibrated thermal impedance base value of the system under normal temperature no-load conditions plus a margin of 10% to 20%. The system performs a logic comparison between the calculated transient thermal impedance and the normal thermal impedance range threshold in real time.

[0079] When the comparison result indicates that the current transient thermal impedance is less than or equal to the upper limit of the normal thermal impedance range threshold, the system controller 500 generates a channel smoothness determination signal.

[0080] In step S301, which is performed by the normal state maintenance and fan speed control module, the system maintains the high-performance output state of the current operating frequency and voltage setting of the heat-generating chip 210 according to the channel smoothness determination signal, generates a pulse width modulation control signal and sends it to the external cooling fan 600 to regulate the operating speed of the external cooling fan 600.

[0081] The external cooling fan 600 directs airflow to the directional cooling extension wing 340 and the main cooling zone 130, and removes the heat accumulated in the main cooling zone 130 through forced air convection. The pulse width modulation speed control circuit of the external cooling fan 600 is built using a conventional driver chip. The system continuously monitors various data indicators.

[0082] When the temperature parameter of the cold zone rises, causing the cold end to lose its heat absorption capacity and become thermally saturated, resulting in an increase in the cross-layer temperature gradient value and exceeding the set gradient safety upper limit, or when the calculated transient thermal impedance value exceeds the upper limit of the normal thermal impedance range threshold, or when the temperature parameter of the hot zone exceeds the preset safety temperature threshold, the system controller 500 generates an abnormal interruption signal indicating a risk of thermal backflow based on the above conditions.

[0083] In step S401 executed by the abnormal interrupt and forced frequency reduction intervention module, in conjunction with the abnormal interrupt signal, the system controller 500 switches to the highest priority control mode, shields the underlying conventional fan speed control logic and outputs a full-proportion pulse width modulation signal to make the external cooling fan 600 run at full speed. At the same time, it sends a forced intervention command to the system kernel 700 through the system bus. After receiving the forced intervention command, the system kernel 700 performs a hardware-level frequency reduction operation on the heat-generating chip 210.

[0084] The hardware-level frequency reduction operation specifically involves sending a clock gating signal to cut off the clock flipping of the non-core computing module inside the heat-generating chip 210, or calling the dynamic voltage and frequency adjustment register to reduce the power supply voltage and main frequency parameters of the heat-generating chip 210 in a stepwise manner, thereby reducing the dynamic current consumption, voltage drop, and overall power consumption of the heat source of the heat-generating chip 210.

[0085] During the intervention, the system controller 500 maintains high-frequency polling and cycles through step-down frequency reduction operations until the hot zone temperature parameter falls back to a temperature range 5°C to 10°C below the preset safe temperature threshold, and the cross-layer temperature gradient and transient thermal impedance both fall back to their respective normal ranges. At this point, the system controller 500 cancels the command and resumes normal scheduling, thus avoiding the risk of deadlock.

[0086] In another preferred embodiment, to achieve the optimal energy efficiency ratio under extreme nonlinear thermal conditions, the system controller 500 incorporates a reinforcement learning model (e.g., an agent based on a deep deterministic policy gradient algorithm). The state space of the reinforcement learning model continuously receives multi-dimensional sensor data, including at least smoothed on-chip temperature parameters, hot zone temperature parameters, cold zone temperature parameters, real-time power consumption of the heat-generating chip 210, and the current speed feedback value of the external cooling fan 600. The action space of the reinforcement learning model outputs specific execution instructions, including at least: adjusting the pulse width modulation duty cycle speed of the external cooling fan 600, and changing the operating frequency or voltage by adjusting the step level of the dynamic voltage frequency adjustment of the heat-generating chip 210.

[0087] The core orientation of a reinforcement learning model is determined by a reward function, which is set as follows: a penalty term is set to ensure that all temperature parameters do not exceed their respective safe temperature limits. Under this hard boundary condition, the comprehensive reward value is calculated through the following mathematical logic: Comprehensive reward value = ×Real-time operating frequency of the heating chip+ × Current speed of the external cooling fan; where The preset positive weighting coefficients ( >0), β is the preset negative weighting coefficient ( <0). By optimizing this comprehensive reward value in the reinforcement learning iterations in the direction of increasing value, since For positive The negative value essentially means that the mathematical logic is equivalent to reducing the energy consumption of the cooling fan while improving the system's operating performance.

[0088] During actual operation of the device, the system controller 500 coordinates the control of the external cooling fan 600 and / or the heat-generating chip 210 based on the optimal action command output by the reinforcement learning model. It continuously iterates and updates the network parameters of the reinforcement learning model by evaluating the state changes and reward scores after each action, enabling it to adapt to minor changes in the current ambient temperature and physical heat dissipation structure. Specifically, the system controller 500 stores an experience tuple consisting of the current state, selected action, immediate reward, and next state obtained after each action execution into an experience replay pool. It periodically samples small batches of samples randomly from the experience replay pool, calculates the temporal difference error, and backpropagates along the gradient to update the weight parameters of the policy network (Actor network) and value network (Critic network) in the reinforcement learning model. Simultaneously, it uses a soft update method to synchronize the target network parameters, thereby achieving continuous iterative optimization of the network parameters.

[0089] In some embodiments, the system controller 500 records and stores historical thermal event logs of the heating chip 210 throughout its entire operational lifecycle. Each time a forced intervention command targeting the system kernel 700 is triggered, the system controller 500 writes the cross-layer temperature gradient, the calculated transient thermal impedance, and the ambient temperature at the moment of triggering into the historical thermal event log. Based on the accumulated historical thermal event logs, the system controller 500 constructs a thermal resistance degradation model of the thermal interface between the thermally conductive top cover 310 and the main thermal support leg 330 through statistical regression analysis. Statistical regression analysis specifically refers to using the cross-layer temperature gradient, transient thermal impedance, and ambient temperature recorded in the historical thermal event log at the moment of each forced intervention command trigger as characteristic independent variables, and the equivalent thermal resistance of the thermal interface between the thermally conductive top cover and the main thermal support leg measured at the corresponding moment as the dependent variable, and fitting a degradation function relationship of the thermal interface thermal resistance evolving with operating conditions through multivariate nonlinear regression. The equivalent thermal resistance is calculated by dividing the temperature difference between the thermally conductive top cover and the main thermal support leg in the cross-layer temperature gradient at the moment of triggering by the real-time power consumption of the heating chip.

[0090] As equipment service time increases, if the thermal resistance degradation model indicates an upward trend in the interface thermal resistance, the system controller 500 dynamically adjusts the previously set safe temperature threshold downwards based on the degradation ratio of the thermal resistance degradation model (for example, if the calculated base thermal resistance increases by 15%, the system controller 500 lowers the safe temperature threshold of the peripheral heat-generating area from the original preset 90°C to 87°C), thereby triggering the system protection mechanism earlier. When the thermal resistance degradation model indicates that the thermal resistance of the heat-conducting interface has degraded to the preset replacement threshold compared to the reference value, the system controller 500 determines that the current heat dissipation architecture has a potential risk of thermal runaway and issues a maintenance alarm signal.

[0091] To aid in understanding the technical solution of this invention, the following provides an application example and test example of a collaborative heat dissipation optimization structure for chips and circuit boards.

[0092] In this embodiment, the sliding window data length is set to 10 sampling points, the preset sampling period is 50 milliseconds, the system's calibration thermal impedance base value under normal temperature no-load conditions is 0.5℃ per watt, and after adding a 20% margin, the upper limit of the normal thermal impedance range threshold is determined to be 0.6℃ per watt, the set gradient safety upper limit value is 30℃, the safety temperature threshold of the peripheral heating area corresponding to the hot zone temperature sensor is set to 90℃, and the corresponding safety setting range is 80℃ to 85℃.

[0093] Within a certain determination period, the system obtains that the real-time operating power consumption of the heating chip is 40 watts. It extracts the transient temperature data of the past 10 periods from the cache queue of the data sensing module. The original data of the on-chip temperature parameter for the past 10 periods are 85.1℃, 85.4℃, 85.2℃, 85.5℃, 84.9℃, 85.6℃, 85.3℃, 85.2℃, 85.7℃ and 85.1℃ respectively. The system controller 500 performs a moving average calculation to obtain a smoothed on-chip temperature parameter of 85.3℃. Similarly, the cold zone temperature parameter obtained after smoothing is 64.7℃ and the hot zone temperature parameter is 78.4℃.

[0094] The system controller 500 extracts the smoothed on-chip temperature parameter and subtracts the smoothed cold zone temperature parameter to calculate the cross-layer temperature gradient as 20.6℃. Then, the cross-layer temperature gradient is divided by the real-time operating power consumption to calculate the transient thermal impedance as 0.515℃ per watt.

[0095] Given that the current transient thermal impedance is 0.515℃ per watt, which is less than the upper limit of the normal thermal impedance range threshold of 0.6℃ per watt, the cross-layer temperature gradient is 20.6℃, which is less than the upper limit of the gradient safety value of 30℃, and the hot zone temperature parameter is 78.4℃, which is less than the safe temperature threshold of 90℃, the system determines that the heat transfer channel is smooth, maintains the high-performance output of the heat-generating chip, and outputs a conventional pulse width modulation signal to drive the external cooling fan.

[0096] In subsequent determination cycles, the smoothed on-chip temperature parameters were obtained as follows: 92.6℃, cold zone temperature parameter: 80.2℃, hot zone temperature parameter: 89.8℃, and the real-time operating power consumption of the heat-generating chip was 45 watts.

[0097] The system controller 500 calculates that the cross-layer temperature gradient is 12.4℃ and the transient thermal resistance is 0.275℃ per watt. Combined with the fact that the hot zone temperature parameter of 89.8℃ is greater than the upper limit of the preset safety setting range and is increasing towards the safety temperature threshold of 90℃, the system generates an abnormal interrupt signal, locks the external cooling fan to full speed operation, and forcibly reduces the power supply voltage of the heat-generating chip. Under the forced intervention command, the overall power consumption of the heat source is reduced to 15 watts. The system maintains high-frequency polling until the hot zone temperature parameter drops to 83.5℃, which is within the safety setting range of 80℃ to 85℃. At this point, the system cancels the forced intervention command and resumes normal scheduling.

[0098] Test example: The experimental verification section selected the first motherboard and the second motherboard as experimental objects. The first motherboard, as the experimental group, adopted the chip and circuit board collaborative heat dissipation optimization structure provided by the present invention. The second motherboard, as the control group, adopted the existing conventional symmetrical heat sink and fixed fan temperature control curve strategy.

[0099] The experimental group and the control group were placed in a test chamber with the ambient temperature set at 25℃. The test software was loaded to put the heating chip under full load. After running for 60 seconds, 50% of the air inlet of the test chamber was blocked. The temperature of the heating chip and the temperature of the surrounding heating area of ​​the experimental group and the control group were recorded by an external thermal imager during the operation from 0 seconds to 300 seconds. Feature data was extracted every 30 seconds.

[0100] Comparison table of temperature test data between experimental group and control group From the table above and appendix Figure 7It can be seen that during the operation phase from 0 to 120 seconds, the temperature of the peripheral heating zone of the experimental group was lower than that of the control group. After 150 seconds, the temperature of the peripheral heating zone of the control group continued to rise to 112.1℃. At 180 seconds, the temperature parameter of the heating zone of the experimental group reached 89.3℃, and the system generated an abnormal interruption signal to perform frequency reduction intervention. At 210 seconds, the temperature of the heating chip of the experimental group dropped to 79.4℃ and the temperature of the peripheral heating zone dropped to 82.6℃. The system revoked the forced intervention command and operated within the safe setting range.

[0101] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A collaborative heat dissipation optimization structure for a chip and a circuit board, characterized in that, Includes a substrate assembly (100); The carrier substrate assembly (100) is provided with a main circuit board (110), the surface of the main circuit board (110) is provided with a peripheral heating area (120) and a main heat dissipation area (130), and a heating chip (210) is mounted on the surface of the main circuit board (110). The top of the heating chip (210) is in close contact with the heat-conducting top cover (310) of the asymmetric heat-conducting shell (300). On the side facing the peripheral heating area (120) of the main circuit board (110), the heat-conducting top cover (310) extends downward to form a high thermal resistance isolation leg (320), and a heat-preventing backflow gap (321) is left between the bottom of the high thermal resistance isolation leg (320) and the main circuit board (110). The main heat support leg (330) extends downward from the heat-conducting top cover (310) and contacts the main circuit board (110), and is connected to the outwardly horizontally extending directional heat dissipation extension wing (340), which is in close contact with the main heat dissipation cold zone (130).

2. The chip and circuit board collaborative heat dissipation optimization structure according to claim 1, characterized in that, The heat backflow prevention gap (321) is used to physically block heat from flowing back down to the peripheral heating area (120); and to cut off the physical path of the heat accumulation of the power supply components in the peripheral heating area (120) on the main circuit board (110) flowing back to the heating chip (210); the main heat support leg (330) is used to diffuse the incoming heat laterally along the outwardly horizontally extending directional heat dissipation extension wing (340), and finally be absorbed and dissipated by the main heat dissipation cold area (130) which is in close contact with the directional heat dissipation extension wing (340).

3. The optimized heat dissipation structure for the chip and circuit board according to claim 1, characterized in that, It also includes a temperature monitoring component (400), which includes: an on-chip temperature sensor (410) disposed on the heating chip (210); a hot zone temperature sensor (420) disposed on the surface of the peripheral heating area (120); and a cold zone temperature sensor (430) disposed on the surface of the main heat dissipation cold area (130); the on-chip temperature sensor (410), the hot zone temperature sensor (420) and the cold zone temperature sensor (430) are used to continuously collect the temperature parameters of their respective locations as on-chip temperature parameters, hot zone temperature parameters and cold zone temperature parameters, and report them to the system controller (500) in real time.

4. The chip and circuit board collaborative heat dissipation optimization structure according to claim 3, characterized in that, The system controller (500) is used to dynamically calculate the cross-layer temperature gradient between the heating chip (210) and the main heat dissipation cold zone (130) based on the real-time operating power consumption of the heating chip (210) and the on-chip temperature parameters, the hot zone temperature parameters and the cold zone temperature parameters, and to deduce the transient thermal impedance based on the cross-layer temperature gradient.

5. The chip and circuit board collaborative heat dissipation optimization structure according to claim 4, characterized in that, When the assessment confirms that the current transient thermal impedance is within the normal range, the system controller (500) determines that the heat transfer channel is unobstructed, maintains the rated operating state of the heat-generating chip (210), and controls the external cooling fan (600) to concentrate airflow to the directional heat dissipation extension wing (340) and the main heat dissipation cold zone (130).

6. The chip and circuit board collaborative heat dissipation optimization structure according to claim 4, characterized in that, When the main heat dissipation cold zone (130) becomes thermally saturated, causing the cross-layer temperature gradient to exceed a preset gradient threshold, the transient thermal impedance to exceed a preset impedance threshold, or the hot zone temperature sensor (420) detects that the temperature of the peripheral heat-generating zone (120) is greater than or equal to a preset safe temperature threshold, the system controller (500) determines that there is a risk of backflow of heat.

7. The chip and circuit board collaborative heat dissipation optimization structure according to claim 6, characterized in that, When a risk of thermal backflow is detected, the system controller (500) sends a forced intervention command to the system kernel (700), which forcibly reduces the power consumption of the heat source by triggering the non-core module clock gating of the heat-generating chip (210) or performing a frequency reduction operation of dynamic voltage frequency adjustment, and continues to execute until the temperature parameter of the hot zone falls back to the temperature range of 5°C to 10°C below the preset safe temperature threshold, and the cross-layer temperature gradient and the transient thermal impedance both fall back to their respective normal ranges.

8. The chip and circuit board collaborative heat dissipation optimization structure according to claim 5, characterized in that, The system controller (500) has a built-in reinforcement learning model; The state space of the reinforcement learning model includes at least: the on-chip temperature parameter, the hot zone temperature parameter, the cold zone temperature parameter, the real-time power consumption of the heat-generating chip (210), and the current rotation speed of the external cooling fan (600); The action space of the reinforcement learning model includes at least: adjusting the speed of the external cooling fan (600) and adjusting the operating frequency or voltage of the heat-generating chip (210); The reward function of the reinforcement learning model is set as follows: under the premise that all temperature parameters do not exceed their respective safe temperature limits, the comprehensive reward value output by the reward function is obtained by adding the system performance reward item and the fan energy consumption penalty item; wherein, the system performance reward item is the product of the real-time operating frequency of the heat-generating chip (210) and the preset positive weight coefficient, and the fan energy consumption penalty item is the product of the current speed of the external cooling fan (600) and the preset negative weight coefficient; The system controller (500) is used to coordinate the control of the external cooling fan (600) and / or the heat-generating chip (210) according to the optimal action instructions output by the reinforcement learning model.

9. The chip and circuit board collaborative heat dissipation optimization structure according to claim 7, characterized in that, The system controller (500) is also used to record and store historical thermal event logs of the heating chip (210) throughout its entire operating life. The system controller (500) is used to construct a thermal resistance degradation model of the thermal interface between the thermally conductive top cover (310) and the main thermal support leg (330) based on the historical thermal event log and through statistical regression analysis; The system controller (500) is used to dynamically correct the safe temperature threshold according to the thermal resistance degradation model; When the thermal resistance degradation model indicates that the thermal resistance of the thermal interface has degraded to a preset replacement threshold, the system controller (500) issues a maintenance alarm signal.

10. The chip and circuit board collaborative heat dissipation optimization structure according to claim 9, characterized in that, The historical thermal event log includes the cross-layer temperature gradient, the transient thermal impedance, and the ambient temperature each time the forced intervention command is triggered.

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