A SIP tube-based ultra-wideband signal interconnection transmission layer ceramic structure

Abstract

The application relates to the technical field of electronic packaging, in particular to a ceramic structure of an ultra-wideband signal interconnection transmission layer based on a SIP tube shell, which comprises a ceramic base body, a signal transmission layer arranged on the surface of the ceramic base body and a central signal via vertically penetrating the ceramic base body, the end of the signal transmission layer is fixedly connected with the top end of the central signal via and electrically conducted, the central signal via vertically extends downward and is electrically connected to a secondary signal layer inside the ceramic base body. The application sets a meshed ground plane layer with a matrix type grid via under the signal transmission layer, which can flexibly fine-tune the equivalent medium constant of the transmission line, accurately control the characteristic impedance matching under the premise of not changing the wiring parameters, optimize the adaptability of the multilayer ceramic co-firing process, balance the difference of the material thermal expansion coefficient, reduce the structural defects, and improve the overall structural stability and service life.

Description

Technical Field

[0001] This invention relates to the field of electronic packaging technology, specifically to a ceramic structure for an ultra-wideband signal interconnection transmission layer based on a SIP (System-in-Package) housing. Background Technology

[0002] Currently, mainstream semiconductor system-in-package (SoC) packages generally use high-temperature co-fired ceramic (HTCC) multilayer wiring substrates as the carrier and three-dimensional interconnection basis for embedded semiconductor chips. HTCC multilayer wiring substrates consist of a series of staggered signal layers, ground layers, power layers, and interlayer stripline structures. Vertical vias are provided between layers to allow for electrical signal interconnection between semiconductor chips. While this structure offers high integration and reliable thermal conductivity, under the high-frequency electromagnetic effects of ultra-wideband signal transmission, the bonding lines at the interconnection points between the semiconductor chip and the package are prone to inductive abrupt changes. Furthermore, the vertical layer transfer of signals from the surface planar traces to the inner stripline can cause these inductive abrupt changes. During transition, the discontinuity of the via structure can lead to severe mismatch in characteristic impedance and trigger strong signal reflection, thereby disrupting the electromagnetic continuity of the transmission layer, resulting in a significant increase in insertion loss and aggravated group delay fluctuations. Moreover, when subsequent multi-chip high-density integration or three-dimensional wiring and layer-changing adjustments are performed between layers, hard spatial electromagnetic radiation coupling will occur between adjacent microstrip lines and between interlayer vias. For semiconductor chip packaging systems such as phased array beamforming, which have strict requirements for the amplitude and phase consistency between channels, this coupling is very likely to leave linear harmonic spurious, severe near-end crosstalk, or signal distortion in the transmission channel.

[0003] To address the aforementioned issues, existing technologies offer several solutions, such as adjusting the geometric parameters of the substrate surface plane traces (length, width, etc.) or employing a design with a continuous ground plane within the ceramic layer to reduce impedance mismatch and partial interlayer coupling. However, this only mitigates signal degradation in conventional low-frequency bands and cannot eliminate via discontinuities under ultra-wideband conditions. As semiconductor device operating frequencies rise to ultra-wideband ranges such as millimeter waves, severe impedance mismatch and signal reflection will still occur. Another example is the indiscriminate addition of conventional separation grounding vias or shielding fences between layers or adjacent microstrip lines, attempting to guide signal transmission through time-varying spatial radiation coupling to vertical grounding. However, these mechanisms are themselves exposed to the nonlinear shrinkage environment of the high-temperature co-sintering process. The ceramic dielectric and internal metal interconnect topology may experience microscopic interlayer alignment deviations or deformations due to sintering shrinkage rate mismatches. This results in high maintenance and testing costs and fails to protect against parasitic capacitance and stray crosstalk that may arise during continuous dynamic operation due to interlayer mode transitions. Summary of the Invention

[0004] The purpose of this invention is to provide a ceramic structure for ultra-wideband signal interconnection transmission layer based on SIP housing, so as to solve the technical problems of impedance mismatch and large coupling interference between adjacent transmission channels caused by via discontinuity in existing ultra-wideband signal transmission processes.

[0005] To achieve the above objectives, the present invention provides the following technical solution: A ceramic structure for an ultra-wideband signal interconnection transmission layer based on a SIP housing includes a ceramic substrate, a signal transmission layer disposed on the surface of the ceramic substrate, and a central signal via perpendicularly penetrating the ceramic substrate. The end of the signal transmission layer is fixedly connected to the top of the central signal via and electrically connected. The central signal via extends vertically downward and is electrically connected to a secondary signal layer inside the ceramic substrate.

[0006] By configuring a signal transmission layer on the surface of a ceramic substrate and utilizing a vertically penetrating central signal via to guide high-frequency signals to an internal secondary signal layer, low-loss, high-density interconnect transmission of ultra-wideband signals in three-dimensional space is achieved. During RF or millimeter-wave signal transmission, the unique coplanar microstrip field distribution of the coplanar waveguide structure efficiently confines electromagnetic wave energy near the traces, reducing radiation loss into space. The vertically extending central signal via breaks the physical space limitations of traditional planar wiring, providing a high-performance, short-path transition channel for multi-chip, multi-layered, high-density vertical interconnection within the system-in-package (SIPP) housing. In this process, the electrical continuity design at the junction of the coplanar waveguide and the central signal via ensures a smooth transition of microwave signals from horizontal to vertical propagation, suppressing characteristic impedance steps caused by transmission mode and discontinuous geometric abrupt changes. This effectively reduces reflection and return losses of ultra-wideband signals at the vertical transition level, prevents high-frequency resonance and signal distortion, and ensures the integrity and high fidelity of signal transmission over an extremely wide bandwidth.

[0007] Preferably, a mesh ground plane layer is provided inside the ceramic substrate and directly below the signal transmission layer, and the mesh ground plane layer has mesh through holes arranged in a matrix.

[0008] By setting a mesh ground plane layer with matrix-style through-holes directly below the signal transmission layer, a lower reference ground with electromagnetic tuning effect is provided for the upper coplanar waveguide traces. This not only allows for flexible fine-tuning of the equivalent dielectric constant of the transmission lines by adjusting the aperture ratio and geometry of the mesh, but also enables precise control of the characteristic impedance without changing the physical width and spacing of the coplanar waveguide traces, effectively eliminating energy reflection caused by high-frequency impedance mismatch. Furthermore, the matrix-style through-hole design of the mesh ground plane layer optimizes the process adaptability of multilayer ceramics during co-firing. The through-holes allow direct penetration bonding of the ceramic matrix between the upper and lower ceramic dielectric layers during hot-pressing co-firing, effectively balancing the difference in thermal expansion coefficients between the metal ground plane and the ceramic dielectric layer, releasing anisotropic thermal shear stress between layers, and effectively preventing structural defects such as warping, internal delamination, or microcracks in the multilayer ceramic matrix during high-temperature sintering or subsequent high-low temperature alternating operation, thus improving the overall mechanical stability and long-term service life of the transmission layer structure.

[0009] Preferably, the ceramic substrate comprises, from top to bottom, a first ceramic dielectric layer, the mesh ground plane layer, a second ceramic dielectric layer, a DC bias and low-speed control line layer, a third ceramic dielectric layer, a continuous ground plane layer, a fourth ceramic dielectric layer, a secondary signal layer, a fifth ceramic dielectric layer, and a heat dissipation grounding layer.

[0010] By vertically refining the ceramic substrate into five alternating layers of ceramic dielectric, a double-layer reference ground plane, and independent signal, control, and heat dissipation layers, a highly integrated three-dimensional multifunctional electromagnetic shielding and thermal management interconnect architecture is constructed within the ceramic substrate. The DC bias and low-speed control line layers are sandwiched between the mesh ground plane and the continuous ground plane layers. Utilizing the bidirectional spatial electromagnetic shielding effect of the two metal ground planes, the low-frequency control current or DC power supply noise is completely physically and electromagnetically isolated from the upper surface coplanar waveguide ultrawideband signal and the lower secondary signal. This effectively cuts off parasitic electromagnetic coupling between high and low frequency signal layers, thereby preventing crosstalk of internal digital control noise or power supply ripple to the microwave RF main signal. Meanwhile, the continuous ground plane layer and the bottom heat dissipation ground layer together provide a symmetrical and complete RF current return loop for the embedded secondary signal layer, ensuring the continuity of the inner layer trace impedance. The bottom heat dissipation ground layer can directly adhere to the external casing base, allowing the Joule heat generated by the chip and core transmission traces under high-frequency operation to be quickly conducted downwards and dissipated through the short-path high thermal conductivity ceramic dielectric layer, eliminating thermally induced electrical performance drift and ensuring the stability of differential loss and control accuracy of the ultra-wideband interconnect network under high-power continuous operation conditions.

[0011] Preferably, the ceramic substrate is further provided with four grounding vias arranged vertically around the central signal via, and the four grounding vias are evenly distributed in a circle with the axis of the central signal via as the center.

[0012] By vertically arranging four evenly distributed grounding vias around the central signal via, with the central signal via acting as an inner conductor, the uniformly distributed grounding vias form a near-closed electromagnetic field boundary when ultra-wideband or millimeter-wave signals pass through this vertical transition region. This effectively controls most of the high-frequency energy within the cylindrical core dielectric region defined by these five vias, preventing the lateral diffusion of the high-frequency electromagnetic field outward and suppressing the excitation of surface waves and lateral resonant modes on the ceramic substrate. This avoids lateral electromagnetic radiation crosstalk from the vertical transmission channel to adjacent circuit traces, improving the signal-to-noise ratio and channel isolation of the packaging system. Furthermore, by precisely controlling the relative circular gap and diameter ratio between the grounding vias and the central signal via, fine impedance matching of the spatial inductance and capacitance of the vertical transition section's transmission characteristics is achieved, eliminating the inherent inductive abrupt change in vertical jumpers and ensuring that the interconnect transmission layer has an extremely low voltage standing wave ratio (VSWR) within the ultra-wideband.

[0013] Preferably, a circular clearance cavity is formed on the mesh ground plane layer or continuous ground plane layer, the central signal via passes perpendicularly through the axis of the circular clearance cavity, and a radial gap is left between the outer peripheral wall of the central signal via and the inner peripheral edge of the circular clearance cavity.

[0014] By creating circular clearance cavities in the mesh-like or continuous ground plane layers, and ensuring the central signal via maintains a radial gap perpendicular to its axis, when the vertically penetrating central signal via passes through any ground plane layer, a large parasitic capacitance easily accumulates locally due to the extremely close proximity of the metal layer edge to the signal via. This sudden capacitive discontinuity causes a sharp drop in reflection impedance for high-frequency signals at this point. By utilizing the radial gap of the circular clearance cavity, the physical distance between the signal via conductor and the ground plane metal edge is increased, thereby reducing the parasitic capacitance at this interface. Through quantitative design of the radial gap size, the reduced capacitive effect at this point achieves an electromagnetically smooth transition with the inherent discontinuity inductance of the via itself, realizing constant impedance at the interlayer jumper, eliminating impedance dips and resonant frequencies in the high-frequency band, and further extending the overall upper limit of the operating bandwidth of the ceramic structure.

[0015] Preferably, the ceramic substrate has a plurality of grounding isolation holes vertically disposed in the physical space between two adjacent signal transmission layers, and the plurality of grounding isolation holes are arranged in a row along the length direction of the signal transmission layer.

[0016] By physically arranging a row of multiple grounding isolation holes vertically along the trace length in the ceramic substrate between two adjacent signal transmission layers, under ultra-wideband high-density integrated cabling conditions, due to the extremely compact spacing between adjacent channel traces, a row of vertical grounding isolation holes can directly cut off the transverse electromagnetic waves and parasitic coupling paths between two adjacent coplanar waveguides in the surface and shallow layers of the ceramic substrate. This directly captures the leaked edge field and surface wave energy and guides it into the system's main grounding loop, thereby achieving dual high isolation shielding at both the physical and electromagnetic levels. This effectively prevents mutual interference between multiple ultra-wideband signals during parallel transmission, ensuring the safety, reliability, and high fidelity of multi-channel high-frequency transmission.

[0017] Preferably, the continuous ground plane layer is a planar metal layer disposed between the third ceramic dielectric layer and the fourth ceramic dielectric layer, and the continuous ground plane layer covers the corresponding dielectric layer interface except for the circular clearance cavity.

[0018] By configuring a continuous ground plane layer as a complete planar metal layer that fully covers the interfaces of the corresponding dielectric layers except for the circular clearance cavity, and placing it between the third and fourth ceramic dielectric layers, the ceramic multilayer system is constructed as a low-impedance electromagnetic shielding core. In space, an impeccable mirror current reference plane is formed. On the one hand, it provides a uniformly distributed continuous reference ground for the secondary signal layer in the fourth ceramic dielectric layer, so that the traces of the secondary signal layer have extremely stable control characteristic impedance, avoiding the increase of signal return path and radiation spillover due to reference ground failure. On the other hand, the continuous ground plane layer blocks any low-frequency electromagnetic residual radiation or cavity waveguide resonance noise from the DC bias and low-speed control line layer above the third ceramic dielectric layer. It realizes physical partitioning and electromagnetic independence in the upper and lower layers within the multilayer interconnect, improving the electromagnetic shielding effectiveness in the vertical direction.

[0019] Preferably, a ring-shaped side groove is formed on the outer peripheral sidewall of the ceramic substrate, recessed inward along the circumferential direction.

[0020] By creating an annular groove along the circumferential inward recess on the outer peripheral sidewall of the ceramic substrate, when the ceramic substrate is subjected to high-temperature brazing or eutectic sintering with a metal shell with a different coefficient of thermal expansion, the annular groove alters the geometric continuity of the sidewall boundary. This actively absorbs and elastically buffers the shear thermal stress and deformation caused by material heterogeneity, effectively preventing edge chipping, cracking, or metallization layer detachment at the ceramic substrate edge due to stress concentration. Simultaneously, during the shell encapsulation process, excess solder or sealant can flow and fit within the annular groove, forming a labyrinth-like physical interlocking structure after curing. This not only enhances the tensile and impact resistance of the mechanical connection between the ceramic substrate and the shell but also constructs a high-resistance gas permeation barrier, ensuring a long-lasting high-vacuum seal inside the encapsulated shell and extending the overall module's maintenance-free lifespan under harsh high-vacuum or high-humidity industrial conditions.

[0021] Preferably, the thickness of both the first ceramic dielectric layer and the fourth ceramic dielectric layer is 50μm±5μm.

[0022] By precisely limiting the thickness of both the first ceramic dielectric layer, which directly carries the surface coplanar waveguide, and the fourth ceramic dielectric layer, which directly covers the inner secondary signal layer, to within a range of 50μm±5μm, the characteristic impedance of the signal line is extremely sensitive to the thickness of the dielectric layer in the ultra-wideband and millimeter-wave bands. By controlling the thickness within a tolerance range of 50μm±5μm, it can be ensured that the characteristic impedance fluctuation range of the signal transmission layer and the secondary signal layer is limited to within the small tolerance of the standard value, thereby effectively eliminating the characteristic impedance mismatch problem caused by layer thickness fluctuation in continuous large-scale production. Furthermore, by setting the thickness of the first and fourth ceramic dielectric layers, the longitudinal distance between the signal traces and their corresponding mesh ground plane layers and continuous ground plane layers is controlled. While maintaining the characteristic impedance, the signal traces are allowed to use narrower metal trace widths. This not only meets the space requirements of high-density micro-wiring, but also enhances the tightness of the ground plane layer in binding the electromagnetic field of high-frequency signals by shortening the path of the electric field lines to the reference ground. This reduces the skin effect and dielectric loss, effectively prevents high-frequency dispersion and excessive attenuation of broadband signals, and ensures high-gain stability of high-frequency interconnects.

[0023] Preferably, the metal traces of the signal transmission layer are recessed inward along their length to form a cross-sectional reduction groove, and the cross-sectional area of ​​the metal traces at the cross-sectional reduction groove is smaller than the cross-sectional area of ​​other unrecessed areas.

[0024] By creating cross-sectional reduction grooves along the length of the metal traces in the signal transmission layer or secondary signal layer, the local cross-sectional area is directionally reduced. In ultra-wideband signal transmission networks, when signal lines encounter turning points or via introduction points where they intersect with the center signal via, the physical expansion of the via pads and via structure inevitably introduces excess parasitic capacitance, causing a sudden drop in local impedance. By processing cross-sectional reduction grooves on the traces adjacent to vias or discontinuity turning points, the current line squeezing effect caused by the reduction in cross-sectional area induces a small amount of equivalent additional inductance locally. This local high-impedance inductance acts as an electromagnetic balancing counterweight, performing in-situ LC space network vector synthesis and phase offsetting with the excess parasitic capacitance at the via. This achieves precise dynamic compensation for the impedance discontinuity of the transmission layer, effectively eliminating reflection spikes caused by via transitions in traditional package interconnect structures, avoiding signal phase distortion and power drop in high-frequency bands, and ensuring the signal integrity quality of the SIP package.

[0025] Compared with the prior art, the beneficial effects of the present invention are as follows: 1. This invention provides a mesh ground plane layer with matrix-style through holes below the signal transmission layer. This allows for flexible fine-tuning of the equivalent dielectric constant of the transmission line and precise control of characteristic impedance matching without changing the trace parameters. It also optimizes the compatibility of multilayer ceramic co-firing process, balances the differences in thermal expansion coefficients of materials, reduces structural defects, and improves the overall structural stability and service life.

[0026] 2. This invention achieves multifunctional electromagnetic shielding and thermal management integration in a very small volume by designing the ceramic substrate into a multi-layer structure with alternating vertical stacking. The bidirectional shielding effect of the double-layer ground plane completely isolates high and low frequency signals, suppresses parasitic crosstalk, and optimizes the inner layer impedance continuity and thermal conductivity efficiency, ensuring stable transmission performance under high power conditions.

[0027] 3. This invention constructs a quasi-coaxial shielded transmission structure by arranging circumferentially distributed grounding vias around the central signal via. This not only confines high-frequency energy to prevent lateral diffusion and suppresses surface waves and resonant excitation, thus improving channel isolation, but also achieves fine impedance matching in the vertical transition section and reduces the voltage standing wave ratio in the ultra-wideband.

[0028] 4. This invention reduces parasitic capacitance at interlayer boundaries by creating a clearance cavity in the ground plane layer to reserve radial gaps, achieving constant impedance at vias, eliminating high-frequency resonance, and extending the overall operating bandwidth. Simultaneously, the placement of vertical grounding isolation vias between adjacent traces cuts off lateral coupling paths, achieving high isolation and shielding between channels, and ensuring signal fidelity for multi-channel parallel transmission. Attached Figure Description

[0029] Figure 1 This is a schematic diagram of the assembly of the ceramic structure of the ultra-wideband signal interconnection transmission layer of the present invention; Figure 2 for Figure 1 A magnified view of a section at point A in the middle; Figure 3 This is an exploded view of the ceramic structure of the ultra-wideband signal interconnection transmission layer of this invention.

[0030] In the diagram: 1. Ceramic substrate; 2. Signal transmission layer; 3. Center signal via; 4. Secondary signal layer; 5. Mesh ground plane layer; 6. DC bias and low-speed control line layer; 7. Continuous ground plane layer; 8. Heat dissipation grounding layer; 9. Grounding via; 10. Circular clearance cavity; 11. Grounding isolation hole; 12. Annular side groove; 13. Cross-section reduction groove; 14. First ceramic dielectric layer; 15. Second ceramic dielectric layer; 16. Third ceramic dielectric layer; 17. Fourth ceramic dielectric layer; 18. Fifth ceramic dielectric layer. Detailed Implementation

[0031] Please see Figures 1 to 3 This invention provides a ceramic structure for an ultra-wideband signal interconnection transmission layer based on a SIP (System-in-Package) housing, the technical solution of which is as follows: A ceramic structure for ultra-wideband signal interconnect transmission layer based on a SIP housing, please refer to [link / reference]. Figures 1 to 3 The system includes a ceramic substrate 1, a signal transmission layer 2 disposed on the surface of the ceramic substrate 1, and a central signal via 3 vertically penetrating the ceramic substrate 1. The end of the signal transmission layer 2 is fixedly connected to the top of the central signal via 3 and electrically conductive. The central signal via 3 extends vertically downward and is electrically connected to a secondary signal layer 4 inside the ceramic substrate 1. A mesh ground plane layer 5 is disposed inside the ceramic substrate 1 and directly below the signal transmission layer 2. The mesh ground plane layer 5 has a grid of through holes arranged in a matrix. Four grounding vias 9 are also vertically disposed inside the ceramic substrate 1, arranged around the central signal via 3. The four grounding vias 9 are evenly distributed in a circle with the axis of the central signal via 3 as the center. A circular clearance cavity 10 is disposed on the mesh ground plane layer 5 or the continuous ground plane layer 7. The central signal via 3 passes vertically through the axis of the circular clearance cavity 10, and a radial gap is left between the outer peripheral wall of the central signal via 3 and the inner peripheral edge of the circular clearance cavity 10.

[0032] The ceramic substrate 1 comprises, from top to bottom, a first ceramic dielectric layer 14, a mesh ground plane layer 5, a second ceramic dielectric layer 15, a DC bias and low-speed control line layer 6, a third ceramic dielectric layer 16, a continuous ground plane layer 7, a fourth ceramic dielectric layer 17, a secondary signal layer 4, a fifth ceramic dielectric layer 18, and a heat dissipation grounding layer 8; the continuous ground plane layer 7 is a planar metal layer disposed between the third ceramic dielectric layer 16 and the fourth ceramic dielectric layer 17, and the continuous ground plane layer 7 covers the corresponding dielectric layer interfaces except for the circular clearance cavity 10; the thickness of the first ceramic dielectric layer 14 and the fourth ceramic dielectric layer 17 is 50μm±5μm.

[0033] The ceramic substrate 1 has multiple grounding isolation holes 11 vertically arranged in the physical space between two adjacent signal transmission layers 2. The grounding isolation holes 11 have metal pillars (not shown in the figure) inside them. The metal pillars are connected to the mesh ground plane layer 5, the continuous ground plane layer 7 and the heat dissipation grounding layer 8, and the metal pillars are not connected to the DC bias and low speed control line layer 6 and the secondary signal layer 4. The multiple grounding isolation holes 11 are arranged in a row along the length of the signal transmission layer 2. A ring-shaped side groove 12 is formed by recessing inward along the circumferential direction on the outer peripheral sidewall of the ceramic substrate 1. The metal traces of the signal transmission layer 2 are recessed inward along the length direction to form a cross-section reduction groove 13. The cross-sectional area of ​​the metal traces at the cross-section reduction groove 13 is smaller than the cross-sectional area of ​​other unrecessed areas.

[0034] Working principle: Please refer to Figures 1 to 3 In the case of ultra-wideband signal layer switching and transmission, the ultra-wideband radio frequency signal is slid in from the surface signal transmission layer 2 and fixedly connected to the top of the central signal via 3 that is vertically penetrating the ceramic substrate 1. The signal current is seamlessly guided from the planar trace to the vertical axial channel. The central signal via 3 extends vertically downward and is electrically connected to the secondary signal layer 4 inside the ceramic substrate 1. This constructs a three-dimensional interlaced high-density wiring network inside the overall ceramic structure, realizing high-fidelity three-dimensional interlayer interconnection of ultra-wideband high-frequency signals. It effectively prevents serious impedance mismatch, insertion loss degradation and group delay fluctuations during signal transmission in the ultra-wideband high-frequency band. In this manufacturing assembly and high-temperature co-sintering process, the matrix-arranged mesh vias on the mesh ground plane layer 5 located directly below the signal transmission layer 2 provide dense dimensional voids between the ceramic material and the planar metal layer. This allows the nonlinear shrinkage deformation of the material under ultra-high temperature sintering conditions to undergo stress self-adjustment and vector cancellation in three dimensions, eliminating residual stress in the interlayer co-firing process. This effectively prevents microscopic deformation, substrate warping, interlayer delamination, or hermeticity fracture of the multilayer ceramic substrate, and mechanically locks the interlayer alignment accuracy after multilayer co-firing within a strict tolerance zone of ±15μm.

[0035] When the signal is transmitted through the axial vertical channel constructed by the central signal via 3, the four grounding vias 9, which are vertically arranged and evenly distributed around the axis of the central signal via 3, form a three-dimensional electromagnetic field rigid enclosure between their inner metal walls and the outer metal wall of the central signal via 3. This directly locks the coaxial electromagnetic shielding tube around the central signal via 3 in the longitudinal direction. In this way, the longitudinal and transverse surface wave energy excited by the geometric discontinuity of the vertical via is rigidly constrained, guided and shielded within the tube. This effectively prevents the interlayer mode conversion problem caused by the large-scale radiation leakage of high-frequency signals into the surrounding ceramic medium. Meanwhile, the circular clearance cavity 10 opened on the mesh ground plane layer 5 or the continuous ground plane layer 7 allows the central signal via 3 to pass vertically through its axis with a radial gap. This radial gap removes the overlapping entity between the non-functional ground plane layer and the via in a transverse direction, mechanically reducing the interlayer parasitic capacitance at the vertical discontinuous via in a purely geometric dimension. The gap size and the circumferential distribution spacing of the four peripheral ground vias 9 undergo geometric parameter compensation and parameter offset in space, realizing high-precision, passive mechanical control of the characteristic impedance continuity on the vertical transition path. Stable control of characteristic impedance is achieved in the DC-40GHz range, effectively preventing severe signal reflection caused by drastic impedance jumps.

[0036] In high-speed transmission mode with multi-channel integrated parallel operation, multiple grounding isolation holes 11, vertically arranged in the physical space between two adjacent signal transmission layers 2, are arranged in a row along the length of the signal transmission layer 2. Their metal cylindrical surfaces are interconnected to form a rigid electromagnetic isolation wall in the horizontal direction, directly blocking the free radiation path in the lateral space between adjacent traces. This effectively prevents severe near-end lateral crosstalk, harmonic spurious emissions, or signal distortion within the multi-channel high-density integrated package. In addition, a continuous ground plane layer 7, which is a planar metal layer between the third ceramic dielectric layer 16 and the fourth ceramic dielectric layer 17, covers the corresponding dielectric layer interfaces except for the circular clearance cavity 10. A completely continuous longitudinal physical shielding partition is constructed in the center of the multi-layer ceramic, directly cutting off the vertical spatial radiation between the upper DC bias and low-speed control line layer 6 and the lower secondary signal layer 4. This achieves an omnidirectional three-dimensional isolation protection network, effectively preventing high-frequency inter-layer mode coupling and longitudinal spurious resonance between layers. Meanwhile, a ring-shaped side groove 12 is recessed inward along the circumferential direction on the outer peripheral sidewall of the ceramic substrate 1. The geometric boundary of the concave cavity forms a physical waveguide-type absorbing groove at the macroscopic circumferential boundary of the multilayer ceramic. When the far-field surface leakage wave that escapes outward along the interlayer medium flows to the sidewall boundary, it is mechanically intercepted and trapped by the geometrical change of the groove. It is forced to undergo multiple reflections and dissipation in the inner groove cavity and be converted into heat energy. This forms a misaligned combination of near-field lateral blocking and far-field edge absorption in space with the aforementioned row of grounding isolation holes 11, further eliminating the problem of surface waves being reflected and superimposed at the edge of the tube shell, causing resonance inside the cavity and worsening the system bit error rate. Finally, by quantitatively and rigidly solidifying the thickness of the first ceramic dielectric layer 14 and the fourth ceramic dielectric layer 17 to 50μm±5μm, and cooperating with the cross-sectional reduction groove 13 formed by the inward indentation of the metal traces of the signal transmission layer 2 or the secondary signal layer 4 along the length direction, a predetermined abrupt change in shape occurs at a specific point in the three-dimensional physical boundary of the high-frequency signal line to ground and the cross-sectional area of ​​the trace itself. This locally reduced cross-sectional area, by changing the local equivalent distributed capacitance and inductance parameters, reverses the nonlinear deformation error caused by the anisotropic shrinkage of the ceramic material during the sintering process in three-dimensional geometric space. By using parameter compensation and microstructure offsetting, and relying solely on the absolute geometric thickness of the dielectric layer and the routing shape design, quantitative and precise calibration of nonlinear impedance deviation caused by high-temperature co-firing is achieved. The characteristic impedance of the final shape is mechanically locked within the target tolerance of ±2% with high consistency. This effectively prevents the deterioration of phase consistency and characteristic impedance drift caused by the initial cumulative mechanical tolerance or uneven thickness of multiple high-temperature co-firing layers. It ensures that the amplitude and phase consistency deviation between channels is less than ±3° under mass production conditions, enabling the system to have extremely high differential stability and ultra-wideband long-term working life under long-term continuous high-load working conditions.

[0037] The specific embodiment of the present invention has been described in detail above with reference to the accompanying drawings, but the present invention is not limited to the embodiments described above. For those skilled in the art, various changes, modifications, substitutions, and variations made to these embodiments without departing from the principles and ideas of the present invention should still fall within the protection scope of the present invention.

Claims

1. A ceramic structure for an ultra-wideband signal interconnection transmission layer based on a SIP (System-in-Package) housing, characterized in that, It includes a ceramic substrate (1), a signal transmission layer (2) disposed on the surface of the ceramic substrate (1), and a central signal via (3) that penetrates vertically into the ceramic substrate (1). The end of the signal transmission layer (2) is fixedly connected to the top of the central signal via (3) and electrically connected. The central signal via (3) extends vertically downward and is electrically connected to the secondary signal layer (4) inside the ceramic substrate (1).

2. The ceramic structure for ultra-wideband signal interconnection transmission layer based on a SIP housing according to claim 1, characterized in that, A mesh ground plane layer (5) is provided inside the ceramic substrate (1) and directly below the signal transmission layer (2), and the mesh ground plane layer (5) has mesh through holes arranged in a matrix.

3. The ceramic structure for an ultra-wideband signal interconnection transmission layer based on a SIP housing according to claim 2, characterized in that, The ceramic substrate (1) includes, from top to bottom, a first ceramic dielectric layer (14), a mesh ground plane layer (5), a second ceramic dielectric layer (15), a DC bias and low-speed control line layer (6), a third ceramic dielectric layer (16), a continuous ground plane layer (7), a fourth ceramic dielectric layer (17), a secondary signal layer (4), a fifth ceramic dielectric layer (18), and a heat dissipation grounding layer (8).

4. The ceramic structure for an ultra-wideband signal interconnection transmission layer based on a SIP housing according to claim 3, characterized in that, The ceramic substrate (1) is also provided with four grounding vias (9) arranged vertically around the central signal via (3). The four grounding vias (9) are evenly distributed in a circle with the axis of the central signal via (3) as the center.

5. A ceramic structure for an ultra-wideband signal interconnection transmission layer based on a SIP housing according to claim 4, characterized in that, A circular clearance cavity (10) is provided on the mesh ground plane layer (5) or the continuous ground plane layer (7). The central signal via (3) passes vertically through the axis of the circular clearance cavity (10), and a radial gap is left between the outer peripheral wall of the central signal via (3) and the inner peripheral edge of the circular clearance cavity (10).

6. The ceramic structure for ultra-wideband signal interconnection transmission layer based on a SIP housing according to claim 1, characterized in that, The ceramic substrate (1) has a plurality of grounding isolation holes (11) vertically arranged in the physical space between two adjacent signal transmission layers (2), and the plurality of grounding isolation holes (11) are arranged in a row along the length direction of the signal transmission layer (2).

7. The ceramic structure for an ultra-wideband signal interconnection transmission layer based on a SIP housing according to claim 5, characterized in that, The continuous ground plane layer (7) is a planar metal layer disposed between the third ceramic dielectric layer (16) and the fourth ceramic dielectric layer (17), and the continuous ground plane layer (7) covers the corresponding dielectric layer interface except for the circular clearance cavity (10).

8. The ceramic structure for ultra-wideband signal interconnection transmission layer based on a SIP housing according to claim 1, characterized in that, A ring-shaped side groove (12) is formed on the outer peripheral sidewall of the ceramic substrate (1) in a circumferential inward recess.

9. A ceramic structure for an ultra-wideband signal interconnection transmission layer based on a SIP housing according to claim 3, characterized in that, The thickness of the first ceramic dielectric layer (14) and the fourth ceramic dielectric layer (17) is 50μm±5μm.

10. A ceramic structure for an ultra-wideband signal interconnection transmission layer based on a SIP housing according to claim 1, characterized in that, The metal traces of the signal transmission layer (2) are recessed inward along the length direction to form a cross-sectional reduction groove (13), and the cross-sectional area of ​​the metal traces at the cross-sectional reduction groove (13) is smaller than the cross-sectional area of ​​other unrecessed areas.

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