A method and device for automatically adapting I2C communication signals for a burn-in test

Abstract

The application discloses a kind of automatic adaptation I2C communication signal's programming test method and device thereof.The device includes programming master module, first voltage regulating circuit, second voltage regulating circuit, third voltage regulating circuit, first level conversion circuit, second level conversion circuit and voltage detection circuit;First voltage regulating circuit, second voltage regulating circuit, third voltage regulating circuit are connected to an input voltage, programming master module, first level conversion circuit, second level conversion circuit are connected to input voltage by a voltage stabilizing module, first voltage regulating circuit is connected with second level conversion circuit, voltage detection circuit, second voltage regulating circuit is connected with first level conversion circuit, voltage detection circuit, third voltage regulating circuit is connected with first level conversion circuit, first voltage regulating circuit, second voltage regulating circuit, third voltage regulating circuit, first level conversion circuit, second level conversion circuit, voltage detection circuit are connected with programming master module.The application realizes automatic adaptation I2C level of programming device.

Description

Technical Field

[0001] This invention relates to the field of I2C multiplexing technology, and in particular to a method and apparatus for automatically adapting I2C communication signals for programming and testing. Background Technology

[0002] I2C multiplexing I / O port technology for home appliances is a low-cost 8 / 16-bit MCU (16 / 20 / 28 pin) technology that addresses the extreme pin shortage by time-multiplexing I2C (Inter-Integrated Circuit) communication (including SCL (Serial Clock Line) and SDA (Serial Data Line)), programming (ISP), and ordinary GPIO (such as buttons / LEDs / buzzers) onto the same physical pin. Its core features are hardware electrical compatibility, software time-sharing switching, and dual-mode programming and operation. It is widely used in kitchen appliances, white goods, and small appliances. During production, a dedicated programming board is used to program the chip's firmware via I2C. Once the chip is working normally, the firmware configures the SDA and SCL pins as the required input and output ports.

[0003] I2C is a two-wire serial bus that uses an open-drain output, wired-AND logic architecture. All devices are connected in parallel on the same bus. I2C device pins are open-drain outputs, and the internal MOSFETs can only pull the pins to GND; they cannot actively output a high level. When the bus is idle or a device releases its pin, a pull-up resistor pulls SCL or SDA to a stable high level. The pull-up resistor limits the bus sink current.

[0004] In the external circuits of home appliance main control chips, some external circuits of functional modules can seriously affect the impedance to ground of chip pins. For example, transistors controlling buzzers or relays, optocoupler circuits, LED control circuits, or voltage divider sampling circuits, etc. When the SDA or SCL pins of I2C reuse the peripheral circuits of these functional modules, the high level on SDA or SCL will become the voltage division value of the pull-up resistor and the resistance to ground of the external circuit when using the I2C function. When this voltage division value is lower than 70% of the IO communication level, I2C data communication will become unstable. In addition, if the capacitance to ground of the reused peripheral circuit is too large, the rise time of the I2C signal will be too long, which will also make I2C communication prone to abnormalities, thus leading to firmware burning failure. Therefore, a new programming and testing scheme is needed to solve the problem of signal mismatch caused by the multiplexing of external circuits in I2C signals. Summary of the Invention

[0005] The purpose of this invention is to provide a method and apparatus for automatically adapting to I2C communication signals during programming and testing, thereby solving the aforementioned technical problems. The various technical effects of the preferred solutions among the many technical solutions provided by this invention are detailed below.

[0006] To achieve the above objectives, the present invention provides the following technical solution: This invention provides a programming test device that automatically adapts to I2C communication signals. It is used to determine whether the I2C of the motherboard to be programmed is multiplexed by the peripheral circuit, and to provide the corresponding working voltage and corresponding I2C communication rate for the entire programming process of the motherboard to be programmed, whether multiplexed or not. It includes a programming main control module, a first voltage regulation circuit, a second voltage regulation circuit, a third voltage regulation circuit, a first level conversion circuit, a second level conversion circuit, and a voltage detection circuit integrated in the programming test motherboard. The first, second, and third voltage regulating circuits are all connected to an input voltage. The programming master control module, the first level conversion circuit, and the second level conversion circuit are all connected to the input voltage through a voltage regulator module. The first voltage regulating circuit is connected to the second level conversion circuit and the voltage detection circuit. The second voltage regulating circuit is connected to the first level conversion circuit and the voltage detection circuit. The third voltage regulating circuit is connected to the first level conversion circuit. The first, second, and third voltage regulating circuits, the first level conversion circuit, the second level conversion circuit, and the voltage detection circuit are all connected to the programming master control module. When the programming test begins, the power interface of the main control chip of the motherboard to be programmed is connected to the first voltage regulation circuit, the SDA pin of the main control chip's I2C is connected to the first level conversion circuit, and the SCL pin of the main control chip's I2C is connected to the second level conversion circuit.

[0007] In some embodiments, the first voltage regulating circuit is further connected to the second level conversion circuit and the voltage detection circuit through a pull-up resistor R72, and the second voltage regulating circuit is connected to the first level conversion circuit and the voltage detection circuit through another pull-up resistor R73.

[0008] In some embodiments, the first voltage regulation circuit includes an LDO chip U6, resistors R3, R18, R19, and a transistor Q5. Pin 4 of the LDO chip U6 is connected to one end of resistor R18. One end of resistor R3 and one end of resistor R19 are both connected between pin 4 of the LDO chip U6 and resistor R18. The other end of resistor R3 is connected to the collector of transistor Q5. The base of transistor Q5 is connected to the programming control module. The other end of resistor R18 is connected to the output pin of the LDO chip U6, and the other end of resistor R19 and the emitter of transistor Q5 are all grounded.

[0009] In some embodiments, the first voltage regulating circuit is used to output a typical operating voltage or a low operating voltage to the main control chip of the motherboard to be programmed. The typical operating voltage is determined by resistors R3, R18, and R19, and the low operating voltage is determined by resistors R18 and R19. When the programming main control module pulls the base of transistor Q5 low, the first voltage regulating circuit outputs the low operating voltage. When the I2C of the motherboard to be programmed is multiplexed by the peripheral circuit, the operating voltage corresponding to the entire programming process of the motherboard to be programmed is the low operating voltage. At the start of the programming test, the typical operating voltage is used as the operating voltage of the motherboard to be programmed.

[0010] In some embodiments, the second and third voltage regulation circuits are both adjustable voltage regulator circuits composed of operational amplifier followers and NPN transistors, realizing linear voltage adjustment from the low operating voltage to the typical operating voltage; the second voltage regulation circuit is used to supply power to the pull-up resistor of SDA, and the third voltage regulation circuit is used to supply power to the first level conversion circuit; the pull-up resistor of SDA is R73.

[0011] In some embodiments, the voltage detection circuit is connected to the ADC sampling port of the programming master control module; the voltage output by the first voltage regulation circuit is divided by two resistors in the voltage detection circuit and then connected to the ADC sampling port of the programming master control module; the voltages of the two I2C signal lines of the master control chip of the motherboard to be programmed are processed by an operational amplifier voltage emitter follower in the voltage detection circuit and then connected to the ADC sampling port of the programming master control module; the programming master control module determines the I2C communication rate based on the rise time of the SDA voltage from low to high level obtained by sampling from the ADC sampling port.

[0012] In some embodiments, the conversion chips of the first level conversion circuit and the second level conversion circuit have DIR direction control pins, and the power supply ports of the conversion chips include port A and port B. Port B of the first level conversion circuit is powered through the third voltage regulation circuit. When the SDA signal is transmitted from the programming board main control module to the motherboard to be programmed, DIR is high, and the conversion chip is in output push-pull mode. In output push-pull mode, the voltage of port B of the first level conversion circuit, the voltage of the pull-up resistor of SDA, and the power supply voltage of the motherboard to be programmed are the same. When the SDA signal is transmitted from the motherboard to be programmed... When the signal is transmitted to the main control module of the programming board, DIR is at a low level, and the conversion chip is in high-impedance input mode. In high-impedance input mode, the main control module of the programming board adjusts the voltage of the pull-up resistor of SDA according to the high-level voltage detected by the voltage detection circuit, so that the high-level voltage of SDA is consistent with the power supply voltage of the motherboard to be programmed. When the voltage of the pull-up resistor of SDA cannot be adjusted to be greater than the set ratio of the power supply voltage of the motherboard to be programmed, the power supply voltage of port B of the first level conversion circuit is adjusted so that the high-level voltage of SDA is consistent with the power supply voltage of the motherboard to be programmed.

[0013] As a shared inventive concept, this invention also provides a programming test method that automatically adapts to I2C communication signals. The method uses the aforementioned automatic I2C communication signal programming test device to perform programming tests on the connected motherboard to be programmed. The method includes: Based on the operating voltage range of the motherboard to be programmed, a typical operating voltage within the operating voltage range is provided for the motherboard to be programmed; Obtain the high-level voltages of SDA and SCL of the I2C corresponding to the motherboard to be programmed, and determine whether the SDA and SCL of the I2C corresponding to the motherboard to be programmed reuse the corresponding peripheral circuits based on the closeness of the high-level voltages of SDA and SCL to the typical operating voltage. If the SDA and SCL of the I2C corresponding to the motherboard to be programmed are not reused by the corresponding peripheral circuit, the entire subsequent programming process of the motherboard to be programmed will be powered by the acquired high-level voltage; if the SDA and SCL of the I2C corresponding to the motherboard to be programmed are reused by the corresponding peripheral circuit to provide a low operating voltage for the motherboard to be programmed, the entire subsequent programming process of the motherboard to be programmed will be powered by the low operating voltage. The rise time of the high-level voltage of the I2C SDA from low to high is detected, and the communication rate of the I2C is determined based on the rise time.

[0014] In some embodiments, determining whether the SDA and SCL of the I2C corresponding to the motherboard to be programmed reuse the corresponding peripheral circuits based on the closeness of the high-level voltages of SDA and SCL to the typical operating voltage includes: When the difference between the high-level voltages of SDA and SCL and the typical operating voltage is less than a first threshold, it is determined that the SDA and SCL of the I2C corresponding to the motherboard to be programmed are not reused for the corresponding peripheral circuits; when the difference between the high-level voltages of SDA and SCL and the typical operating voltage is greater than a second threshold, it is determined that the SDA and SCL of the I2C corresponding to the motherboard to be programmed are reused for the corresponding peripheral circuits.

[0015] In some embodiments, determining the I2C communication rate based on the rise time includes: If the rise time is less than the first time, the I2C communication rate adopts the first communication rate; if the rise time is not less than the first time and less than the second time, the I2C communication rate adopts the second communication rate; if the rise time is not less than the second time, the second communication rate is further reduced in the subsequent entire burning process of the motherboard to be burned until the subsequent entire burning process ends.

[0016] Implementing one of the above-described technical solutions of the present invention has the following advantages or beneficial effects: This invention, by integrating a programming control module, a first voltage regulation circuit, a second voltage regulation circuit, a third voltage regulation circuit, a first level conversion circuit, a second level conversion circuit, and a voltage detection circuit into the programming test motherboard, can determine whether the I2C communication of the motherboard to be programmed is multiplexed by external circuits. Whether multiplexing or not, it provides the corresponding operating voltage and I2C communication rate for the entire programming process of the motherboard. Therefore, it can automatically adapt the programmer's I2C level, ensuring reliable firmware programming even when the motherboard (such as a home appliance control board) uses I2C multiplexing with external circuits. Attached Figure Description

[0017] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. In the drawings: Figure 1 This is a structural diagram of a programming and testing device for automatically adapting to I2C communication signals according to an embodiment of the present invention; Figure 2 This is a circuit diagram of the first voltage regulation circuit of a programming test device according to an embodiment of the present invention; Figure 3This is a circuit diagram of the main control chip of the programming board of a programming test device according to an embodiment of the present invention; Figure 4 This is a circuit diagram of the voltage detection circuit of a programming test device according to an embodiment of the present invention; Figure 5 This is a schematic diagram of testing the rising edge of SDA or SCL using the ADC terminal of the main control chip of the programming board according to an embodiment of the present invention. Figure 6(a) is a partial circuit diagram of the second voltage regulation circuit and the third voltage regulation circuit of a programming test device according to an embodiment of the present invention; Figure 6(b) is a partial circuit diagram of the second voltage regulation circuit and the third voltage regulation circuit of a programming test device according to an embodiment of the present invention; Figure 7 This is a circuit diagram of a first level conversion circuit and a second level conversion circuit using a programming board main control chip according to an embodiment of the present invention; Figure 8 This is a flowchart of a programming test method for automatically adapting to I2C communication signals according to an embodiment of the present invention; Figure 9 This is a circuit diagram of a rice cooker main control chip and peripheral circuit according to an embodiment of the present invention. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of the present invention clearer, various exemplary embodiments described below will be referenced to the accompanying drawings, which form part of the exemplary embodiments, illustrating various exemplary embodiments that may be used to implement the present invention. Unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this disclosure. It should be understood that they are merely examples of processes, methods, and apparatuses consistent with some aspects of the present invention disclosed as detailed in the appended claims, and other embodiments may be used, or structural and functional modifications may be made to the embodiments listed herein without departing from the scope and spirit of the present invention.

[0019] In the description of this invention, the term "multiple" means two or more. The terms "connected" and "linked" should be interpreted broadly, for example, they can refer to fixed connections, detachable connections, integral connections, mechanical connections, electrical connections, communication connections, direct connections, indirect connections via an intermediate medium, or connections within two components or interactions between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0020] To illustrate the technical solution described in this invention, specific embodiments are described below, showing only the parts related to the embodiments of this invention.

[0021] Example 1: As Figure 1 As shown in this embodiment, an automatic I2C communication signal adaptation programming test device is used to determine whether the I2C communication of the motherboard to be programmed is multiplexed by peripheral circuits, and to provide the corresponding operating voltage and corresponding I2C communication rate for the entire programming process of the motherboard to be programmed, whether multiplexed or not. This programming test device includes a programming main control module integrated into the programming test motherboard, a first voltage regulation circuit, a second voltage regulation circuit, a third voltage regulation circuit, a first level conversion circuit, a second level conversion circuit, and a voltage detection circuit. Among them, The first, second, and third voltage regulating circuits are all connected to an input voltage. The programming master module, the first level conversion circuit, and the second level conversion circuit are all connected to this input voltage through a voltage regulator module. The first voltage regulating circuit is connected to the second level conversion circuit and the voltage detection circuit. The second voltage regulating circuit is connected to the first level conversion circuit and the voltage detection circuit. The third voltage regulating circuit is connected to the first level conversion circuit. All three circuits—first, second, and third—are connected to the programming master module. The first voltage regulating circuit is also connected to the second level conversion circuit and the voltage detection circuit through a pull-up resistor R72, and the second voltage regulating circuit is connected to the first level conversion circuit and the voltage detection circuit through another pull-up resistor R73.

[0022] Furthermore, the power interface of the main control chip of the motherboard to be programmed is connected to the first voltage regulation circuit, the SDA pin of the main control chip's I2C is connected to the first level conversion circuit, and the SCL pin of the main control chip's I2C is connected to the second level conversion circuit. The peripheral circuits of the motherboard to be programmed include an SDA peripheral multiplexing circuit and an SCL peripheral multiplexing circuit. When it is determined that the I2C's SDA and SCL are multiplexed, the I2C's SDA is also connected to the SDA multiplexed peripheral circuit, and the I2C's SCL is also connected to the SCL multiplexed peripheral circuit.

[0023] like Figure 2 As shown, in some embodiments, the first voltage regulation circuit includes an LDO chip U6, resistors R3, R18, R19, and transistor Q5. Pin 4 of the LDO chip U6 is connected to one end of resistor R18. One end of resistor R3 and one end of resistor R19 are both connected between pin 4 of the LDO chip U6 and resistor R18. The other end of resistor R3 is connected to the collector of transistor Q5. The base of transistor Q5 is connected to the programming master control module. The other end of resistor R18 is connected to the output pin (pin 5) of the LDO chip U6. The other end of resistor R19 and the emitter of transistor Q5 are both grounded.

[0024] Furthermore, the first voltage regulating circuit is used to output a typical operating voltage or a low operating voltage to the main control chip of the motherboard to be programmed. The typical operating voltage is determined by resistors R3, R18, and R19, and the low operating voltage is determined by resistors R18 and R19. When the programming main control module pulls the base of transistor Q5 low, the first voltage regulating circuit outputs a low operating voltage. When the I2C of the motherboard to be programmed is multiplexed by the external circuit, the operating voltage corresponding to the entire programming process of the motherboard to be programmed is the low operating voltage. At the beginning of the programming test, the typical operating voltage is used as the operating voltage of the motherboard to be programmed.

[0025] As shown in Figure 3, in a specific embodiment, the programming control module can use the programming board main control chip U1. This programming board main control chip U1 is STMicroelectronics' STM32L475RET6, and U7 (REF3033) is a voltage reference chip, providing a stable reference voltage. It should be noted that the STM32L475RET6 has two DAC analog voltage outputs, connected to DAC1_SDA and DAC2_SCL, and multiple ADC output pins, connected to SDA_VDET, SCL_VDET, VDD_VDET, and USB_DP / USB_DN respectively, connecting to the computer. The I2C1 interface connects to a level conversion chip, and the power supply voltage is 3.3V.

[0026] The HVDD_EN port of the main control chip U1 of the programming board is connected to the base of the transistor Q5. When HVDD_EN is pulled high, the output voltage VDD_OUT of pin 5 of the LDO chip U6 is provided to the motherboard to be programmed through the first voltage regulation circuit under the control of the main control chip U1 of the programming board. The ADC of the main control module obtains the high-level voltages of SDA and SCL of I2C through the voltage detection circuit and compares them with the typical operating voltage. If the high-level voltage is close to the typical operating voltage (difference ratio < 5%), it is determined that SDA and SCL do not reuse external circuits, and the high-level voltage of SDA and SCL is the typical operating voltage. If the high-level voltage differs significantly from the typical operating voltage (difference ratio > 10%), it is determined that SDA and SCL reuse external circuits. The external multiplexing circuit of SDA or SCL has impedance to ground and causes voltage division on the I2C line, which will reduce the high-level voltage of I2C communication and thus affect the stability of I2C data communication. Therefore, the main control chip pulls the HVDD_EN pin low, and VDD_OUT will output a low operating voltage.

[0027] Furthermore, the output voltage VDD_OUT of the LDO chip U6 is determined by the feedback voltage of pin 4 FB, which is determined by the voltage division of resistors R18, R19, and R3.

[0028] Low operating voltage: VDD_OUT = 0.8 * (R18 / R19 + 1) = 0.8 * (200K / 84K + 1) = 2.7V; Typical operating voltage: VDD_OUT=0.8*{R18 / (R19 / / R3)+1}=0.8*(200K / 50K+1)=4V.

[0029] Therefore, the programming test motherboard provides power to the motherboard to be programmed, and the power supply voltage is divided into two levels: typical operating voltage value and low operating voltage value.

[0030] In some embodiments, the voltage detection circuit is connected to the ADC sampling port of the main control module, and the voltage output by the first voltage regulation circuit passes through two resistors (such as...) in the voltage detection circuit. Figure 4 The voltage divider (R15 and R16) shown is connected to the ADC sampling port of the programming master control module. The voltages of the two I2C signal lines SDA and SCL of the master control chip on the motherboard to be programmed are processed by the operational amplifier voltage emitter follower in the voltage detection circuit before being connected to the ADC sampling port of the programming master control module. The programming master control module obtains the rise time of the SDA voltage from low to high level based on the sampling of the ADC sampling port, and determines the I2C communication rate based on the magnitude of the rise time.

[0031] like Figure 4 As shown, the voltage detection circuit includes resistors R15 and R16, and an operational amplifier voltage emitter follower U2. Resistors R15 and R16 form a voltage divider circuit. One end of resistor R15 is connected to the output of the first voltage regulation circuit, i.e., connected to VDD_OUT, which is supplied to the motherboard to be programmed. One end of resistor R16 is grounded. The end where resistors R15 and R16 are connected is connected to one of the ADC sampling ports of the programming main control module (VDD_VDET port of the programming board main control chip U1). The two I2C signal lines SDA and SCL of the main control chip of the motherboard to be programmed are connected to pins 3 and 5 of the operational amplifier voltage emitter follower U2, respectively. Pins 1 and 2 of the operational amplifier voltage emitter follower U2 are connected to another ADC sampling port of the programming main control module (SDA_VDET port of the programming board main control chip U1) after being divided by resistors R53 and R5. Pins 6 and 7 of the operational amplifier voltage emitter follower U2 are connected to another ADC sampling port of the programming main control module (SCL_VDET port of the programming board main control chip U1) after being divided by resistors R36 and R6.

[0032] It should be noted that the voltage supplied to the motherboard to be programmed, VDD_OUT, is divided by two large-value resistors (470K and 220K) and then connected to the pin with ADC testing function of the main control chip of the programming board. The voltage of the two I2C signal lines is connected to the ADC detection pin after passing through the operational amplifier voltage emitter follower. The purpose is to use an emitter follower with high input impedance so as not to affect the impedance to ground of SDA and SCL.

[0033] In addition to detecting the voltage values ​​of VDD_OUT and the two I2C signal lines SDA and SCL, we also focus on detecting the rise time of the high-level voltage of SDA from low level to high level. Based on the magnitude of this time, we determine which I2C communication rate to use.

[0034] In a specific embodiment, a home appliance motherboard is used as an example. In the peripheral circuit of the I2C multiplexing on the home appliance motherboard, the SDA and SCL are affected not only by the resistance to ground but also by the increase in the capacitance to ground. If the capacitance to ground is too large, it will seriously affect the rising edge of SDA or SCL. The requirements for the rising edge in the I2C communication specification are as follows: The I2C communication rate is 100kHz (standard), and the rising edge tr cannot exceed 1000ns. The I2C communication rate is 400KHz (fast), and the rising edge tr cannot be greater than 300ns. The I2C communication rate is 1000kHz (fast plus), and the rising edge tr cannot exceed 100ns.

[0035] The rising edge tr refers to the time between 30% and 70% of the maximum voltage during the process of the SDA or SCL signal rising from 0V to the maximum voltage.

[0036] In the programming of home appliance main control chips, a communication rate of 400K or 100K is generally used. For example, a pull-up resistor of 4.7K is used. For a 100KHz communication rate, the capacitance to ground must be less than 250pF, and for a 400KHz communication rate, it must be less than 75pF. Excessive capacitance will cause a longer rise time, exceeding the limit, and consequently causing abnormal I2C communication. Furthermore, taking advantage of the fast ADC detection time of the main control chip on the programming board, the selected STM32L475RET6 main control chip has an ADC sampling time as fast as 93.75ns (using ADC1+ADC2 interleaved mode). This detection time can detect whether the I2C rise time is greater than 300ns or 1000ns.

[0037] Furthermore, the main control chip on the programming board determines the communication rate to complete the firmware programming of the home appliance's main control chip based on the voltage and rise time of the SDA. If the rising edge tr < 300ns, the I2C communication rate is 400KHz (fast). If the rising edge tr > 300ns and < 1000ns, the I2C communication rate is 100KHz (standard). In extreme cases, if the rise time is greater than 1000ns, the I2C communication rate will be further reduced, for example, from 100KHz to 50KHz, before firmware burning can begin and continue until it is successfully completed.

[0038] like Figure 5 The diagram shows the testing of the rising edge of SDA or SCL using the ADC terminal of the programming board's main control chip, taking an I2C rate of 400kHz as an example. When testing whether the main control chip of a home appliance has an I2C multiplexing peripheral circuit, in addition to testing the high-level voltage, the rising edge time of SDA and SCL from 0V to the highest voltage is also tested. A rough test is performed to see if the time from 30% to 70% of the highest voltage is less than 300ns or 1000ns, and this is used as the basis for determining the communication rate used in the final I2C firmware. Specific rising edge testing instructions are as follows: As the main control chip of the programming board for the I2C master device, SDA and SCL are first pulled low. When SDA and SCL are both 0V, the pull-down is turned off, and the port is set to the input high impedance state. At this time, the power supply connected to the pull-up resistors on SDA and SCL begins to charge the SDA and SCL terminals (RC network exists in the line). The larger the capacitance to ground of the port, the longer it takes to charge to the highest voltage. The main control chip STM32L475RET6 samples the port voltage of SDA and SCL every 93.75ns (using ADC1+ADC2 interleaved mode) and records the voltage from 0V to the highest voltage. If the external circuit voltage divider is not reused, this highest voltage is the power supply voltage connected to the pull-up resistor. The 30% and 70% voltage values ​​of the highest voltage are calculated, and the number of ADC tests from 30% to 70% is checked. If it exceeds 4 times, it is considered that I2C communication is not suitable for a communication rate of 400KHz. If it exceeds 11 times, it is considered that using a communication rate of 100KHz is risky, and the communication rate must be further reduced for firmware programming.

[0039] Both the second and third voltage regulation circuits are adjustable voltage regulator circuits composed of operational amplifier followers and NPN transistors, achieving linear voltage adjustment from low operating voltage to typical operating voltage. Specifically, the second voltage regulation circuit supplies power to the pull-up resistor of the SDA, and the third voltage regulation circuit supplies power to the first level conversion circuit (powering port IO of the level conversion chip B).

[0040] In a specific embodiment, the second voltage regulating circuit and the third voltage regulating circuit can adopt the same circuit structure.

[0041] As shown in Figures 6(a) and 6(b), the second voltage regulating circuit includes transistor Q2, resistors R32, R38, R39, R41, capacitors C8 and C3, operational amplifier follower U3, MOSFET Q4, transistor Q14, resistors R51 and R52, and capacitor C7. The base of transistor Q2 is connected to pin 7 of operational amplifier follower U3 through resistor R32, its collector is connected to the input voltage, and its emitter is connected to the source of MOSFET Q4. One end of resistor R52 and one plate of capacitor C7 are connected between MOSFET Q4 and transistor Q2. The other end of resistor R52, the other plate of capacitor C7, the gate of MOSFET Q4, and one end of resistor R51 are connected. The other end of resistor R51 is connected to the collector of transistor Q14. The emitter is grounded, and its base is connected to the programming master module (pin 61 of the programming board master control chip U1). The drain of MOSFET Q4 is connected to the pull-up resistor of SDA (pull-up resistor R73). One end of resistor R38 is connected to the source of MOSFET Q4, and the other end of resistor R38 is connected to one end of resistor R39. The other end of resistor R39 is grounded. Pin 6 of op-amp follower U3 is connected between resistors R38 and R39. One end of resistor R41 is connected to the DAC output port of the programming master module (pin 21 of the programming board master control chip U1), and the other end is connected to pin 5 of op-amp follower U3. One plate of capacitor C3 is connected to pin 5 of op-amp follower U3, and the other plate is grounded. The two plates of capacitor C8 are connected to pins 6 and 7 of op-amp follower U3, respectively.

[0042] The third voltage regulation circuit includes transistor Q1, resistors R31, R34, R35, and R40, capacitors C21 and C38, operational amplifier follower U3, MOSFET Q3, transistor Q13, resistors R49 and R50, and capacitor C4. The base of transistor Q1 is connected to pin 1 of operational amplifier follower U3 via resistor R31, its collector is connected to the input voltage, and its emitter is connected to the source of MOSFET Q3. One end of resistor R50 and one plate of capacitor C4 are connected between MOSFET Q3 and transistor Q1. The other end of resistor R50, the other plate of capacitor C4, the gate of MOSFET Q3, and one end of resistor R49 are connected. The other end of resistor R49 is connected to the collector of transistor Q13. The emitter of transistor Q13 is grounded, and its base is connected to the main control module. (Pin 62 of the main control chip U1 on the programming board), the drain of MOSFET Q3 is connected to the first level conversion circuit (pin 6 of U9); one end of resistor R34 is connected to the source of MOSFET Q3, the other end of resistor R34 is connected to one end of resistor R35, the other end of resistor R35 is grounded, pin 2 of op-amp follower U3 is connected between resistors R34 and R35, one end of resistor R40 is connected to the DAC output port of the main control module (pin 20 of the main control chip U1 on the programming board), and the other end is connected to pin 3 of op-amp follower U3, one plate of capacitor C21 is connected to pin 3 of op-amp follower U3, and the other plate is grounded, the two plates of capacitor C38 are connected to pins 1 and 2 of op-amp follower U3 respectively; pin 8 of op-amp follower U3 is connected to the input voltage.

[0043] In the above circuit, transistor Q1, resistors R31, R34, R35, and R40, capacitors C21 and C38, and op-amp follower U3 form an adjustable voltage regulator circuit powered by port B IO of the SDA level conversion chip (first level conversion circuit); transistor Q2, resistors R32, R38, R39, and R41, capacitors C8 and C3, and op-amp follower U3 form an adjustable voltage regulator circuit powered by pull-up resistor R73 of the SDA.

[0044] MOSFET Q3, transistor Q13, resistors R49 and R50, and capacitor C4 form the switch that powers the first conversion circuit chip VCCB. The power supply is turned on only after the voltage to be adjusted has stabilized. MOSFET Q4, transistor Q14, resistors R51 and R52, and capacitor C7 form the switch that powers the pull-up resistor R73 of SDA. The power supply is turned on only after the voltage to be adjusted has stabilized.

[0045] The input voltage VBUS can be the 5V power supply from the computer's USB interface, VCCB_SDA supplies power to the B port IO of the SDA level conversion chip, and VDD_R_SDA supplies power to the pull-up resistor of the I2C's SDA. VDD_SDA=DAC1_SDA*(R34+R35) / R35=2*DAC1_SDA, VDD_R_SDA=DAC2_SDA_R*(R38+R39) / R39=2*DAC2_SDA_R; Among them, DAC1_SDA is the reference voltage corresponding to the power supply of the configurable SDA level conversion chip B port IO of the main control chip of the programming board, and DAC2_SDA_R is the reference voltage corresponding to the pull-up resistor of the configurable I2C SDA of the main control chip of the programming board.

[0046] The STM32L475RET6 main control chip of the programming board has a 12-bit DAC with an adjustable voltage accuracy of less than 0.1mV. Therefore, the adjustable voltage steps of VDD_SDA and VDD_R_SDA are much smaller than the required 0.01V.

[0047] In some embodiments, the conversion chips of the first level conversion circuit and the second level conversion circuit have DIR direction control pins. The power supply ports of the conversion chips include ports A and B. Port B of the first level conversion circuit is powered through a third voltage regulation circuit. The power supply pin VCCA of port A needs to be matched with the I2C communication level between the conversion chip and the programming master control chip, and the power supply pin VCCB of port B needs to be matched with the I2C communication level between the conversion chip and the motherboard to be programmed (such as a home appliance chip).

[0048] Furthermore, when the SDA signal is transmitted from the programming board's main control module to the motherboard to be programmed, DIR is at a high level, and the conversion chip is in output push-pull mode. In output push-pull mode, the voltage at port B of the first level conversion circuit, the voltage of the pull-up resistor R73 of SDA, and the power supply voltage of the motherboard to be programmed are all the same. When the SDA signal is transmitted from the motherboard to the programming board's main control module, DIR is at a low level, and the conversion chip is in input high-impedance mode. In input high-impedance mode, the programming board's main control module detects the high-level voltage obtained from SDA through the voltage detection circuit and adjusts the voltage of the pull-up resistor of SDA to make the high-level voltage of SDA consistent with the power supply voltage of the motherboard to be programmed. When the voltage of the pull-up resistor of SDA cannot be adjusted to be greater than the set ratio of the power supply voltage of the motherboard to be programmed, the voltage at port B of the first level conversion circuit is adjusted to make it consistent with the power supply voltage of the motherboard to be programmed.

[0049] like Figure 7As shown, the first and second level conversion circuits are I2C level conversion circuits for the programming motherboard. The first level conversion circuit includes a conversion chip U9. Pin 6 of the conversion chip U9 is the power supply pin VCCB for port B, and pin 4 of the conversion chip U9 is the signal pin B for port B. Both pins are connected to one end of the pull-up resistor R73 of SDA via resistor R27. The other end of R73 is connected to the drain of the MOSFET Q4 in the second voltage regulation circuit. Simultaneously, the signal pin B of the conversion chip U9 is also connected to the port I2C_SDA corresponding to the I2C port of the motherboard to be programmed. Pin 6 of the conversion chip U9 is connected to the drain of the MOSFET Q3 in the third voltage regulation circuit. Pin 3 of the conversion chip U9 corresponds to the signal pin for port A, which is connected to pin 59 of the programming motherboard's main control chip U1 (programming main control module). Pin 1 of the conversion chip U9 is connected to the voltage regulator module (connected to a 3.3V operating voltage). Pin 5 (DIR pin) of the conversion chip U9 is connected to pin 11 of the programming board main control chip U1 (programming main control module).

[0050] The second level conversion circuit includes a conversion chip U8. Pin 4 of conversion chip U8 is the B port signal pin, which is connected to the output of the first voltage regulator circuit via a pull-up resistor R72. Simultaneously, the B port signal pin of conversion chip U8 is also connected to the I2C_SCL port of the I2C interface of the motherboard to be programmed. Pin 6 of conversion chip U8 is the B port power supply pin, connected to the output of the first voltage regulator circuit. Pin 3 of conversion chip U8 corresponds to the A port signal pin, which is connected to pin 58 of the programming board's main control chip U1 (programming main control module). Pin 1 of conversion chip U8 (A port power supply pin) is connected to the voltage regulator module (connected to a 3.3V operating voltage). Pin 5 of conversion chip U8 (DIR pin) is connected to pin 10 of the programming board's main control chip U1 (programming main control module).

[0051] In a specific embodiment, both the first conversion chip U8 and the second conversion chip U9 can be TI's SN74LXC1T45, a 1-bit bidirectional dual-supply level conversion bus transceiver that can convert between any voltage range of 1.1V to 5.5V and has a DIR direction control pin. When DIR is high, the signal is transmitted from A to B, which is the output push-pull mode, and the high level is the VCCB power supply voltage. When DIR is low, the signal is transmitted from B to A, which is the input high-impedance mode. The high level is determined by the pull-up resistor connected to the signal pin, the pull-up resistor power supply voltage, and the resistance to ground of the multiplexed peripheral circuit.

[0052] Because the I2C of the master control chip of the programming board is the master device and the I2C of the motherboard chip to be programmed is the slave device, the clock signal of SCL is a unidirectional signal from the master control chip of the programming board to the motherboard chip to be programmed. When the output of the level conversion chip is fixedly set to push-pull mode, the peripheral circuit of the SCL multiplexing of the motherboard to be programmed will not have a significant impact on the high level of the SCL terminal. Therefore, the power supply of the SCL level conversion chip VCCB and the pull-up resistor are connected to the power supply VDD_OUT of the motherboard chip to be programmed.

[0053] The SDA signal is a bidirectional signal. Although the signal from the main control chip of the programming board to the motherboard chip to be programmed is transmitted through the push-pull mode of the level conversion chip, the multiplexed peripheral circuit on the SDA line will not affect the high level. However, when the SDA signal is transmitted from the main control chip of the home appliance to the main control chip of the programming board, the level conversion chip is configured as a high-impedance input and relies on the pull-up resistor of the SDA to provide the high level. At this time, the resistance to ground of the multiplexed peripheral circuit on the SDA on the motherboard to be programmed will affect the high level on the SDA.

[0054] The power supply connected to the pull-up resistor of SDA and the power supply to the B port of the corresponding level conversion chip, VCCB, are controlled by linearly adjustable circuits. When the signal of SDA is transmitted from the main control chip of the programming board to the motherboard chip to be programmed, the DIR pin of the level conversion chip is set to a high level. At this time, it is a push-pull output mode. The voltage of VCCB and the voltage of the pull-up resistor of SDA are adjusted to be the same as the power supply voltage of the chip. The high level of SDA is the power supply voltage value of the motherboard chip to be programmed. When a signal needs to be transmitted from the motherboard chip to the master control chip of the programming board, the DIR pin of the level conversion chip is set to low level. At this time, the signal pin of the B port of the level conversion chip is in high-impedance mode. First, based on the high-level voltage value tested on the SDA line, the supply voltage of the pull-up resistor of SDA is adjusted to make the high level on SDA as close as possible to the supply voltage value of the motherboard chip to be programmed. If the voltage drop across the SDA multiplexing peripheral circuit to ground is too large and cannot be adjusted to be greater than 70% of the supply voltage value of the motherboard chip to be programmed, then the voltage of the VCCB supply at the B port of the corresponding level conversion chip is adjusted. The voltage adjustment of VCCB is based on the final high-level voltage on SDA. This ensures that the signal transmitted from the chip to the level conversion chip matches the VCCB voltage, so that the master control chip of the programming board can reliably receive the signal.

[0055] It should be noted that the input voltage source can be a computer, which provides input voltage to the voltage regulator module, the first voltage regulation circuit, the second voltage regulation circuit, and the third voltage regulation circuit. Of course, the input voltage source is not limited to a computer. In a specific embodiment, the voltage regulator module is an LDO (Low Dropout Regulator). The +5V voltage input from the computer is output as a stable, low-noise +3.3V DC voltage through the LDO, which then powers the conversion chips U8 and U9.

[0056] In summary, this embodiment, by integrating a programming control module, a voltage regulator module, a first voltage regulation circuit, a second voltage regulation circuit, a third voltage regulation circuit, a first level conversion circuit, a second level conversion circuit, and a voltage detection circuit into the programming test motherboard, can determine whether the I2C communication of the motherboard to be programmed is multiplexed by external circuits. Whether multiplexed or not, it provides the corresponding operating voltage and I2C communication rate for the entire programming process of the motherboard. Therefore, it can automatically adapt the programmer's I2C level, ensuring reliable firmware programming even when the motherboard (such as a home appliance control board) uses I2C multiplexing with external circuits.

[0057] Example 2: Figure 8 As shown, following the same inventive concept, this embodiment provides a programming test method that automatically adapts to I2C communication signals. The method uses a programming test device for automatically adapting to I2C communication signals as described in Embodiment 1 to perform programming tests on the connected motherboard to be programmed. The method includes: S100: Based on the operating voltage range of the motherboard to be programmed, provide a typical operating voltage within the operating voltage range for the motherboard to be programmed.

[0058] In a specific embodiment, the output voltage VDD_OUT of the LDO chip U6 is determined by the feedback voltage at pin 4 (FB), which is determined by the voltage division of resistors R18, R19, and R3. A typical operating voltage is: VDD_OUT=0.8*{R18 / (R19 / / R3)+1}=0.8*(200K / 50K+1)=4V.

[0059] S200: Obtain the high-level voltages of SDA and SCL of the I2C corresponding to the motherboard to be programmed, and determine whether the SDA and SCL of the I2C corresponding to the motherboard to be programmed reuse the corresponding peripheral circuit based on the closeness of the high-level voltages of SDA and SCL to the typical operating voltage.

[0060] In a specific embodiment, based on the proximity of the high-level voltages of SDA and SCL to the typical operating voltage, it is determined whether the SDA and SCL of the I2C corresponding to the motherboard to be programmed reuse the corresponding peripheral circuits, including: When the difference between the high-level voltages of SDA and SCL and the typical operating voltage is less than a first threshold, it is determined that the SDA and SCL of the I2C corresponding to the motherboard to be programmed are not reused for the corresponding peripheral circuits. When the difference between the high-level voltages of SDA and SCL and the typical operating voltage is greater than a second threshold, it is determined that the SDA and SCL of the I2C corresponding to the motherboard to be programmed are reused for the corresponding peripheral circuits. The first and second thresholds are determined based on the specific motherboard to be programmed and will not be elaborated here.

[0061] It should be noted that the high-level voltage values ​​of SDA and SCL on the I2C pins of the motherboard to be programmed are because the I2C is connected to the power supply of the corresponding chip of the programming main control module through pull-up resistors. If SDA and SCL do not share external circuitry, then the voltage of SDA and SCL should be the power supply voltage of the chip on the motherboard to be programmed. If SDA and SCL share external circuitry, then the voltage of these two pins is the voltage division value of the pull-up resistor and the external circuit's resistance to ground. The power supply voltage of the corresponding chip of the programming main control module can be adjusted according to the voltage values ​​on SDA and SCL. If the voltage division value is low, the power supply voltage should be adjusted to the lower limit of the operating voltage range of the motherboard chip to be programmed.

[0062] S300. If the SDA and SCL of the I2C corresponding to the motherboard to be programmed do not reuse the corresponding peripheral circuits, the entire subsequent programming process of the motherboard to be programmed will be powered by the acquired high-level voltage; if the SDA and SCL of the I2C corresponding to the motherboard to be programmed reuse the corresponding peripheral circuits to provide a low operating voltage for the motherboard to be programmed, the entire subsequent programming process of the motherboard to be programmed will be powered by the low operating voltage.

[0063] In a specific embodiment, the low operating voltage is: VDD_OUT=0.8*(R18 / R19+1)=0.8*(200K / 84K+1)=2.7V.

[0064] S400: Detects the rise time of the high-level voltage of I2C's SDA from low to high, and determines the communication rate of I2C based on the rise time.

[0065] In a specific embodiment, determining the I2C communication rate based on the rise time includes: If the rise time is less than the first time, the I2C communication rate adopts the first communication rate; If the rise time is not less than the first time and less than the second time, the I2C communication rate adopts the second communication rate. If the rising edge time is not less than the second time, the second communication rate will be further reduced in the subsequent entire burning process of the motherboard to be burned, until the subsequent entire burning process is completed.

[0066] It should be noted that the technical features not described in this embodiment and the specific implementation methods are the same as in Embodiment 1. Please refer to Embodiment 1 for details.

[0067] like Figure 9 The diagram shows the main control chip and peripheral circuitry of a rice cooker. Small household appliances are simple to control and have low cost requirements, so the main control chip has relatively few pins, typically 16, 20, or 28. The SDA and SCL pins, used for programming, usually need to be reused from the peripheral circuitry. As can be seen from the diagram, a 16-pin main control chip has 14 GPIO ports, but in reality, 4 are needed for touch buttons, 6 for LEDs, 1 for a buzzer, 1 for a temperature sensing ADC, 2 for I2C programming, and 1 for heating control, totaling 15. This is insufficient, so one pin must be reused. Touch buttons, LED displays, buzzers, and temperature measurement ADCs are not suitable for reuse due to significant mutual interference. Only the I2C pins SDA and SCL can be used as GPIO ports once the firmware is burned in, without further reprogramming. Therefore, the factory design reuses the heating control pin with SDA. The heating control circuit typically connects the control pin of the main control chip in series with a resistor to the base of a transistor. This connection generates a resistance to ground. If SDA is reused, the high level on SDA is the voltage divider between the pull-up resistor and this resistance to ground. The pull-up resistor is typically 4.7K or 10K (when the power supply is 5V).

[0068] If the pull-up resistor is 4.7K, and the heating control pin is connected in series with a 3K resistor to the base of the transistor, the high level on SDA will be (5V-0.7V)*[3K / (4.7K+3K)]+0.7V=2.38V. However, the reliable communication level of I2C requires a voltage greater than 70% of the supply voltage (5V*70%=3.5V). 2.38V is much less than 3.5V. Therefore, multiplexing the heating control circuit on SDA will cause abnormal I2C communication and affect the programming function.

[0069] Based on the above, the automatic adaptation process of I2C level and communication rate according to the method of this embodiment is as follows: 1) The operating voltage range of this home appliance (rice cooker) chip is 2.5V~5.5V. The computer power supply is 5V. Because the voltage regulation circuit on the motherboard needs a voltage difference for programming and testing, the typical operating voltage is set to 4V and the low operating voltage is 2.7V. 2) Connect the main control board of the appliance. Set the DIR of the level conversion chips (U8 and U9 mentioned in Example 1) to low level. Set the three power supply voltages VDD_OUT, VDD_SDA, and VDD_R_SDA (see Example 1) to 4V. Then test the voltage of VDD_OUT, SDA, and SCL at the interface terminals of the two boards and the rise time of the SDA port from low level to high level to determine which I2C communication rate to use for firmware burning. 3) If VDD_OUT is 4V, it means that the main control board of the appliance does not have a problem of low voltage caused by high current. Then check the voltage data of SDA and SCL. Since the SCL pin of the main control board of the appliance does not reuse the external circuit, its high level is also 4V; while SDA reuses the heating control circuit, its high level is the voltage division of the pull-up resistors R73 and R32 of SDA and the transistor Q3. This voltage is (4V-0.7V)*[3K / (2.2K+3K)]+0.7V=2.6V; 4) Based on the SDA and SCL voltage conditions tested above, the main control chip of the programming board determines that there is a multiplexed peripheral circuit on the SDA of the main control board of the home appliance, and that the high-level voltage of SDA is severely divided, which will affect I2C data communication. Therefore, it proceeds to the next step of automatic voltage adaptation process. 5) The main control chip on the programming board switches VDD_OUT and VDD_SDA to a low operating voltage of 2.7V. Based on the 2.6V SDA test voltage from step 3), it's determined that VDD_R_SDA needs to be increased to reach 2.7V for SDA. The initial calculation is VDD_R_SDA = 4V / 2.6V * 2.7 = 4.15V. Therefore, VDD_R_SDA is set to 4.15V. The voltage on SDA is then read using the ADC to see if it's close to 2.7V. If there's still a difference, the output voltage of VDD_SDA is adjusted to make its value close to the final measured voltage value of SDA. This ensures that the power supply pin of the level conversion chip's VCCB matches the signal voltage of SDA. Because the selected level conversion chip has a very wide operating range (1.1V~5.5V), even with very low resistance to ground in the multiplexed peripheral circuitry and significant voltage division at high levels, reliable data transmission can still be guaranteed. 6) After completing the level adaptation, the I2C communication rate adaptation process begins. As the main control chip of the programming board for the I2C master device, first pull SDA and SCL low. When SDA and SCL are both 0V, then turn them off and set the port to the input high impedance state. At this time, the 4.15V power supply connected to the pull-up resistors on SDA and SCL begins to charge the SDA and SCL terminals (there is an RC network in the line). The larger the capacitance of the port to ground, the longer it takes to charge to the highest voltage. The STM32L475RET6 main control chip on the programming board samples the port voltages of SDA and SCL every 93.75ns (using ADC1+ADC2 interleaved mode), records the test process from 0V to the highest voltage of 2.7V, and calculates the voltage values ​​at 30% (0.81V) and 70% (1.89V) of 2.7V. It checks how many ADC tests were conducted from 0.81V to 1.89V. If more than 4 tests are conducted, it is considered that I2C communication is not suitable for a communication rate of 400KHz. If more than 11 tests are conducted, it is considered that using a communication rate of 100KHz is risky, and the I2C communication rate can be further reduced, such as to 50KHz.

[0070] At this point, the I2C SDA and SCL levels and communication rates are perfectly matched, and the firmware burning process can proceed to the next step. During the burning process, if the I2C signal is transmitted from the main control chip of the burning board to the main control chip of the home appliance, the DIR pin of the level conversion chip is set to a high level, and VDD_SDA and VDD_R_SDA are both set to VDD_OUT (low operating voltage) which powers the main control chip of the home appliance. The level conversion chip is a push-pull output, and the ground resistance of the multiplexing peripheral circuit of SDA will not affect the high level of SDA. If the I2C signal is transmitted from the main control chip of the home appliance to the main control chip of the burning board, the DIR pin of the level conversion chip corresponding to SDA is set to a low level, VDD_SDA and VDD_R_SDA are set to the voltage values ​​tested in step 5), VDD_OUT is the low operating voltage, and the I2C communication rate selected in the previous step is used. Finally, the firmware burning is completed.

[0071] The above description is merely a preferred embodiment of the present invention. Those skilled in the art will understand that various changes or equivalent substitutions can be made to these features and embodiments without departing from the spirit and scope of the present invention. Furthermore, under the teachings of the present invention, these features and embodiments can be modified to adapt to specific situations and materials without departing from the spirit and scope of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed herein, and all embodiments falling within the scope of the claims of this application are within the protection scope of the present invention.

Claims

1. A programming and testing device that automatically adapts to I2C communication signals, characterized in that, This system is used to determine whether the I2C communication of the motherboard to be programmed is multiplexed by external circuits, and to provide the corresponding operating voltage and I2C communication rate for the entire programming process of the motherboard, whether multiplexed or not. It includes a programming main control module integrated into the programming test motherboard, a first voltage regulating circuit, a second voltage regulating circuit, a third voltage regulating circuit, a first level conversion circuit, a second level conversion circuit, and a voltage detection circuit. The first voltage regulating circuit outputs a typical operating voltage or a low operating voltage to the main control chip of the motherboard to be programmed. When the I2C communication of the motherboard to be programmed is multiplexed by external circuits, the operating voltage corresponding to the entire programming process of the motherboard to be programmed is the low operating voltage. At the start of the programming test, the typical operating voltage is used as the operating voltage of the motherboard to be programmed. The first, second, and third voltage regulating circuits are all connected to an input voltage. The programming master control module, the first level conversion circuit, and the second level conversion circuit are all connected to the input voltage through a voltage regulator module. The first voltage regulating circuit is connected to the second level conversion circuit and the voltage detection circuit. The second voltage regulating circuit is connected to the first level conversion circuit and the voltage detection circuit. The third voltage regulating circuit is connected to the first level conversion circuit. The first, second, and third voltage regulating circuits, the first level conversion circuit, the second level conversion circuit, and the voltage detection circuit are all connected to the programming master control module. When the programming test begins, the power interface of the main control chip of the motherboard to be programmed is connected to the first voltage regulation circuit, the SDA of the I2C of the main control chip is connected to the first level conversion circuit, and the SCL of the I2C of the main control chip is connected to the second level conversion circuit. The voltage detection circuit is connected to the ADC sampling port of the programming main control module; the voltage output by the first voltage regulation circuit is divided by two resistors in the voltage detection circuit and then connected to the ADC sampling port of the programming main control module; the voltages of the two I2C signal lines of the main control chip of the motherboard to be programmed are processed by the operational amplifier voltage emitter follower in the voltage detection circuit and then connected to the ADC sampling port of the programming main control module. The programming control module obtains the rise time of the SDA voltage from low level to high level by sampling the ADC sampling port, and determines the I2C communication rate based on the magnitude of the rise time.

2. The automatic I2C communication signal adaptation programming and testing device according to claim 1, characterized in that, The first voltage regulation circuit is also connected to the second level conversion circuit and voltage detection circuit through a pull-up resistor R72, and the second voltage regulation circuit is connected to the first level conversion circuit and voltage detection circuit through another pull-up resistor R73.

3. The automatic I2C communication signal adaptation programming and testing device according to claim 2, characterized in that, The first voltage regulation circuit includes an LDO chip U6, resistors R3, R18, and R19, and a transistor Q5. Pin 4 of the LDO chip U6 is connected to one end of resistor R18. One end of resistor R3 and one end of resistor R19 are both connected between pin 4 of the LDO chip U6 and resistor R18. The other end of resistor R3 is connected to the collector of transistor Q5. The base of transistor Q5 is connected to the programming control module. The other end of resistor R18 is connected to the power output pin of the LDO chip U6. The other end of resistor R19 and the emitter of transistor Q5 are both grounded.

4. The automatic I2C communication signal adaptation programming and testing device according to claim 3, characterized in that, The typical operating voltage is determined by resistors R3, R18, and R19, and the low operating voltage is determined by resistors R18 and R19. When the programming control module pulls the base of transistor Q5 low, the first voltage regulation circuit outputs the low operating voltage.

5. The automatic I2C communication signal adaptation programming and testing device according to claim 4, characterized in that, Both the second and third voltage regulation circuits are adjustable voltage regulator circuits composed of operational amplifier followers and NPN transistors, realizing linear voltage adjustment from the low operating voltage to the typical operating voltage; the second voltage regulation circuit is used to supply power to the pull-up resistor R73 of SDA, and the third voltage regulation circuit is used to supply power to the first level conversion circuit.

6. The automatic I2C communication signal adaptation programming and testing device according to claim 1, characterized in that, The conversion chips of the first level conversion circuit and the second level conversion circuit are equipped with DIR direction control pins. The power supply ports of the conversion chips include port A and port B. Port B of the first level conversion circuit is powered through the third voltage regulation circuit. When the SDA signal is transmitted from the main control module of the programming board to the motherboard to be programmed, DIR is at a high level, and the mode of the conversion chip is output push-pull mode. In output push-pull mode, the power supply voltage of port B of the first level conversion circuit, the voltage of the pull-up resistor of SDA, and the power supply voltage of the motherboard to be programmed are the same. When the SDA signal is transmitted from the motherboard to be programmed to the programming board main control module, DIR is at a low level, and the conversion chip is in the input high impedance mode. In the input high impedance mode, the programming board main control module adjusts the voltage of the pull-up resistor of SDA according to the high level voltage detected by the voltage detection circuit, so that the high level voltage of SDA is consistent with the power supply voltage of the motherboard to be programmed. When the voltage of the pull-up resistor of SDA cannot be adjusted to be greater than the set ratio of the power supply voltage of the motherboard to be programmed, the voltage of port B of the first level conversion circuit is adjusted so that the high-level voltage of SDA is consistent with the power supply voltage of the motherboard to be programmed.

7. A programming test method for automatically adapting to I2C communication signals, characterized in that, The automatic I2C communication signal adaptation programming test device according to any one of claims 1-6 is used to perform programming tests on the connected motherboard to be programmed, the method comprising: Based on the operating voltage range of the motherboard to be programmed, a typical operating voltage within the operating voltage range is provided for the motherboard to be programmed; Obtain the high-level voltages of SDA and SCL of the I2C corresponding to the motherboard to be programmed, and determine whether the SDA and SCL of the I2C corresponding to the motherboard to be programmed reuse the corresponding peripheral circuit based on the closeness of the high-level voltages of SDA and SCL to the typical operating voltage. If the SDA and SCL of the I2C corresponding to the motherboard to be programmed are not reused by the corresponding peripheral circuit, the entire subsequent programming process of the motherboard to be programmed will be powered by the acquired high-level voltage; if the SDA and SCL of the I2C corresponding to the motherboard to be programmed are reused by the corresponding peripheral circuit to provide a low operating voltage for the motherboard to be programmed, the entire subsequent programming process of the motherboard to be programmed will be powered by the low operating voltage. The rise time of the high-level voltage of the I2C SDA from low to high is detected, and the communication rate of the I2C is determined based on the rise time.

8. The automatic I2C communication signal adaptation programming and testing method according to claim 7, characterized in that, Based on the proximity of the high-level voltages of SDA and SCL to the typical operating voltage, determine whether the SDA and SCL of the I2C corresponding to the motherboard to be programmed reuse the corresponding peripheral circuits, including: When the difference between the high-level voltages of SDA and SCL and the typical operating voltage is less than a first threshold, it is determined that the SDA and SCL of the I2C corresponding to the motherboard to be programmed are not reused for the corresponding peripheral circuits; when the difference between the high-level voltages of SDA and SCL and the typical operating voltage is greater than a second threshold, it is determined that the SDA and SCL of the I2C corresponding to the motherboard to be programmed are reused for the corresponding peripheral circuits.

9. The automatic I2C communication signal adaptation programming and testing method according to claim 7, characterized in that, Determining the I2C communication rate based on the rise time includes: If the rise time is less than the first time, the I2C communication rate adopts the first communication rate; If the rise time is not less than the first time and less than the second time, the I2C communication rate adopts the second communication rate. If the rising edge time is not less than the second time, the second communication rate is further reduced in the subsequent entire burning process of the motherboard to be burned until the subsequent entire burning process is completed.

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