Circuit design optimization method based on adaptive space and dynamic fusion acquisition function

Abstract

The application belongs to the field of integrated circuit design, and particularly relates to a circuit design optimization method based on adaptive space and dynamic fusion collection function. The scheme belongs to an improved Bayesian optimization algorithm, initial samples are generated by Latin hypercube sampling and an initial subspace is constructed, invalid search is reduced by using truncated Gaussian subspace sampling, and candidate point generation is optimized by a trust region. In the training stage, the training effect is improved by combining maximum posterior estimation, L-BFGS quasi-Newton optimization and multi-start restart strategy; in the iterative optimization stage, a Gaussian surrogate model is used for fitting and a dynamic fusion collection function weighted by Sigmoid is introduced to more flexibly cope with the optimization requirements at different stages and better balance exploration and utilization. The scheme provided by the application can obviously improve the optimization efficiency and robustness indicators compared with mainstream methods, and can solve the problems of high simulation cost, sparse samples and decreased search efficiency of existing schemes in high-dimensional analog circuits.

Description

Technical Field

[0001] This invention belongs to the field of integrated circuit design, specifically relating to a circuit design optimization method based on adaptive spatial and dynamic fusion acquisition functions, and the corresponding computer program product, computer storage medium, and circuit design optimization device. Background Technology

[0002] Analog circuits are a crucial part of integrated circuit design, and their performance directly affects the functionality and reliability of chips. With the continuous development of integrated circuit technology, especially in the design of high-performance, low-power chips, analog circuit design faces increasingly complex requirements. Optimizing the size of analog circuits is essential for improving circuit performance, shortening design cycles, and reducing costs. However, analog circuit optimization faces several challenges. First, there is a strong coupling between the performance of analog circuits and design goals; traditional optimization methods often rely on experience and struggle to achieve global optimization. Second, as circuit complexity increases, the dimensionality of the design space rises sharply; traditional optimization algorithms often perform inefficiently in high-dimensional design spaces and cannot meet the needs of modern chips.

[0003] Traditional analog circuit optimization methods mostly rely on manual adjustments or gradient-based optimization algorithms, which generally suffer from insufficient global search capabilities and slow convergence speeds. Analog circuit design can often be abstracted as a black-box optimization problem. Bayesian optimization, as an efficient global optimization method, can accelerate the optimization process by reducing the number of simulations. However, in high-dimensional design spaces, its training complexity increases exponentially, leading to a significant decrease in optimization efficiency. Therefore, existing algorithms still face bottlenecks in computational efficiency and optimization accuracy when dealing with complex, high-dimensional analog circuit designs, requiring further improvement.

[0004] To address these challenges, a series of emerging high-dimensional optimization algorithms have emerged in recent years, such as dimensional embedding, dimensional decoupling, and domain decomposition. These methods effectively overcome the limitations of traditional methods in high-dimensional environments by reducing the dimensionality of the design space, improving global search capabilities, and enhancing optimization efficiency. For example, dimensional embedding reduces computational complexity by mapping a high-dimensional space to a low-dimensional subspace; dimensional decoupling decomposes a high-dimensional problem into low-dimensional subproblems for independent optimization; and domain decomposition significantly improves efficiency by optimizing within potential regions. Despite these advancements, further improving the accuracy and computational efficiency of these algorithms remains a key research focus. Summary of the Invention

[0005] To address the problems of high simulation costs, sparse samples, and reduced search efficiency in the automatic size optimization of high-dimensional analog circuits using existing circuit design schemes, this invention provides a circuit design optimization method based on adaptive spatial and dynamic fusion acquisition functions, as well as the corresponding computer program product, computer storage medium, and circuit design optimization device.

[0006] This invention is achieved using the following technical solution: A circuit design optimization method based on adaptive spatial and dynamic fusion acquisition functions, comprising: First, the component dimensions of the circuit to be optimized are used as design parameters. The design parameters are uniformly sampled, and the sampling results are used for circuit simulation to generate historical samples to form a historical dataset. Based on the historical dataset, an initial subspace representing the selectable range of design parameters is generated, and its search center, local covariance matrix, and adaptive step size are initialized.

[0007] II. Constructing a GP proxy model and iteratively optimizing design parameters, including: (1) Perform truncated Gaussian subspace sampling on the initial subspace to obtain sample points in the local subspace.

[0008] (2) Select the closest sample points according to Mahalanobis distance to form a training set, and use the training set to train the GP proxy model; the trained GP proxy model is used to output the predicted mean and predicted standard deviation of the sample points.

[0009] (3) The sample points are scored by using a preset dynamic fusion acquisition function combined with the output of the GP proxy model.

[0010] In this embodiment, the dynamic fusion acquisition function uses the Sigmoid function to generate the weights of the upper confidence bound UCB and the desired improvement EI; and dynamically fuses the UCB and EI according to the current evaluation progress.

[0011] (4) Select a batch of sample points with better scores as candidate points, perform performance simulation on them to form new historical samples, and add them to the historical dataset.

[0012] (5) Construct a search path based on the better sample among the candidate points, adaptively update the initial subspace, and determine the new search center, adaptive step size and local covariance matrix for use in the next iteration.

[0013] Third, when the preset iteration termination condition is met, output the value of the design parameter of the best historical sample in the historical dataset as the optimization result.

[0014] As a further improvement of this invention, the method for constructing historical datasets includes: The Latin hypercube sampling method is used to uniformly sample within the normalized space of the design parameters to generate initial sample points.

[0015] The initial sample points are mapped back to the real circuit parameter space to obtain the design parameter values, and the simulation model is called based on the design parameter values ​​to generate the performance values ​​of the target circuit to be optimized.

[0016] Each set of design parameters x i and its performance value y i As a historical sample (x) i y i This allows us to obtain the required historical dataset containing a large number of simulated historical samples.

[0017] As a further improvement of the present invention, the process of generating sample points by truncating the Gaussian subspace sampling includes: (i) Obtain the search center x of the initial subspace k Local covariance matrix C k and adaptive step size .

[0018] (ii) For C k Eigenvalue decomposition yields the orthogonal eigenvector matrix W. k and eigenvalue diagonal matrix : ; In the above formula, W k The transpose of .

[0019] (iii) Sample a specified number of random vectors z from the initial subspace of the standard normal distribution. i .

[0020] (iv) According to W k and Generate candidate points And restrict local Gaussian sampling to the normalized space. In this process, the set of legal candidates for the current round is obtained. : ; In the above formula, N c Indicates the number of sample points.

[0021] Candidate points that cross the boundary are handled by rejecting sampling or boundary projection.

[0022] (v) judgment The number of candidate points N c If the preset threshold is met, the sampling ends; otherwise, return to step (iii) to continue sampling.

[0023] As a further improvement to this invention, the training strategy for the GP proxy model includes: (I) Generate the input matrix and target value vector for training based on the design parameters and performance values ​​of each sample in the training set, and standardize each element in the target value vector.

[0024] (II) Let the hyperparameters to be optimized in the GP proxy model be denoted as Hyperparameters are constructed by introducing hyperparameter prior constraints in addition to the marginal likelihood term. The objective function is optimized, and the hyperparameters of the Gaussian process are trained using MAP.

[0025] (III) The L-BFGS quasi-Newton optimization method is used to approximate the Hessian inverse matrix based on historical gradient information, so as to iteratively generate stable parameter solutions.

[0026] (IV) A multi-starting point restart strategy is adopted; the original hyperparameters are used as the initial starting point, and subsequent restarts generate differentiated initial values ​​through random perturbation to cover different search areas.

[0027] (V) After training, select the set of hyperparameters with the minimum loss as the optimal hyperparameters for MAP training. .

[0028] As a further improvement of this invention, in the GP agent model training phase, the expression of the designed optimization objective function is as follows: In the above formula, X represents the input matrix; y represents an element in the target value vector. This represents the standardized target value; For hyperparameter prior regularization terms; This is the marginal log-likelihood term.

[0029] The GP surrogate model uses a covariance kernel function with automatic correlation determination, and its parameter update equation during the training phase is as follows: ; In the above formula, and H represents the model parameters before and after the k-th iteration, respectively; k This is an approximation of the Hessian inverse matrix at the k-th iteration. The search step size is the line search step size. To act on The gradient operator.

[0030] As a further improvement of the present invention, the design method of the dynamic fusion acquisition function includes: (1) Let N be the number of sample simulations completed in the t-th iteration. t The maximum simulation budget is N. max Define the assessment progress for: .

[0031] (2) Generate UCB and EI at the Nth time using the Sigmoid function t Dynamic weights after simulation and ,include: ; In the above formula, k sig This represents the preset slope used to control the change in weights. This represents the hyperparameters used to control the transition from exploration to development.

[0032] (3) The exploration coefficient of UCB Set as shown below Changing dynamic parameters: ; In the above formula, and These represent the upper and lower limits of the preset exploration coefficient, respectively.

[0033] (4) According to the following formula, the candidate point set is... Any sampled component within Normalization is performed; thus, the normalized UCB and EI values ​​are obtained. and : In the above formula, This represents the normalized sampled components; Represents the numerically stable term; and These are the minimum and maximum values ​​of the sampled components, respectively.

[0034] (5) Based on dynamic weights and right and Weighted fusion is performed to obtain the dynamic fusion acquisition function. : .

[0035] As a further improvement of the present invention, in the iterative optimization stage of design parameters, the iteration termination conditions include the number of historical samples in the historical dataset reaching a preset value, or the number of iterations reaching a preset upper limit.

[0036] As a further improvement of this invention, the adaptive update strategy for the initial subspace after each iteration is as follows: (1) After sorting the historical samples of the current batch, select the top few samples with better performance to construct the search path P. k : ; In the above formula, B represents the proportion of elite samples; B represents the number of candidate points selected after evaluation in each round. This represents the i-th sample after sorting. x represents the ranking weight. k This represents the search center in the k-th round; This represents the adaptive step size in the k-th round.

[0037] And calculate the search center x for the next round using the following formula. k+1 : .

[0038] (2) Adaptive step size for the kth round based on the search path length Perform adaptive adjustments to obtain the adaptive step size for the next round. : ; In the above formula, c is the step size update coefficient. C is the expected approximation of the norm of a d-dimensional standard normal vector; k Let represent the local covariance matrix of the k-th round.

[0039] (3) According to C k P k and local gradient J k For the next round of local covariance matrix C k+1 Joint update: ; In the above formula, c C c J and c P These are the weights of the preset historical direction, local gradient, and search path, respectively; and J k and P k The transpose of .

[0040] The present invention also includes a computer storage medium storing a computer program. When the computer program is executed by a processor, it implements the circuit design optimization method based on adaptive spatial and dynamic fusion acquisition function as described above, thereby obtaining the optimal design parameters of the circuit to be designed so as to achieve the best performance indicators.

[0041] The present invention also includes a computer program product, which includes a computer program that, when executed by a processor, implements the circuit design optimization method based on adaptive spatial and dynamic fusion acquisition functions as described above, thereby obtaining the optimal design parameters of the circuit to be designed so as to achieve the best performance indicators.

[0042] The present invention also includes a circuit design optimization device, which includes a memory, a processor, and a computer program stored in the memory and running on the processor. When the processor executes the computer program, it implements the circuit design optimization method based on adaptive spatial and dynamic fusion acquisition function as described above, thereby obtaining the optimal design parameters of the circuit to be designed so as to achieve the best performance index.

[0043] The technical solution provided by this invention has the following beneficial effects: This invention provides a circuit design optimization method based on adaptive space and dynamic fusion acquisition function. This method can be used to solve problems such as high simulation cost, sparse samples and reduced search efficiency in automatic size optimization of high-dimensional analog circuits. The technical solution provided by this invention belongs to the improved Bayesian optimization scheme. The core improvements include: (1) This invention adopts Latin hypercube sampling to improve the quality of initial sample coverage, and focuses candidate points on high-potential regions by truncating Gaussian subspace sampling, thereby reducing the complexity of high-dimensional candidate generation. (2) In the training stage of the GP surrogate model, a local Gaussian process model is constructed based on the adaptive subspace, and combined with maximum a posteriori estimation, L-BFGS quasi-Newton optimization and multi-start-point restart strategy to improve model stability and reliability of uncertainty estimation; and reduce the risk of the optimization results of model hyperparameters falling into poor local optima. (3) In the iterative optimization stage of the GP surrogate model, a sigmoid-weighted acquisition function is designed to dynamically fuse UCB and EI to achieve smooth switching between exploration and development; and on the basis of covering a higher search range, high-quality candidate regions are focused on to obtain more efficient parameter optimization results.

[0044] Ultimately, based on the performance of the proposed solution in high-dimensional benchmark functions and analog circuit size optimization tasks, it is evident that the technology provided by this invention effectively improves sample utilization efficiency under limited simulation budgets. It addresses the problems of high simulation costs, sparse samples, and decreased search efficiency in existing circuit design schemes for automatic size optimization of high-dimensional analog circuits, achieving a balance between the optimization effect and efficiency of circuit design parameters. Therefore, the technical solution provided by this invention has significant practical value and can be applied to EDA tools to assist in improving the circuit performance of analog circuit design schemes. Attached Figure Description

[0045] Figure 1 This is a schematic diagram of the circuit design optimization method based on adaptive spatial and dynamic fusion acquisition function provided in Embodiment 1 of the present invention.

[0046] Figure 2 This represents the initial sampling results obtained using the LHS method in a two-dimensional normalized space.

[0047] Figure 3 The convergence curves are used to show the optimization effects of different schemes using the 100-dimensional Ackley test function in the test experiment.

[0048] Figure 4 The convergence curves are used to show the optimization effects of different schemes using the Griewank multimodal test function in the test experiment.

[0049] Figure 5 The convergence curves are used to show the optimization effects of different schemes using the Rosenbrock valley-shaped non-convex test function in the test experiment.

[0050] Figure 6 This is the circuit diagram of the operational transconductance amplifier used as the test circuit in the test experiment.

[0051] Figure 7 Convergence curves were used to test the optimization effects of different schemes on the operational transconductance amplifier in the experiment.

[0052] Figure 8 This is the circuit diagram of the folded common-gate amplifier used as the test circuit in the test experiment.

[0053] Figure 9 Convergence curves were used to test the optimization effects of different schemes on the folded common-gate amplifier in the experiment.

[0054] Figure 10 This is a circuit diagram of the error amplifier circuit of the LDO used as the test circuit in the test experiment.

[0055] Figure 11 To test the convergence curves of the optimization effects of different schemes on the error amplifier circuit of LDO in the experiment. Detailed Implementation

[0056] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0057] Example 1 In the field of Electronic Design Automation (EDA), particularly in analog circuit size optimization, optimizing the dimensions of circuit components (such as transistors, resistors, and capacitors) is crucial for circuits with arbitrary functions. This optimization aims to improve circuit performance, meet design requirements, shorten design cycles, and reduce costs. EDA tools utilize efficient algorithms to process complex design spaces, overcoming the limitations of traditional manual design and gradient-based optimization algorithms. This supports the design optimization of high-performance, low-power chips. This size optimization of circuit solutions is widely used in fields such as 5G communication, artificial intelligence, and autonomous driving, driving the automation of analog circuit design, enhancing the intelligence level of EDA tools, and promoting technological progress and self-reliance in the integrated circuit industry.

[0058] In this embodiment, when technicians apply Bayesian optimization (BO) techniques to automatically optimize the dimensions of analog circuits, the main bottlenecks stem from the high-dimensional design space, finite simulation budget, and the training overhead of the surrogate model. As the number of design variables increases, the candidate search space expands rapidly, and the limited number of observation samples fails to adequately characterize the circuit's performance response surface. This leads to high uncertainty in the surrogate model over a wide range of regions and makes the acquisition function prone to inefficient exploration. Simultaneously, as the number of samples increases, the overhead of Gaussian process training and acquisition function computation also gradually rises, affecting efficiency in practical circuit optimization tasks.

[0059] To address the problems of high simulation costs, sparse samples, and decreased search efficiency in automatic size optimization of high-dimensional analog circuits caused by the aforementioned reasons in existing circuit design schemes, this embodiment provides a circuit design optimization method based on adaptive spatial and dynamic fusion acquisition functions. This method uses Latin hypercube sampling (LHS) to construct initial observation samples, improving spatial coverage quality under limited simulation budgets; and generates effective candidate points by truncating Gaussian subspace sampling, focusing the search on current high-potential regions and reducing the complexity of high-dimensional candidate sampling. Based on this, this embodiment further constructs a surrogate model based on local Gaussian processes (GP) within the adaptive subspace and introduces a hyperparameter training mechanism combining maximum a posteriori estimation and L-BFGS quasi-Newton optimization to improve model stability and uncertainty estimation reliability under small sample conditions. In the iterative optimization stage of design parameters, this embodiment also designs an acquisition function based on adaptive Sigmoid function weighting, dynamically fusing upper confidence bound (UCB) and expected improvement (EI) to achieve a smooth switch between exploration and development; thereby improving the search efficiency and convergence stability of high-dimensional analog circuit size optimization. Based on the above improvements, the technical solution provided in this embodiment can enhance the initial coverage capability, surrogate modeling stability and candidate point screening robustness of the solution in high-dimensional design space while maintaining the sample efficiency advantage of the Bayesian optimization scheme, thus providing a more efficient solution for automatic size optimization of complex analog circuits.

[0060] Specifically, such as Figure 1 As shown, the circuit design optimization method based on adaptive spatial and dynamic fusion acquisition functions provided in this embodiment includes the following steps: First, the component dimensions of the circuit to be optimized are used as design parameters. The design parameters are uniformly sampled, and the sampling results are used for circuit simulation to generate historical samples to form a historical dataset. Based on the historical dataset, an initial subspace representing the selectable range of design parameters is generated, and its search center, local covariance matrix, and adaptive step size are initialized.

[0061] In this embodiment, to achieve comprehensive coverage of the candidate search space for design parameters, Latin hypercube sampling is used to generate initial sample points. After circuit simulation of the circuit schemes corresponding to these initial sample points, performance data of the relevant circuit schemes are obtained, thus forming an initial historical dataset. Specifically, the method for constructing the historical dataset in this embodiment includes the following steps: (1) The Latin hypercube sampling method is used to uniformly sample within the normalized space of the design parameters to generate initial sample points.

[0062] In this embodiment, assuming the initial number of historical samples is N0, LHS divides the normalized interval [0,1] of the variable corresponding to each design parameter into N0 non-overlapping sub-intervals. Then, sampling values ​​are randomly generated within each sub-interval, and the sub-interval numbers on different dimensions are randomly arranged and combined. For example, suppose... This represents a random permutation of the i-th sample along the j-th dimension. If the random perturbation within the interval is represented, then the normalized value u of the i-th sample in the j-th dimension is... ij It can be represented as follows: Taking the two-dimensional normalized space (u1, u2) as an example, Figure 2 The initial LHS sampling results when N0=20 are shown. Specifically, the normalized design space is [0,1]. 2 The sample is uniformly divided into 20 stratified intervals along each coordinate axis, and intra-layer perturbation sampling is performed under the constraint of dimension-independent random arrangement. This yields the normalized initial sample matrix U0: d represents the dimension of the design parameters; and ensures that N0 samples on each design variable are located in different stratification intervals, thereby obtaining a more uniform marginal coverage under a limited initial simulation budget.

[0063] (2) Map each initial sample point back to the real circuit parameter space to obtain the design parameter values, and call the simulation model according to the design parameter values ​​to generate the performance values ​​of the target circuit to be optimized.

[0064] After uniform sampling in the normalized space, this embodiment maps each initial sample point to the actual analog circuit parameter space; the mapped initial design set is denoted as X0: ,in, These represent the actual parameter values ​​of the design parameters corresponding to the initial sample points 1 through N0, respectively. Subsequently, a circuit performance simulation model is used to perform circuit simulation and performance testing on the target circuit with a specified circuit structure based on the design parameter values ​​in the sample points, thereby obtaining the performance index of the target circuit under the current design parameters.

[0065] (3) Set each set of design parameters x i and its performance value y i As a historical sample (x) i y i This allows us to obtain the required historical dataset containing a large number of simulated historical samples.

[0066] In this embodiment, historical samples with known performance metrics from the historical dataset will serve as the initial input data for subsequent surrogate model training, candidate point selection, and search region updates. To facilitate subsequent tasks, this embodiment also generates an initial subspace for design parameter optimization based on the historical dataset and initializes its search center, local covariance matrix, and adaptive step size. In this embodiment, during subsequent iterations, the search center, local covariance matrix, and adaptive step size will adaptively adjust as the parameter optimization iterative process progresses.

[0067] 2. Construct a GP proxy model and iteratively optimize the design parameters.

[0068] In this embodiment, for computationally expensive analog circuit optimization tasks, Bayesian optimization (BO) is chosen to approximate the unknown objective function using a probabilistic surrogate model, and the candidate design point with the highest evaluation value is selected within a limited simulation budget using a data acquisition function. The core of Bayesian optimization lies in making trade-offs between local development and global exploration based on existing observation samples (historical datasets) and utilizing predictive performance and model uncertainty.

[0069] Specifically, in this embodiment, a surrogate model (GP) based on a Gaussian process is constructed. Assume the historical dataset for the current iteration is D: For any candidate point x, GP gives its posterior prediction distribution as follows: : Its predicted mean and prediction variance They are respectively: ; in, To train the sample covariance matrix, Let be the covariance vector between the candidate point and the training samples; y represents the true performance of the candidate point x.

[0070] Forecast Mean Used to characterize the expected performance and prediction variance of candidate designs This is used to quantify the uncertainty of the surrogate model at this point. The GP surrogate model constructed in this embodiment, as a probabilistic surrogate model, can simultaneously provide predicted values ​​and uncertainty estimates, and thus can be used for sequential modeling in expensive black-box optimization.

[0071] Next, the process of iteratively optimizing the design parameters using the constructed GP proxy model in this embodiment includes the following steps: 1. Perform truncated Gaussian subspace sampling on the initial subspace to obtain sample points in the local subspace.

[0072] In high-dimensional analog circuit size optimization, directly generating candidate points in the complete design space can easily lead to sample dispersion, causing the limited simulation budget to be consumed by low-value regions. This embodiment introduces a truncated subspace mechanism, which constructs a local candidate distribution near the current search center and restricts the sampling results to the legal design space, concentrating candidate points in regions with greater potential for improvement. Specifically, the process of generating sample points through truncated Gaussian subspace sampling includes: (i) Obtain the search center x of the initial subspace k Local covariance matrix C k and adaptive step size .

[0073] In this embodiment, the normalized design space Represented as: Among them, search center x k That is, the center of the search range of candidate points in the k-th iteration, and the local covariance matrix C. k Describes the local search direction in the k-th iteration, with an adaptive step size. This is used to control the diffusion scale of candidate points relative to the search center.

[0074] (ii) To extract the local main search direction, for C k The following eigenvalue decomposition yields the orthogonal eigenvector matrix W. k and eigenvalue diagonal matrix : ; In the above formula, W k The transpose of .

[0075] In this embodiment, W k The feature vectors in the model correspond to the main local search direction. The eigenvalues ​​in the model characterize the intensity of perturbations in each direction. Larger eigenvalues ​​expand the sampling range in the corresponding direction, while smaller eigenvalues ​​compress the perturbation amplitude in the corresponding direction, thus forming an anisotropic local search subspace.

[0076] (iii) Sample a specified number of random vectors z from the initial subspace of the standard normal distribution. i .

[0077] (iv) According to W k and Generate candidate points And restrict local Gaussian sampling to the normalized space. In this process, the set of legal candidates for the current round is obtained. : ; In the above formula, N c Indicates the number of sample points.

[0078] (v) judgment The number of candidate points N c If the preset threshold is met, the sampling ends; otherwise, return to step (iii) to continue sampling.

[0079] In the candidate point generation stage of this embodiment, random vectors are first sampled from a standard normal distribution; then, candidate points are generated based on the local covariance matrix; this process is equivalent to generating candidate points from a local Gaussian distribution. The distribution is used to sample candidate points. Compared with isotropic sampling, this distribution can expand more effectively along the directions in the historical search and reduce random perturbations in directions with lower contributions, making the candidate set more suitable for subsequent surrogate model evaluation and collection function screening.

[0080] Furthermore, since the size parameters of analog circuits are constrained by process rules and design boundaries, candidate points must be located within the legal design space. Therefore, the truncated subspace mechanism in this embodiment restricts local Gaussian sampling to the normalized space. In this process, candidate points that cross the boundary are handled by either rejecting sampling or boundary projection. For example, for... The projection operation can prune the candidate set to the valid interval dimension by dimension. After truncation, the candidate set can still maintain directional search capability within a local range, while satisfying the boundary constraints of the circuit size variable, providing valid input for subsequent surrogate model prediction and acquisition function ranking.

[0081] 2. Sample points are selected according to Mahalanobis distance to form a training set, and the GP surrogate model is trained using the training set; the trained GP surrogate model is used to output the predicted mean and predicted standard deviation of the sample points.

[0082] In the training phase of the GP surrogate model in this embodiment, to improve local fitting accuracy and reduce computational complexity, each historical sample in the historical dataset is first filtered according to Mahalanobis distance, and the N closest to the local optimization center is selected. training A sample was used as the GP training set, and after standardization, the GP surrogate model was fitted using a Matérn 5 / 2 kernel.

[0083] In the training phase of the GP surrogate model, considering the high cost of a single simulation in automatic sizing of analog circuits, the surrogate model needs to maintain stable fitting ability and reliable uncertainty estimation under limited samples. However, in high-dimensional, small-sample scenarios, Gaussian process hyperparameters are easily affected by insufficient samples and local fluctuations in the objective function, leading to problems such as length scale degradation, overfitting, or excessive smoothing. To improve the robustness of hyperparameter learning, this embodiment introduces a Gamma soft prior and uses maximum a posteriori probability (MAP) estimation, combined with an LBFGS multi-startpoint optimization strategy to improve convergence stability.

[0084] Specifically, the training strategy for the GP proxy model in this embodiment includes the following: (I) Generate the input matrix and target value vector for training based on the design parameters and performance values ​​of each sample in the training set, and standardize each element in the target value vector.

[0085] Specifically, assuming the input matrix for training is X and the target value vector is Y; in order to reduce the impact of differences in the target function scale on the training process, this embodiment performs the following standardization processing on each element in the target value vector: in, and These are the current target values. The mean and standard deviation, It is a numerically stable term; This represents the standard value of y.

[0086] (II) Let the hyperparameters to be optimized in the GP proxy model be denoted as Hyperparameters are constructed by introducing hyperparameter prior constraints in addition to the marginal likelihood term. The objective function is optimized, and the hyperparameters of the Gaussian process are trained using MAP.

[0087] Due to the hyperparameters to be optimized in the Gaussian process model The hyperparameters determine the correlation structure between samples and directly affect the predicted mean and uncertainty. Traditional maximum marginal likelihood estimation learns hyperparameters based solely on observed data, which can easily lead to parameter convergence to unreasonable regions under limited sample conditions. To improve training stability, this embodiment uses MAP to train the hyperparameters of the Gaussian process, constructing a hyperparameter... Optimization objective function as follows: In the above formula, For hyperparameter prior regularization terms; This is the marginal log-likelihood term.

[0088] Based on this, the hyperparameters of the GP proxy model during the training phase The optimization problem can be formalized as finding : The result obtained by minimizing the objective function It is the optimal hyperparameter under the maximum a posteriori estimation criterion, which can achieve an effective balance between data fitting accuracy and parameter regularization constraints.

[0089] (III) The L-BFGS quasi-Newton optimization method is used to approximate the Hessian inverse matrix based on historical gradient information, so as to iteratively generate stable parameter solutions.

[0090] because This involves the inverse operation of the covariance matrix and the calculation of the determinant of a Gaussian process, as well as hyperparameters. The relationship between the target and the objective often exhibits a complex nonlinear relationship, making analytical solutions difficult. Therefore, this embodiment employs the L-BFGS quasi-Newton method for numerical optimization. The GP surrogate model uses a covariance kernel function with automatic correlation determination, and its parameter update equation during the training phase is: ; In the above formula, and H represents the model parameters before and after the k-th iteration, respectively; k This is an approximation of the Hessian inverse matrix at the k-th iteration (note the parameter conflict). The search step size is the line search step size. Indicates action on The gradient operator; (IV) A multi-starting point restart strategy is adopted; the original hyperparameters are used as the initial starting point, and subsequent restarts generate differentiated initial values ​​through random perturbation to cover different search areas.

[0091] In the training strategy of the GP proxy model provided in this embodiment, considering that the hyperparameter optimization objective has non-convex characteristics, a single optimization is prone to getting trapped in local optima. To improve training robustness, this embodiment introduces a multi-starting-point restart strategy, using the original hyperparameters as the initial starting point, and subsequent restarts generate differentiated initial values ​​through random perturbation to cover different search regions; reducing the risk of the optimization result getting trapped in inferior local optima.

[0092] (V) After training, select The set of hyperparameters that minimizes the loss is used as the optimal hyperparameters for MAP training. .

[0093] 3. The sample points are scored by using a preset dynamic fusion acquisition function combined with the output of the GP proxy model.

[0094] This embodiment evaluates the search value of candidate samples based on the predicted mean and predicted variance given by the surrogate model at the candidate circuit size points. The upper confidence bound (UCB) focuses on exploring high uncertainty regions, while the expected improvement (EI) measures the potential improvement of a candidate point relative to the current optimal design; both are widely used in Bayesian optimization for the exploration-expansion tradeoff. To balance global exploration and local development within a limited evaluation budget, this embodiment specifically constructs an adaptive Sigmoid-weighted acquisition function, dynamically fusing UCB and EI according to the optimization progress. This allows the acquisition strategy to favor exploration of uncertain regions in the early stages of optimization and gradually shift towards development of high-potential regions in the later stages. Specifically, the dynamic fusion acquisition function designed in this embodiment uses the Sigmoid function to generate the weights of the upper confidence bound (UCB) and the expected improvement (EI); and dynamically fuses UCB and EI according to the current evaluation progress. This dynamic fusion acquisition function... The expression is as follows: In the above formula, and These represent the normalized UCB and EI values, respectively; while the dynamic weights... and This represents the dynamic weights of UCB and EI, whose values ​​are dynamically updated as the number of simulations (or evaluation progress) increases.

[0095] Specifically, in this embodiment, the dynamic fusion acquisition function The design methodology includes the following steps: (1) Let N be the number of sample simulations completed in the t-th iteration. t The maximum simulation budget is N. max Define the assessment progress for: ; (2) Generate UCB and EI at the Nth time using the Sigmoid function t Dynamic weights after simulation and ,include: ; In the above formula, k sig This represents the preset slope used to control the change in weights. This represents the hyperparameters used to control the transition from exploration to development.

[0096] (3) The exploration coefficient of UCB Set as shown below Changing dynamic parameters: ; In the above formula, and These represent the upper and lower limits of the preset exploration coefficient, respectively.

[0097] Based on the above formula, it can be seen that in the initial stage of optimization, Larger and near The acquisition function tends to select candidate points with higher prediction uncertainty; as the evaluation budget is gradually consumed, Increase and Approaching The selection of candidate sites is gradually shifting towards areas with higher potential for improvement.

[0098] (4) Due to the different numerical scales of UCB and EI, direct weighting may lead to a certain component dominating the overall score. In this embodiment, the current candidate point set... The two are normalized separately. Specifically, the candidate point set is normalized according to the following formula. Any sampled component within Perform normalization; This leads to the normalized UCB and EI values. and .

[0099] In the above formula, This represents the normalized sampled components; Represents the numerically stable term; and These are the minimum and maximum values ​​of the sampled components, respectively.

[0100] (5) Based on dynamic weights and right and Weighted fusion is performed to obtain the dynamic fusion acquisition function. : .

[0101] 4. Select a batch of sample points with better scores as candidate points, perform performance simulation on them to form new historical samples, and add them to the historical dataset.

[0102] In each iteration of optimization in this embodiment, the obtained sample points are arranged according to... The values ​​are sorted from largest to smallest, and the B candidate points with the highest scores are selected for simulation evaluation. The dynamic fusion acquisition function designed in this embodiment can avoid the problem of insufficient adaptability of fixed acquisition strategies at different optimization stages, and enable the selection of candidate points to smoothly transition from exploration to development as the evaluation progresses.

[0103] 5. Construct a search path based on the better samples among the candidate points, adaptively update the initial subspace, and determine the new search center, adaptive step size, and local covariance matrix for use in the next iteration.

[0104] The technical solution provided in this embodiment updates the local search subspace based on the objective function value of the current batch of samples after each round of candidate point evaluation, causing the subsequent sampling distribution to gradually shrink towards the high-potential design region. Specifically, after each iteration, the adaptive update strategy for the initial subspace designed in this embodiment is as follows: (1) After sorting the historical samples of the current batch, select the top few samples with better performance to construct the search path P. k : ; In the above formula, B represents the proportion of elite samples; B represents the number of candidate points selected after evaluation in each round. This represents the i-th sample after sorting. x represents the ranking weight. k This represents the search center in the k-th round; This represents the adaptive step size in the k-th round.

[0105] And calculate the search center x for the next round using the following formula. k+1 : .

[0106] (2) To achieve the following: when excellent samples show a consistent moving trend under the current metric, the step size is increased to expand the coverage of potential excellent regions; when the path length is short, the step size is decreased to strengthen local development. In this embodiment, the adaptive step size for the k-th round is determined based on the search path length. Perform adaptive adjustments to obtain the adaptive step size for the next round. for: ; In the above formula, c is the step size update coefficient. C is the expected approximation of the norm of a d-dimensional standard normal vector; k Let represent the local covariance matrix of the k-th round.

[0107] This embodiment can dynamically adjust the local sampling range according to the search status by setting an adaptive step size, thereby improving the probability of selecting high-quality candidate points.

[0108] (3) According to C k P k and local gradient J k For the next round of local covariance matrix Ck+1 Joint update: ; In the above formula, c C c J and c P These are the weights of the preset historical direction, local gradient, and search path, respectively; and J k and P k The transpose of C. The updated C k+1 Used for the next round of truncated subspace sampling, so that the candidate distribution gradually aligns with the main change direction of the high-potential design region.

[0109] Third, when the preset iteration termination condition is met, output the value of the design parameter of the best historical sample in the historical dataset as the optimization result.

[0110] In this embodiment, during the iterative optimization phase of design parameters, the iteration termination condition can include the number of historical samples in the historical dataset reaching a preset value, i.e., the simulation budget reached; or the number of iterations reaching a preset upper limit. Of course, in practical applications, iteration termination conditions can also be set based on other growth indicators or progress that reflect the degree of circuit performance optimization.

[0111] Example 2 The circuit design optimization method based on adaptive spatial and dynamic fusion acquisition function provided in Example 1 is essentially a data processing method. In order to better apply this scheme, this example further provides related computer storage media, computer program products and circuit design optimization devices.

[0112] The computer storage medium provided in this embodiment stores a computer program. When the computer program is executed by the processor, it implements the circuit design optimization method based on adaptive spatial and dynamic fusion acquisition function as in Embodiment 1, thereby obtaining the optimal design parameters of the circuit to be designed so that it can achieve the best performance index.

[0113] The computer program product provided in this embodiment includes a computer program. When the computer program is executed by the processor, it implements the circuit design optimization method based on adaptive spatial and dynamic fusion acquisition function as in Embodiment 1, thereby obtaining the optimal design parameters of the circuit to be designed so that it can achieve the best performance indicators.

[0114] The circuit design optimization device provided in this embodiment includes a memory, a processor, and a computer program stored in the memory and running on the processor. When the processor executes the computer program, it implements the circuit design optimization method based on adaptive spatial and dynamic fusion acquisition function as in Embodiment 1, thereby obtaining the optimal design parameters of the circuit to be designed so that it achieves the best performance index.

[0115] In practical applications, the circuit design optimization device provided in this embodiment is essentially a computer device. This computer device can employ embedded chips or a computing terminal capable of executing programs. Examples include: smartphones, tablets, laptops, desktop computers, rack servers, blade servers, tower servers, or cabinet servers (including standalone servers or server clusters composed of multiple servers), etc.

[0116] The computer device in this embodiment includes, but is not limited to, a memory and a processor that can be interconnected via a system bus. In this embodiment, the memory (i.e., the readable storage medium) includes flash memory, hard disk, multimedia card, card-type memory (e.g., SD or DX memory), random access memory (RAM), static random access memory (SRAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), programmable read-only memory (PROM), magnetic memory, magnetic disk, optical disk, etc. In some embodiments, the memory can be an internal storage unit of the computer device, such as the hard disk or RAM of the computer device. In other embodiments, the memory can also be an external storage device of the computer device, such as a plug-in hard disk, smart media card (SMC), secure digital card (SD), flash card, etc. Of course, the memory can also include both internal storage units and external storage devices of the computer device. In this embodiment, the memory is typically used to store the operating system and various application software installed on the computer device. Furthermore, the memory can also be used to temporarily store various types of data that have been output or will be output. In some embodiments, the processor may be a central processing unit (CPU), a controller, a microcontroller, a microprocessor, or other data processing chip. The processor is typically used to control the overall operation of a computer device.

[0117] Simulation test 1. Control group and simulation conditions To verify the performance of the circuit design optimization method based on adaptive spatial and dynamic fusion acquisition function (hereinafter referred to as the ASDA-BO method) provided by this invention, the technicians formulated an experimental plan and conducted simulation tests on the component size optimization effect of the relevant scheme in a specified real circuit. The experimental process was implemented in Python using the GPyTorch library; and the matern 5 / 2 kernel was used to build the GP proxy model.

[0118] To better evaluate the performance of the present invention, this experiment also compared the present invention with advanced baseline solutions such as CMA-ES, HesBO, TuRBO, LA-MCTS, and tSS-BO.

[0119] 2. High-dimensional benchmark function This experiment first uses 100-dimensional Ackley and Griewank multimodal test functions and Rosenbrock valley-type nonconvex test functions to verify the high-dimensional optimization performance of the proposed scheme. In the experiment, the dimension of the design parameters is chosen to be d=100, meaning it contains 100 different design variables; each scheme is evaluated using N... init Run at N random initial points, init = d; and a total of 1000 evaluations are performed.

[0120] Finally, the convergence curves of the present invention and the control group scheme under the three test functions are as follows: Figures 3-5 As shown in the figure, analysis of the data reveals that the ASDA-BO scheme provided by this invention achieves optimal convergence performance on all three types of 100-dimensional benchmark functions, outperforming HesBO, LA-MCTS, TuRBO, and tSS-BO overall. Compared to other methods, ASDA-BO maintains a stable downward trend in the mid-to-late stages, indicating that its adaptive subspace search, surrogate model training, and weighted acquisition strategies effectively improve search efficiency and convergence stability in high-dimensional black-box optimization.

[0121] Specifically, on the Ackley function, ASDA-BO continuously reduces the current optimal value and eventually reaches the lowest target value; tSS-BO follows suit, while TuRBO, LA-MCTS, and HesBO show earlier convergence slowdowns. On the Griewank function, ASDA-BO demonstrates stronger global search capabilities in multimodal high-dimensional scenarios, with a final convergence accuracy significantly better than all baselines. On the Rosenbrock function, ASDA-BO also achieves the lowest target value, indicating that it can more effectively adjust the search direction and advance local development in narrow, non-convex valley structures.

[0122] In summary, the ASDA-BO scheme provided by this invention exhibits superior convergence speed and final accuracy in multi-peak, non-convex, and complex high-dimensional test scenarios, verifying the effectiveness of the proposed method in alleviating high-dimensional search degradation, improving candidate point screening quality, and enhancing optimization robustness.

[0123] 3. Circuit optimization testing Furthermore, this experiment selected three classic analog circuits with different functions to evaluate the actual performance optimization level of the solution provided by this invention. The circuits were simulated using the HSPICE simulator during the experiment. Optimized design parameters included transistor size, resistor and capacitor values, and symmetry parameters such as differential pairs and current mirrors were considered and represented by the same optimization variables. Three baseline methods were also set up as control groups for comparison with the ASDA-BO scheme proposed in this invention: CMA-ES, TuRBO, and tSS-BO.

[0124] 3.1 Operational transconductance amplifier Figure 6 The two-stage operational transconductance amplifier shown is the first test circuit in this experiment. This circuit is simulated based on the SMIC 55nm process model, with a power supply voltage of 2.5V, a common-mode input voltage of 1.25V, and a load capacitance of 2pF. The circuit consists of a PMOS input differential pair, an active load, a current mirror bias branch, an output stage, and a compensation network. This circuit includes 11 MOS transistors, one adjustable compensation capacitor, and one adjustable resistor. The design variables to be optimized include the width and length of each key transistor, as well as the compensation capacitor C0 and resistor R1, totaling 20 free variables. In the test experiment, each scheme is represented by N... init = Runs with 20 random initial points, executing N times in total max = 500 simulations were performed. The performance and convergence curves of different schemes during the experiment are shown in Table 1 and below. Figure 7 As shown: Table 1: Performance optimization of different schemes in a two-stage operational transconductance amplifier Analysis of the above test results shows that ASDA-BO achieved the best overall performance in optimizing the circuit size of a two-stage operational transconductance amplifier. Compared with other algorithms, it obtained the optimal target optimization value within the finite simulation budget, ultimately reaching 95.295, and all of them met the constraints.

[0125] From the convergence curves, ASDA-BO quickly achieves a high optimization objective in the early stages and reaches its peak performance level earlier. While CMA-ES and TuRBO can generate feasible solutions early, their later improvements are limited. tSS-BO possesses good subspace search capabilities and shows significant improvement in the mid-to-late stages, but its final optimization objective and low-power performance are still weaker than ASDA-BO. In contrast, ASDA-BO can obtain high-quality feasible solutions with fewer simulations, demonstrating higher optimization efficiency.

[0126] In terms of the number of feasible points, ASDA-BO yielded 214 feasible design points, which are 3.24 times, 1.75 times, and 1.46 times that of CMA-ES, TuRBO, and tSS-BO, respectively. This indicates that the ASDA-BO scheme of this invention, while obtaining a better final solution, can generate more valid samples that satisfy the constraints, demonstrating better search stability and constraint feasibility. Overall, ASDA-BO achieved a higher optimization objective, lower quiescent current, and a higher feasible sample rate in this circuit optimization, verifying its effectiveness and robustness.

[0127] 3.2 Folded Common-Grid Amplifier Figure 8 The folded common-gate amplifier circuit shown is the second test circuit in this experiment. This circuit was simulated based on an SMIC 0.18 μm CMOS process model, with a power supply voltage of 3.3 V, a common-mode input voltage of 1.5 V, and a load capacitance of 1 pF. The circuit adopts a PMOS input differential structure, consisting of an input differential pair, a folded common-gate stage, an active load, a current mirror bias branch, and a single-ended output stage. The bias branch is used to generate the multiple bias voltages required by the main amplifier to ensure that key transistors operate in the saturation region, thus balancing performance indicators such as gain, bandwidth, and stability. The main amplification unit of this circuit contains 11 MOS transistors and is equipped with independent bias circuits. The design variables to be optimized include the width and length parameters of the main amplifier and the key transistors in the bias branch, as well as the bias voltage R. bias There are a total of 61 design variables. Each method uses N... init = Run with 60 random initial points, execute N times in total max = 1000 circuit simulations. The performance and convergence curves of different schemes during the experiment are shown in Table 2 and below. Figure 9 As shown: Table 2: Performance Optimization of Different Schemes in Folded Common Gate Amplifier Circuits Analysis of the above test results shows that ASDA-BO achieves the best synthesis result in the optimization of folded common-gate amplifier dimensions. Under the same simulation budget, ASDA-BO's optimal target optimization value reaches 99.004, significantly outperforming all baseline methods, while maintaining all key performance indicators in line with design constraints. This demonstrates its stronger ability to search for high-performance feasible solutions in complex high-dimensional circuit design spaces.

[0128] From the convergence curves, ASDA-BO achieves a high target optimization value in the early stages and continues to improve to its highest level in the mid-to-late stages. CMA-ES shows slower improvement in the early stages, and although it improves later, its final performance is lower than ASDA-BO. TuRBO obtains a feasible solution relatively early, but its improvement is limited in the later stages. tSS-BO has better subspace search capabilities, and its final target optimization value is higher than CMA-ES and TuRBO, but still lower than ASDA-BO. In comparison, ASDA-BO can more effectively screen high-value candidate points and obtain a higher quality circuit design solution within a limited number of simulations.

[0129] In terms of the number of feasible solutions, ASDA-BO generated 507 design points that satisfied the constraints, which is higher than CMA-ES, TuRBO, and tSS-BO, by approximately 5.28 times, 1.80 times, and 1.08 times, respectively. This result shows that ASDA-BO not only improves the final target optimization value but also significantly increases the density of feasible solutions during the search process, making the candidate evaluation more focused on the high-performance region that satisfies the constraints. Therefore, the scheme of this invention not only possesses stronger optimal solution search capabilities in the optimization of high-dimensional complex analog circuit dimensions but also exhibits better constraint robustness and search stability.

[0130] 3.3 Error Amplifier of Low Dropout Linear Regulator (LDO) Figure 10 The error amplifier circuit of the low-dropout linear regulator (LDO) is the third test circuit in this experiment. This circuit is simulated based on a TSMC 65 nm CMOS process model, with a power supply voltage of 2.2 V and a reference voltage of 1.134 V. Multiple bias voltages are set to ensure that each stage of the transistor operates in the appropriate bias region. The circuit consists of an input differential stage, a current mirror active load, a multi-stage gain amplifier unit, a bias branch, and a frequency compensation network. The output of the error amplifier is used to drive the gate of the subsequent power transistor, and the output voltage is stabilized by adjusting the feedback loop. The frequency compensation network is used to improve system stability and increase phase margin, ensuring that the LDO has good dynamic response and stability under different load conditions. This circuit includes a multi-stage amplifier unit, a bias generation branch, and a compensation network. The design variables to be optimized include the width and length parameters of the key MOS transistors, and the parameters of key passive devices in the compensation network, totaling 71 free variables. Each method uses N...init = Run with 60 random initial points, execute N times in total max = 1000 circuit simulations. The performance and convergence curves of different schemes during the experiment are shown in Table 3 below. Figure 11 As shown: Table 3: Performance Optimization of Different Solutions in LDO Analysis of the data in the table above shows that the ASDA-BO scheme of this invention, in the performance optimization simulation of the error amplifier circuit of the LDO, aims to minimize the quiescent current and ultimately reduces it to 5.397. While meeting the key performance constraints of the regulator, it achieves a lower power consumption design, which is superior to other optimization algorithms.

[0131] from Figure 11 The convergence curves show that CMA-ES and TuRBO remain in the region of higher target optimization values ​​over a longer simulation period. Although they decrease later, they are still significantly higher than subspace-based methods. tSS-BO can obtain lower target optimization values ​​earlier, demonstrating the effectiveness of subspace sampling in high-dimensional circuit optimization. ASDA-BO further reduces the target value and converges stably to the lowest target optimization value in fewer evaluations, indicating that its local proxy modeling and adaptive weighted sampling strategy can more effectively screen low-power candidate solutions.

[0132] In terms of the number of feasible solutions, ASDA-BO generates 399 design points that satisfy the constraints, which is higher than CMA-ES, TuRBO, and tSS-BO, by approximately 9.50 times, 1.28 times, and 1.16 times, respectively. This indicates that ASDA-BO not only improves the final low-power optimization result but also increases the density of feasible candidate points during the search process, making the optimization trajectory more stably distributed within the effective region that satisfies the circuit constraints. Overall, ASDA-BO demonstrates stronger low-power search capability, constraint preservation capability, and optimization stability in this LDO error amplifier circuit.

[0133] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A circuit design optimization method based on adaptive spatial and dynamic fusion acquisition functions, characterized in that, It includes: The component dimensions of the circuit to be optimized are used as design parameters. The design parameters are uniformly sampled, and the sampling results are used to perform circuit simulation to generate historical samples to form a historical dataset. An initial subspace representing the selectable range of design parameters is generated based on the historical dataset, and its search center, local covariance matrix and adaptive step size are initialized. Construct a GP proxy model and iteratively optimize the design parameters, including: (1) Perform truncated Gaussian subspace sampling on the initial subspace to obtain sample points in the local subspace; (2) Select the closest sample points according to Mahalanobis distance to form a training set, and use the training set to train the GP surrogate model; the trained GP surrogate model is used to output the predicted mean and predicted standard deviation of the sample points. (3) The sample points are scored by combining the output of the GP proxy model with the preset dynamic fusion acquisition function; the dynamic fusion acquisition function uses the Sigmoid function to generate the weights of the upper confidence boundary UCB and the expected improvement EI; and dynamically fuses UCB and EI according to the current evaluation progress. (4) Select a batch of sample points with better scores as candidate points, perform performance simulation on them to form new historical samples, and add them to the historical dataset; (5) Construct a search path based on the better sample among the candidate points, adaptively update the initial subspace, and determine the new search center, adaptive step size and local covariance matrix for use in the next iteration; When the preset iteration termination condition is met, the value of the design parameter of the best historical sample in the historical dataset is output as the optimization result. The methods for constructing the historical dataset include: The Latin hypercube sampling method is used to uniformly sample within the normalized space of the design parameters to generate initial sample points; The initial sample points are mapped back to the real circuit parameter space to obtain the design parameter values, and the simulation model is called based on the design parameter values ​​to generate the performance values ​​of the target circuit to be optimized. Each set of design parameters x i and its performance value y i As a historical sample (x) i y i This allows us to obtain the required historical dataset.

2. The circuit design optimization method based on adaptive spatial and dynamic fusion acquisition function as described in claim 1, characterized in that: The process of generating sample points by truncating Gaussian subspace sampling includes: (i) Obtain the search center x of the initial subspace k Local covariance matrix C k and adaptive step size ; (ii) For C k Eigenvalue decomposition yields the orthogonal eigenvector matrix W. k and eigenvalue diagonal matrix ; ； In the above formula, W k The transpose of the matrix; (iii) Sample a specified number of random vectors z from the initial subspace of the standard normal distribution. i ; (iv) According to W k and Generate candidate points And restrict local Gaussian sampling to the normalized space. In this process, the set of legal candidates for the current round is obtained. Candidate points that exceed the boundary are handled by rejecting sampling or boundary projection: ； In the above formula, N c Indicates the number of sample points; (v) judgment The number of candidate points N c If the preset threshold is met, the sampling ends; otherwise, return to step (iii) to continue sampling.

3. The circuit design optimization method based on adaptive spatial and dynamic fusion acquisition function as described in claim 1, characterized in that: The training strategies for GP proxy models include: (I) Generate the input matrix and target value vector for training based on the design parameters and performance values ​​of each sample in the training set, and standardize each element in the target value vector; (II) Let the hyperparameters to be optimized in the GP proxy model be denoted as Hyperparameters are constructed by introducing hyperparameter prior constraints in addition to the marginal likelihood term. The objective function is optimized, and the hyperparameters of the Gaussian process are trained using MAP; (III) The L-BFGS quasi-Newton optimization method is used to approximate the Hessian inverse matrix based on historical gradient information, so as to iteratively generate stable parameter solutions; (IV) A multi-startpoint restart strategy is adopted; the original hyperparameters are used as the initial starting point, and subsequent restarts generate differentiated initial values ​​through random perturbation to cover different search areas; (V) After training, select the set of hyperparameters with the minimum loss as the optimal hyperparameters for MAP training. .

4. The circuit design optimization method based on adaptive spatial and dynamic fusion acquisition function as described in claim 3, characterized in that: During the training phase of the GP agent model, the expression for the designed optimization objective function is: In the above formula, X represents the input matrix; y represents an element in the target value vector. This represents the standardized target value; For hyperparameter prior regularization terms; This is the marginal log-likelihood term; The GP proxy model uses a covariance kernel function with automatic correlation determination, and the parameter update equation during the training phase is: ； In the above formula, and H represents the model parameters before and after the k-th iteration, respectively; k This is an approximation of the Hessian inverse matrix at the k-th iteration. The search step size is the line search step size. To act on The gradient operator.

5. The circuit design optimization method based on adaptive spatial and dynamic fusion acquisition function as described in claim 1, characterized in that, The design method of the dynamic fusion acquisition function includes: (1) Let N be the number of sample simulations completed in the t-th iteration. t The maximum simulation budget is N. max Define the assessment progress for: ； (2) Generate UCB and EI at the Nth time using the Sigmoid function t Dynamic weights after simulation and ,include: ； In the above formula, k sig This represents the preset slope used to control the change in weights. This represents the hyperparameters used to control the transition from exploration to development; (3) The exploration coefficient of UCB Set as shown below Changing dynamic parameters: ； In the above formula, and These represent the upper and lower limits of the preset exploration coefficient, respectively; (4) According to the following formula, the candidate point set is... Any sampled component within Normalization is performed; thus, the normalized UCB and EI values ​​are obtained. and : In the above formula, This represents the normalized sampled components; Represents the numerically stable term; and These are the minimum and maximum values ​​of the sampled components, respectively. (5) Based on dynamic weights and right and Weighted fusion is performed to obtain the dynamic fusion acquisition function. : 。 6. The circuit design optimization method based on adaptive spatial and dynamic fusion acquisition function as described in claim 1, characterized in that: During the iterative optimization phase of the design parameters, the iteration termination conditions include the number of historical samples in the historical dataset reaching a preset value, or the number of iteration rounds reaching a preset upper limit. And / or, after each iteration, the adaptive update strategy for the initial subspace is as follows: (1) After sorting the historical samples of the current batch, select the top few samples with better performance to construct the search path P. k : ； In the above formula, B represents the proportion of elite samples; B represents the number of candidate points selected after evaluation in each round. This represents the i-th sample after sorting. x represents the ranking weight. k This represents the search center in the k-th round; This represents the adaptive step size in the k-th round; The search center x for the next round is calculated using the following formula. k+1 : ； (2) Adaptive step size for the kth round based on the search path length Perform adaptive adjustments to obtain the adaptive step size for the next round. : ； In the above formula, c is the step size update coefficient. C is the expected approximation of the norm of a d-dimensional standard normal vector; k Let represent the local covariance matrix of the k-th round; (3) According to C k P k and local gradient J k For the next round of local covariance matrix C k+1 Joint update: ； In the above formula, c C c J and c P These are the weights of the preset historical direction, local gradient, and search path, respectively; and They represent and The transpose of .

7. A computer storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, it implements the circuit design optimization method based on adaptive spatial and dynamic fusion acquisition function as described in any one of claims 1-6, thereby obtaining the optimal design parameters of the circuit to be designed so as to achieve the best performance index.

8. A computer program product comprising a computer program, characterized in that: When the computer program is executed by the processor, it implements the circuit design optimization method based on adaptive spatial and dynamic fusion acquisition function as described in any one of claims 1-6, thereby obtaining the optimal design parameters of the circuit to be designed so as to achieve the best performance index.

9. A circuit design optimization apparatus, comprising a memory, a processor, and a computer program stored in the memory and running on the processor, wherein when the processor executes the computer program, it implements the circuit design optimization method based on adaptive spatial and dynamic fusion acquisition function as described in any one of claims 1-6, thereby obtaining the optimal design parameters of the circuit to be designed so as to achieve the best performance index.

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