Energy selective surface with dual-polarized wideband and high selectivity

Abstract

The present application belongs to the field of high-power electromagnetic protection, and specifically provides an energy selective surface with dual-polarized broadband and high selectivity to solve the problem of electromagnetic interference caused by high-power microwave; the present application realizes the integration of frequency selective surface and energy selective surface through creative structural design, works in a transmission state when low-power microwave is incident, and works in a shielding state when high-power microwave is incident; and, multiple transmission poles are constructed using an equivalent circuit, and the poles are simultaneously realized to be freely separated, which greatly expands the bandwidth of the transmission state and improves the efficiency of the shielding state; in summary, the present application can realize broadband, low insertion loss and wave transmission of the working frequency band when low-power microwave is incident, and has good out-of-band suppression performance; when high-power microwave is incident, the present application has high shielding and full-band protection effect, effectively solving the problem of electromagnetic interference caused by high-power microwave.

Description

Technical Field

[0001] This invention belongs to the field of high-power electromagnetic protection, specifically providing an energy selective surface with dual-polarization broadband and high selectivity. Background Technology

[0002] In complex electromagnetic environments, frequency selective surfaces (FSS) have emerged to simultaneously meet the needs of wireless communication and electromagnetic protection. A FSS is a periodic artificial electromagnetic structure that achieves spatial filtering through specific unit designs, exhibiting high transmittance or high reflectance characteristics within a specific frequency band to filter signals and mitigate electromagnetic interference. However, high-energy electromagnetic pulse radiation generated by high-power microwaves can easily cause electronic devices to break down or burn out. While achieving spatial filtering, FSSs cannot distinguish between low-power communication signals and high-power damaging signals. To address this problem, this invention provides an energy selective surface with dual-polarization broadband and high selectivity, achieving spatial filtering while simultaneously solving the electromagnetic interference problem caused by high-power microwaves. Summary of the Invention

[0003] The purpose of this invention is to provide an energy selective surface with dual-polarization broadband and high selectivity to solve the electromagnetic interference problem caused by high-power microwaves. This invention creatively proposes an integrated design of energy selective surface and frequency selective surface to form an energy selective surface with dual-polarization broadband and high selectivity. It can achieve ultra-wideband full-frequency suppression in shielded state and identification and interception of high-power microwaves in transmission state, providing a new technical solution for high-power electromagnetic protection.

[0004] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0005] An energy selective surface with dual polarization broadband and high selectivity is formed by extending a periodic unit structure, wherein the periodic unit structure includes, from bottom to top, a bottom metal layer 9, a bottom dielectric substrate 8, a lower air cavity 7, an intermediate dielectric substrate 6, a lower metal layer 5, an upper air cavity 4, an upper metal layer 3, a top dielectric substrate 2, and a top metal layer 1.

[0006] From a top-down perspective, the periodic unit structure is square, and the top dielectric substrate, the middle dielectric substrate, and the bottom dielectric substrate are overlapped. The top metal layer, the upper metal layer, the lower metal layer, and the bottom metal layer are all 90° rotationally symmetrical.

[0007] The top metal layer covers the upper surface of the top dielectric substrate and consists of twelve top center square patches, four top edge square patches, and eight top edge rectangular patches. The twelve top center square patches form a cross-shaped array, which is arranged along the centerline of the upper surface of the top dielectric substrate, forming a 2×4 array in both the horizontal and vertical directions. The four top edge square patches are arranged along the four corners of the upper surface of the top dielectric substrate. The eight top edge rectangular patches are arranged in pairs along the four sides of the upper surface of the top dielectric substrate. Furthermore, any adjacent patches maintain the same spacing.

[0008] The upper metal layer is disposed on the lower surface of the top dielectric substrate and consists of three circular patches and four petal-shaped patches. The three circular patches are concentrically arranged and located at the center. Four gaps are opened on the outermost circular patch along the center line of the lower surface of the top dielectric substrate, and a PIN diode is loaded in each gap. The four petal-shaped patches are connected to the outer edge of the outermost circular patch and are arranged along the four corners of the lower surface of the top dielectric substrate.

[0009] The lower metal layer is disposed on the upper surface of the intermediate dielectric substrate and consists of four lower T-shaped patches and one lower central square patch; wherein, the lower central square patch is located at the center position, and the four T-shaped patches are connected to the four sides of the lower central square patch to form a Jerusalem-like cross structure, and the Jerusalem-like cross structure is located at the center line of the upper surface of the intermediate dielectric substrate.

[0010] The bottom metal layer covers the lower surface of the bottom dielectric substrate, and four corrugated slits are formed in the bottom metal layer, starting from the center and pointing to the midpoints of the four sides respectively.

[0011] Furthermore, the top metal layer and the upper metal layer are connected by multiple metal vias, which are arranged around the circumference of the outermost annular patch in the upper metal layer.

[0012] Furthermore, the petal-shaped patches are axially symmetrical along the diagonal of the lower surface of the top dielectric substrate, and each petal-shaped patch has an arc-shaped groove.

[0013] Furthermore, in the top metal layer, the side length of the central square patch is L. a The side length of the square patch at the top edge is L. b The length and width of the top edge rectangular patch are L and L respectively. c With W c If the spacing between any two adjacent patches is g, then: L c =L a W c =L a / 2,L b =La +W c +g.

[0014] Furthermore, the thicknesses of the upper air cavity and the lower air cavity are t4 and t7, respectively, and 1.5mm≤t4≤t7≤5mm.

[0015] Furthermore, the top dielectric substrate, the middle dielectric substrate, and the bottom dielectric substrate use the same material with a dielectric constant of 2.4~10 and a thickness of 0.1mm~10mm.

[0016] Based on the above technical solution, the beneficial effects of the present invention are as follows:

[0017] This invention provides an energy-selective surface with dual-polarization broadband and high selectivity. Through innovative structural design, it integrates frequency-selective and energy-selective surfaces. It operates in a transmission state under low-power microwave incidence and in a shielded state under high-power microwave incidence, thus solving the electromagnetic interference problem caused by high-power microwaves. Furthermore, multiple transmission poles are constructed using an equivalent circuit, and the poles can be freely separated by controlling the equivalent circuit, greatly expanding the bandwidth of the transmission state and improving the effectiveness of the shielding state. In summary, this invention achieves broadband, low insertion loss transmission in the operating frequency band with good out-of-band suppression performance under low-power microwave incidence; and provides high shielding and full-band protection under high-power microwave incidence, effectively solving the electromagnetic interference problem caused by high-power microwaves. Attached Figure Description

[0018] Figure 1 This is an exploded view of the unit structure of the energy selective surface with dual polarization broadband and high selectivity in this invention.

[0019] Figure 2 This is a top view of the top metal layer in this invention.

[0020] Figure 3 This is a top view of the upper metal layer in this invention.

[0021] Figure 4 This is a top view of the lower metal layer in this invention.

[0022] Figure 5 This is a top view of the bottom metal layer in this invention.

[0023] Figure 6 The figure shows the simulation results of the transmission coefficient of the energy selective surface with dual polarization broadband and high selectivity in the transmission state in this invention.

[0024] Figure 7 This is a simulation result of the transmission coefficient of the energy selective surface with dual polarization broadband and high selectivity in the shielded state in this invention.

[0025] The above Figure 1 In the diagram, 1 is the top metal layer, 2 is the top dielectric substrate, 3 is the upper metal layer, 4 is the upper air cavity, 5 is the lower metal layer, 6 is the middle dielectric substrate, 7 is the lower air cavity, 8 is the bottom dielectric substrate, and 9 is the bottom metal layer. Detailed Implementation

[0026] To make the objectives, technical solutions, and beneficial effects of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments.

[0027] This embodiment provides an energy selective surface with dual-polarization broadband and high selectivity, which is constructed from a periodic unit structure. The periodic unit structure is as follows: Figure 1 As shown, the structure includes, from bottom to top, a bottom metal layer 9, a bottom dielectric substrate 8, a lower air cavity 7, a middle dielectric substrate 6, a lower metal layer 5, an upper air cavity 4, an upper metal layer 3, a top dielectric substrate 2, and a top metal layer 1; to more intuitively present the periodic unit structure, Figure 1 The middle and bottom metal layer 9, the lower metal layer 5, the upper metal layer 3, and the top metal layer 1 are marked with a dark gray background. Figure 1 The bottom layer dielectric substrate 8, the middle layer dielectric substrate 6, and the top layer dielectric substrate 2 are marked with a light gray background.

[0028] Viewed from above, the unit structure is square. The top dielectric substrate 2, the middle dielectric substrate 6 and the bottom dielectric substrate 8 are stacked. The top metal layer 1, the upper metal layer 3, the lower metal layer 5 and the bottom metal layer 9 are all rotate symmetrical at 90°.

[0029] like Figure 2 As shown, the top metal layer 1 covers the upper surface of the top dielectric substrate 2 and consists of twelve top center square patches, four top edge square patches, and eight top edge rectangular patches. The twelve top center square patches form a cross-shaped array, which is arranged along the centerline of the upper surface of the top dielectric substrate and forms a 2×4 array in both the horizontal and vertical directions. The four top edge square patches are arranged along the four corners of the upper surface of the top dielectric substrate. The eight top edge rectangular patches are arranged in pairs along the four sides of the upper surface of the top dielectric substrate. Furthermore, any adjacent patches maintain the same spacing. The side length of the top center square patch is L. a The side length of the square patch at the top edge is L. b The length and width of the top edge rectangular patch are L and L respectively. c With W c If the spacing between any two adjacent patches is g, then: L c =La W c =L a / 2,L b =L a +W c +g; To more intuitively present the specific structure of the top metal layer, Figure 2 The center square patch of the top layer, the square patch of the top layer edge, and the rectangular patch of the top layer edge are used with... Figure 1 A consistent dark gray background is used for marking, while the gaps between any adjacent tiles have no background color;

[0030] like Figure 3 As shown, the upper metal layer 3 is disposed on the lower surface of the top dielectric substrate 2 and consists of three circular ring patches and four petal-shaped patches. The three circular ring patches are concentrically arranged and located at the center. Four gaps are formed on the outermost circular ring patch along the centerline of the lower surface of the top dielectric substrate, and a PIN diode is loaded in each gap. The four petal-shaped patches are connected to the outer edge of the outermost circular ring patch and are positioned along the four corners of the lower surface of the top dielectric substrate. The petal-shaped patches are formed by cutting rounded corners on square patches and are axially symmetrical along the diagonal of the lower surface of the top dielectric substrate. Furthermore, each petal-shaped patch has an arc-shaped groove to achieve high-frequency out-of-band suppression. To more intuitively present the specific structure of the upper metal layer, Figure 3 The middle ring patch and the petal-shaped patch are used with Figure 1 A consistent dark gray background is used for marking, while PIN diodes are marked with a black background. Gaps and arc grooves between any adjacent chips are not marked with a background.

[0031] like Figure 4 As shown, the lower metal layer 5 is disposed on the upper surface of the intermediate dielectric substrate 6, and consists of four lower T-shaped patches and one lower central square patch; wherein, the lower central square patch is located at the center position, and the four T-shaped patches are connected to the four sides of the lower central square patch, forming a Jerusalem-like cross structure, and the Jerusalem-like cross structure is located at the centerline of the upper surface of the intermediate dielectric substrate; in order to more intuitively present the specific structure of the lower metal layer, Figure 4 The middle and lower T-shaped patch and the lower center square patch use the same Figure 1 Use a consistent dark gray background for labeling;

[0032] like Figure 5 As shown, the bottom metal layer 9 covers the lower surface of the bottom dielectric substrate 8. The bottom metal layer has four corrugated slits originating from its center, each pointing towards the midpoint of one of its four sides. To more clearly illustrate the specific structure of the bottom metal layer, Figure 5 The middle and bottom metal layers are used with Figure 1The markings are made with a consistent dark gray background, while the wavy gaps are left unmarked.

[0033] Furthermore, the top metal layer 1 and the upper metal layer 3 are connected by multiple metal vias. The metal vias are arranged around the circumference of the outermost circular patch in the upper metal layer 3. The coupling capacitance between the top metal layer 1 and the upper metal layer 3 is controlled by the metal vias, thereby achieving the effect of suppressing higher-order resonances.

[0034] Furthermore, the thicknesses of the upper air cavity 4 and the lower air cavity 7 are t4 and t7, respectively, and 1.5mm≤t4≤t7≤5mm.

[0035] Furthermore, the top dielectric substrate 2, the middle dielectric substrate 6, and the bottom dielectric substrate 8 use the same material with a dielectric constant of 2.4~10 and a thickness of 0.1mm~10mm.

[0036] In terms of working principle: based on the mapping relationship between structure and circuit, the top metal layer 1 is equivalent to a capacitor, the upper metal layer 3 is equivalent to a series structure of an inductor and a diode, the lower metal layer 5 is equivalent to an inductor, and the bottom metal layer 9 is equivalent to a capacitor; on this basis, the top metal layer 1, the upper metal layer 3, the lower metal layer 5, and the bottom metal layer 9 can be used as frequency-selective surfaces to achieve filtering characteristics. At the same time, the upper metal layer 3 is used as an energy-selective surface to achieve power adaptive characteristics.

[0037] When low-power microwaves are incident, the PIN diodes in the upper metal layer 3 are not turned on, effectively acting as a small capacitor, causing the overall structure to be in a transmission state. At this time, the equivalent capacitance of the top metal layer 1 and the equivalent inductance of the upper metal layer 3 form a parallel resonance, generating a resonance point f1. The equivalent inductance of the lower metal layer 5 and the equivalent capacitance of the bottom metal layer 9 form a parallel resonance, generating a resonance point f2. Resonance points f1 and f2 together form the upper and lower edges of the passband, forming a second-order passband. The attraction of multiple resonance points... The operating bandwidth is widened; outside the passband, due to the series resonance formed by the small capacitance equivalent of the diode and the equivalent inductance of the upper metal layer 3, a stopband is generated at higher frequencies; in addition, since the parallel inductor has the characteristic of passing high frequencies and blocking low frequencies, and the parallel capacitor has the characteristic of passing low frequencies and blocking high frequencies, the low frequency band outside the passband is suppressed by the equivalent inductance of the lower metal layer 5, and the higher frequency band outside the high frequency band is further suppressed by the equivalent capacitance of the top metal layer 1. Therefore, the overall structure has an ultra-wideband suppression capability outside the band.

[0038] When high-power microwaves are incident, the PIN diode in the upper metal layer 3 is turned on, which is equivalent to a small inductor and a small resistor connected in series. The overall structure is in a shielded state, and the second-order resonant point in the original passband disappears. At this time, the equivalent inductance of the upper metal layer 3 is connected in series with the small inductance of the PIN diode, and then in parallel with the equivalent inductance of the lower metal layer 5, which significantly reduces the total inductance. This causes one resonant point to shift to a higher frequency and create pole separation with the other resonant point. The two resonant points after separation will suppress each other, thereby achieving the purpose of improving the in-band shielding effectiveness.

[0039] In summary, this embodiment provides an energy selective surface with dual-polarization broadband and high selectivity, which is composed of a periodic unit structure. Simulation verification of this periodic unit structure is performed, and the simulation results are as follows: Figure 6 , Figure 7 As shown in the figure, in the transmission state, the unit structure has a transmission coefficient greater than -1dB in the range of 2.42GHz to 3.64GHz, a relative bandwidth of 40.3%, and good edge roll-off characteristics. In the shielded state, the unit structure maintains a transmission coefficient below -16dB in the range of 0 to 40GHz, exhibiting an ultra-wideband shielding bandwidth. Therefore, the energy selective surface provided by this invention has significant advantages in terms of transmission bandwidth, shielding bandwidth, shielding effectiveness, and compactness.

[0040] The above description is merely a specific embodiment of the present invention. Any feature disclosed in this specification may be replaced by other equivalent or similar features unless otherwise specified. All disclosed features, or steps in all methods or processes, may be combined in any way except for mutually exclusive features and / or steps.

Claims

1. An energy selective surface with dual-polarization broadband and high selectivity, comprising a periodic unit cell structure, characterized in that, The periodic unit structure includes, from bottom to top, a bottom metal layer (9), a bottom dielectric substrate (8), a lower air cavity (7), a middle dielectric substrate (6), a lower metal layer (5), an upper air cavity (4), an upper metal layer (3), a top dielectric substrate (2), and a top metal layer (1). From a top-down perspective, the periodic unit structure is square, and the top dielectric substrate, the middle dielectric substrate, and the bottom dielectric substrate are overlapped. The top metal layer, the upper metal layer, the lower metal layer, and the bottom metal layer are all 90° rotationally symmetrical. The top metal layer covers the upper surface of the top dielectric substrate and consists of twelve top center square patches, four top edge square patches, and eight top edge rectangular patches. The twelve top center square patches form a cross-shaped array, which is arranged along the centerline of the upper surface of the top dielectric substrate, forming a 2×4 array in both the horizontal and vertical directions. The four top edge square patches are arranged along the four corners of the upper surface of the top dielectric substrate. The eight top edge rectangular patches are arranged in pairs along the four sides of the upper surface of the top dielectric substrate. Furthermore, any adjacent patches maintain the same spacing. The upper metal layer is disposed on the lower surface of the top dielectric substrate and consists of three circular patches and four petal-shaped patches. The three circular patches are concentrically arranged and located at the center. Four gaps are opened on the outermost circular patch along the center line of the lower surface of the top dielectric substrate, and a PIN diode is loaded in each gap. The four petal-shaped patches are connected to the outer edge of the outermost circular patch and are arranged along the four corners of the lower surface of the top dielectric substrate. The lower metal layer is disposed on the upper surface of the intermediate dielectric substrate and consists of four lower T-shaped patches and one lower central square patch; wherein, the lower central square patch is located at the center position, and the four T-shaped patches are connected to the four sides of the lower central square patch to form a Jerusalem-like cross structure, and the Jerusalem-like cross structure is located at the center line of the upper surface of the intermediate dielectric substrate. The bottom metal layer covers the lower surface of the bottom dielectric substrate, and four corrugated slits are formed in the bottom metal layer, starting from the center and pointing to the midpoints of the four sides respectively.

2. The energy selective surface with dual-polarization broadband and high selectivity according to claim 1, characterized in that, The top metal layer and the upper metal layer are connected by multiple metal vias, which are arranged around the circumference of the outermost annular patch in the upper metal layer.

3. The energy selective surface with dual-polarization broadband and high selectivity according to claim 1, characterized in that, The petal-shaped patches are axially symmetrical along the diagonal of the lower surface of the top dielectric substrate, and each petal-shaped patch has an arc-shaped groove.

4. The energy selective surface with dual-polarization broadband and high selectivity according to claim 1, characterized in that, In the top metal layer, the side length of the central square patch is L. a The side length of the square patch at the top edge is L. b The length and width of the top edge rectangular patch are L and L respectively. c With W c If the spacing between any two adjacent patches is g, then: L c =L a W c =L a / 2,L b =L a +W c +g.

5. The energy selective surface with dual-polarization broadband and high selectivity according to claim 1, characterized in that, The thicknesses of the upper air cavity and the lower air cavity are t4 and t7, respectively, and 1.5mm≤t4≤t7≤5mm.

6. The energy selective surface with dual-polarization broadband and high selectivity according to claim 1, characterized in that, The top dielectric substrate, the middle dielectric substrate and the bottom dielectric substrate use the same material, with a dielectric constant of 2.4~10 and a thickness of 0.1mm~10mm.

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