A low noise instrumentation amplifier circuit and system employing a cross-temperature separation structure

Abstract

The application discloses a low-noise instrument amplification circuit and system adopting a cross-temperature separation structure, relates to the technical field of analog circuit design and weak signal detection, and specifically comprises a low-temperature front-end component, a room-temperature end component and a cross-temperature connection cable. The low-temperature front-end component comprises a first junction field effect transistor (JFET), a second JFET and a source coupling resistor; the room-temperature end component comprises a first JFET constant current network, a second JFET constant current network, a first drain-source bias network, a second drain-source bias network and an operational amplifier circuit. The drain and the source of the first JFET and the second JFET are electrically connected to the room-temperature end component through the cross-temperature connection cable, and a signal source is connected between the gate of the first JFET and the gate of the second JFET through a shielded differential twisted pair. The structure aims to reduce the equivalent input current noise in the signal readout with a very high impedance temperature ratio and reduce the low-temperature thermal load.

Description

Technical Field

[0001] This invention relates to the field of high impedance signal readout and low noise preamplifier technology, and particularly to a low noise instrumentation amplifier circuit and system employing a cross-temperature zone separation structure. Background Technology

[0002] In cryogenic physics experiments and high-precision detection, detectors are often used to sense minute temperature rises or weak electrical signals. Their output signal amplitude is low and source impedance is high, placing high demands on the equivalent input voltage noise, equivalent input current noise, gain stability, and common-mode rejection capability of the preamplifier circuit. When the detector is in the mK temperature range and its resistance reaches the hundreds of megohms, the detector's thermal noise is already at a low level. The leakage current noise generated by the input stage devices in the preamplifier circuit will be converted into significant voltage noise by the high-impedance detector, directly affecting the resolution of weak signal readouts. Junction field-effect transistors (JFETs) have high input impedance and low voltage noise, and are often used as input stage devices in preamplifier circuits. However, their gate leakage current is affected by temperature and device operating conditions, requiring careful control in high-impedance signal readout scenarios.

[0003] Existing high-performance readout systems typically employ room-temperature instrumentation amplifier circuits. These circuits can form a closed-loop differential amplifier structure, exhibiting relatively stable gain and high common-mode rejection capability, effectively suppressing power frequency interference and common-mode noise introduced by long-distance transmission cables. Due to the operating temperature range limitations of active devices, these circuits are usually placed entirely in a 300 K room-temperature environment. For high-impedance detectors in the hundreds of megohms range, the gate leakage current of the input stage JFET is relatively large at room temperature. The equivalent input current noise, after being reduced by the detector impedance, will result in a high equivalent voltage noise. Even if the equivalent input voltage noise of the circuit itself is already low, the total system noise may still be dominated by gate leakage current noise, thus limiting the energy resolution of the detector.

[0004] Another approach is to place the preamplifier in a cryogenic environment. This approach can utilize low temperatures to reduce thermal noise and leakage current noise of discrete components, making it suitable for reducing input stage noise. However, due to limitations in cooling power and the low-temperature operating characteristics of active devices, cryogenic circuits often employ a single-ended source follower structure, whose gain stability and common-mode rejection capability are typically weaker than instrumentation amplifier circuits. In multi-channel readout scenarios, if the entire preamplifier circuit is housed inside the cryostat, each channel will introduce more active devices and power consumption, and the system thermal load increases with the number of channels, easily exceeding the cryostat's cooling capacity margin. Commercial integrated circuits may also experience carrier freezing or parameter drift at extremely low temperatures, further increasing the difficulty of debugging and maintenance.

[0005] Therefore, how to combine the closed-loop differential amplification characteristics of the instrumentation amplifier circuit with the suppression effect of low temperature environment on the gate leakage current of JFET, so as to reduce the equivalent input current noise in the readout of high impedance detector and maintain gain stability and common mode rejection capability, has become an urgent technical problem to be solved, without increasing the power consumption of low temperature cooling as much as possible. Summary of the Invention

[0006] The main objective of this invention is to provide a low-noise instrumentation amplifier circuit and system with a cross-temperature zone separation structure. The aim is to combine the closed-loop differential amplification characteristics of the instrumentation amplifier circuit with the suppression effect of the low-temperature environment on the gate leakage current of the JFET, without increasing the power consumption of the cryogenic cooling as much as possible, so as to reduce the equivalent input current noise in the readout of the high-impedance detector and maintain the gain stability and common-mode rejection capability.

[0007] To achieve this objective, the present invention proposes a low-noise instrumentation amplifier circuit employing a cross-temperature zone separation structure, comprising: A low-temperature front-end component, located in a first temperature zone, includes a first JFET, a second JFET, and a source coupling resistor; the gates of the two JFETs form a differential input terminal, and the sources form source nodes S1 and S2 respectively, and the source coupling resistor is connected between S1 and S2; The room temperature end component, located in the second temperature zone, includes at least a first JFET constant current network, a second JFET constant current network, a first drain-source bias network, a second drain-source bias network, and an operational amplifier circuit, respectively corresponding to two JFETs; the second temperature zone is the room temperature zone, and the first temperature zone is formed by cooling and the ambient temperature is not higher than that of the second temperature zone. A cross-temperature zone connection cable connects two temperature zones, and the drains and sources of the two JFETs are electrically connected to the room temperature terminal assembly via the cross-temperature zone connection cable. Two JFET constant current networks provide constant current to the two JFETs via the cross-temperature zone connection cable. Two drain-source bias networks control the drain-source voltages of the two JFETs via the cross-temperature zone connection cable. Their output nodes are respectively connected to the first and second input terminals of the operational amplifier circuit. The output terminal of the operational amplifier circuit forms the signal output node Vout, and the feedback resistor... A compensation capacitor C is connected between Vout and S1 and is connected in the compensation path of the operational amplifier circuit to form a stable closed-loop differential amplifier structure.

[0008] Preferably, the room temperature end component further includes a frequency compensation network, the frequency compensation network including the compensation capacitor C, the compensation capacitor C being used to control the bandwidth of the entire amplifier circuit.

[0009] Preferably, the cross-temperature zone connection cable includes a differential shielded cable.

[0010] Preferably, the differential shielded cable is a differential twisted pair cable with a stainless steel outer shielding layer.

[0011] Preferably, when the first JFET constant current network and the second JFET constant current network provide a preset drain-source channel current to the first JFET and the second JFET respectively, the first drain-source bias network and the second drain-source bias network provide a preset drain-source voltage to the first JFET and the second JFET respectively, and the first temperature range is a preset temperature range determined according to the JFET selection and the target gate drain current within the range of 4 K to 300 K, the gate drain current of the first JFET and the second JFET is sufficiently small so that the current noise generated by the gate drain current, after being converted into voltage noise across the signal source connected to the differential input terminal, is not higher than the inherent thermal noise of the signal source itself.

[0012] Preferably, the second temperature zone is a room temperature environment of 300 K.

[0013] Preferably, the static power consumption of the low-temperature front-end component in the first temperature zone is 1 μW to 1 mW.

[0014] Preferably, the low-temperature front-end component is mounted on a printed circuit board, which is deployed inside the refrigerator to conduct heat from the first JFET and the second JFET.

[0015] Preferably, the room temperature end component is deployed in an electromagnetic shielding box at room temperature, and the room temperature end component is powered by a linear power supply.

[0016] This application also discloses a weak signal detection system, including a signal source with an extremely high impedance-temperature ratio and a low-noise instrumentation amplifier circuit employing a cross-temperature zone separation structure as described in any of the preceding claims; the signal source is connected between the gate of the first JFET and the gate of the second JFET, and the impedance-temperature ratio of the signal source is greater than... The impedance-temperature ratio is the ratio of the impedance of the signal source to the temperature at which the signal source is located; the signal source is connected between the gate of the first JFET and the gate of the second JFET via a shielded differential twisted pair cable.

[0017] The technical solution of this invention has the following advantages: By placing the first JFET, the second JFET, and the source coupling resistor in a first temperature zone (temperature not higher than the second temperature zone), and placing the first JFET constant current network, the second JFET constant current network, the first drain-source bias network, the second drain-source bias network, and the operational amplifier circuit in the second temperature zone, and connecting the two circuits using a cross-temperature zone connection cable, the input stage devices can operate in a temperature environment determined according to the JFET selection and the target gate leakage current. This structure can reduce the gate leakage current of the first and second JFETs, reducing the equivalent input current noise on the high-impedance detector. The source coupling resistor is located within the low-temperature front-end component with the first and second JFETs, and can directly participate in the differential input stage operation. The room-temperature end component provides a preset channel current and drain-source voltage between the drain and source through the cross-temperature zone connection cable, allowing only a small number of low-power discrete devices to be retained at the low-temperature end. The operational amplifier circuit is retained at the room-temperature end, facilitating the formation of a closed-loop differential amplification instrumentation amplifier circuit topology. This solution can maintain the gain stability and common-mode rejection capability of the instrumentation amplifier circuit while reducing the low-temperature thermal load, making it suitable for reading out weak signals with high impedance at extremely low temperatures. Attached Figure Description

[0018] The present invention will now be described in detail with reference to specific embodiments and accompanying drawings, wherein: Figure 1 This is a schematic diagram of a low-noise instrumentation amplifier circuit with a cross-temperature zone separation structure provided in an embodiment of the present invention. The signal source is a signal source with an extremely high impedance-temperature ratio. A first JFET and a second JFET are disposed in the first temperature zone. A first JFET constant current network, a second JFET constant current network, a first drain-source bias network, a second drain-source bias network, an operational amplifier circuit, and a compensation capacitor C are disposed in the second temperature zone. A feedback resistor... The signal source is connected between the signal output node Vout and the source node S1 of the first JFET, and a shielded differential twisted pair cable is used to connect the signal source to the gates of the first JFET and the second JFET.

[0019] Figure 2 This is a schematic diagram of the circuit equivalent noise analysis model provided in an embodiment of the present invention, wherein the signal source represents the read-out equivalent signal source. Indicates the load resistance. Indicates the impedance of the signal source. This indicates the resistance value of the source coupling resistor. This represents the thermal noise of the signal source. This represents the equivalent input voltage noise of the preamplifier circuit. This indicates the gate current noise of the JFET. Figure 2 The two load resistors in the middle are labeled with the same number. This indicates that the two gate current noise sources have the same parameters and are symmetrically connected to the two ends of the signal source; the two gate current noise sources use the same label. This indicates that the first and second JFETs are selected and have the same operating conditions, and their gate current noise is modeled with the same noise parameters, but they are treated as two independent noise sources in the noise calculation. Detailed Implementation

[0020] The technical solutions of the present invention will be clearly and completely described below with reference to the embodiments of the present invention. The described embodiments are only some embodiments of the present invention, and not all embodiments; other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are all within the scope of protection of the present invention. It should be noted that in the following specific embodiments, all reference numerals are directly appended after the corresponding element names.

[0021] Example 1 provides a low-noise instrumentation amplifier circuit employing a cross-temperature-range separation structure. In cryogenic physics experiments and high-precision detection fields, such as deep-earth experiments based on neutron nuclear transmutation-doped germanium thermistors, when the signal source is at an extremely low temperature and has extremely high impedance, its impedance-temperature ratio often reaches or exceeds [a certain value]. Optionally, this solution is also applicable to the readout of weak signal sources at room temperature but with extremely high impedance, such as signal sources in the 300 K temperature range with impedance greater than 30 ohms. The aforementioned signal readout scenario places high demands on the noise floor of the preamplifier circuit. In traditional solutions, while room-temperature instrumentation amplifier circuits can provide stable gain and high common-mode rejection ratio (CMRR), the gate leakage current of JFETs at room temperature is large, resulting in voltage noise calculated from the equivalent current noise being higher than the thermal noise of the signal source itself, thus limiting energy resolution. While single-ended amplification structures operating at low temperatures reduce thermal and leakage current noise, their gain stability and CMRR are weaker than those of instrumentation amplifier circuits, and the total system heat load increases exponentially with the number of channels, placing higher demands on the chiller power. This embodiment, by employing a cross-temperature zone separation structure, combines the topological advantages of the instrumentation amplifier with the physical advantages of the low-temperature environment, achieving a balance between voltage noise, current noise, and low heat load.

[0022] like Figure 1As shown, specifically, the low-noise instrumentation amplifier circuit employing a cross-temperature zone separation structure in this embodiment includes a low-temperature front-end component deployed in the first temperature zone, a room-temperature front-end component deployed in the second temperature zone, and a cross-temperature zone connecting cable connecting the first and second temperature zones. The first temperature zone is a preset temperature zone within the range of 4 K to 300 K, specifically determined based on the JFET selection and the required leakage current in the experiment; the second temperature zone is a room-temperature environment of 300 K. In the neutron nucleus transmutation-doped germanium thermistor embodiment, the signal source can be located in the 10 mK temperature zone.

[0023] The low-temperature front-end component includes a first JFET, a second JFET, and a source coupling resistor. Both the first and second JFETs are low-noise, high-input-impedance junction field-effect transistors. Furthermore, at room temperature (300 K), the input impedance of the JFET is greater than 1. Current noise is less than The gates of the first and second JFETs serve as the differential inputs of the entire instrumentation amplifier circuit. The signal source is connected between the gates of the first and second JFETs via a shielded differential twisted-pair cable. A source coupling resistor is connected between the source nodes S1 and S2 of the first and second JFETs to determine the differential front-end gain. Within the cryogenic unit, the entire cryogenic front-end assembly is mounted on a printed circuit board, which is then deployed within the cryogenic unit. This design allows the heat generated by the first and second JFETs to be dissipated. Compared to a full-circuit cryogenic solution, this embodiment places only the first and second JFETs and the source coupling resistor in the cryogenic region, ensuring that the static power consumption of the cryogenic front-end assembly within the first temperature range is specifically maintained between 1 μW and 1 mW. This low-power design reduces the thermal load pressure during the deployment of large-scale multi-channel readout systems.

[0024] like Figure 2 As shown, in terms of physical mechanism, the total equivalent input noise of the system is mainly determined by the noise of the first stage. The equivalent input voltage noise of the preamplifier circuit is mainly contributed by the input stage JFET and the source coupling resistor. The expression is:

[0025] in, This is the equivalent input voltage noise of the preamplifier circuit. Thermal noise generated by the source coupling resistor. This is the resistance value of the source coupling resistor. This represents the equivalent input voltage noise for a single input stage JFET. The total voltage noise of the circuit. It can be derived from the formula:

[0026] The current noise term is represented by the equivalent contribution of the two independent JFET gate current noise sources, discounted to the differential input. The calculation shows that... This represents the total voltage noise of the circuit. Thermal noise from the signal source. This is the equivalent input voltage noise of the preamplifier circuit. For the gate current noise of JFET, This is the impedance of the signal source. For a temperature... And the impedance is The thermal noise expression of the signal source is:

[0027] in, Thermal noise from the signal source. Boltzmann's constant, The absolute temperature of the signal source. This represents the signal source impedance. Furthermore, for the analysis model of equivalent input noise, the condition that the load resistance is much greater than the signal source impedance is usually satisfied, i.e. ,in, For load resistance, This represents the impedance of the signal source. In a specific application scenario of this embodiment, it is assumed that the signal source is a neutron nuclear transmutation-doped germanium thermistor at a temperature of 10 mK and a resistance of 100 MΩ. In this case, the thermal noise of the signal source... Approximately . in the formula The gate current noise of a JFET is given by the following formula:

[0028] in, For the gate current noise of JFET, For elementary charge, This represents the gate leakage current of the JFET. At room temperature, the gate leakage current of a JFET is relatively large, typically exceeding 500 fA. This calculation yields more than This becomes the main source of noise. When the temperature drops from room temperature to the preset temperature of the first temperature zone, the gate leakage current of the first JFET and the second JFET will decrease accordingly.

[0029] In this embodiment, when the first JFET and the second JFET are in the first temperature region, their gate leakage current is controlled to be sufficiently small so that the current noise generated by the gate leakage current, after being converted into voltage noise across the signal source, is not higher than the signal source's own thermal noise floor; for example, when the gate leakage current is 5 fA, This item can be reduced to Lower than the signal source itself Thermal noise. This physical characteristic suppresses the equivalent input current noise, thereby reducing the equivalent current noise flowing through the high-impedance signal source and improving the detector's energy resolution. Simultaneously, the low-temperature environment also reduces voltage noise from the JFET and source coupling resistor.

[0030] The room-temperature end component includes at least a first JFET constant current network, a second JFET constant current network, a first drain-source bias network, a second drain-source bias network, an operational amplifier circuit, and a frequency compensation network. To reduce external interference and provide a stable operating environment, the entire room-temperature end component is deployed within an electromagnetically shielded box at room temperature, and is powered by a ±15 V linear power supply. The first JFET constant current network is connected to the first JFET, and the second JFET constant current network is connected to the second JFET, respectively, to provide a preset drain-source channel current to the first and second JFETs. The first drain-source bias network and the second drain-source bias network are connected to the first and second JFETs, respectively, to control the drain-source voltages of the two JFETs.

[0031] For cross-temperature zone signal interconnection, the drain and source of the first JFET and the drain and source of the second JFET are electrically connected to the room temperature end component via cross-temperature zone connection cables. To ensure the integrity of weak signals during long-distance cross-temperature zone transmission and to resist electromagnetic interference, the cross-temperature zone connection cables include differential shielding, specifically differential twisted-pair cables with a stainless steel outer shielding layer. The signal source is connected to the gate of the first JFET and the gate of the second JFET using shielded differential twisted-pair cables.

[0032] Through a cross-temperature zone connecting cable, the first and second JFET constant current networks in the room temperature end component provide constant current to the first and second JFETs, respectively. The first and second drain-source bias networks control the drain-source voltages of the first and second JFETs, respectively. Simultaneously, the output nodes of the first and second drain-source bias networks are connected to the first and second input terminals of the operational amplifier circuit, respectively. This allows the low-temperature front-end component, the first and second JFET constant current networks, the first and second drain-source bias networks, and the operational amplifier circuit to collectively form a closed-loop differential amplifier structure. This closed-loop differential amplifier structure can cancel power frequency interference and common-mode noise introduced by long-distance transmission cables, and suppress common-mode interference.

[0033] To address the feedback and bandwidth control issues of the entire amplifier circuit, the output terminal of the operational amplifier circuit forms the signal output node Vout, and the feedback resistor... The frequency compensation network in the room temperature terminal component is connected between the signal output node Vout and the source node S1 of the first JFET. It includes a compensation capacitor C connected in the compensation path of the operational amplifier circuit, or an RC compensation branch consisting of the compensation capacitor C and the compensation resistor. The compensation capacitor C is used to control the bandwidth of the entire amplifier circuit, thereby ensuring the stable operation of the closed-loop differential amplifier structure.

[0034] This embodiment also provides a weak signal detection system, including a signal source with an extremely high impedance-temperature ratio and a low-noise instrumentation amplifier circuit employing a cross-temperature zone separation structure, as described in this embodiment. The impedance-temperature ratio of the signal source is greater than... The impedance-temperature ratio is the ratio of the impedance of the signal source to the temperature at which the signal source is located. In one embodiment, the signal source is a neutron nuclear transmutation-doped germanium thermistor in the mK temperature range; in another embodiment, the signal source is in the 300 K temperature range and has an impedance greater than 30 kJ / m². The signal source is connected between the gates of the first JFET and the second JFET, serving as a source of weak signals. The signal source is connected between the gates of the first JFET and the second JFET via a shielded differential twisted-pair cable. Because this embodiment keeps the operational amplifier circuit, frequency compensation network, and linear power supply at room temperature, it avoids the carrier freezing or drastic characteristic drift problems that occur in commercial integrated circuits at extremely low temperatures. The peripheral circuitry can be adjusted at room temperature, thereby improving the engineering feasibility and long-term stability of the detection system.

[0035] based on Figure 1 The cross-temperature separation structure shown in Embodiment 2 provides a multi-channel weak signal detection system. In ultra-low temperature physics experiments and high-precision detection scenarios, such as large-scale neutron nuclear transmutation doped germanium thermistor array readout experiments, the system typically needs to simultaneously process weak signals from hundreds or thousands of signal sources with extremely high impedance-temperature ratios. If a traditional low-temperature single-ended amplification structure with all preamplifier circuitry placed inside the cryostat is used, each channel contains a large number of active devices, and the total system heat load will increase exponentially with the number of channels, eventually exceeding the cooling capacity limit of the cryostat. However, if readout is performed at room temperature, the equivalent input current noise faced by the high-impedance signal sources in the hundreds of megohms range will worsen, leading to a decrease in energy resolution.

[0036] The system in this embodiment includes multiple signal source arrays and corresponding multiple sets of low-noise instrumentation amplifier circuits. The cryogenic front-end components of all the low-noise instrumentation amplifier circuits are centrally deployed on a printed circuit board inside the refrigerator, while all the room-temperature components are centrally mounted in an electromagnetic shielding box outside the refrigerator. Since each cryogenic front-end component only contains a first JFET, a second JFET, and a source coupling resistor, its single-channel static power consumption is specifically controlled to the level of 1 μW to 1 mW. This cross-temperature architecture isolates the main heat-generating components, such as the operational amplifier circuit, frequency compensation network, and linear power supply, outside the refrigerator.

[0037] In actual operation, this architecture not only suppresses the gate leakage current of the JFET and reduces the equivalent input current noise by utilizing the preset temperature conditions of the first temperature zone, but also reduces the cooling capacity requirements of the cryostat for large-scale multi-channel expansion. Furthermore, the specific operating temperature of the cryogenic front-end components can be manually set according to experimental needs. Technicians can manually set the local temperature of the printed circuit board by combining the impedance-temperature ratio of the signal source and the actual cooling power of the cryostat, thereby achieving a balance between voltage noise, current noise, and low thermal load to meet system noise and thermal load requirements, ensuring long-term stable operation of large-scale detection experiments. Simultaneously, the peripheral circuit parameters of the room-temperature front-end components can be adjusted at room temperature, avoiding physical problems such as carrier freezing or severe characteristic drift that occur in commercial integrated circuits at extremely low temperatures, improving the engineering feasibility and flexibility of the entire multi-channel detection system.

[0038] The embodiments of the present invention are not limited to the examples listed in this application. Without departing from the technical concept of the present invention, equivalent substitutions can be made for the specific models, parameter ranges and connection methods of each component.

Claims

1. A low-noise instrumentation amplifier circuit employing a cross-temperature zone separation structure, characterized in that, include: A low-temperature front-end component, located in a first temperature zone, includes a first JFET, a second JFET, and a source coupling resistor; the gates of the two JFETs form a differential input terminal, and the sources form source nodes S1 and S2 respectively, and the source coupling resistor is connected between S1 and S2; The room temperature end component, located in the second temperature zone, includes at least a first JFET constant current network, a second JFET constant current network, a first drain-source bias network, a second drain-source bias network, and an operational amplifier circuit, respectively corresponding to two JFETs; the second temperature zone is the room temperature zone, and the first temperature zone is formed by cooling and the ambient temperature is not higher than that of the second temperature zone. A cross-temperature zone connection cable connects two temperature zones, and the drains and sources of the two JFETs are electrically connected to the room temperature terminal assembly via the cross-temperature zone connection cable. Two JFET constant current networks provide constant current to the two JFETs via the cross-temperature zone connection cable. Two drain-source bias networks control the drain-source voltages of the two JFETs via the cross-temperature zone connection cable. Their output nodes are respectively connected to the first and second input terminals of the operational amplifier circuit. The output terminal of the operational amplifier circuit forms the signal output node Vout, and the feedback resistor... A compensation capacitor C is connected between Vout and S1 and is connected in the compensation path of the operational amplifier circuit to form a stable closed-loop differential amplifier structure.

2. The low-noise instrumentation amplifier circuit with a cross-temperature zone separation structure according to claim 1, characterized in that, The room temperature end component also includes a frequency compensation network, which includes the compensation capacitor C, and the compensation capacitor C is used to control the bandwidth of the entire amplifier circuit.

3. The low-noise instrumentation amplifier circuit with a cross-temperature zone separation structure according to claim 1, characterized in that, The cross-temperature zone connection cable includes differential shielded wire.

4. The low-noise instrumentation amplifier circuit with a cross-temperature zone separation structure according to claim 3, characterized in that, The differential shielded cable is a differential twisted pair cable with a stainless steel outer shielding layer.

5. The low-noise instrumentation amplifier circuit with a cross-temperature zone separation structure according to claim 1, characterized in that, When the first JFET constant current network and the second JFET constant current network provide a preset drain-source channel current to the first JFET and the second JFET respectively, and the first drain-source bias network and the second drain-source bias network provide a preset drain-source voltage to the first JFET and the second JFET respectively, and the first temperature range is a preset temperature range determined according to the JFET selection and the target gate drain current within the range of 4 K to 300 K, the gate drain current of the first JFET and the second JFET is sufficiently small so that the current noise generated by the gate drain current, after being converted into the voltage noise across the signal source connected to the differential input terminal, is not higher than the inherent thermal noise of the signal source itself.

6. The low-noise instrumentation amplifier circuit with a cross-temperature zone separation structure according to claim 1, characterized in that, The second temperature zone is a room temperature environment of 300 K.

7. The low-noise instrumentation amplifier circuit with a cross-temperature zone separation structure according to claim 1, characterized in that, The static power consumption of the low-temperature front-end component in the first temperature zone is 1 μW to 1 mW.

8. The low-noise instrumentation amplifier circuit with a cross-temperature zone separation structure according to claim 1, characterized in that, The low-temperature front-end component is mounted on a printed circuit board, which is deployed inside the refrigerator to conduct heat from the first JFET and the second JFET.

9. The low-noise instrumentation amplifier circuit with a cross-temperature zone separation structure according to claim 1, characterized in that, The room temperature end component is deployed in an electromagnetically shielded box at room temperature, and the room temperature end component is powered by a linear power supply.

10. A weak signal detection system, characterized in that, The circuit includes a signal source with an extremely high impedance-temperature ratio and a low-noise instrumentation amplifier circuit employing a cross-temperature separation structure as described in any one of claims 1 to 9; the signal source is connected between the gate of the first JFET and the gate of the second JFET, and the impedance-temperature ratio of the signal source is greater than... The impedance-temperature ratio is the ratio of the impedance of the signal source to the temperature at which the signal source is located; the signal source is connected between the gate of the first JFET and the gate of the second JFET via a shielded differential twisted pair cable.

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