A tellurium-cadmium-mercury infrared detector mesa sidewall structure and a passivation method thereof

Abstract

The application discloses a tellurium-cadmium-mercury infrared detector mesa sidewall structure and a passivation method thereof, and belongs to the technical field of infrared photoelectric detector manufacturing, semiconductor micro-nano processing and narrow-bandgap semiconductor material surface passivation. The method comprises the following steps: etching a tellurium-cadmium-mercury material to obtain a tellurium-cadmium-mercury mesa chip; performing cleaning treatment and activation treatment on the tellurium-cadmium-mercury mesa chip; under a low-temperature condition of 60-100 DEG C, using an ALD process to grow a hafnium oxide passivation layer on the sidewall of the tellurium-cadmium-mercury mesa chip, using tetrakis(dimethylamino)hafnium as a hafnium source precursor, and using water vapor, ozone or oxygen plasma as an oxygen source; and performing annealing treatment on the tellurium-cadmium-mercury mesa chip with the hafnium oxide passivation layer. The highest temperature in the whole process is not higher than 130 DEG C, the volatilization of mercury elements, component segregation and lattice distortion of the tellurium-cadmium-mercury are inhibited from the root, and zero thermal damage of the material is realized.

Description

Technical Field

[0001] This invention belongs to the fields of infrared photodetector manufacturing, semiconductor micro-nano fabrication, and narrow bandgap semiconductor material surface passivation technology, and particularly relates to a sidewall structure of a mercury cadmium telluride infrared detector and a method for its passivation. Background Technology

[0002] Mercury cadmium telluride (HgCdTe, MCT) is a core narrow-bandgap semiconductor material for fabricating mid-wave, long-wave, and even very long-wave mesa detectors. High-end mesa devices commonly employ ICP (Inductively Coupled Plasma) and IBE (Ion Beam Etching) dry etching processes to fabricate pixel isolation mesa structures. After etching, the sidewalls of the HgCdTe mesa develop numerous lattice damages, mercury vacancies, tellurium dangling bonds, and tellurium oxide hybrid layers, while also retaining photoresist residue and particulate contaminants. These defects significantly increase the sidewall interface state density, exacerbating surface nonradiative recombination, leading to increased sidewall leakage current and deteriorated 1 / f noise. Simultaneously, sidewall defects accelerate mercury diffusion and escape, disrupting the HgCdTe stoichiometry and causing dark current drift, responsivity decay, and decreased long-term reliability. To address this etching-induced damage, side passivation techniques are typically employed.

[0003] Existing passivation technologies for mercury cadmium telluride mesa sidewalls are mainly divided into three categories:

[0004] The first type is cadmium telluride (CdTe) epitaxial passivation. Although it has a high lattice matching degree with mercury cadmium telluride and low interface stress, CdTe itself is an intrinsic semiconductor with large leakage current, weak insulation and isolation ability, and poor water vapor and mobile ion blocking performance. It cannot meet the requirements of low dark current and low noise for small pixels, long-wavelength cooled focal planes.

[0005] The second type is alumina ALD (atomic layer deposition) passivation, which has excellent insulation and breakdown performance. However, the conventional deposition temperature is generally higher than 150℃, which can easily cause the mercury element inside mercury cadmium telluride to volatilize and be lost. In addition, the thermal expansion coefficient of alumina is mismatched with that of mercury cadmium telluride, and microcracks and interface delamination are easily generated on the mesa sidewalls, resulting in a high interface state density.

[0006] The third type is passivation with dielectrics such as silicon oxide and silicon nitride, which are mostly prepared by PECVD process. The high-energy particle bombardment during the deposition process will damage the soft lattice of mercury cadmium telluride, and the step conformal coverage is poor, making it impossible to achieve uniform ultrathin film formation on the sidewalls of narrow trenches with high aspect ratio. Summary of the Invention

[0007] To address the shortcomings of existing technologies, such as mercury volatilization due to excessively high process temperatures, ineffective removal of sidewall damage layers, high interface state density, poor passivation layer step coverage, insufficient insulation and mercury blocking capabilities, and easy interface cracking and delamination, this invention provides a method for passivating the sidewalls of a mercury cadmium telluride (HCd) infrared detector platform. This method achieves low-damage, low-leakage, low-noise, and highly stable passivation of the HCd platform sidewalls, adapting to the mass production requirements of small-pixel, high-aspect-ratio cooled platforms.

[0008] A further technical problem to be solved by the present invention is to provide a sidewall structure for a mercury cadmium telluride infrared detector platform.

[0009] To achieve the above objectives, the present invention adopts the following technical solution:

[0010] A method for passivating the sidewall of a mercury cadmium telluride infrared detector stage includes the following steps:

[0011] S1: Etching is performed on a zinc cadmium telluride substrate with a mercury cadmium telluride epitaxial layer to obtain a mercury cadmium telluride mesa chip.

[0012] S2: Cleaning and activation treatment of mercury cadmium telluride mesa chip;

[0013] S3: The activated mercury cadmium telluride mesa chip is subjected to ALD process at a low temperature of 60-100℃, using tetra(dimethylamino)hafnium as the hafnium source precursor and water vapor, ozone or oxygen plasma as the oxygen source to grow a hafnium oxide passivation layer on the sidewall of the mercury cadmium telluride mesa chip; after deposition, the mercury cadmium telluride mesa chip with hafnium oxide passivation layer is taken out.

[0014] S4: Anneal the mercury cadmium telluride mesa chip with hafnium oxide passivation layer at a temperature of 100-130°C for 30-60 min.

[0015] The method further includes the following steps:

[0016] S5: Prepare a composite protective layer on the surface of the hafnium oxide passivation layer.

[0017] Specifically, the etching process in step S1 involves using IBE (ion beam etching) to perform high aspect ratio etching on the mercury cadmium telluride material; the etching ratio is 5:1 to 3:1.

[0018] Specifically, the activation treatment in step S2 involves treating the sample with a bromine-methanol solution at room temperature for 5–10 seconds, followed by rinsing and drying.

[0019] Specifically, step S3 includes the following steps:

[0020] (1) Evacuate the ALD vacuum reaction chamber to a background vacuum of ≤1×10⁻⁶. -6Torr; High-purity nitrogen or argon is introduced as the carrier gas, with a flow rate of 50–100 sccm; The temperature of the chamber and sample stage is controlled at 60–100℃;

[0021] (2) A hafnium oxide passivation layer was grown on the sidewall of the mercury cadmium telluride mesa chip using the ALD process.

[0022] (3) After the hafnium oxide passivation layer is deposited, maintain the vacuum atmosphere of the ALD vacuum reaction chamber and continuously purge with high-purity nitrogen in situ for no less than 10 min; after the temperature of the ALD vacuum reaction chamber drops to ≤30℃, transfer the sample to the vacuum locking chamber, purge with high-purity nitrogen to 1 atm atmospheric pressure, and take out the mercury cadmium telluride mesa chip with hafnium oxide passivation layer.

[0023] Specifically, the cooling of the ALD vacuum reaction chamber in step (3) is carried out by gradient cooling at a rate of ≤5℃ / min.

[0024] In step (2), the individual ALD loops are as follows:

[0025] Tetra(dimethylamino)hafnium pulse 0.1–0.5 s → inert gas purging 10–20 s → oxygen source pulse 0.1–1 s → inert gas purging 10–20 s;

[0026] In step (2), 50 to 220 ALD cycles are deposited consecutively.

[0027] In step S3, when oxygen plasma is used as the oxygen source, the plasma power is set to 50-800 W and the pulse duration is 1 s.

[0028] In step S4, the annealing process is carried out in a nitrogen-hydrogen mixed atmosphere containing high-purity nitrogen or 5% hydrogen by volume, and the heating rate of the annealing process is ≤10℃ / min.

[0029] A sidewall structure for a mercury cadmium telluride infrared detector mesa includes a mercury cadmium telluride epitaxial layer and a hafnium oxide passivation layer attached to the mercury cadmium telluride epitaxial layer. The thickness of the hafnium oxide passivation layer is 5–20 nm, and the hafnium oxide passivation layer is prepared by the above-mentioned method for passivating the sidewall of a mercury cadmium telluride infrared detector mesa.

[0030] The sidewall structure of the mercury cadmium telluride infrared detector platform also includes a composite protective layer with a thickness of 3–10 nm.

[0031] The beneficial effects of this invention are as follows:

[0032] (1) The present invention uses ultra-low temperature deposition of 60-100℃ and low temperature annealing of 100-130℃, with the highest temperature throughout the process not exceeding 130℃, to suppress the volatilization of mercury cadmium telluride, component segregation and lattice distortion from the source, and to achieve zero thermal damage to the material.

[0033] (2) The present invention employs a bromine-methanol light etching activation treatment with a limited concentration and a limited duration to precisely remove the sidewall etching damage layer, effectively saturate tellurium dangling bonds, significantly reduce the interface state density, and suppress sidewall surface recombination and dark current.

[0034] (3) The 5-20 nm hafnium oxide passivation layer prepared by the present invention has excellent conformal coverage of the high aspect ratio mesa sidewalls, with no step protrusions, no bottom accumulation, no microcracks, small sidewall parasitic capacitance, and low inter-pixel electrical crosstalk.

[0035] (4) The hafnium oxide passivation layer prepared by the present invention is a dense amorphous hafnium oxide structure, which has excellent mercury diffusion blocking performance and can lock the stoichiometry of mercury cadmium telluride sidewalls for a long time. The device's anti-aging, anti-water vapor erosion, and anti-irradiation reliability are far superior to the traditional CdTe and Al2O3 passivation schemes.

[0036] (5) The process parameter window of the present invention is clear and the steps are closed-loop and controllable. It is fully compatible with existing cadmium telluride etching, photolithography, passivation, electrode preparation and flip-chip interconnect back-end processes, and is suitable for engineering mass production. Attached Figure Description

[0037] Figure 1 This is a process flow diagram of the method for passivating the sidewall of the mercury cadmium telluride infrared detector platform according to the present invention.

[0038] Figure 2 This is a schematic diagram illustrating the film formation principle of the ALD single-cycle hafnium oxide passivation layer of the present invention.

[0039] Figure 3 This is a schematic diagram of the overall structure of the side wall of the mercury cadmium telluride infrared detector platform of the present invention.

[0040] Figure 4 The image shows the backscattered electron pattern of the sidewall structure of the mercury cadmium telluride infrared detector prepared in Example 1 of the present invention.

[0041] Figure 5 The energy spectrum line scans of all elements of the sidewall structure of the mercury cadmium telluride infrared detector prepared in Example 1 of the present invention are shown.

[0042] Figure 6 The energy spectrum line scan of Hg element in the sidewall structure of the mercury cadmium telluride infrared detector prepared in Example 1 of the present invention.

[0043] Figure 7 The energy spectrum line scan of Cd element in the sidewall structure of the mercury cadmium telluride infrared detector prepared in Example 1 of the present invention.

[0044] Figure 8The energy spectrum line scan of Te element in the sidewall structure of the mercury cadmium telluride infrared detector prepared in Example 1 of the present invention.

[0045] Figure 9 The energy spectrum line scan of Hf element in the sidewall structure of the mercury cadmium telluride infrared detector prepared in Example 1 of the present invention.

[0046] Figure 10 The image shows the backscattered electron pattern of the sidewall structure of the mercury cadmium telluride infrared detector prepared in Example 2 of the present invention.

[0047] Figure 11 The image shows the backscattered electron mapping (surface distribution) of the sidewall structure of the mercury cadmium telluride infrared detector prepared in Example 2 of the present invention.

[0048] Figure 12 The backscattered electron mapping diagram of Hg element in the sidewall structure of the mercury cadmium telluride infrared detector prepared in Example 2 of the present invention.

[0049] Figure 13 The backscattered electron mapping diagram of Te element in the sidewall structure of the mercury cadmium telluride infrared detector prepared in Example 2 of the present invention.

[0050] Figure 14 The image shows the backscattered electron mapping of Cd elements on the sidewall structure of the mercury cadmium telluride infrared detector prepared in Example 2 of this invention.

[0051] Figure 15 The backscattered electron mapping diagram of Hf element in the sidewall structure of the mercury cadmium telluride infrared detector prepared in Example 2 of the present invention.

[0052] Figure 16 SEM image of the sidewall structure of the mercury cadmium telluride infrared detector prepared for Comparative Example 1.

[0053] Figure 17 Microscopic image of the sidewall structure of the mercury cadmium telluride infrared detector prepared for Comparative Example 2 under a 100x microscope.

[0054] Figure 18 SEM image of the sidewall structure of the mercury cadmium telluride infrared detector prepared for Comparative Example 2.

[0055] In the attached figures, the labels are: 1-cadmium zinc telluride substrate, 2-mercury cadmium telluride epitaxial layer, 3-hafnium oxide passivation layer, and 4-composite protective layer. Detailed Implementation

[0056] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention. Furthermore, the technical features involved in the various embodiments of this invention described below can be combined with each other as long as they do not conflict with each other.

[0057] This invention proposes a method for passivating the sidewalls of a mercury cadmium telluride (HCd) infrared detector. This method features low thermal damage, low interface states, and strong mercury blocking properties, making it particularly suitable for passivating the sidewalls of high aspect ratio HCdd infrared detectors with high conformal performance. See also... Figure 1 The method includes the following steps:

[0058] S1: The zinc cadmium telluride substrate 1 with mercury cadmium telluride epitaxial layer 2 is etched to obtain mercury cadmium telluride mesa chip; the etching process specifically involves using IBE etching to perform high aspect ratio etching on the mercury cadmium telluride material, that is, first spin coating with photoresist, and then using IBE etching; the etching ratio is 5:1~3:1.

[0059] S2: Cleaning and activation treatment of the mercury cadmium telluride mesa chip; specifically, for the mercury cadmium telluride mesa chip that has completed IBE etching, it is cleaned sequentially with an organic solution (e.g., acetone and alcohol are used to clean it repeatedly three times) to remove photoresist residue, organic contaminants and surface particles; then it is etched at room temperature with a bromine-methanol solution with a volume fraction of 0.3-0.8%, preferably light etching for 5-10 s, to remove the 50-100 nm etching damage layer on the sidewall and expose the fresh and complete mercury cadmium telluride lattice surface; after rinsing with deionized water and drying with high-purity nitrogen, it is transferred into the ALD vacuum reaction chamber within 5 min to prevent secondary oxidation of the sidewall and adsorption of water vapor and carbon impurities.

[0060] S3: The activated mercury cadmium telluride mesa chip is subjected to ALD process at a low temperature of 60-100℃, using tetra(dimethylamino)hafnium as the hafnium source precursor and water vapor, ozone, or oxygen plasma as the oxygen source to grow a hafnium oxide passivation layer 3 on the sidewall of the mercury cadmium telluride mesa chip; after deposition, the mercury cadmium telluride mesa chip with hafnium oxide passivation layer 3 is removed. This step achieves hafnium oxide passivation.

[0061] Figure 2 This is a schematic diagram illustrating the film formation principle of the ALD single-cycle hafnium oxide passivation layer 3 of the present invention. See also... Figure 2 The ALD single-cycle hafnium oxide passivation layer 3 includes the following film formation process: (1) hafnium source precursor deposition; (2) nitrogen purging; (3) formation of hafnium source layer; (4) oxygen atom deposition; (5) nitrogen purging; (6) formation of monolayer hafnium oxide. By repeatedly performing the above film formation process of the ALD single-cycle hafnium oxide passivation layer 3, the hafnium oxide passivation layer 3 can be grown on the sidewall of the mercury cadmium telluride mesa chip.

[0062] Step S3 specifically includes the following steps:

[0063] (1) Evacuate the ALD vacuum reaction chamber to a background vacuum of ≤1×10⁻⁶. -6 Torr; High-purity nitrogen or argon is introduced as the carrier gas, with a flow rate of 50–100 sccm; The temperature of the chamber and sample stage is controlled at 60–100℃, and the temperature fluctuation is controlled within ±1℃.

[0064] (2) A hafnium oxide passivation layer 3 is grown on the sidewall of the mercury cadmium telluride mesa chip using ALD process; specifically, thermal ALD or plasma-enhanced ALD process is used, with tetra(dimethylamino)hafnium (TDMAH) as the hafnium source precursor and water vapor or low-power oxygen plasma as the oxygen source; a hafnium oxide passivation layer 3 is grown on the sidewall of the mercury cadmium telluride mesa chip.

[0065] The individual ALD loops are as follows:

[0066] Tetra(dimethylamino)hafnium pulse 0.1–0.5 s → inert gas purging 10–20 s → oxygen source pulse 0.1–1 s → inert gas purging 10–20 s; (i.e., tetra(dimethylamino)hafnium is injected with a pulse of 0.1–0.5 s, then inert gas is purged for 10–20 s, then oxygen source is injected with a pulse of 0.1–1 s; then inert gas is purged for 10–20 s).

[0067] In this invention, the growth thickness of the hafnium oxide passivation layer 3 in a single ALD cycle is 0.9–1.0 Å, and it is continuously deposited for 50–220 cycles to form a dense, conformal, and pinhole-free hafnium oxide passivation layer 3 of 5–20 nm on the high aspect ratio mesa sidewall of mercury cadmium telluride.

[0068] (3) After the hafnium oxide passivation layer 3 is deposited, maintain the vacuum atmosphere of the ALD vacuum reaction chamber and continuously purge with high-purity nitrogen in situ for no less than 10 min; perform in-situ gradient cooling, and after the temperature of the ALD vacuum reaction chamber drops to ≤30℃, transfer the sample to the loadlock chamber, purge with high-purity nitrogen to 1 atm atmospheric pressure, and remove the mercury cadmium telluride mesa chip with hafnium oxide passivation layer 3. The in-situ gradient cooling is performed at a rate of ≤5℃ / min.

[0069] S4: Anneal the mercury cadmium telluride mesa chip with hafnium oxide passivation layer 3. The annealing temperature is 100–130℃, and the holding time is 30–60 min. The purpose of the annealing is to optimize the side passivation effect of the hafnium oxide mesa. The annealing is carried out in a nitrogen-hydrogen mixed atmosphere containing 5% hydrogen by volume. The heating rate of the annealing is ≤10℃ / min. The maximum temperature of the entire annealing process does not exceed 130℃, i.e., this step is low-temperature annealing.

[0070] S5: Prepare a composite protective layer on the surface of hafnium oxide passivation layer 3. This can be achieved by using low-temperature ALD deposition of 3–10 nm alumina as the composite protective layer, or by using low-temperature PECVD (plasma-enhanced chemical vapor deposition) deposition of 5–10 nm silicon dioxide as the composite protective layer, thereby improving moisture resistance, radiation resistance, and mechanical protection.

[0071] When oxygen plasma is used as the oxygen source, the plasma power is set to 50-100 W and the pulse duration is 1 s.

[0072] See Figure 3 The present invention discloses a sidewall structure for a mercury cadmium telluride infrared detector, comprising a zinc cadmium telluride substrate 1, a mercury cadmium telluride epitaxial layer 2, a hafnium oxide passivation layer 3 attached to the mercury cadmium telluride epitaxial layer 2, and a composite protective layer 4 attached to the hafnium oxide passivation layer 3; the thickness of the hafnium oxide passivation layer 3 is 5-20 nm, and the thickness of the composite protective layer is 3-10 nm.

[0073] Example 1

[0074] In this embodiment, the oxygen source is oxygen plasma.

[0075] A method for passivating the sidewall of a mercury cadmium telluride infrared detector stage includes the following steps:

[0076] S1: Select a zinc cadmium telluride substrate 1 with a mercury cadmium telluride epitaxial layer 2, and perform IBE dry etching on it to obtain a mercury cadmium telluride mesa chip; the etching ratio is 3:1.

[0077] S2: The mercury cadmium telluride mesa chip obtained in step S1 is cleaned three times with acetone and alcohol, and then etched at room temperature for 10 s with 0.5% bromine-methanol solution to remove the etch damage layer of about 80 nm on the sidewall. After that, it is rinsed with deionized water and dried with high-purity nitrogen gas. It is then transferred into the ALD vacuum reaction chamber within 3 min.

[0078] S3: A hafnium oxide passivation layer 3 is grown on the sidewall of the mercury cadmium telluride mesa chip; specifically, the following steps are included:

[0079] (1) Evacuate the ALD vacuum reaction chamber to a base vacuum of 8×10⁻⁶. -7 Torr is used to introduce high-purity nitrogen as the carrier gas, with a flow rate of 100 sccm; the sample stage is kept at a constant temperature of 70℃, with temperature fluctuations of ±1℃.

[0080] (2) A hafnium oxide passivation layer 3 was grown on the sidewall of the mercury cadmium telluride mesa chip using PE-ALD (plasma-enhanced atomic layer deposition) process; TDMAH was used as the hafnium source, oxygen plasma was used as the oxygen source, and the plasma power was 500W.

[0081] The parameters for a single ALD cycle are: TDMAH pulse 0.2 s → N2 purge 15 s → oxygen plasma pulse 1 s → N2 purge 15 s;

[0082] A total of 50 cycles were deposited to prepare a hafnium oxide passivation layer with a thickness of approximately 5 nm.

[0083] (3) After deposition, maintain the vacuum atmosphere of the ALD vacuum reaction chamber and continuously purge with high-purity nitrogen in situ for 10 min; cool down at a gradient of 4℃ / min until the temperature of the ALD vacuum reaction chamber drops to 30℃, then transfer the sample to the Loadlock chamber, purge with high-purity nitrogen to 1 atm atmospheric pressure, and take out the mercury cadmium telluride mesa chip with hafnium oxide passivation layer 3.

[0084] S4: The mercury cadmium telluride mesa chip with hafnium oxide passivation layer 3 is annealed under a high-purity nitrogen atmosphere to complete the passivation of the sidewall of the mercury cadmium telluride infrared detector mesa. In this embodiment, the annealing temperature is 100℃, the annealing holding time is 30 min, and the annealing heating rate is 5℃ / min; the maximum temperature throughout is 100℃.

[0085] After the sidewalls of the mercury cadmium telluride infrared detector stage are passivated, the indium pillar electrode and flip-chip packaging are then fabricated as normal.

[0086] The sidewall structure of the mercury cadmium telluride infrared detector prepared using the passivation method described in Example 1 was tested, and the results are as follows: Figures 4 to 9 As shown.

[0087] Figure 4 This is a backscattered electron image of the sidewall structure of the mercury cadmium telluride infrared detector prepared in Example 1 of the present invention. From... Figure 4 It can be seen that the sidewall structure of the mercury cadmium telluride infrared detector prepared in Example 1 has no detachment or cracks.

[0088] Figure 5 The energy spectrum line scans of all elements of the sidewall structure of the mercury cadmium telluride infrared detector prepared in Example 1 of the present invention are shown. Figure 6 The energy spectrum line scan of Hg element in the sidewall structure of the mercury cadmium telluride infrared detector prepared in Example 1 of the present invention. Figure 7 The energy spectrum line scan of Cd element in the sidewall structure of the mercury cadmium telluride infrared detector prepared in Example 1 of the present invention. Figure 8 The energy spectrum line scan of Te element in the sidewall structure of the mercury cadmium telluride infrared detector prepared in Example 1 of the present invention. Figure 9 The image shows the energy dispersive spectral line scan of Hf element in the sidewall structure of the mercury cadmium telluride infrared detector prepared in Example 1 of this invention. Figures 5 to 9The energy spectrum line scans show that the elemental composition is clear and the device has excellent uniformity.

[0089] Example 2

[0090] This embodiment uses ozone as the oxygen source. This embodiment is applicable to ultra-high sensitivity mid-wave mercury cadmium telluride infrared detectors.

[0091] A method for passivating the sidewall of a mercury cadmium telluride infrared detector stage includes the following steps:

[0092] S1: Select a zinc cadmium telluride substrate 1 with a mercury cadmium telluride epitaxial layer 2, and perform IBE dry etching on it to obtain a mercury cadmium telluride mesa chip; the etching ratio is 3:1.

[0093] S2: The mercury cadmium telluride mesa chip obtained in step S1 is cleaned three times with acetone and alcohol, and then etched at room temperature for 10 s with 0.5% bromine-methanol solution to remove the etch damage layer of about 80 nm on the sidewall. After that, it is rinsed with deionized water and dried with high-purity nitrogen gas. It is then transferred into the ALD vacuum reaction chamber within 3 min.

[0094] S3: A hafnium oxide passivation layer 3 is grown on the sidewall of the mercury cadmium telluride mesa chip; specifically, the following steps are included:

[0095] (1) Evacuate the ALD vacuum reaction chamber to a background vacuum of ≤1×10⁻⁶. -6 Torr is used to introduce high-purity nitrogen as the carrier gas, with a flow rate of 100 sccm; the sample stage is kept at a constant temperature of 70℃, with temperature fluctuations of ±1℃.

[0096] (2) A hafnium oxide passivation layer 3 was grown on the sidewall of the mercury cadmium telluride mesa chip using thermal ALD process; TDMAH was used as the hafnium source and ozone as the oxygen source.

[0097] The parameters for a single ALD cycle are: TDMAH pulse 0.4 s → N2 purge 13 s → ozone pulse 1 s → N2 purge 13 s;

[0098] A total of 50 cycles were deposited to prepare a hafnium oxide passivation layer with a thickness of approximately 5.0 nm.

[0099] (3) After deposition, maintain the vacuum atmosphere of the ALD vacuum reaction chamber and continuously purge with high-purity nitrogen in situ for 10 min; after the temperature of the ALD vacuum reaction chamber is cooled to 30℃ at a gradient of 4℃ / min, transfer the sample to the Loadlock chamber, purge with high-purity nitrogen to 1 atm atmospheric pressure, and take out the mercury cadmium telluride mesa chip with hafnium oxide passivation layer 3.

[0100] S4: The mercury cadmium telluride mesa chip with hafnium oxide passivation layer 3 is annealed in a nitrogen-hydrogen mixed atmosphere containing 5% hydrogen by volume to complete the passivation of the sidewall of the mercury cadmium telluride infrared detector mesa. In this embodiment, the annealing temperature is 120℃, the annealing holding time is 45 min, and the annealing heating rate is 6℃ / min.

[0101] The sidewall structure of the mercury cadmium telluride infrared detector prepared using the passivation method described in Example 2 was tested, and the results are as follows: Figures 10 to 15 As shown.

[0102] Figure 10 This is a backscattered electron image of the sidewall structure of the mercury cadmium telluride infrared detector prepared in Example 2 of the present invention. From... Figure 10 It can be seen that the sidewall structure of the mercury cadmium telluride infrared detector prepared in Example 2 has no cracks and no mercury diffusion.

[0103] Figure 11 The backscattered electron mapping diagram of the sidewall structure of the mercury cadmium telluride infrared detector prepared in Example 2 of the present invention. Figure 12 The backscattered electron mapping diagram of Hg element in the sidewall structure of the mercury cadmium telluride infrared detector prepared in Example 2 of the present invention. Figure 13 The backscattered electron mapping diagram of Te element in the sidewall structure of the mercury cadmium telluride infrared detector prepared in Example 2 of the present invention. Figure 14 The image shows the backscattered electron mapping of Cd elements on the sidewall structure of the mercury cadmium telluride infrared detector prepared in Example 2 of this invention. Figure 15 The image shows the Hf element backscattered electron mapping of the sidewall structure of the mercury cadmium telluride infrared detector prepared in Example 2 of this invention. From... Figures 11 to 15 It can be seen that the energy spectrum distribution of the sidewall structure of the mercury cadmium telluride infrared detector prepared in Example 2 is uniform.

[0104] Example 3

[0105] In this embodiment, the oxygen source is water vapor.

[0106] A method for passivating the sidewall of a mercury cadmium telluride infrared detector stage includes the following steps:

[0107] S1: Select mercury cadmium telluride material and perform IBE dry etching to obtain mercury cadmium telluride mesa chip; the etching ratio is 5:1;

[0108] S2: The mercury cadmium telluride mesa chip obtained in step S1 is cleaned three times with acetone and alcohol, and then etched at room temperature for 5 seconds with 0.5% bromine-methanol solution to remove the etch damage layer of about 80 nm on the sidewall. After that, it is rinsed with deionized water and dried with high-purity nitrogen gas. It is then transferred into the ALD vacuum reaction chamber within 3 minutes.

[0109] S3: Growing a hafnium oxide passivation layer on the sidewall of the mercury cadmium telluride mesa chip; specifically including the following steps:

[0110] (1) Evacuate the ALD vacuum reaction chamber to a base vacuum of 8×10⁻⁶. -7 Torr is used to introduce high-purity nitrogen as the carrier gas, with a flow rate of 50 sccm; the sample stage is kept at a constant temperature of 100℃, with temperature fluctuations of ±1℃.

[0111] (2) A hafnium oxide passivation layer was grown on the sidewall of the mercury cadmium telluride mesa chip using thermal ALD process; TDMAH was used as the hafnium source and water vapor (deionized water vapor) was used as the oxygen source.

[0112] The parameters for a single ALD cycle are: TDMAH pulse 0.1 s → N2 purge 15 s → H2O pulse 0.2 s → N2 purge 15 s;

[0113] A total of 100 cycles were deposited to prepare a hafnium oxide passivation layer with a thickness of approximately 10 nm.

[0114] (3) After deposition, maintain the vacuum atmosphere of the ALD vacuum reaction chamber and continuously purge with high-purity nitrogen in situ for 10 min; after the temperature of the ALD vacuum reaction chamber drops to 30℃ at a gradient of 5℃ / min, transfer the sample to the Loadlock chamber, purge with high-purity nitrogen to 1 atm atmospheric pressure, and take out the mercury cadmium telluride mesa chip with hafnium oxide passivation layer.

[0115] S4: Annealing is performed on the mercury cadmium telluride mesa chip with hafnium oxide passivation layer under a high-purity nitrogen atmosphere to passivate the mesa sidewall of the mercury cadmium telluride infrared detector. In this embodiment, the annealing temperature is 130℃, the holding time is 60 min, and the heating rate is 5℃ / min. The maximum temperature throughout the process is 130℃.

[0116] S5: A composite protective layer 4 was prepared on the surface of the hafnium oxide passivation layer. 10 nm of alumina was deposited using low-temperature ALD as the composite protective layer 4.

[0117] Comparative Example 1

[0118] Comparative Example 1 is a traditional CdTe sidewall passivation.

[0119] The specific preparation process is as follows:

[0120] S1: Select mercury cadmium telluride (MCH) material and perform IBE dry etching to obtain MCH mesa chips; the etching ratio is 3:1.

[0121] S2: The mercury cadmium telluride chip obtained in step S1 is cleaned three times with acetone and alcohol, and then etched at room temperature for 10 s with 0.5% bromine-methanol solution to remove the etch damage layer of about 80 nm on the sidewall. After that, it is rinsed with deionized water and dried with high-purity nitrogen gas. It is then transferred into the CdTe thermal evaporation chamber within 3 min.

[0122] S3: Growing a CdTe passivation layer on the sidewall of the mercury cadmium telluride mesa chip; specifically including the following steps:

[0123] (1) Evacuate the thermal evaporation vacuum reaction chamber to a base vacuum of 3×10⁻⁶. -6 Torr maintains a constant temperature of 70°C on the sample stage, with temperature fluctuations of ±1°C.

[0124] (2) Heat the CdTe polycrystalline material with a CdTe resistance heating wire and deposit a CdTe passivation layer by adjusting the evaporation rate. After deposition, purge with high-purity nitrogen to 1 atm atmospheric pressure and remove the mercury cadmium telluride mesa chip with the CdTe passivation layer.

[0125] S4: The sidewall passivation of the mercury cadmium telluride mesa chip with CdTe passivation layer was completed by annealing under a high-purity nitrogen atmosphere. In this comparative example, the annealing temperature was 100℃, the holding time was 30 min, and the heating rate was 5℃ / min. The maximum temperature throughout the process was 100℃.

[0126] The mercury cadmium telluride mesa chip sample obtained in Comparative Example 1 was tested after dissociation, and the results are shown in [the table below]. Figure 16 . Figure 16 This is a SEM image of the sidewall structure of the mercury cadmium telluride infrared detector prepared in Comparative Example 1. From... Figure 16 It can be seen that only the surface of the platform has a relatively thick CdTe coating, the side coating is poor, the noise is high, the leakage current is high, and it is prone to moisture degradation during long-term operation, which cannot meet the requirements of small pixel long-wavelength cooling devices.

[0127] Comparative Example 2

[0128] Comparative Example 2 is high-temperature ALD passivation with a deposition temperature of 300℃.

[0129] The specific preparation process of Comparative Example 2 is as follows:

[0130] S1: Select mercury cadmium telluride (MCH) material and perform IBE dry etching to obtain MCH mesa chips; the etching ratio is 3:1.

[0131] S2: The mercury cadmium telluride chip obtained in step S1 is cleaned three times with acetone and alcohol, and then etched at room temperature for 10 s with 0.5% bromine-methanol solution to remove the etch damage layer of about 80 nm on the sidewall. After that, it is rinsed with deionized water and dried with high-purity nitrogen gas. It is then transferred into the ALD vacuum reaction chamber within 3 min.

[0132] S3: Growing a hafnium oxide passivation layer on the sidewall of the mercury cadmium telluride mesa chip; specifically including the following steps:

[0133] (1) Evacuate the ALD vacuum reaction chamber to a base vacuum of 8×10⁻⁶. -7 Torr is used to introduce high-purity nitrogen as the carrier gas, with a flow rate of 80 sccm; the sample stage is kept at a constant temperature of 300℃, with temperature fluctuations of ±1℃.

[0134] (2) A hafnium oxide passivation layer was grown on the sidewall of the mercury cadmium telluride mesa chip using thermal ALD process; TDMAH was used as the hafnium source and water vapor (deionized water vapor) was used as the oxygen source.

[0135] The parameters for a single ALD cycle are: TDMAH pulse 0.1 s → N2 purge 15 s → H2O pulse 0.2 s → N2 purge 15 s;

[0136] A total of 50 cycles were deposited to prepare a hafnium oxide passivation layer with a thickness of approximately 5 nm.

[0137] (3) After deposition, maintain the vacuum atmosphere of the ALD vacuum reaction chamber and continuously purge with high-purity nitrogen in situ for 10 min; after the temperature of the ALD vacuum reaction chamber is cooled to 30℃ at a gradient of 4℃ / min, transfer the sample to the Loadlock chamber, purge with high-purity nitrogen to 1 atm atmospheric pressure, and take out the mercury cadmium telluride mesa chip with hafnium oxide passivation layer.

[0138] S4: Annealing of the mercury cadmium telluride mesa chip with hafnium oxide passivation layer was performed under a high-purity nitrogen atmosphere to passivate the mesa sidewall of the mercury cadmium telluride infrared detector. In this comparative example, the annealing temperature was 100℃, the holding time was 30 min, and the heating rate was 5℃ / min. The maximum temperature throughout the process was 100℃.

[0139] The mercury cadmium telluride mesa chip sample obtained in Comparative Example 2 was tested, and the results are shown in [the table below]. Figure 17 and Figure 18 . Figure 17 Microscopic image of the sidewall structure of the mercury cadmium telluride infrared detector prepared for Comparative Example 2, viewed under a 100x microscope. Figure 17 It can be seen that the surface of the side wall structure of the mercury cadmium telluride infrared detector prepared in Comparative Example 2 has holes (the white spots are the holes). Figure 18This is a SEM image of the sidewall structure of the mercury cadmium telluride infrared detector prepared in Comparative Example 2. From... Figure 18 It can be seen that the sidewall structure of the mercury cadmium telluride infrared detector prepared in Comparative Example 2 exhibits cracks, voids, and detachment. The above test results indicate that exceeding the process temperature caused significant mercury escape and sidewall composition shift; thermal stress mismatch resulted in localized microcracks; and significant deterioration of interface states and dark current led to substandard reliability.

[0140] This invention first cleans the sidewalls of the high aspect ratio mercury cadmium telluride mesa after IBE dry etching with an organic solvent, and then uses a low-concentration bromine-methanol solution for short-time etching to precisely remove the sidewall etching damage layer and activate the fresh lattice surface. Subsequently, at a low temperature of 60-100℃, an atomic layer deposition process is used, with tetra(dimethylamino)hafnium (TDMAH) as the hafnium source precursor and water vapor, ozone or oxygen plasma as the oxygen source, to grow an ultrathin and dense hafnium oxide passivation layer of 5-20 nm on the high aspect ratio mesa sidewalls under self-confined growth. After deposition, the layer is purged with in-situ inert gas and cooled by gradient, and then annealed at a low temperature of 100-130℃ in an inert atmosphere. The maximum process temperature throughout the entire process does not exceed 130℃.

[0141] This invention effectively avoids mercury volatilization and lattice distortion in mercury cadmium telluride (HCTM) materials. The hafnium oxide passivation layer exhibits excellent conformability, is free of pinholes and microcracks, has low interface state density, strong mercury diffusion blocking ability, and low interface thermal stress. It can significantly reduce the dark current and 1 / f noise on the device sidewalls, and improve the detectivity, uniformity, and long-term reliability of infrared detectors. It overcomes the technical defects of traditional CdTe passivation (poor insulation), AlO passivation (high passivation temperature leading to mercury volatilization), and conventional dielectric step encapsulation (poor encapsulation). The process is fully compatible with existing HCTM etching, photolithography, and flip-chip interconnect processes, and is suitable for the mass production of small-pixel, high aspect ratio, cooled medium-to-long-wave HCTM infrared detectors.

[0142] Those skilled in the art will readily understand that the above description is merely a preferred embodiment of the present invention. The above embodiments are provided only for the purpose of describing the present invention and are not intended to limit the present invention. Parts not described in detail in this specification are well-known in the art and are not intended to limit the scope of the present invention. The scope of the present invention is defined by the appended claims. All equivalent substitutions and modifications made without departing from the spirit and principle of the present invention should be covered within the scope of the present invention.

Claims

1. A method for passivating the sidewall of a mercury cadmium telluride infrared detector stage, characterized in that, Includes the following steps: S1: Etching is performed on a zinc cadmium telluride substrate with a mercury cadmium telluride epitaxial layer to obtain a mercury cadmium telluride mesa chip. S2: Cleaning and activation treatment of mercury cadmium telluride mesa chip; S3: The activated mercury cadmium telluride mesa chip is subjected to ALD process at a low temperature of 60-100℃, with tetra(dimethylamino)hafnium as the hafnium source precursor and water vapor, ozone or oxygen plasma as the oxygen source, to grow a hafnium oxide passivation layer on the sidewall of the mercury cadmium telluride mesa chip. After deposition, the mercury cadmium telluride mesa chip with hafnium oxide passivation layer is removed; S4: Anneal the mercury cadmium telluride mesa chip with hafnium oxide passivation layer at a temperature of 100-130°C for 30-60 min. Step S3 specifically includes the following steps: (1) Evacuate the ALD vacuum reaction chamber to a background vacuum of ≤1×10⁻⁶. -6 Torr; High-purity nitrogen or argon is introduced as the carrier gas, with a flow rate of 50–100 sccm; The temperature of the chamber and sample stage is controlled at 60–100℃; (2) A hafnium oxide passivation layer is grown on the sidewall of the mercury cadmium telluride mesa chip using the ALD process; the single ALD cycle in step (2) is as follows: tetrakis(dimethylamino)hafnium pulse 0.1-0.5 s → inert gas purging 10-20 s → oxygen source pulse 0.1-1 s → inert gas purging 10-20 s; 50-220 ALD cycles are continuously deposited in step (2); (3) After the hafnium oxide passivation layer is deposited, maintain the vacuum atmosphere of the ALD vacuum reaction chamber and continuously purge with high-purity nitrogen in situ for no less than 10 min; after the temperature of the ALD vacuum reaction chamber drops to ≤30℃, transfer the sample to the vacuum locking chamber, purge with high-purity nitrogen to 1 atm atmospheric pressure, and take out the mercury cadmium telluride mesa chip with hafnium oxide passivation layer.

2. The method for passivating the sidewall of the mercury cadmium telluride infrared detector stage according to claim 1, characterized in that, The method also includes the following steps: S5: Prepare a composite protective layer on the surface of the hafnium oxide passivation layer.

3. The method for passivating the sidewall of the mercury cadmium telluride infrared detector stage according to claim 1, characterized in that, The etching process in step S1 specifically involves using IBE to perform high aspect ratio etching on the mercury cadmium telluride material. The etching ratio is 5:1 to 3:

1.

4. The method for passivating the sidewall of the mercury cadmium telluride infrared detector stage according to claim 1, characterized in that, The activation treatment in step S2 specifically involves treating with a bromine-methanol solution at room temperature for 5–10 seconds, followed by rinsing and drying.

5. The method for passivating the sidewall of the mercury cadmium telluride infrared detector stage according to claim 1, characterized in that, The cooling of the ALD vacuum reaction chamber in step (3) is specifically carried out by gradient cooling at a rate of ≤5℃ / min.

6. The method for passivating the sidewall of the mercury cadmium telluride infrared detector stage according to claim 1, characterized in that, When oxygen plasma is used as the oxygen source in step S3, the plasma power is set to 50-800 W. In step S4, the annealing process is carried out in a nitrogen-hydrogen mixed atmosphere containing high-purity nitrogen or 5% hydrogen by volume, and the heating rate of the annealing process is ≤10℃ / min.

7. A sidewall structure for a mercury cadmium telluride infrared detector platform, characterized in that, It includes a mercury cadmium telluride epitaxial layer and a hafnium oxide passivation layer attached to the mercury cadmium telluride epitaxial layer. The thickness of the hafnium oxide passivation layer is 5 to 20 nm. The hafnium oxide passivation layer is prepared by the method of passivating the sidewall of the mercury cadmium telluride infrared detector stage as described in any one of claims 1 to 6.

8. The sidewall structure of the mercury cadmium telluride infrared detector platform according to claim 7, characterized in that, The sidewall structure of the mercury cadmium telluride infrared detector platform also includes a composite protective layer with a thickness of 3–10 nm.

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