Ground penetrating radar data transmission control method and system based on double-fifo ping-pong buffer
Patent Information
- Application Number
- CN202610945320.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-06-29
- Publication Date
- 2026-08-28
AI Technical Summary
现有数据传输方式多采用单缓冲区存储,易出现数据拥堵、丢失或传输延迟过大的问题,难以匹配多通道分时采集的高速数据输出需求
[0037]This invention provides a ground-penetrating radar (GPR) data transmission control method and system based on dual FIFO ping-pong buffering. It employs dynamic channel number threshold adjustment to adapt to network transmission status, balancing transmission latency and buffer utilization to ensure stable transmission of multi-channel radar data. Time-division acquisition and ping-pong switching are synchronized, completing buffer switching within the protection interval to avoid interference with data acquisition and reduce crosstalk between channels. An adaptive forced switching mechanism for abnormal timeouts is added, prioritizing the transmission of abnormal data during interruptions, effectively solving data accumulation and loss problems and improving transmission reliability. Combining encoder and gyroscope data to evaluate robot motion status, predicting and compensating for mileage loss, ensuring synchronization of radar data and mileage information, and improving pipeline defect location accuracy. Dual FIFO alternating storage and reading/writing enables parallel data processing, significantly improving data transmission efficiency and meeting the data transmission needs of high-frequency, high-volume GPR.
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Figure CN122653076A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of data transmission technology for non-destructive testing of drainage pipelines, and in particular to a ground-penetrating radar data transmission control method and system based on dual FIFO ping-pong buffers. Background Technology
[0002] In multi-channel ground-penetrating radar (GPR) detection of drainage pipelines, data acquisition is characterized by high frequency, continuous operation, and large data volume. Existing data transmission methods mostly use single-buffer storage, which is prone to data congestion, data loss, or excessive transmission delays, making it difficult to meet the high-speed data output requirements of multi-channel time-division acquisition.
[0003] Conventional ping-pong buffering mechanisms lack dynamic adaptability. With a fixed threshold for the number of channels, they cannot adjust their caching strategy according to changes in network conditions, leading to a sharp drop in transmission efficiency during network fluctuations. Furthermore, the lack of an abnormal timeout handling mechanism means that buffer switching cannot be timely when data writing stops, resulting in data backlog or interruptions.
[0004] Furthermore, the existing solution does not incorporate data compensation based on the movement state of the pipeline robot. When encoder pulses are lost, radar data and mileage information are prone to malfunction, affecting the accuracy of pipeline defect location and making it difficult to meet the application requirements of comprehensive and high-precision inspection of drainage pipelines. Summary of the Invention
[0005] To address the aforementioned technical problems, this invention provides a ground-penetrating radar data transmission control method and system based on dual FIFO ping-pong buffers. The following technical solution is adopted:
[0006] A ground-penetrating radar data transmission control method based on dual FIFO ping-pong buffers is applied to a multi-channel ground-penetrating radar data acquisition system, including the following steps:
[0007] Step 1: Initialize the ping-pong buffer module composed of the first FIFO and the second FIFO, and configure the sampling parameters of each channel of the ground penetrating radar and the timing and protection interval of the multi-channel time-division trigger acquisition.
[0008] Step 2: Start the multi-channel ground penetrating radar time-division trigger acquisition according to the time sequence, and write the single-channel ground penetrating radar data obtained in each acquisition with the channel identifier and channel number into the FIFO currently in the writing state;
[0009] Step 3: Monitor the number of channels stored in the current write FIFO in real time. When the number of channels reaches the channel threshold that is dynamically adjusted according to the network transmission status, and the other FIFO is in an idle state, perform a ping-pong switch: turn off the write enable of the current write FIFO and turn on its read enable, and switch the other FIFO to the write state.
[0010] Step 4: The main control MCU reads data from the FIFO in the read-out state one by one, adds a timestamp and verification information to each data, encapsulates it into a network data frame, and sends it to the host computer via Ethernet.
[0011] Step 5: When it is detected that the current write FIFO is not empty and the time interval since the last new track write exceeds the preset timeout threshold, an abnormal timeout is determined, and an adaptive forced switch is performed.
[0012] If the other FIFO is idle at this time, a ping-pong switch is performed directly, and all the data currently written to the FIFO is read out and sent.
[0013] If another FIFO is busy in the read state at this time, the read operation on that other FIFO is interrupted, all data currently written to the FIFO is forcibly read out, and a priority frame carrying the exception interrupt priority flag is sent to the host computer. After the priority frame is sent, the interrupted read operation is resumed.
[0014] Optionally, the multi-channel ground-penetrating radar time-division triggering acquisition in step 2 specifically involves: according to the channel order, triggering the radar transmitter and receiver of each channel sequentially at a preset protection interval, and generating a ground-penetrating radar data containing 2048 sampling points and a sampling accuracy of 16 bits in a single acquisition of each channel.
[0015] Optionally, the method for dynamically adjusting the channel number threshold in step 3 is as follows:
[0016] The main control MCU periodically measures the network round-trip latency between itself and the host computer. Combining the current effective Ethernet transmission bandwidth and the amount of single-channel ground penetrating radar data, it calculates the number of channels that can be transmitted within the maximum transmission latency allowed by the system. The threshold number of channels is set to the smaller value between the number of channels that can be transmitted and the maximum number of channels that the ping-pong buffer module can buffer, and is updated in real time.
[0017] Optionally, the ping-pong switching operation in step 3 is limited to the protection interval of the multi-channel time-division trigger acquisition. The ping-pong switching control signal is synchronized with the acquisition timing control signal to ensure that the switching does not interfere with the ongoing data acquisition.
[0018] Optionally, the timeout threshold in step 5 is dynamically adjusted based on the statistical characteristics of the channel spacing and the network round-trip delay. When abnormal timeouts occur consecutively and the network delay increases, the timeout threshold is automatically increased; when the channel spacing is regular and the network is unobstructed, the timeout threshold is automatically decreased.
[0019] Optionally, the interruptive forced switch performed in step 5 when another FIFO is busy further includes:
[0020] Save the current read pointer and remaining track number information of the interrupted FIFO; disable the write enable of the currently written FIFO and force it to be enabled for reading, and read all data tracks at once; add an exception interruption priority flag and exception event record to each data track, encapsulate it into a priority network frame, and send it immediately through the priority transmission queue; after the priority frames have been sent, clear the FIFO and mark it as idle; resume the read operation of the interrupted FIFO, continue to read its remaining data tracks from the saved context and send them normally.
[0021] Optionally, the abnormal event record includes at least the timestamp of the timeout, the number of channels currently written into the FIFO, and the channel number of the last data channel.
[0022] Optionally, step 6 is also included, whereby the main control MCU assesses the motion state of the pipeline robot based on the loss status of the encoder pulse signal, and adds mileage prediction loss information to the sent priority frame for the host computer to perform data interpolation compensation.
[0023] Optionally, step 6 includes the following sub-steps:
[0024] Step 61: The main control MCU records the encoder pulse arrival time at a fixed period. When an abnormal timeout forced switch occurs in step 5, the number of encoder pulses lost during the timeout period is determined.
[0025] Step 62: Read the angular velocity data currently output by the gyroscope module, and combine it with the interval statistics of the last N valid pulses before the timeout to determine whether the pipeline robot is in a state of uniform motion or variable motion.
[0026] If the motion is determined to be uniform, the predicted lost mileage is calculated based on the last valid pulse interval before the timeout and the number of lost pulses, and a first confidence level is assigned.
[0027] If the motion is determined to be variable speed, the angular velocity data is used to calculate the rate of change of heading. Combined with the instantaneous velocity corresponding to the last valid pulse, the lost mileage is predicted by the kinematic integral model and assigned a second confidence level, wherein the second confidence level is lower than the first confidence level.
[0028] Step 63: The predicted lost mileage, confidence level, and number of lost pulses are used as mileage prediction loss information and appended as independent fields before the frame end verification area of the priority frame for the host computer to perform spatial interpolation compensation of radar data.
[0029] The ground-penetrating radar data transmission control system based on dual FIFO ping-pong buffer is used to implement the ground-penetrating radar data transmission control method based on dual FIFO ping-pong buffer. The system includes a multi-channel ground-penetrating radar front-end, a clock trigger management module, a dual FIFO ping-pong buffer module, a network status monitoring module, a timeout detection control unit, a main control MCU, and a network interface.
[0030] The multi-channel ground-penetrating radar front end is used to sequentially excite the radar antennas of each channel under the control of a time-division trigger signal and receive echoes, and output digitized channel data.
[0031] The clock trigger management module is used to generate timing signals and protection intervals for time-division trigger acquisition;
[0032] The dual FIFO ping-pong buffer module includes a first FIFO, a second FIFO, and a ping-pong switching controller;
[0033] The network status monitoring module is used to measure the network round-trip latency between the network and the host computer in real time and output it to the main control MCU.
[0034] The timeout detection control unit is used to monitor the write interval of the current write FIFO. When an abnormal timeout is detected, a forced switch request is generated, and an interrupt signal is generated when the other FIFO is busy to trigger an interrupt-priority switch.
[0035] The main control MCU is communicatively connected to the multi-channel ground-penetrating radar front end, clock trigger management module, dual FIFO ping-pong buffer module, network status monitoring module, and timeout detection control unit. It is used to perform dynamic channel number threshold calculation, normal ping-pong switching decision, data reading, encapsulation and transmission, and respond to the forced switching request to perform adaptive forced switching and interrupt-type priority transmission control. The network interface is used to send the encapsulated network data frames to the host computer.
[0036] In summary, the present invention has at least one of the following beneficial technical effects:
[0037] This invention provides a ground-penetrating radar (GPR) data transmission control method and system based on dual FIFO ping-pong buffering. It employs dynamic channel number threshold adjustment to adapt to network transmission status, balancing transmission latency and buffer utilization to ensure stable transmission of multi-channel radar data. Time-division acquisition and ping-pong switching are synchronized, completing buffer switching within the protection interval to avoid interference with data acquisition and reduce crosstalk between channels. An adaptive forced switching mechanism for abnormal timeouts is added, prioritizing the transmission of abnormal data during interruptions, effectively solving data accumulation and loss problems and improving transmission reliability. Combining encoder and gyroscope data to evaluate robot motion status, predicting and compensating for mileage loss, ensuring synchronization of radar data and mileage information, and improving pipeline defect location accuracy. Dual FIFO alternating storage and reading / writing enables parallel data processing, significantly improving data transmission efficiency and meeting the data transmission needs of high-frequency, high-volume GPR. Attached Figure Description
[0038] Figure 1 This is a flowchart illustrating the control method for ground-penetrating radar data transmission based on dual FIFO ping-pong buffers.
[0039] Figure 2 This is a schematic diagram of the component connection principle of the ground-penetrating radar data transmission control system based on dual FIFO ping-pong buffer of the present invention;
[0040] Figure 3 This is a simplified timing diagram of time-sharing acquisition, ping-pong switching, and abnormal timeout handling in a specific embodiment of the present invention.
[0041] Explanation of reference numerals in the attached diagram: 1. Multi-channel ground-penetrating radar front end; 2. Clock trigger management module; 3. Dual FIFO ping-pong buffer module; 4. Network status monitoring module; 5. Timeout detection and control unit; 6. Main control MCU; 7. Network interface; 8. Host computer. Detailed Implementation
[0042] The present invention will be further described in detail below with reference to the accompanying drawings.
[0043] This invention discloses a ground-penetrating radar data transmission control method and system based on dual FIFO ping-pong buffers.
[0044] Reference Figures 1-3 Example 1, a ground-penetrating radar data transmission control method based on dual FIFO ping-pong buffer, applied to a multi-channel ground-penetrating radar data acquisition system, includes the following steps:
[0045] Step 1: Initialize the ping-pong buffer module composed of the first FIFO and the second FIFO, and configure the sampling parameters of each channel of the ground penetrating radar and the timing and protection interval of the multi-channel time-division trigger acquisition.
[0046] Step 2: Start the multi-channel ground penetrating radar time-division trigger acquisition according to the time sequence, and write the single-channel ground penetrating radar data obtained in each acquisition with the channel identifier and channel number into the FIFO currently in the writing state;
[0047] Step 3: Monitor the number of channels stored in the current write FIFO in real time. When the number of channels reaches the channel threshold that is dynamically adjusted according to the network transmission status, and the other FIFO is in an idle state, perform a ping-pong switch: turn off the write enable of the current write FIFO and turn on its read enable, and switch the other FIFO to the write state.
[0048] Step 4: The main control MCU6 reads data from the FIFO in the read-out state one by one, adds a timestamp and verification information to each data, encapsulates it into a network data frame, and sends it to the host computer 8 via Ethernet.
[0049] Step 5: When it is detected that the current write FIFO is not empty and the time interval since the last new track write exceeds the preset timeout threshold, an abnormal timeout is determined, and an adaptive forced switch is performed.
[0050] If the other FIFO is idle at this time, a ping-pong switch is performed directly, and all the data currently written to the FIFO is read out and sent.
[0051] If another FIFO is busy in the read state at this time, the read operation on that other FIFO is interrupted, all data currently written to the FIFO is forcibly read out, and a priority frame carrying the exception interrupt priority flag is sent to the host computer 8. After the priority frame is sent, the interrupted read operation is resumed.
[0052] By adopting the above technical solution, in step 1, the ping-pong buffer module composed of the first FIFO and the second FIFO is initialized. A buffer with a capacity of not less than 75kB is allocated to each of the first and second FIFOs in the memory of the main control MCU6, and each FIFO can buffer no less than 10 channels of radar data. Simultaneously, the sampling parameters of each channel of the ground-penetrating radar are configured, including a sampling frequency of 200kHz, a sampling precision of 16 bits, and 2048 sampling points per channel. The timing sequence of multi-channel time-division triggering acquisition is set through the clock trigger management module 2, and the protection interval between channels is set to 150μs.
[0053] Step 2: The clock trigger management module 2 generates trigger pulses according to the set timing sequence, sequentially activating the ground penetrating radar front-end 1 of channels 1, 2, and 3 for time-division trigger acquisition. After each acquisition, the multi-channel ground penetrating radar front-end 1 outputs radar data containing 2048 16-bit sampling points in a single channel. The main control MCU 6 receives this channel data, adds a channel identifier and channel number to it, and writes it to the FIFO currently in the write state, such as the first FIFO. At the same time, the channel counter of this FIFO is incremented.
[0054] Step 3: The main control MCU6 monitors the number of channels currently stored in the FIFO in real time. The network status monitoring module 4 periodically sends heartbeat packets to the host computer 8 and receives responses, calculating the round-trip delay. The main control MCU6 dynamically calculates the channel number threshold based on the round-trip delay and the current effective bandwidth. Specifically, it calculates the smaller value between the number of channels that can be transmitted within the maximum allowable transmission delay of 20ms and the maximum buffered channel count of 10 channels of the ping-pong buffer module, and updates it in real time. When the number of stored channels reaches this dynamic channel number threshold, and the other FIFO, i.e., the second FIFO, is in an idle state, the main control MCU6 controls the ping-pong switching controller to perform a ping-pong switch: disable the write enable of the currently written FIFO, enable its read enable, and put it into the read state; switch the other FIFO to the write state and clear its channel counter. This switching action is strictly limited within the inter-channel protection interval and is synchronously controlled by the timing signal output by the clock-triggered management module 2 to avoid conflicts with the ongoing signal acquisition.
[0055] Step 4: The main control MCU6 reads 4096 bytes of data channel by channel from the FIFO in read mode. It appends a 16-bit CRC checksum, acquisition timestamp, and channel number to each channel, encapsulating it into a network data frame containing a frame header synchronization word, channel data, and checksum information. This frame is then sent to the host computer 8 via Ethernet interface 7. Once all channels in the FIFO are emptied, the main control MCU6 marks it as idle, awaiting the next switchover.
[0056] Step 5: The timeout detection control unit 5 continuously monitors the write interval of the currently written FIFO. When the FIFO is not empty and the time interval since the last new track write exceeds the preset timeout threshold, an abnormal timeout is determined to have occurred. The timeout threshold is initially set to 5ms and is dynamically adjusted according to the track interval statistics and network round-trip latency. After an abnormal timeout occurs, the main control MCU 6 performs an adaptive forced switch. If the other FIFO is idle at this time, the same ping-pong switch as in step 3 is performed directly, and all data in the currently written FIFO is quickly read out and sent. If the other FIFO is busy in the read state, the timeout detection control unit 5 generates an interrupt signal to the main control MCU 6. The main control MCU 6 immediately responds to the interrupt, suspends the read operation on the other FIFO, saves its current read pointer and remaining track information; then it forcibly disables the write enable of the currently written FIFO and enables its read enable, reading all the accumulated data tracks at once. Each track of data is encapsulated into a priority network frame after being marked with an abnormal interrupt priority flag and an abnormal event record, and placed in a priority transmission queue, and immediately sent to the host computer 8 through the Ethernet interface 7. After all priority frames have been sent, the FIFO is cleared and marked as idle. Then, the main control MCU6 resumes the reading operation of the interrupted FIFO from the saved context and continues to read its remaining data channels and send them normally.
[0057] In Example 2, the multi-channel ground-penetrating radar time-division triggering acquisition in step 2 is specifically as follows: according to the channel order, the radar transmitter and receiver of each channel are triggered sequentially with a preset protection interval. Each channel generates a ground-penetrating radar data containing 2048 sampling points and a sampling accuracy of 16 bits in a single acquisition.
[0058] By adopting the above technical solution, the clock trigger management module 2 generates three timing signals, which are sequentially sent to channels 1, 2, and 3 of the multi-channel ground-penetrating radar front-end 1. A fixed guard interval of 150μs is inserted between the trigger pulses of each channel. When channel 1 receives the trigger pulse, its radar transmitter emits electromagnetic waves, the radar receiver collects the echo, and after analog-to-digital conversion, generates a 16-bit digital radar data containing 2048 sampling points, with a single channel data volume of 4096 bytes. After channel 1 completes its acquisition and passes the guard interval, channel 2 is triggered to perform the same operation, followed by channel 3. The three channels sequentially complete one acquisition to form a complete set of three-channel data. This process is executed cyclically under the precise control of the clock trigger management module 2.
[0059] Example 3, the method for dynamically adjusting the channel number threshold in step 3 is as follows:
[0060] The main control MCU6 periodically measures the network round-trip delay between itself and the host computer 8. Combining the current effective Ethernet transmission bandwidth and the amount of single-channel ground penetrating radar data, it calculates the number of channels that can be transmitted within the maximum transmission delay allowed by the system. The threshold number of channels is set to the smaller value between the number of channels that can be transmitted and the maximum number of channels that the ping-pong buffer module can buffer, and is updated in real time.
[0061] By adopting the above technical solution, the network status monitoring module 4 sends a timestamped heartbeat packet to the host computer 8 via Ethernet interface 7 every 100ms. Upon receiving the packet, the host computer 8 immediately sends back a response packet. The network status monitoring module 4 calculates the round-trip time (RTT) based on the arrival time of the response packet. The main control MCU 6 takes the moving average of the last five RTTs as the current network latency indicator. Simultaneously, the main control MCU 6, knowing the Ethernet physical layer rate is 100 Mbit / s and taking an efficiency coefficient of 0.8, calculates the effective bandwidth (BW). The single-channel data volume (D) is 4096 bytes, and the system's maximum allowable transmission delay is... If the time is 20ms, then calculate the number of transmittable channels. Set the channel number threshold to min( ,10), and the lower limit is 1. When the RTT exceeds 50ms, the main control MCU6 decrements the current threshold by 1, maintains the value for two calculation cycles, and then updates it again according to the formula to quickly adapt to network degradation.
[0062] In Example 4, the ping-pong switching operation in step 3 is limited to the protection interval of the multi-channel time-division trigger acquisition. The ping-pong switching control signal is synchronized with the acquisition timing control signal to ensure that the switching does not interfere with the ongoing data acquisition.
[0063] By adopting the above technical solution, the clock-triggered management module 2 outputs a synchronization pulse signal to the main control MCU6 during the protection interval after each round of three-channel acquisition. The main control MCU6 only executes the switching condition judgment and ping-pong switching operation in step 3 when it detects this synchronization pulse. When the switching condition is met, the main control MCU6 completes the read / write enable switching of the first FIFO and the second FIFO in the dual FIFO ping-pong buffer module 3 and clears the counter during the effective period of the synchronization pulse, ensuring that the switching action always occurs during the idle period without radar trigger acquisition, thereby completely avoiding digital noise interference with analog signal acquisition caused by switching.
[0064] In Example 5, the timeout threshold in step 5 is dynamically adjusted based on the statistical characteristics of the channel spacing and the network round-trip delay. When abnormal timeouts occur consecutively and the network delay increases, the timeout threshold is automatically increased; when the channel spacing is regular and the network is unobstructed, the timeout threshold is automatically decreased.
[0065] By adopting the above technical solution, the main control MCU6 records the time interval between adjacent channel writes to the FIFO each time and calculates the standard deviation σ of the most recent 20 intervals. Simultaneously, the network status monitoring module 4 provides the current RTT value and timeout threshold. ,in Take 4ms. Take 2, Take 0.5, This represents the difference between the current RTT and the baseline RTT. When the system experiences consecutive abnormal timeouts and the network RTT shows an increasing trend, Automatically increases to avoid frequent forced handovers due to occasional network jitter; standard deviation of the current lane spacing. When the latency is less than 0.1ms and the network is unobstructed, Automatically reduced to near This ensures the sensitivity of anomaly detection.
[0066] Example 6, the interrupted forced switch performed in step 5 when another FIFO is busy further includes:
[0067] Save the current read pointer and remaining track number information of the interrupted FIFO; disable the write enable of the currently written FIFO and force it to be enabled for reading, and read all data tracks at once; add an exception interruption priority flag and exception event record to each data track, encapsulate it into a priority network frame, and send it immediately through the priority transmission queue; after the priority frames have been sent, clear the FIFO and mark it as idle; resume the read operation of the interrupted FIFO, continue to read its remaining data tracks from the saved context and send them normally.
[0068] By adopting the above technical solution, after responding to the interrupt request generated by the timeout detection control unit 5, the main control MCU6 immediately enters the interrupt service routine. First, it pushes the read pointer register and the remaining track counter value of the FIFO currently being read onto the stack for storage. Then, it disables the write enable of the currently written FIFO and enables its read enable via hardware control signals, and sets the priority read flag. The main control MCU6 moves all data tracks from the FIFO to the priority transmit buffer in memory at once via DMA. Each data track is encapsulated together with the acquired data after adding a one-byte exception interrupt priority flag 0xAA and a four-byte exception event record. The encapsulated priority frame is sent to the priority transmit queue of the Ethernet MAC, and the hardware guarantees priority transmission. After the DMA transfer is completed and an interrupt is triggered, the main control MCU6 clears the memory array of the FIFO and resets its read and write pointers, setting its state to idle. Finally, it restores the read pointer and remaining track count of the interrupted FIFO from the stack, re-enables its read operation, continues reading from the breakpoint, and encapsulates and transmits normally.
[0069] Example 7: The abnormal event record includes at least the timestamp of the timeout, the number of channels currently written into the FIFO, and the channel number of the last data channel.
[0070] By adopting the above technical solution, the abnormal event record contains three fields: the timestamp of the timeout occurrence, taken from the high-precision timer inside the autonomous control MCU6 with a precision of 1μs; the number of channels currently written into the FIFO, an unsigned 8-bit integer; and the channel number of the last data channel, an unsigned 32-bit integer. This record, totaling 7 bytes, is immediately following the abnormal interrupt priority identifier and encapsulated in the frame header extension of the priority frame, allowing the host computer 8 to parse the abnormal information and adjust subsequent processing strategies.
[0071] Example 8 also includes step 6, where the main control MCU6 evaluates the motion state of the pipeline robot based on the loss status of the encoder pulse signal, and adds mileage prediction loss information to the priority frame to the host computer 8 for data interpolation compensation.
[0072] By adopting the above technical solution, the main control MCU6 assesses the motion state of the pipeline robot based on the loss status of the encoder pulse signal, and adds mileage prediction loss information to the sent priority frame for the host computer 8 to perform data interpolation compensation. When an abnormal timeout occurs in step 5 and a forced switch is initiated, the main control MCU6 immediately checks the changes in the encoder pulse interruption counter, identifies the missing encoder pulses within the timeout window, and then triggers the mileage prediction process.
[0073] Example 9, step 6, includes the following sub-steps:
[0074] Step 61: The main control MCU6 records the arrival time of the encoder pulses at a fixed period. When an abnormal timeout forced switch occurs in step 5, the number of encoder pulses lost during the timeout period is determined.
[0075] Step 62: Read the angular velocity data currently output by the gyroscope module, and combine it with the interval statistics of the last N valid pulses before the timeout to determine whether the pipeline robot is in a state of uniform motion or variable motion.
[0076] If the motion is determined to be uniform, the predicted lost mileage is calculated based on the last valid pulse interval before the timeout and the number of lost pulses, and a first confidence level is assigned.
[0077] If the motion is determined to be variable speed, the angular velocity data is used to calculate the rate of change of heading. Combined with the instantaneous velocity corresponding to the last valid pulse, the lost mileage is predicted by the kinematic integral model and assigned a second confidence level, wherein the second confidence level is lower than the first confidence level.
[0078] Step 63: The predicted lost mileage, confidence level, and number of lost pulses are used as mileage prediction loss information and appended as independent fields before the frame end check area of the priority frame for the host computer 8 to perform spatial interpolation compensation of radar data.
[0079] By adopting the above technical solution, in step 61, the main control MCU6 records the encoder pulse arrival time in the background at a fixed period of 1kHz and maintains a pulse interval circular buffer. When an abnormal timeout forced switch occurs in step 5, the main control MCU6 reads the timeout start time and end time, compares the pulse records, and determines the number M of encoder pulses lost during the timeout period.
[0080] Step 62: The main control MCU6 reads the three-axis angular velocity data currently output by the gyroscope module via the SPI interface. Simultaneously, it extracts the interval values of the last five valid encoder pulses before the timeout. If the standard deviation of these five intervals is less than 5% of the mean, the pipeline robot is determined to be in a uniform motion state. In this case, the predicted lost mileage is M multiplied by the pulse equivalent, which is known to be 0.33 mm, and a first confidence level of 0.98 is assigned. If the interval standard deviation exceeds the threshold, it is determined to be in a variable speed motion state. The main control MCU6 uses the Z-axis angular velocity data from the gyroscope module to calculate the heading change rate, combines it with the instantaneous velocity corresponding to the last valid pulse, calculates the arc length through a two-dimensional kinematic integral model, predicts the lost mileage, and assigns a second confidence level of 0.85. The first and second confidence levels are stored in floating-point form.
[0081] In step 63, the main control MCU6 appends the calculated predicted lost mileage, confidence level, and number of lost pulses M as mileage prediction loss information to the CRC checksum of the priority frame to be transmitted as an independent field. This field is 10 bytes long, containing 4 bytes of predicted lost mileage, 2 bytes of confidence level, and 4 bytes of number of lost pulses. After receiving this information, the host computer 8 performs spatial correction and interpolation compensation on the radar B-scan image using Kalman filtering or linear interpolation algorithms based on this information and the confidence level.
[0082] Example 10: Ground Penetrating Radar Data Transmission Control System Based on Dual FIFO Ping-Pong Buffer, used to implement a ground penetrating radar data transmission control method based on dual FIFO ping-pong buffer. The system includes a multi-channel ground penetrating radar front-end 1, a clock trigger management module 2, a dual FIFO ping-pong buffer module 3, a network status monitoring module 4, a timeout detection control unit 5, a main control MCU 6, and a network interface 7.
[0083] The multi-channel ground-penetrating radar front-end 1 is used to sequentially excite each channel radar antenna under the control of a time-division trigger signal and receive echoes, and output digitized channel data.
[0084] The clock trigger management module 2 is used to generate timing signals and protection intervals for time-division trigger acquisition;
[0085] The dual FIFO ping-pong buffer module 3 includes a first FIFO, a second FIFO, and a ping-pong switching controller;
[0086] The network status monitoring module is used to measure the network round-trip delay between the host computer 8 and the main control MCU 6 in real time and output it to the main control MCU 6.
[0087] The timeout detection control unit 5 is used to monitor the write interval of the current write FIFO. When an abnormal timeout is detected, a forced switch request is generated, and an interrupt signal is generated when the other FIFO is busy to trigger an interrupt-priority switch.
[0088] The main control MCU6 is communicatively connected to the multi-channel ground-penetrating radar front-end 1, clock trigger management module 2, dual FIFO ping-pong buffer module 3, network status monitoring module 4, and timeout detection control unit 5, respectively. It is used to perform dynamic channel number threshold calculation, normal ping-pong switching decision, data reading, encapsulation and transmission, and respond to the forced switching request to perform adaptive forced switching and interrupt-type priority transmission control. The network interface 7 is used to send the encapsulated network data frame to the host computer 8.
[0089] By adopting the above technical solution, the multi-channel ground-penetrating radar front-end 1 includes three independent radar transceiver channels. Each channel consists of a radar transmitter, a receiver, and an arc antenna. Under the control of a time-division trigger signal, they operate sequentially to complete the detection of different directions around the pipeline and output digitized pipeline data. The clock trigger management module 2 consists of a high-precision crystal oscillator and a timing generator, generating three trigger pulses with mutually spaced protection intervals, and simultaneously outputting a switching synchronization signal synchronized with the protection intervals. The dual FIFO ping-pong buffer module 3 is implemented using FPGA internal logic and includes a first FIFO, a second FIFO, and a ping-pong switching controller. The physical capacity of each FIFO is 80kB, supporting independent read / write enable and full / empty flag output. The network status monitoring module 4 is integrated into the Ethernet MAC layer driver of the main control MCU 6, responsible for periodically sending heartbeat packets and calculating round-trip delay. The timeout detection control unit 5 consists of MCU internal timer and comparator logic, monitoring the data update interval written to the FIFO in real time. Once a timeout occurs and the FIFO is not empty, a forced switching request and a necessary busy interrupt signal are output. The main control MCU6 is connected to the dual FIFO ping-pong buffer module 3 via the FSMC bus, and to the control interface of the gyroscope module and the multi-channel ground penetrating radar front-end 1 via the SPI bus. The main control MCU6 performs dynamic channel number threshold calculation, normal ping-pong switching decision, data reading, encapsulation, and transmission tasks. Upon receiving a forced switching request, it performs either a normal forced switching or an interrupt-based priority switching based on the state of the other FIFO. The Ethernet interface 7 uses a gigabit PHY chip to transmit the network data frames encapsulated by the main control MCU6 to the host computer 8. The host computer 8 runs data receiving and visualization software, distinguishes between received normal and priority frames, and performs data interpolation using mileage prediction loss information.
[0090] The following specific embodiments illustrate the implementation principle of the present invention:
[0091] After power-on, the ground-penetrating radar data transmission control system based on dual FIFO ping-pong buffers first performs step 1 for initialization. The main control MCU6 allocates a starting address of 0x20000000 and a starting address of 0x20020000 to its internal SRAM for the first FIFO and the second FIFO, respectively. Each buffer has a capacity of 80kB and can cache 10 complete ground-penetrating radar data channels. The main control MCU6 writes sampling parameters to the multi-channel ground-penetrating radar front-end 1 via the SPI interface: sampling frequency 200kHz, sampling precision 16-bit, and 2048 sampling points per channel. Simultaneously, the main control MCU6 configures the internal registers of the clock trigger management module 2, setting the trigger sequence of the three channels to channel 1, channel 2, and channel 3, with a protection interval of 150μs between channels. The clock trigger management module 2 also generates a synchronization pulse output during the protection interval after each round of acquisition. The internal timers and threshold registers of the network status monitoring module 4 and the timeout detection control unit 5 are initialized sequentially, with the initial value of the timeout threshold set to 5ms and the initial value of the dynamic channel number threshold set to 5.
[0092] After the system enters normal operation, step 2 begins multi-channel time-division trigger acquisition. The clock trigger management module 2 outputs a trigger pulse to channel 1 of the multi-channel ground-penetrating radar front-end 1. The radar transmitter of channel 1 emits electromagnetic waves with a center frequency of 1 GHz. After amplification, filtering, and analog-to-digital conversion, the receiver generates radar data containing 2048 16-bit sampling points. The data is sent to the main control MCU6 via a parallel bus. The main control MCU6 acquires the data in a DMA interrupt, adds a channel identifier 0x01 and the current channel number, and then writes it to the first FIFO via the FSMC bus. The channel counter of the first FIFO is incremented by 1. After channel 1 acquisition is completed, after a 150μs protection interval, the clock trigger management module 2 triggers channels 2 and 3 sequentially. The main control MCU6 acquires and writes data in the same way, with channel identifiers of 0x02 and 0x03 respectively, and the channel numbers incrementing continuously.
[0093] While data is being collected and written, the dynamic monitoring and ping-pong switching mechanism in step 3 continues to run. The network status monitoring module 4 constructs a heartbeat packet every 100ms, sends it to the host computer 8 via Ethernet interface 7, and starts a timer to wait for a response. Upon receiving a response packet, the network status monitoring module 4 calculates and saves the round-trip time (RTT). The main control MCU 6 takes the sliding average of the last five RTTs, combines it with the current effective bandwidth of 100 Mbit / s and the single-channel data volume of 4096 bytes, and calculates the RTT using the formula... The calculated number of transmittable channels is 3, so the dynamic channel threshold is updated to min(3,10)=3, with a lower limit of 1. The current write FIFO is the first FIFO. When its channel counter reaches 3, the main control MCU6 checks the status flag of the second FIFO. If the second FIFO is idle, the main control MCU6 does not switch immediately but waits for the clock to trigger the synchronization pulse from the management module 2. When the synchronization pulse arrives, the main control MCU6 disables the write enable and enables the read enable of the first FIFO via the ping-pong switching controller, setting the first FIFO to read mode; simultaneously, it enables the write enable and disables the read enable of the second FIFO, setting its status to write mode and clearing its channel counter. This process is completed within the guard interval, and the acquisition timing is unaffected.
[0094] In step 4, the main control MCU6 begins reading data from the first FIFO. After each 4096 bytes of data is read into the memory buffer, the main control MCU6 calls the CRC16 hardware calculation module to generate a checksum, and appends a 4-byte acquisition timestamp and a 2-byte channel number, encapsulating it into a network data frame with a frame header of 0x55AA and a total length of 4120 bytes. This frame is sent to the Ethernet MAC transmission descriptor and transported to the host computer 8 via the DMA channel of the Ethernet interface 7. When the read empty flag of the first FIFO is set, the main control MCU6 marks its status as idle, waiting for the next switch to the write state. At the same time, the acquired data is continuously written to the second FIFO, and the entire process is repeated cyclically.
[0095] When the pipeline robot experiences slippage or stalling, causing the encoder pulse output to pause, or when network congestion occurs due to processing bottlenecks in the host computer 8, the abnormal timeout forced switching mechanism in step 5 will intervene. The timeout detection control unit 5 detects that the first FIFO is not empty and that 6ms has elapsed since the last new channel was written, exceeding the current timeout threshold of 5ms. It immediately sets the abnormal timeout flag and generates an interrupt request. The main control MCU 6 responds to the interrupt and checks the status of the second FIFO: if the second FIFO is idle, the main control MCU 6 directly performs a standard ping-pong switch, reading the three channels of data accumulated in the first FIFO, encapsulating and sending them according to the normal process, and filling the extended field of the first frame header with an abnormal event record. If the second FIFO is in a read state and still has two channels of data to be read, the timeout detection control unit 5 generates a busy interrupt signal. The main control MCU 6 enters the interrupt-driven forced switching process: first, it pushes the second FIFO's read pointer 0x20020080 and the remaining channel number 2 onto the stack for storage. Next, the main control MCU6 disables the write enable of the first FIFO and forcibly enables its read enable via hardware control, sets the priority read flag, and initiates DMA to move all four tracks of data in the first FIFO to the priority transmit buffer at once. The main control MCU6 adds an exception interrupt priority flag (0xAA) and a 7-byte exception event record to each data track. This record includes a timestamp accurate to μs of the timeout occurrence, the track number in the first FIFO (4), and the last track number (1287). The encapsulated priority frame is immediately sent to the host computer 8 via the priority transmit queue and the hardware queue arbitration mechanism of the Ethernet MAC. After the DMA transfer completes and is interrupted, the main control MCU6 resets the read / write pointers of the first FIFO and marks it as idle. Finally, the main control MCU6 restores the read pointer and remaining track number (2) of the second FIFO from the stack, re-enables read operations, and continues to read the remaining data in the second FIFO and encapsulate and transmit it normally.
[0096] Simultaneously with the priority frame transmission, step 6 initiates mileage prediction loss compensation. In step 61, the main control MCU6 continuously records the encoder pulse arrival times at a frequency of 1kHz in the background. When an abnormal timeout occurs, the main control MCU6 compares the records of the timeout start and end times to determine that the number of lost encoder pulses M is 12. In step 62, the main control MCU6 reads the Z-axis angular velocity data from the gyroscope module via SPI and extracts the last 5 valid pulse intervals before the timeout from the pulse interval circular buffer. Its standard deviation is calculated to be 3% of the mean, which is less than the 5% threshold, thus determining that the pipeline robot is in a uniform motion state. The pulse equivalent is 0.33mm, and the predicted mileage loss is 12 multiplied by 0.33mm, equaling 3.96mm, and a first confidence level of 0.98 is assigned. In step 63, the main control MCU6 appends 10 bytes of mileage prediction loss information—4 bytes of predicted lost mileage (0x00000F78), 2 bytes of confidence (0x0062), and 4 bytes of lost pulse count (0x0000000C)—to the priority frame immediately before the CRC checksum at the end of the frame. After receiving the priority frame with the abnormal interruption priority flag 0xAA, the host computer 8 parses the abnormal event record and mileage prediction loss information, confirms that the data interruption point is located after channel number 1287, aligns the subsequently received channel data with the mileage of 3.96 mm, and uses linear interpolation with a confidence level of 0.98 as the weight to fill in the spatial location lost due to timeout, completing seamless compensation of the radar B-scan image.
[0097] Thus, the system ensures low-latency and reliable transmission of multi-channel radar data under complex conditions through the coordinated operation of dynamic threshold ping-pong switching and interrupt-based priority forced switching, and realizes spatial continuity of detection data by utilizing mileage prediction loss information.
[0098] The above are all preferred embodiments of the present invention and are not intended to limit the scope of protection of the present invention. Therefore, all equivalent changes made in accordance with the structure, shape and principle of the present invention should be covered within the scope of protection of the present invention.
Claims
1. A ground-penetrating radar data transmission control method based on dual FIFO ping-pong buffer, applied to a multi-channel ground-penetrating radar data acquisition system, characterized in that... Includes the following steps: Step 1: Initialize the ping-pong buffer module composed of the first FIFO and the second FIFO, and configure the sampling parameters of each channel of the ground penetrating radar and the timing and protection interval of the multi-channel time-division trigger acquisition; Step 2: Start the multi-channel ground penetrating radar time-division trigger acquisition according to the time sequence, and write the single-channel ground penetrating radar data obtained in each acquisition with the channel identifier and channel number into the FIFO currently in the writing state; Step 3: Monitor the number of channels stored in the current write FIFO in real time. When the number of channels reaches the channel threshold that is dynamically adjusted according to the network transmission status, and the other FIFO is in an idle state, perform a ping-pong switch: turn off the write enable of the current write FIFO and turn on its read enable, and switch the other FIFO to the write state. Step 4: The main control MCU (6) reads data from the FIFO in the read-out state one by one, adds a timestamp and verification information to each data and encapsulates it into a network data frame, and sends it to the host computer (8) via Ethernet. Step 5: When it is detected that the current write FIFO is not empty and the time interval since the last new track write exceeds the preset timeout threshold, an abnormal timeout is determined, and an adaptive forced switch is performed: If the other FIFO is idle at this time, a ping-pong switch is performed directly, and all the data currently written to the FIFO is read out and sent. If another FIFO is busy in the read state at this time, the read operation on the other FIFO is interrupted, all data currently written to the FIFO is forcibly read out, and a priority frame carrying the abnormal interrupt priority flag is sent to the host computer (8). After the priority frame is sent, the interrupted read operation is resumed.
2. The ground-penetrating radar data transmission control method based on dual FIFO ping-pong buffer as described in claim 1, characterized in that, In step 2, the multi-channel ground-penetrating radar time-division trigger acquisition is specifically as follows: according to the channel order, the radar transmitter and receiver of each channel are triggered sequentially at a preset protection interval. Each channel generates a ground-penetrating radar data containing 2048 sampling points and a sampling accuracy of 16 bits in a single acquisition.
3. The ground-penetrating radar data transmission control method based on dual FIFO ping-pong buffer as described in claim 2, characterized in that, The dynamic adjustment method for the channel number threshold mentioned in step 3 is as follows: The main control MCU (6) periodically measures the network round-trip delay between itself and the host computer (8), and calculates the number of channels that can be transmitted within the maximum transmission delay allowed by the system, based on the current effective transmission bandwidth of Ethernet and the amount of single-channel ground penetrating radar data. The threshold number of channels is set to the smaller value between the number of channels that can be transmitted and the maximum number of channels that the ping-pong buffer module can cache, and is updated in real time.
4. The ground-penetrating radar data transmission control method based on dual FIFO ping-pong buffer as described in claim 3, characterized in that, In step 3, the ping-pong switching operation is limited to the protection interval of the multi-channel time-division trigger acquisition. The ping-pong switching control signal is synchronized with the acquisition timing control signal to ensure that the switching does not interfere with the ongoing data acquisition.
5. The ground-penetrating radar data transmission control method based on dual FIFO ping-pong buffer according to claim 4, characterized in that, The timeout threshold mentioned in step 5 is dynamically adjusted based on the statistical characteristics of the channel spacing and the network round-trip delay. When abnormal timeouts occur consecutively and the network delay increases, the timeout threshold is automatically increased; when the channel spacing is regular and the network is unobstructed, the timeout threshold is automatically decreased.
6. The ground-penetrating radar data transmission control method based on dual FIFO ping-pong buffer according to claim 5, characterized in that, The interrupt-forced switch performed in step 5 when another FIFO is busy further includes: Save the current read pointer and remaining track number information of the interrupted FIFO; disable the write enable of the currently written FIFO and force it to be enabled for reading, and read all data tracks at once; add an exception interruption priority flag and exception event record to each data track, encapsulate it into a priority network frame, and send it immediately through the priority transmission queue; after the priority frames have been sent, clear the FIFO and mark it as idle; resume the read operation of the interrupted FIFO, continue to read its remaining data tracks from the saved context and send them normally.
7. The ground-penetrating radar data transmission control method based on dual FIFO ping-pong buffer as described in claim 6, characterized in that, The exception event log should include at least the timestamp of the timeout, the number of channels currently written into the FIFO, and the channel number of the last data channel.
8. The ground-penetrating radar data transmission control method based on dual FIFO ping-pong buffer according to claim 7, characterized in that, It also includes step 6, where the main control MCU (6) assesses the motion state of the pipeline robot based on the loss state of the encoder pulse signal, and adds mileage prediction loss information to the priority frame sent for the host computer (8) to perform data interpolation compensation.
9. The ground-penetrating radar data transmission control method based on dual FIFO ping-pong buffer as described in claim 8, characterized in that, Step 6 includes the following sub-steps: Step 61, the main control MCU (6) records the arrival time of the encoder pulse at a fixed period. When an abnormal timeout forced switch occurs in step 5, the number of encoder pulses lost during the timeout period is determined. Step 62: Read the angular velocity data currently output by the gyroscope module, and combine it with the interval statistics of the last N valid pulses before the timeout to determine whether the pipeline robot is in a state of uniform motion or variable motion. If the motion is determined to be uniform, the predicted lost mileage is calculated based on the last valid pulse interval before the timeout and the number of lost pulses, and a first confidence level is assigned. If the motion is determined to be variable speed, the rate of change of heading is calculated using angular velocity data. Combined with the instantaneous velocity corresponding to the last valid pulse, the lost mileage is predicted using a kinematic integral model and assigned a second confidence level, which is lower than the first confidence level. Step 63: The predicted lost mileage, confidence level and number of lost pulses are used as mileage prediction loss information and are appended to the frame end check area of the priority frame as an independent field for the host computer (8) to perform spatial interpolation compensation of radar data.
10. A ground-penetrating radar data transmission control system based on dual FIFO ping-pong buffers, characterized in that: To implement the ground-penetrating radar data transmission control method based on dual FIFO ping-pong buffer as described in claim 9, the system includes a multi-channel ground-penetrating radar front-end (1), a clock trigger management module (2), a dual FIFO ping-pong buffer module (3), a network status monitoring module (4), a timeout detection control unit (5), a main control MCU (6), and a network interface (7). The multi-channel ground-penetrating radar front end (1) is used to sequentially excite each channel radar antenna under the control of the time-division trigger signal and receive echoes, and output digitized channel data. The clock trigger management module (2) is used to generate the timing signals and protection intervals for time-division trigger acquisition; The dual FIFO ping-pong buffer module (3) includes a first FIFO, a second FIFO, and a ping-pong switching controller; The network status monitoring module is used to measure the network round-trip delay between the network and the host computer (8) in real time and output it to the main control MCU (6). The timeout detection control unit (5) is used to monitor the write interval of the current write FIFO, generate a forced switch request when an abnormal timeout is detected, and generate an interrupt signal to trigger an interrupt-priority switch when the other FIFO is busy. The main control MCU (6) is connected to the multi-channel ground-penetrating radar front end (1), clock trigger management module (2), dual FIFO ping-pong buffer module (3), network status monitoring module (4) and timeout detection control unit (5) respectively. It is used to perform dynamic channel number threshold calculation, normal ping-pong switching decision, data reading, encapsulation and transmission, and respond to forced switching requests to perform adaptive forced switching and interrupt-type priority transmission control. The network interface (7) is used to send the encapsulated network data frame to the host computer (8).