A power processing method, device, equipment and medium

Abstract

The application discloses a power processing method and device, equipment and medium, and relates to the technical field of computers. The method comprises the following steps: accumulating pulse energy generated by a current interruption to a random access memory to obtain first pulse power corresponding to a single-byte storage bit width and second pulse power corresponding to a double-byte storage bit width; refreshing the total power accumulated by an electric meter in the random access memory by using the first pulse power that passes the check and the second pulse power that passes the check to obtain target power; determining whether a preset storage trigger condition is met; and if the preset storage trigger condition is met, writing the target power that passes the check to a storage area of an electrically erasable programmable read-only memory. It can be seen that the application avoids the delay problem of real-time writing to the EEPROM, realizes data alignment, and greatly reduces the erasing and writing times of the EEPROM.

Description

Technical Field

[0001] This invention relates to the field of computer technology, and in particular to a power processing method, apparatus, device, and medium. Background Technology

[0002] The market competition in the three-phase smart meter industry is becoming increasingly fierce, and cost control is a key factor in enhancing product competitiveness. Existing products generally use ferroelectric memory (FEM) for metering storage, which features fast write speeds, no access latency, and no write / erase lifespan limitations, and is already in mass production. To reduce material costs, this project proposes to replace the FEM with conventional EEPROM (Electrically Erasable Programmable Read-Only Memory), completely replicating the original functions without changing the existing hardware architecture, thus ensuring product performance and quality.

[0003] However, the alternative has the following problems: First, the three-phase electricity meter has a large amount of metering data, and the EEPROM writing takes a long time, making it difficult to achieve instantaneous reliable storage in abnormal power outage scenarios; second, due to the limitation of the writing rate, sudden power outages can easily cause misalignment of metering data such as forward and reverse electricity, phase and total electricity; third, general-purpose EEPROMs have a fixed upper limit for erasure and writing, and frequent data saving may lead to insufficient service life. Summary of the Invention

[0004] In view of this, the purpose of this invention is to provide a power processing method, apparatus, device, and medium that avoids the delay problem of real-time writing to EEPROM, achieves data alignment, and significantly reduces the number of EEPROM erase / write cycles. The specific solution is as follows: In a first aspect, this application discloses a power processing method, including: The pulse energy generated by the current interrupt is accumulated into the random access memory to obtain the first pulse energy corresponding to the single-byte storage width and the second pulse energy corresponding to the double-byte storage width. The total electricity consumption of the meter in the random access memory is refreshed using the first pulse electricity consumption that has passed verification and the second pulse electricity consumption that has passed verification, so as to obtain the target electricity consumption. Determine whether the preset storage trigger conditions are met; If the preset storage trigger condition is met, the target power that has passed the verification will be written to the storage area of ​​the electrically erasable programmable read-only memory.

[0005] Optionally, before accumulating the pulse energy generated by the current interrupt to the random access memory, the method further includes: The pulse energy generated by the interrupt is saved to a temporary variable, and a lock operation is performed on the temporary variable to prevent interrupt reentrancy. Accordingly, the pulse energy generated by the current interrupt is accumulated into the random access memory, including: According to a preset period, the pulse energy in the temporary variable is accumulated to the random access memory.

[0006] Optionally, the preset storage trigger condition includes a first storage trigger condition where the second pulse power reaches a preset power threshold. Correspondingly, the step of writing the verified target power to the storage area of ​​the electrically erasable programmable read-only memory if the preset storage trigger condition is met includes: If the second pulse power reaches the preset power threshold, the verified target power is written to the quantitative storage area of ​​the electrically erasable programmable read-only memory. Clear the second pulse charge.

[0007] Optionally, the preset storage trigger condition includes a second storage trigger condition where the meter's timing reaches a preset storage time. Correspondingly, the step of writing the verified target electricity amount to the storage area of ​​the electrically erasable programmable read-only memory if the preset storage trigger condition is met includes: If the meter's timing reaches the preset storage time, the verified target electricity amount is written to the timing storage area of ​​the electrically erasable programmable read-only memory.

[0008] Optionally, the power processing method further includes: If any verification fails, the historical power level is read from the electrically erasable programmable read-only memory, and the abnormal power level in the random access memory is restored based on the historical power level.

[0009] Optionally, if any verification fails, the step of reading historical power levels from the electrically erasable programmable read-only memory and restoring abnormal power levels in the random access memory based on the historical power levels includes: If the target power verification fails, historical power data is read from the quantitative storage area or the timed storage area of ​​the electrically erasable programmable read-only memory. The target power level is restored based on the verified historical power data.

[0010] Optionally, the power processing method further includes: After the target power is obtained by refreshing based on the first pulse power and the second pulse power, if the verification of the target power passes and the verification of the first pulse power or the second pulse power fails, the historical pulse power is read from the target storage area; wherein, the target storage area is the most recently used storage area in the electrically erasable programmable read-only memory. Based on the verified historical pulse charge, the first pulse charge or the second pulse charge in the random access memory is recovered.

[0011] Secondly, this application discloses an energy processing device, comprising: The pulse energy accumulation module is used to accumulate the pulse energy generated by the current interrupt to the random access memory to obtain the first pulse energy corresponding to the single-byte storage width and the second pulse energy corresponding to the double-byte storage width. The target power consumption refresh module is used to refresh the total cumulative power consumption of the electricity meter in the random access memory using the verified first pulse power consumption and the verified second pulse power consumption to obtain the target power consumption. The storage condition judgment module is used to determine whether the preset storage trigger conditions are met; The power storage and writing module is used to write the verified target power to the storage area of ​​the electrically erasable programmable read-only memory if the preset storage trigger condition is met.

[0012] Thirdly, this application discloses an electronic device, comprising: Memory, used to store computer programs; A processor is used to execute the computer program to implement the aforementioned power processing method.

[0013] Fourthly, this application discloses a computer-readable storage medium for storing a computer program; wherein, when the computer program is executed by a processor, it implements the aforementioned power processing method.

[0014] As can be seen, this application proposes a power consumption processing method, including: accumulating the pulse energy generated by the current interrupt to a random access memory to obtain a first pulse power consumption corresponding to a single-byte storage width and a second pulse power consumption corresponding to a double-byte storage width; refreshing the total power consumption of the electricity meter in the random access memory using the verified first pulse power consumption and the verified second pulse power consumption to obtain a target power consumption; determining whether a preset storage trigger condition is met; and if the preset storage trigger condition is met, writing the verified target power consumption to the storage area of ​​an electrically erasable programmable read-only memory. As can be seen, this application accumulates the pulse energy generated by the current interrupt to the random access memory (RAM) to obtain a first pulse energy corresponding to a single-byte storage width and a second pulse energy corresponding to a double-byte storage width. Utilizing the high-speed read / write characteristics of RAM avoids the latency problem of real-time writing to EEPROM, thus solving the fast storage problem. Subsequently, the verified first pulse energy and verified second pulse energy are used to refresh the total electricity consumption of the meter in the RAM to obtain the target energy. RAM is used as an intermediate buffer to temporarily store and verify the energy data, ensuring the consistency and reliability of the refreshed target energy, thus solving the data alignment problem. It then determines whether a preset storage trigger condition is met. If the preset storage trigger condition is met, the verified target energy is written to the storage area of ​​the electrically erasable programmable read-only memory (EEPROM). Using condition-triggered writing instead of writing with every pulse significantly reduces the number of EEPROM erase / write cycles, thus solving the lifespan problem. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0016] Figure 1 This is a flowchart of a power processing method disclosed in this application; Figure 2 This is a schematic diagram of the structure of an electricity processing device disclosed in this application; Figure 3 This is a structural diagram of an electronic device disclosed in this application. Detailed Implementation

[0017] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0018] To reduce material costs, the project plans to use conventional EEPROMs instead of ferroelectric memory, for example, using a multi-storage-area approach. Theoretically, a three-phase meter needs 10 storage areas to store 1 kWh of electricity at a time. However, the alternative has the following problems: 1. Three-phase meters have a large amount of metering data, and EEPROM writing takes a long time, making it difficult to achieve instantaneous reliable storage in abnormal power outage scenarios; 2. Due to the limitation of the write rate, sudden power outages can easily cause misalignment of metering data such as forward and reverse electricity, phase-specific electricity, and total electricity; 3. General-purpose EEPROMs have a fixed write / erase limit, and frequent data saving may lead to insufficient lifespan.

[0019] To address this, this application proposes a power handling scheme that avoids the delay problem of real-time writing to EEPROM, achieves data alignment, and significantly reduces the number of times EEPROM can be erased and written.

[0020] This application discloses a power consumption processing method. See also Figure 1 As shown, the method includes: Step S11: Accumulate the pulse energy generated by the current interrupt to the random access memory to obtain the first pulse energy corresponding to the single-byte storage width and the second pulse energy corresponding to the double-byte storage width.

[0021] It should be noted that the interrupt is a metering sampling interrupt. When the metering chip inside the three-phase smart meter collects the power pulse in the power grid, it triggers the metering sampling interrupt to the main control chip (Microcontroller Unit, MCU), thereby generating pulse energy in real time. The pulse energy includes, but is not limited to, active pulse increment, reactive pulse increment, apparent pulse increment, and phase loss pulse increment.

[0022] Furthermore, the various pulse energies generated by the current interrupt are synchronously accumulated to a designated accumulation unit in the Random Access Memory (RAM). It should be noted that during the accumulation process, depending on the subsequent application functions, two different pulse energy data with different storage widths are synchronously generated: one is the first pulse energy adapted to a single-byte storage width, namely U8 (Unsigned 8-bit Integer), which is used for subsequent demand calculation functions; the other is the second pulse energy adapted to a double-byte storage width, namely U16 (Unsigned 16-bit Integer), which is used for subsequent quantitative and timing storage EEPROM calculations. In this way, the synchronous calculation and storage of the two types of pulse energy, U8 and U16, are achieved.

[0023] For example, assuming each pulse corresponds to 0.001 kWh of energy, within the pulse statistics period, the metering chip accumulates a total of 1250 pulses, corresponding to a cumulative energy of 1.250 kWh. During the accumulation process, the system simultaneously performs splitting: the first pulse energy, adapted to a single-byte width, stores only the lower 8 bits, i.e., the remainder of 1250 divided by 256 is 226, corresponding to 0.226 kWh, used for demand calculation. This value overflows and resets to zero after accumulating to 256. The second pulse energy, adapted to a double-byte width, stores all 1250 pulses, corresponding to 1.250 kWh, used for quantitative and timed EEPROM calculation. It can be seen that through the above mechanism, the U8 pulse energy meets the real-time requirements of demand calculation, and the U16 pulse energy provides accurate cumulative data for EEPROM storage. The two are operated synchronously, balancing real-time performance and storage reliability.

[0024] Based on this, before accumulating the pulse energy generated by the current interrupt to the random access memory (RAM), the method further includes: saving the pulse energy generated by the interrupt to a temporary variable and performing a lock operation on the temporary variable to prevent interrupt re-entry, i.e., allowing only one interrupt routine to access the temporary variable at any given time; correspondingly, accumulating the pulse energy generated by the current interrupt to the RAM includes: accumulating the pulse energy in the temporary variable to the RAM according to a preset period (e.g., one processing cycle per second). In this way, the technical effect of the above setting is that by adding a temporary variable as a buffer before writing the pulse energy to the RAM, and cooperating with the lock operation, it can effectively prevent data corruption or data loss caused by interrupt re-entry; on the other hand, by merging the pulse energy triggered by the interrupt and writing it to the RAM in a unified manner, the real-time write frequency to the RAM is reduced, the bus load is alleviated, and the system's operational stability and data integrity are improved in high-frequency pulse sampling scenarios.

[0025] Step S12: Use the verified first pulse power and the verified second pulse power to refresh the total power consumption of the meter in the random access memory to obtain the target power.

[0026] In this embodiment, before each update of the total electricity consumption in RAM, the first pulse electricity consumption and the second pulse electricity consumption are each subject to a double check using CRC16 (Cyclic Redundancy Check 16-bit) and checksum. After all checks pass, the second pulse electricity consumption is used as the total electricity consumption increment to refresh the total electricity consumption of the meter and generate the target electricity consumption. The first pulse electricity consumption is written as the demand increment in RAM to the corresponding storage location. The two pulses refresh different partitions in RAM respectively, working together to complete the data refresh of the entire RAM electricity consumption area. After the refresh, the target electricity consumption needs to be double checked again (i.e., CRC16 check and checksum). After passing the checksum check, it is used for load calculation, display, communication, and settlement.

[0027] It should be noted that CRC16 is a cyclic redundancy check algorithm that calculates a 16-bit checksum from the data, capable of detecting multi-bit errors and burst errors. Checksum, on the other hand, simply adds up all data bytes and takes the last 8 or 16 bits as the check value; it requires less computation and can detect single-byte errors. Combining CRC16 and checksum methods can significantly improve data reliability.

[0028] Demand refers to the average power consumption of a user within a specified statistical period (e.g., 15 minutes). Power companies commonly use this indicator to calculate demand-based electricity charges. The first pulse's power consumption uses a single-byte storage width for demand-related functions. During demand calculation, the system directly reads the current accumulated value of this single-byte pulse for calculation. After the calculation is completed, it automatically overflows and returns to zero to begin the accumulation for the next demand cycle. The second pulse's power consumption uses a double-byte storage width for timed and quantitative backups. It can completely accumulate power consumption data over a longer period, providing accurate data for EEPROM storage.

[0029] Step S13: Determine whether the preset storage trigger condition is met.

[0030] In this embodiment, the preset storage trigger condition includes a first storage trigger condition where the second pulse power reaches a preset power threshold, and a second storage trigger condition where the meter timing reaches a preset storage time. The preset power threshold and preset storage time can be determined according to actual computational needs, and the meter timing is provided by the meter's internal real-time clock.

[0031] Step S14: If the preset storage trigger condition is met, the target power that has passed the verification is written to the storage area of ​​the electrically erasable programmable read-only memory.

[0032] In a first specific embodiment, the step of writing the verified target power to the storage area of ​​the electrically erasable programmable read-only memory if the preset storage trigger condition is met includes: if the second pulse power reaches the preset power threshold, writing the verified target power to the quantitative storage area of ​​the electrically erasable programmable read-only memory; and clearing the second pulse power.

[0033] In summary, the quantitative storage method uses the accumulated power as the trigger condition. An EEPROM write is performed only when the preset power threshold is reached. After the write, the double-byte pulse power is cleared and re-accumulated, thereby controlling the number of EEPROM erase and write cycles within a reasonable range.

[0034] In the second specific implementation, the preset storage trigger condition includes a second storage trigger condition where the meter timing time reaches a preset storage time. Correspondingly, the step of writing the verified target electricity amount to the storage area of ​​the electrically erasable programmable read-only memory if the preset storage trigger condition is met includes: if the meter timing time reaches the preset storage time, writing the verified target electricity amount to the timing storage area of ​​the electrically erasable programmable read-only memory.

[0035] In summary, the timed storage method uses time as the trigger condition, serving as a supplement to the quantitative storage method. It solves the problem that quantitative storage cannot be triggered for a long time when the meter is running at low current, ensuring that electricity data can be saved regularly.

[0036] This avoids the frequent EEPROM write operations triggered by each pulse energy generation, effectively extending the lifespan of the EEPROM.

[0037] As can be seen, this application proposes a power consumption processing method, including: accumulating the pulse energy generated by the current interrupt to a random access memory to obtain a first pulse power consumption corresponding to a single-byte storage width and a second pulse power consumption corresponding to a double-byte storage width; refreshing the total power consumption of the electricity meter in the random access memory using the verified first pulse power consumption and the verified second pulse power consumption to obtain a target power consumption; determining whether a preset storage trigger condition is met; and if the preset storage trigger condition is met, writing the verified target power consumption to the storage area of ​​an electrically erasable programmable read-only memory. As can be seen, this application accumulates the pulse energy generated by the current interrupt to the random access memory (RAM) to obtain a first pulse energy corresponding to a single-byte storage width and a second pulse energy corresponding to a double-byte storage width. Utilizing the high-speed read / write characteristics of RAM avoids the latency problem of real-time writing to EEPROM, thus solving the fast storage problem. Subsequently, the verified first pulse energy and verified second pulse energy are used to refresh the total electricity consumption of the meter in the RAM to obtain the target energy. RAM is used as an intermediate buffer to temporarily store and verify the energy data, ensuring the consistency and reliability of the refreshed target energy, thus solving the data alignment problem. It then determines whether a preset storage trigger condition is met. If the preset storage trigger condition is met, the verified target energy is written to the storage area of ​​the electrically erasable programmable read-only memory (EEPROM). Using condition-triggered writing instead of writing with every pulse significantly reduces the number of EEPROM erase / write cycles, thus solving the lifespan problem.

[0038] This application discloses a specific power consumption processing method. Compared with the previous embodiment, this embodiment describes and optimizes the recovery mechanism when data is abnormal, specifically including: If any verification fails, the historical power level is read from the electrically erasable programmable read-only memory, and the abnormal power level in the random access memory is restored based on the historical power level.

[0039] On the one hand, if the target power consumption verification fails, historical power consumption data is read from the quantitative storage area or the timed storage area of ​​the electrically erasable programmable read-only memory (EEPROM); the target power consumption is restored based on the historical power consumption data that has passed verification. In other words, when the total cumulative power consumption (target power consumption) in the RAM is abnormal, the system reads historical power consumption data from the quantitative storage area or the timed storage area of ​​the EEPROM (any data that passes verification can be used for restoration). Once the historical power consumption data passes verification, it is used to restore the target power consumption, ensuring the accuracy of the total cumulative power consumption displayed by the meter.

[0040] On the other hand, after refreshing the target power based on the first pulse power and the second pulse power, if the verification of the target power passes, but the verification of the first pulse power or the second pulse power fails, then the historical pulse power is read from the target storage area; wherein, the target storage area is the most recently used storage area in the electrically erasable programmable read-only memory; based on the verified historical pulse power, the first pulse power or the second pulse power in the random access memory is restored. Considering that the first pulse power and the second pulse power are updated frequently in RAM, there is a certain time between refreshing the target power and performing verification on the target power. During this time, the U8 or U16 pulse power may be mistakenly written, while the target power is unaffected. Therefore, it is possible that the target power verification passes, but the verification of the first pulse power or the second pulse power fails. In this case, the system reads the historical pulse power from the most recently written storage area in the EEPROM, and restores the abnormal pulse power after verification to ensure the consistency of the power data in RAM. It should be noted that selecting the most recently used storage area for power restoration has the following effect: ensuring that the restored pulse power is closest to the actual value before the anomaly occurred.

[0041] This solution adopts a hybrid storage approach: RAM is used as the primary storage, while EEPROM is only used for storage when specific timing and quantity requirements are met. A performance comparison between this hybrid storage approach and the traditional multi-storage area approach is detailed in Table 1. In terms of resource consumption, the multi-storage area approach requires larger storage capacity; hybrid storage can utilize existing hardware resources without additional expansion. Regarding data consistency, the multi-storage area approach stores and recovers active, reactive, apparent, and phase-specific electricity data independently in separate areas. Repairing a single data item can easily lead to inaccuracies and corruption of related electricity data, making data synchronization and management difficult. Hybrid storage uses a dual verification scheme of CRC16 and checksum for RAM block data, performing unified verification on a whole data block basis. In case of local data anomalies, it can roll back to the previous set of valid and complete data blocks, ensuring the consistency of all electricity data. In terms of anti-interference performance, multiple storage areas require frequent reading and writing of EEPROM partitions. EEPROM peripheral communication is susceptible to external radio interference, resulting in a high probability of errors and cumbersome steps for repairing faulty data. Hybrid storage significantly reduces the frequency of EEPROM reading and writing. Based on a hardware architecture with RAM running resident and dual power supplies, it avoids data anomalies caused by radio interference and has better anti-interference performance.

[0042] Table 1. Comparison of Multi-Storage Area and Hybrid Storage Methods

[0043] Based on the overall technical solution of the aforementioned power processing method, the design is completed by combining three aspects: pulse storage structure, Read_Energy pulse processing function, and EEPROM lifespan calculation. (1) The pulse storage structure occupies 74 bytes of storage space. Internally, it distinguishes between two types of pulse statistics: uint8_t single-byte variables and uint16_t double-byte variables. The single-byte variables cover metering parameters such as forward active power, reverse active power, forward reactive power, reverse reactive power, four-quadrant reactive power, ABC phase pulses, transformer loss pulses, and current line loss pulses, which serve as the first pulse energy corresponding to the demand calculation. The double-byte variables correspond one-to-one with the above pulse statistics items, and the tail is configured with a CS check field, which serves as the second pulse energy for EEPROM timing and quantitative settlement. (2) The Read_Energy function is used to process the pulse energy sent by the interrupt. When the function is executed, the temporary pulse register TmpPulse is cleared first and the pulse energy accumulation enable is turned off. The EC_Pulse pulse data generated by the interrupt is cached in TmpPulse. Then the accumulation enable is turned on, and the phase and total pulse summaries and four-quadrant reactive pulse conversions are completed in sequence. After all the pulse data in the cache is summarized, it is stored in the pulse storage structure. Finally, the CS (Check Sum) check is performed on the entire storage structure. (3) In terms of selecting the storage trigger threshold, the calculation is carried out in combination with the EEPROM hardware life parameters. The minimum erase and write life of the device is 4 million times and the whole machine usage cycle of the electricity meter is 20 years as the calculation benchmark. The maximum number of erase and write cycles allowed per day and per hour and the minimum write interval are calculated. Based on this, a dual backup strategy of 5-minute timed storage and 5 kWh electricity quantitative storage is configured. After load power calculation, the storage frequency is far lower than the EEPROM limit erase and write frequency, which ensures that the electricity data is saved on time and leaves sufficient chip lifespan redundancy. The relevant parameters are clearly defined. Single-byte pulse data is used for demand calculation and various electricity conversion calculations in RAM. Double-byte pulse data is used for 5 kWh quantitative metering and EEPROM storage refresh.

[0044] Furthermore, a periodic scheduling mechanism is used to complete real-time power calculation and quantitative storage determination, specifically implemented by the ECMeasure function: The ECMeasure function is a periodic scheduling processing function that is triggered to run every second. At the beginning of the run, parameter change verification and power supply status verification are completed sequentially. Subsequent logic is only executed when the verification results meet the requirements. The function first calls the CheckEnergyData function to complete abnormal power verification and fault data repair. Based on the pulse statistics obtained by the Read_Energy function, subsequent processing is carried out. On the one hand, the demand-related power conversion calculation is completed based on the single-byte U8 pulse data inside the MPULSE structure. On the other hand, the metered power calculation is completed based on the double-byte U16 pulse data. The total power collection of 8 categories, the three-phase phase power summary, and the voltage and current loss power statistics are completed sequentially. The full power cache data corresponding to MemoryEnergy, PhaseEng, and VolCurr on the RAM side are updated simultaneously. After completing various power calculations, the MPULSE pulse value and the corresponding verification field are refreshed synchronously. The RAM quantitative storage trigger conditions are checked according to preset judgment rules. The trigger conditions include four scenarios: the current cumulative electricity exceeds 5kWh, the storage interval is 30 minutes, the rate changes, and there is a 10-second delay after the daily settlement is completed. After the conditions are met, the calculated quantitative electricity is written to the quantitative main storage area first. After writing, the storage validity is checked. If the verification is correct, the data is backed up to the quantitative backup storage partition. Finally, the MPULSE internal pulse and verification data are updated again. If the storage conditions are not met, the current processing flow ends directly. The data storage specifications are pre-quantified and divided. The total electricity of 8 categories occupies 48 bytes per category, totaling 384 bytes. The three-phase phase electricity occupies 72 bytes. The voltage and current loss electricity occupies 96 bytes. The entire set of quantitative electricity storage content occupies 552 bytes. The data writing and backup operations can be completed within 215 milliseconds under the condition of MCU main frequency of 20M. At the same time, the RAM electricity trigger refresh is driven by two types of events: electricity pulse change and phase parameter change. Relying on the architecture of the U8 and U16 pulse data partitioning calculation, it is adapted to the differentiated data operation needs of demand calculation and quantitative electricity backup.

[0045] Furthermore, this application adds a timed storage mechanism, which completes backup data through an independent timed function: the power timing function uses the system clock as the basis for judgment and triggers the execution of timed storage logic at a preset time of 03:33:33 every day; if the time is not the corresponding time, the current process ends directly; after triggering storage, the function writes the full power data consisting of MemoryEnergy, PhaseEng, and voltage and current loss power VolCullEng in the RAM storage area into the E2 timed single backup area, and then completes the refresh of the pulse value in the RAM; the data structure of the E2 timed single backup area includes time stamp information. The system stores 8 categories of total power (384 bytes), 72 bytes of phase power, 96 bytes of voltage and current loss power, and 2 bytes of verification fields, totaling 559 bytes of data. Under the condition of MCU main frequency of 26MHz, the entire data backup and write operation takes 235 milliseconds. This timed backup block serves as an auxiliary power storage carrier for abnormal power. It is only activated in fault scenarios where RAM power data is corrupted or quantitative storage backup data fails to synchronize. Before being retrieved and used, a CRC16 check is performed. Only after the check is successful can it be used for data recovery of abnormal RAM power. Together with the aforementioned quantitative storage mechanism, it forms a timed and quantitative dual-path EEPROM backup scheme.

[0046] Furthermore, to ensure data reliability, this application configures a data verification and recovery mechanism, implemented by the CheckEnergyData function. CheckEnergyData is the core function for power failure detection and data recovery. This function executes a round of verification logic every second when the device is powered on, and triggers an additional full detection at the moment the device powers on. At the same time, it distinguishes three different operating scenarios and makes different judgment verification rules: Under normal power-on and power-off conditions, it first compares whether the RAM power time stamp and the power-off retention time stamp match. If they match, it then verifies the CRC check value. When the device is abnormally reset or there is no backup battery power, it limits the difference between the current system time and the RAM power storage time to no more than 2 minutes, and performs CRC validity verification under this premise. During the stable operation phase of the device, it only relies on the CRC check result to determine the data validity. When the function runs, it first performs CRC and time stamp compliance checks on the real-time power in the RAM area. If the check result is abnormal, it first retrieves the backup power variable K from the quantitative power storage area and checks the CRC data of variable K again. If the check is successful, it combines with the RAM area pulse variable M1 to generate a new real-time power P. If the check of variable K fails, it jumps to the timed power storage area to retrieve the backup variable Y. After the check of variable Y is successful, it calculates the real-time power based on variable Y and simultaneously clears the original RAM pulse data. If both the quantitative and timed backup data fail to be checked, it directly uses variable K to calculate the real-time power and clears the RAM pulse. If the real-time power in the RAM area is correct for the first time, it checks the CRC status of the RAM area pulse variable M1 separately. If the pulse check is abnormal, it reads the power-off backup pulse variable M2. If the check of variable M2 is normal, it uses M2 to overwrite and refresh M1. Otherwise, it clears the pulse area power and recalculates the real-time power P. The real-time power consumption in the RAM area is stored in BCD code format with 4 bytes of integer and 2 bytes of decimal. The data storage format of the quantitative power consumption storage area and the timed power consumption storage area is consistent with that of the real-time power consumption in the RAM area. The quantitative storage area is updated and written when four types of storage conditions are met, and the timed storage area is written once a day. The RAM area pulse integrates two types of pulse data, U8 and U16, and uses the same CRC to complete the verification. It should be noted that in this embodiment, software test points are reserved at each key processing node of the whole process, and the data recovery logic can be simulated and verified branch by branch.

[0047] Accordingly, this application also discloses a power processing device, see [link to relevant documentation]. Figure 2 As shown, the device includes: The pulse energy accumulation module 11 is used to accumulate the pulse energy generated by the current interrupt to the random access memory to obtain the first pulse energy corresponding to the single-byte storage width and the second pulse energy corresponding to the double-byte storage width. The target power refresh module 12 is used to refresh the total cumulative power consumption of the electricity meter in the random access memory using the first pulse power consumption that has passed the verification and the second pulse power consumption that has passed the verification, so as to obtain the target power consumption. The storage condition judgment module 13 is used to determine whether the preset storage trigger condition is met. The power storage and writing module 14 is used to write the verified target power to the storage area of ​​the electrically erasable programmable read-only memory if the preset storage trigger condition is met.

[0048] For more detailed information on the working process of each of the above modules, please refer to the relevant content disclosed in the foregoing embodiments, which will not be repeated here.

[0049] Furthermore, embodiments of this application also provide an electronic device. Figure 3 This is a structural diagram of an electronic device 20 according to an exemplary embodiment. The content of the diagram should not be construed as limiting the scope of this application.

[0050] Figure 3 This is a schematic diagram of the structure of an electronic device 20 provided in an embodiment of this application. The electronic device 20 may specifically include: at least one processor 21, at least one memory 22, a display screen 23, an input / output interface 24, a communication interface 25, a power supply 26, and a communication bus 27. The memory 22 stores a computer program, which is loaded and executed by the processor 21 to implement the relevant steps in the power processing method disclosed in any of the foregoing embodiments. Furthermore, the electronic device 20 in this embodiment may specifically be an electronic computer.

[0051] In this embodiment, the power supply 26 is used to provide operating voltage for each hardware device on the electronic device 20; the communication interface 25 can create a data transmission channel between the electronic device 20 and external devices, and the communication protocol it follows can be any communication protocol applicable to the technical solution of this application, and is not specifically limited here; the input / output interface 24 is used to acquire external input data or output data to the outside world, and its specific interface type can be selected according to specific application needs, and is not specifically limited here.

[0052] Furthermore, the memory 22, as a carrier for resource storage, can be a read-only memory, random access memory, disk, or optical disk, etc. The resources stored thereon can include computer programs 221, and the storage method can be temporary storage or permanent storage. The computer programs 221 may include, in addition to computer programs capable of performing the power processing method executed by the electronic device 20 as disclosed in any of the foregoing embodiments, computer programs capable of performing other specific tasks.

[0053] Furthermore, embodiments of this application also disclose a computer-readable storage medium for storing a computer program; wherein, when the computer program is executed by a processor, it implements the aforementioned power processing method.

[0054] For the specific steps of this method, please refer to the relevant content disclosed in the foregoing embodiments, which will not be repeated here.

[0055] The various embodiments in this application are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. For the same or similar parts between the various embodiments, refer to each other. As for the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple, and relevant parts can be referred to the method section.

[0056] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0057] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein can be implemented directly by hardware, a software module executed by a processor, or a combination of both. The software module can be located in random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.

[0058] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0059] The above provides a detailed description of the power processing method, apparatus, device, and storage medium provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A power processing method, characterized in that, include: The pulse energy generated by the current interrupt is accumulated into the random access memory to obtain the first pulse energy corresponding to the single-byte storage width and the second pulse energy corresponding to the double-byte storage width. The total electricity consumption of the meter in the random access memory is refreshed using the first pulse electricity consumption that has passed verification and the second pulse electricity consumption that has passed verification, so as to obtain the target electricity consumption. Determine whether the preset storage trigger conditions are met; If the preset storage trigger condition is met, the target power that has passed the verification will be written to the storage area of ​​the electrically erasable programmable read-only memory.

2. The power processing method according to claim 1, characterized in that, Before accumulating the pulse energy generated by the current interrupt to the random access memory, the method further includes: The pulse energy generated by the interrupt is saved to a temporary variable, and a lock operation is performed on the temporary variable to prevent interrupt reentrancy. Accordingly, the pulse energy generated by the current interrupt is accumulated into the random access memory, including: According to a preset period, the pulse energy in the temporary variable is accumulated to the random access memory.

3. The power processing method according to claim 1, characterized in that, The preset storage trigger condition includes a first storage trigger condition where the second pulse power reaches a preset power threshold. Correspondingly, the step of writing the verified target power to the storage area of ​​the electrically erasable programmable read-only memory if the preset storage trigger condition is met includes: If the second pulse power reaches the preset power threshold, the verified target power is written to the quantitative storage area of ​​the electrically erasable programmable read-only memory. Clear the second pulse charge.

4. The power processing method according to claim 1, characterized in that, The preset storage trigger condition includes a second storage trigger condition where the meter's timing reaches a preset storage time. Correspondingly, if the preset storage trigger condition is met, writing the verified target electricity amount to the storage area of ​​the electrically erasable programmable read-only memory includes: If the meter's timing reaches the preset storage time, the verified target electricity amount is written to the timing storage area of ​​the electrically erasable programmable read-only memory.

5. The power processing method according to claim 1, characterized in that, Also includes: If any verification fails, the historical power level is read from the electrically erasable programmable read-only memory, and the abnormal power level in the random access memory is restored based on the historical power level.

6. The power processing method according to claim 5, characterized in that, If any verification fails, the historical power consumption is read from the electrically erasable programmable read-only memory, and the abnormal power consumption in the random access memory is restored based on the historical power consumption, including: If the target power verification fails, historical power data is read from the quantitative storage area or the timed storage area of ​​the electrically erasable programmable read-only memory. The target power level is restored based on the verified historical power data.

7. The power processing method according to claim 5, characterized in that, Also includes: After the target power is obtained by refreshing based on the first pulse power and the second pulse power, if the verification of the target power passes and the verification of the first pulse power or the second pulse power fails, the historical pulse power is read from the target storage area; wherein, the target storage area is the most recently used storage area in the electrically erasable programmable read-only memory. Based on the verified historical pulse charge, the first pulse charge or the second pulse charge in the random access memory is recovered.

8. A power processing device, characterized in that, include: The pulse energy accumulation module is used to accumulate the pulse energy generated by the current interrupt to the random access memory to obtain the first pulse energy corresponding to the single-byte storage width and the second pulse energy corresponding to the double-byte storage width. The target power consumption refresh module is used to refresh the total cumulative power consumption of the electricity meter in the random access memory using the verified first pulse power consumption and the verified second pulse power consumption to obtain the target power consumption. The storage condition judgment module is used to determine whether the preset storage trigger conditions are met; The power storage and writing module is used to write the verified target power to the storage area of ​​the electrically erasable programmable read-only memory if the preset storage trigger condition is met.

9. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor for executing the computer program to implement the power processing method as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, Used to store a computer program; wherein, when the computer program is executed by a processor, it implements the power processing method as described in any one of claims 1 to 7.

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