Communication architecture of energy storage system, identification setting method and energy storage system

CN122659338APending Publication Date: 2026-08-28SUNGROW POWER SUPPLY CO LTD
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Patent Information

Application Number
CN202510231745.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-02-27
Publication Date
2026-08-28

AI Technical Summary

Technical Problem

但是随着储能系统的储能能力的提升,储能系统中电池簇的数量增加,管理电池簇的CMU的数量也会增加,这意味着一块CMU板上可能需要搭载两块或者更多数量的CMU芯片,而目前在烧录一块CMU板上的多个CMU芯片的初始程序时,会为多个CMU芯片烧录相同的CAN ID,导致出现地址重复的现象

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Abstract

The application discloses a communication architecture of an energy storage system, an identification setting method and the energy storage system, and relates to the technical field of energy storage. The communication architecture comprises a battery system controller (BSC), a plurality of battery cluster management units (CMUs) and a plurality of CMU boards. Each CMU is used for managing a corresponding battery cluster; the BSC and the CMUs communicate through a controller area network (CAN) bus; at least two CMUs are arranged on each CMU board, the CAN addresses of the at least two CMUs are different, and the combination modes of the levels connected to a first group of pins of each CMU in the at least two CMUs are different. The CAN ID of each CMU is associated with the combination mode of the levels connected to the first group of pins of the CMU, and the first group of pins comprises at least one pin. According to the scheme, when two or more CMUs are carried on one CMU board, the CAN IDs of different CMU chips are different, and the phenomenon of address repetition is avoided.
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Description

Technical Field

[0001] This application relates to the field of energy storage technology, and in particular to a communication architecture, identification setting method, and energy storage system for an energy storage system. Background Technology

[0002] Energy storage systems typically employ a Battery Management System (BMS) for battery management. Existing BMS communication architectures are generally three-tiered. In this architecture, the Battery Management Units (BMUs) of each cell within the battery cluster transmit information to the Cluster Management Unit (CMU) of the battery cluster via a daisy-chain topology. The CMUs then transmit this information to the Battery System Controller (BSC) via the Controller Area Network (CAN) bus. Finally, the BSC transmits this information to the Local Controller (LC) via a network cable.

[0003] To enable information transmission between the CMU and BSC, all CMUs in the energy storage system need to be on the same CAN bus. In existing solutions, each CMU board in the energy storage system carries one CMU chip to manage an independent battery cluster. This CMU board is configured with a unique Controller Area Network (CAN) ID for CAN communication. However, as the energy storage capacity of energy storage systems increases, the number of battery clusters also increases, leading to an increase in the number of CMUs managing those clusters. This means that a single CMU board may need to carry two or more CMU chips. Currently, when programming the initial program for multiple CMU chips on a single CMU board, the same CAN ID is programmed for multiple CMU chips, resulting in address duplication. Summary of the Invention

[0004] To address the aforementioned technical problems in the existing technology, this application provides a communication architecture, identification setting method, and energy storage system for an energy storage system, so that when a CMU board includes at least two CMUs, each CMU has a different CANID, thus avoiding address duplication.

[0005] In a first aspect, this application provides a communication architecture for an energy storage system, comprising: a Battery System Controller (BSC), multiple Battery Cluster Management Units (CMUs), and multiple CMU boards. Each CMU manages a corresponding battery cluster; the BSC and each CMU communicate via a Controller Area Network (CAN) bus; each CMU board has at least two CMUs, the at least two CMUs have different CAN IDs, and the combination of voltage levels connected to the first group of pins of each of the at least two CMUs is different. The CAN ID of each CMU is associated with the combination of voltage levels connected to the first group of pins of the CMU, and the first group of pins includes at least one pin.

[0006] Using this technical solution, for each CMU on the CMU board, the first set of pins is used as the configuration pins for the CAN ID. The combination of voltage levels connected to the first set of pins is associated with the CMU's CAN ID, resulting in different CAN IDs for different CMUs on the same CMU board. For example, if the first set of pins includes one pin and there are two CMUs on the same CMU board, one CMU connects to a high voltage level through this pin, and the other CMU connects to a ground voltage level through the same pin. Since the CAN ID is associated with the combination of voltage levels, when the voltage level combinations are different, the two CMUs will have different first and second CAN IDs. Using this solution, when a CMU board carries two or more CMUs, the CAN IDs of different CMU chips are different, avoiding address duplication.

[0007] In one possible implementation, each CMU is used to receive a controller LAN address setting instruction, determine a controller LAN address setting value based on the initial value of the controller LAN address indicated by the controller LAN address setting instruction and the combination of the levels of the first set of pin connections, and set its own controller LAN address based on the controller LAN address setting value.

[0008] In this implementation, when initializing or modifying the controller LAN address, the CMU can configure itself with a different controller LAN address than other CMUs based on the initial value of the controller LAN address indicated by the controller LAN address setting command and the combination of the level of the first group of pin connections. This method does not require the host computer that sends the controller LAN address setting command to modify the command, making the operation simple.

[0009] In one possible implementation, each CMU board is equipped with M CMUs, where M is an integer greater than 1; the first group of pins includes pins i satisfying 2-1. i-1 <M≤2 i , where i is a positive integer.

[0010] In this implementation, the number of pins in the first group can be determined based on the number of CMUs on the CMU board. By using a small number of pins to form a sufficient number of level combinations, the CMU can configure a unique CAN ID based on the initial CAN ID value and the level combination of the first group of pins, thus avoiding address duplication.

[0011] In one possible implementation, each CMU board includes two CMUs, and a first set of pins includes a first pin; one of the two CMUs is connected to a high level through the first pin, and the other of the two CMUs is connected to a low level through the first pin.

[0012] In this implementation, when each CMU board includes two CMUs, the first pin on the CMU can be used to configure a unique CAN ID for the two CMUs, avoiding address duplication, and using a small number of pins to form a sufficient number of level combinations.

[0013] In one possible implementation, for each CMU on the CMU board, when the first pin is read to be connected to a low level, the initial value of the controller LAN address is used as the controller LAN address setting value; when the first pin is read to be connected to a high level, the initial value of the controller LAN address is incremented by one to obtain the controller LAN address setting value.

[0014] In one possible implementation, the first pin of one of the two CMUs is connected to a voltage source via a first resistor; the first pin of the other CMU is grounded via a second resistor.

[0015] Secondly, this application also provides an identification setting method, which can be applied to a battery cluster management unit (CMU). Each CMU manages a corresponding battery cluster. Each CMU and the battery system controller (BSC) communicate via a controller area network (CAN) bus. At least two CMUs are installed on the same CMU board. The controller area network addresses of the at least two CMUs are different, and the combination of the voltage levels of the first group of pins connected to each of the at least two CMUs is different. The method includes: receiving a controller area network address setting instruction, which indicates an initial value for the controller area network address; determining a controller area network address setting value based on the initial value of the controller area network address and the combination of the voltage levels of the first group of pins, wherein the first group of pins includes at least one pin; and setting its own controller area network address based on the controller area network address setting value.

[0016] Using this method, for each CMU on the CMU board, the first set of pins is used as the configuration pins for the CAN ID. The combination of voltage levels connected to the first set of pins is associated with the CMU's CAN ID, so that different CMUs on the same CMU board will have different CAN IDs. When a CMU board has two or more CMUs, the CAN IDs of the different CMU chips are different, avoiding address duplication.

[0017] In one possible implementation, each CMU board is equipped with M CMUs, where M is an integer greater than 1; the first group of pins includes pins i satisfying 2-1. i-1 <M≤2 i , where i is a positive integer.

[0018] In one possible implementation, each CMU board includes two CMUs, and the first set of pins includes a first pin. One of the two CMUs is connected to a high level through the first pin, and the other CMU is connected to a low level through the first pin. The controller LAN address setting value is determined based on the initial value of the controller LAN address and the combination of the levels connected to the first set of pins. Specifically, when the first pin is read to be connected to a low level, the initial value of the controller LAN address is used as the controller LAN address setting value; when the first pin is read to be connected to a high level, the initial value of the controller LAN address is incremented by one to obtain the controller LAN address setting value.

[0019] Thirdly, this application also provides an energy storage system, which includes multiple battery clusters and a communication architecture for the energy storage system described in the first aspect and any implementation thereof. Each battery cluster includes at least one battery pack; each battery pack includes one or more battery cells; the communication architecture of the energy storage system is used to manage the multiple battery clusters.

[0020] In one possible implementation, the energy storage system further includes: multiple energy storage converters (PCS). Each PCS carries a CMU board, and each CMU board has at least two CMUs; the DC side of the PCS is connected to the battery clusters corresponding to at least two CMUs; the AC side of the PCS is used to connect to the power grid and / or loads.

[0021] Fourthly, this application also provides a control device, which includes a processor and a memory. The memory is used to store programs, instructions, or code, and the processor is used to execute the programs, instructions, or code in the memory to perform the identification setting method provided in the second aspect and any implementation thereof.

[0022] Fifthly, this application also provides a computer-readable storage medium having a computer program stored thereon, the computer program being loaded by a processor to execute the identification setting method provided in the second aspect and any implementation thereof above. Attached Figure Description

[0023] Figure 1 A schematic diagram illustrating an application scenario of an energy storage system provided in this application;

[0024] Figure 2 A schematic diagram of an energy storage system provided in this application;

[0025] Figure 3 A schematic diagram of a communication architecture for an energy storage system provided in an embodiment of this application;

[0026] Figure 4 A schematic diagram of another communication architecture for an energy storage system provided in an embodiment of this application;

[0027] Figure 5 A flowchart illustrating an identifier setting method provided in an embodiment of this application;

[0028] Figure 6 A flowchart illustrating another identifier setting method provided in this application embodiment;

[0029] Figure 7 This is a schematic diagram of an energy storage system provided in an embodiment of this application. Detailed Implementation

[0030] To enable those skilled in the art to better understand the present application, the application scenarios of the present application are described below.

[0031] See Figure 1 The figure is a schematic diagram of an application scenario of an energy storage system provided in this application.

[0032] In one possible application scenario, the energy storage system can be used in an energy storage power station. The energy storage system may include an energy storage battery system 10 and an energy storage converter system 20.

[0033] The energy storage converter system 20 is used to convert the electrical energy stored in the energy storage battery system 10 from direct current to alternating current and supply it to the power grid 30 or the load 40, or to convert external alternating current to direct current and store it in the energy storage battery system 10.

[0034] The control architecture of the energy storage system is described below with reference to the accompanying drawings.

[0035] See Figure 2 The figure is a schematic diagram of an energy storage system provided in this application.

[0036] The energy storage system 100 includes: BSC 11, multiple power conversion systems (PCS) 12, multiple CMUs, and multiple battery clusters 14.

[0037] The DC side of the PCS12 is connected to the battery cluster 14, and the AC side of the PCS12 is used to connect to the power grid and / or load. The PCS12 generally includes a power conversion circuit 121 for implementing AC / DC conversion.

[0038] PCS12 can communicate with BSC 11, and BSC11 and PCS12 can also communicate wirelessly or via wired means. This application does not impose any specific limitations.

[0039] Each battery cluster 14 generally includes at least two cells 141 connected in series and parallel. For example, the battery cluster 14 may include at least two cells 141 connected in series. In practical applications, after multiple cells 141 are connected in series in the battery cluster 14, corresponding switches 142 and fuses 143 can be connected in series at both ends of the series branch of the cells 141.

[0040] The CMU is used to manage the corresponding battery cluster 14. There is a one-to-one correspondence between the CMU and the battery cluster 14, with each CMU managing one battery cluster 14. Each CMU is mounted on an independent CMU board. In the figure, CMU board 131 is equipped with CMU13A, and CMU board 132 is equipped with CMU13B.

[0041] When the battery cluster 14 includes multiple cells 141, each cell acquisition module uploads the information of its individual cells to the CMU. The BSC 11 can communicate with multiple CMUs simultaneously. Figure 2 The image only shows the case where the energy storage system 100 includes one BSC11; in actual applications, the number of BSC11s can be more, especially when there are many battery clusters 14 in the energy storage system, all battery cluster management can be achieved through multiple BSC11s.

[0042] The energy storage system 10 can be deployed in an energy storage container. Taking an energy storage container that includes 6 PCS as an example, each PCS is currently equipped with a CMU board, and each CMU board is equipped with a CMU chip to manage an independent cluster of batteries.

[0043] In an energy storage system, the BSC and all the CMU chips corresponding to the BSC need to be on the same CAN bus. As nodes in the CAN bus system, the BSC and CMU chips need to have a unique ID to identify the node so that the nodes sending and receiving data can accurately identify each other during data transmission.

[0044] The CAN ID of the CMU chip is usually embedded in the program and then stored in the CMU chip's memory.

[0045] However, as the energy storage capacity of energy storage systems increases and the number of battery clusters in the system increases, a single PCS may need to manage multiple battery clusters through multiple CMU chips. At this point, a single CMU board may need to carry two or more CMU chips. Each CMU chip, as a separate node, needs to have a separate CAN ID. However, in the current solution, for a single CMU board, the CAN IDs of the two CMU chips on the board are the same by default when the program is burned, which will result in the phenomenon of duplicate CAN IDs.

[0046] To address the above technical issues, this application provides a communication architecture, identification setting method, and energy storage system for an energy storage system. For each CMU on the CMU board, the first set of pins is used as the configuration pins for the CAN ID. The combination of the voltage levels connected to the first set of pins is associated with the CAN ID of the CMU. When the voltage level combination is different, the CAN IDs of different CMUs on the same CMU board will also be different, thereby avoiding the phenomenon of address duplication.

[0047] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be described below with reference to the accompanying drawings.

[0048] The terms "first" and "second" used in this application description are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated.

[0049] In this application, unless otherwise expressly specified and limited, the term "connection" shall be interpreted broadly. For example, "connection" may be a fixed connection, a detachable connection, or an integral part; it may be a direct connection or an indirect connection through an intermediate medium.

[0050] See Figure 3 The figure is a schematic diagram of the communication architecture of an energy storage system provided in an embodiment of this application.

[0051] The communication architecture includes: BSC11, multiple CMUs, and multiple CMU boards.

[0052] In this embodiment, the specific number of CMUs and CMU boards in the communication architecture are not limited.

[0053] Each CMU is used to manage a corresponding battery cluster (not shown in the diagram).

[0054] In one possible implementation, when the battery cluster corresponding to the CMU includes multiple cells, the CMU's management of the battery cluster includes, but is not limited to, information collection, information processing, and control functions. Information collection refers to collecting data from individual battery cells, such as voltage, current, and temperature data. Information processing includes, but is not limited to, processing the collected individual cell data to obtain overall battery cluster status information; and using the collected information for fault diagnosis. Control functions include, but are not limited to, executing control strategies based on collected or received data, such as adjusting charging and discharging current and voltage; executing protection strategies when a fault is detected, such as controlling the contactor corresponding to the battery cluster to shut off in a timely manner; and optimizing energy distribution and usage based on the battery cluster's status and external demands.

[0055] Each CMU board has at least two CMUs. Figure 3 The example of a CMU board containing two CMUs is for illustrative purposes only and does not constitute a limitation on the technical solution of this application. In actual applications, a CMU board may contain more than two CMUs.

[0056] The BSC11 and each CMU communicate via a CAN bus. The CAN bus is a fieldbus characterized by high reliability, low cost, and flexible use. The signal transmission medium for the CAN bus is twisted-pair cable. Figure 3 In Chinese, it is represented by CAN_H and CAN_L, with a communication rate of up to 1Mbps, and supports sending and receiving data via node-to-node, one-to-many node and broadcast methods.

[0057] The BSC11 and each CMU, as nodes on the CAN bus, are located on the same bus. Each node needs to have a displacement CAN ID, and the system can identify the nodes on the bus through the CAN ID.

[0058] In one possible implementation, the CAN ID is embedded in the program when the node is programmed, and then stored in the node's local memory.

[0059] In this embodiment of the application, for each of the at least two CMUs on the same CMU board, the combination of the level of the first group of pins of the CMU is different. The first group of pins includes at least one pin, which will be described in detail below.

[0060] The CMU board 131 includes CMU13A and CMU13B. In one possible implementation, CMU13A and CMU13B are consistent at the hardware level. The first group of pins on CMU13A and CMU13B are generally the same pins. For example, when the first group of pins includes one pin, if pin A on CMU13A is used as the first group of pins, then pin A on CMU13B is also used as the first group of pins, thus ensuring the consistency of the program code on CMU13A and CMU13B.

[0061] The combination of voltage levels connected to the first group of pins on the CMU13A and CMU13B differs. When the first group of pins includes a pin PIN1... Figure 3 Taking CMU13A's PIN1 as high level and CMU13B's first group of pins' PIN1 as low level as an example, since the first group of pins includes one pin, the level connected to PIN1 is the combination of the levels connected to the first group of pins.

[0062] Considering the design specifications and symmetry of the equipment in practical applications, the connection method of each CMU on CMU board 132 is generally the same as that of each CMU on CMU board 131, and will not be described again here.

[0063] The following describes the communication architecture when the CMU board includes more than two CMUs.

[0064] See Figure 4 The figure is a schematic diagram of the communication architecture of another energy storage system provided in an embodiment of this application.

[0065] Figure 4 The CMU board 131 includes CMU13A, CMU13B, and CMU13C. To ensure that the voltage levels connected to the first group of pins differ for each CMU, the first group of pins in this embodiment includes two pins, PIN1 and PIN2. For CMU13A, PIN1 is connected to a high voltage level, and PIN2 is connected to a low voltage level; for CMU13B, PIN1 is connected to a low voltage level, and PIN2 is connected to a low voltage level; for CMU13C, PIN1 is connected to a high voltage level, and PIN2 is connected to a high voltage level. Therefore, for each CMU on the CMU board 131, the voltage level combination of the first group of pins is different.

[0066] It should be noted that, Figure 4 The voltage level connection of PIN1 and PIN2 in the example is merely illustrative and does not constitute a limitation on the technical solution of this application.

[0067] In this embodiment of the application, for each CMU board, the CAN ID of each CMU is associated with the combination of the level of the first group of pins connected to the CMU. Based on Figure 3 and Figure 4 The corresponding explanation is that, because the combination of voltage levels connected to the first group of pins of each CMU board is different, the CAN ID associated with this voltage level combination is also different. Continuing with... Figure 3 For example, the CAN ID of CMU13A on CMU board 131 is ID1, and the CAN ID of CMU13B is ID2, which avoids the phenomenon of duplicate CAN IDs of CMUs on the same CMU board 131.

[0068] In one possible implementation, the CAN ID of each CMU is associated with the combination of voltage levels connected to the first set of pins of the CMU, creating a mapping relationship between the CAN ID of the CMU and the combination of voltage levels connected to the first set of pins. In existing technology, for a single CMU board, the CAN IDs of the multiple CMU chips on the board are identical by default during program programming, all being initial CAN ID values. This mapping relationship can map the initial CAN ID value to a CAN ID setting value corresponding to the current voltage level combination. Continuing with... Figure 3 For example, for CMU13A, the initial CAN ID value during program burning is ID0. CMU13A can map ID0 to ID1 according to the mapping relationship corresponding to the high level, and set its own CAN ID to ID1. CMU13B can map ID0 to ID2 according to the mapping relationship corresponding to the low level, and set its own CAN ID to ID2.

[0069] Furthermore, for each CMU board, the CAN ID of each CMU is associated with the combination of voltage levels of the first group of pins connected to the CMU. This also ensures that CMUs on different CMU boards with the same combination of voltage levels of the first group of pins have the same CAN ID characteristic, which is related to the mapping method of the mapping relationship. Continuing with... Figure 3 For example, CMU13A can map ID0 to ID1 according to the mapping relationship corresponding to the high level, and set its own CAN ID to ID1. For CMU board 13B, the initial CAN ID value during program burning is ID5. CMU13C can map ID5 to ID3 according to the mapping relationship corresponding to the high level, and set its own CAN ID to ID3. The mapping relationship corresponding to the high level is the same, so ID1 and ID3 have the same characteristics. For example, the high level mapping relationship is to add one to the initial CAN ID value to obtain the CAN ID setting value, and the low level mapping relationship is to use the initial CAN ID value as the CAN ID setting value. In this case, the common characteristics of ID1 and ID3 are: they are the largest CAN ID on the CMU board, and are 1 larger than the CAN ID of another CMU, that is, ID1 is 1 larger than ID2, and ID3 is 1 larger than ID4.

[0070] In summary, using the communication architecture of the energy storage system provided in this application embodiment, for each CMU on the CMU board, the combination of the level of the first group of pins is associated with the CAN ID of the CMU. When the combination of the level is different, the CAN IDs of different CMUs on the same CMU board are also different, thus avoiding the phenomenon of address duplication.

[0071] In practical applications, the CAN ID of the CMU can be configured during the initial CMU programming, or the previously configured CAN ID can be modified again after the initial CMU programming is completed. This application embodiment does not impose specific limitations. The specific method of setting the CAN ID of the CMU is described in detail below.

[0072] See also Figure 3 The communication architecture shown allows for different voltage level combinations between the two CMUs when each CMU board includes two CMUs, requiring only one pin. In this case, the first set of pins includes pin PIN1.

[0073] One of the two CMUs is connected to a high level via pin 1, and the other CMU is connected to a low level via pin 1. Specifically, CMU13A is connected to the power supply VCC via the first resistor R1, and CMU13B is grounded via the second resistor R2. The first resistor R1 can be called a pull-up resistor, and the second resistor R2 can be called a pull-down resistor.

[0074] When configuring CAN ID, the CMU board 131 and the host computer are connected to the same CAN bus. The host computer sends the CAN ID setting command through a broadcast frame. The CAN ID setting command is used to indicate the initial value of CAN ID.

[0075] CMU13A and CMU13B on CMU board 131 receive the CAN ID setting command and parse it to obtain the initial CAN ID value. Then, they read the combination of the level of their first group of pins and determine the CAN ID setting value based on the initial CAN ID value and the combination of the level of the first group of pins. Based on the CAN ID setting value, they set their own CAN ID.

[0076] For ease of explanation, this embodiment uses the example where the CAN ID setting value is equal to the initial CAN ID value when PIN1 is read as low, and equal to the initial CAN ID value plus 1 when PIN1 is read as high. In this case, the CAN ID setting value of CMU13A is the initial CAN ID value, and the CAN ID setting value of CMU13B is the initial CAN ID value plus 1, thus avoiding address duplication.

[0077] It is understandable that the above is only an example. The CMU can also use different mapping methods to determine the CAN ID setting value. For example, when PIN1 is read to be connected to a high level, the CAN ID setting value is equal to the initial CAN ID value; when PIN1 is read to be connected to a low level, the CAN ID setting value is equal to the initial CAN ID value plus 1.

[0078] As the energy storage capacity of energy storage systems increases, the number of battery clusters in the energy storage system also increases. When the number of CMUs that need to be mounted on a CMU board is greater than 2, in order for the CMU to be able to configure a unique CAN ID, the number of pins in the first group of pins needs to be increased accordingly.

[0079] In the solution provided in this application embodiment, M CMUs are configured on the CMU board, and the first group of pins includes i pins, where M is an integer greater than 1, and i is a positive integer. i satisfies: 2 i-1 <M≤2 i .

[0080] When M equals 2, i = 1, and the communication architecture is as follows: Figure 3 As shown; when M equals 3, i = 2, and the communication architecture is as follows. Figure 4 As shown; when M equals 4, i = 3; when M equals 5, i = 3; when M equals 6, i = 3; when M equals 7, i = 3; when M equals 8, i = 3; when M equals 9, i = 4, and so on.

[0081] With fewer pins, each CMU can be actively configured with a different CAN ID. For the host computer, it only needs to send a CAN ID setting command indicating the initial value of the CAN ID to each CMU on the same CMU board, making the operation simple.

[0082] The host computer that sends the CAN ID setting command can be a BSC or other node device; this application embodiment does not specifically limit it.

[0083] The following explanation uses i=2 as an example, where the first group of pins includes PIN1 and PIN2. The mapping rules for the combination of CAN ID and CMU level are shown in Table 1 below.

[0084] Table 1: Mapping rules when i=2

[0085] PIN1 level PIN2 level CAN ID setting value retrieval low level low level CAN ID initial value low level high level CAN ID initial value +1 high level low level CAN ID initial value +2 high level high level CAN ID initial value +3

[0086] The mapping rules above are merely illustrative and do not constitute a limitation on the technical solution of this application. In practical applications, other mapping rules may also be used. See generally... Figure 4 At this time, the CAN ID setting value of CMU13A is the initial CAN ID value + 2; the CAN ID setting value of CMU13B is the initial CAN ID value; and the CAN ID setting value of CMU13C is the initial CAN ID value + 3. This ensures that different CMUs on the same CMU board have different CAN IDs, thus avoiding address duplication.

[0087] The following explanation uses i=3 as an example, where the first group of pins includes PIN1, PIN2, and PIN3. The mapping rules for the combination of CAN ID settings and CMU levels are shown in Table 2 below.

[0088] Table 2: Mapping rules when i=3

[0089] PIN1 level PIN2 level PIN3 level CAN ID setting value retrieval low level low level low level CAN ID initial value low level low level high level CAN ID initial value +1 low level high level low level CAN ID initial value +2 low level high level high level CAN ID initial value +3 high level low level low level CAN ID initial value +4 high level low level high level CAN ID initial value +5 high level high level low level CAN ID initial value +6 high level high level high level CAN ID initial value +7

[0090] The mapping rules above are for illustrative purposes only and do not constitute a limitation on the technical solution of this application. Pins are connected to the power supply via resistors to connect to a high level, and pins are grounded via resistors to connect to a low level.

[0091] In one possible implementation, the above mapping rules can be embedded into the CMU via code. The CMU obtains the CAN ID setting value by reading back the combination of levels from the first group of pins. In practical applications, for the same CMU, when the initial CAN ID value remains unchanged, changing the combination of levels from the first group of pins in the CMU can alter the final configured CAN ID.

[0092] In summary, by utilizing the solution provided in this application embodiment, the number of pins included in the first group of pins can be determined based on the number of CMUs included on the CMU board, so as to form a sufficient number of level combinations, enabling the CMU to configure a non-repeating CAN ID based on the initial CAN ID value and the level combination of the first group of pins, thus avoiding address duplication.

[0093] Based on the communication architecture of the energy storage system provided in the above embodiments, this application also provides an identifier setting method, which will be described in detail below with reference to the accompanying drawings.

[0094] See Figure 5The figure is a flowchart of an identification setting method provided in an embodiment of this application.

[0095] This method can be used to configure a CAN ID for the CMU in the communication architecture. For details on the communication architecture, please refer to the relevant descriptions in the above embodiments, which will not be repeated here.

[0096] The method includes the following steps:

[0097] S11: Receive CAN ID setting command.

[0098] The CMU and the host computer are on the same CAN network. The host computer sends a CAN ID setting command, which indicates the initial value of the CAN ID, through a broadcast frame.

[0099] The CMU receives the CAN ID setting command and parses it to obtain the initial CAN ID value carried within.

[0100] S12: Determine the CANID setting value based on the initial CAN ID value and the combination of the levels connected to the first group of pins.

[0101] The first group of pins may include at least one pin. Specifically, each CMU board is equipped with M CMUs, and the first group of pins includes i pins, where M is an integer greater than 1, and i is a positive integer. Where i satisfies: 2... i-1 <M≤2 i .

[0102] The mapping rule between the CAN ID setting value and the combination of CMU levels can be embedded into the CMU through code, so that the CMU can determine the CAN ID setting value by reading back the combination of the levels of the first group of pins.

[0103] S13: Set its own CAN ID based on the CAN ID setting value.

[0104] The CMU can set the determined CAN ID value as its own CAN ID.

[0105] In summary, by using the method provided in the embodiments of this application, the number of pins included in the first group of pins is determined based on the number of CMUs included on the CMU board, so as to form a sufficient number of level combinations, so that the CMU can configure a non-repeating CAN ID according to the initial value of CANID and the combination of the level of the first group of pins connected, thus avoiding address duplication.

[0106] The following explanation uses the example of a CMU board containing two CMUs, with the first set of pins including the first pin.

[0107] See Figure 6This figure is a flowchart of another identification setting method provided in an embodiment of this application.

[0108] S21: The CMU receives the CAN ID setting command sent by the host computer.

[0109] S22: CMU reads the level of the first pin.

[0110] In this implementation, one of the two CMUs is connected to a high level through the first pin, and the other CMU is connected to a low level through the first pin. Different combinations of levels can be achieved through a single pin. The circuit structure is simple and easy to implement.

[0111] S23: Is the level of the first pin low?

[0112] If yes, execute S24; otherwise, execute S25.

[0113] S24: Use the initial CAN ID value as the CAN ID setting value.

[0114] S25: Increment the initial CAN ID value by one to obtain the CAN ID setting value.

[0115] S26: Set the CAN ID based on the CAN ID setting value.

[0116] The above implementation method has a simple logic, and only requires an additional pull-up or pull-down resistor for each CMU in terms of hardware. Therefore, the hardware cost is low and it is easy to implement.

[0117] Based on the communication architecture of the energy storage system provided in the above embodiments, this application also provides an energy storage system, which will be described in detail below with reference to the accompanying drawings.

[0118] See Figure 7 The figure is a schematic diagram of an energy storage system provided in an embodiment of this application.

[0119] The energy storage system 10 includes multiple battery clusters 14 and the communication architecture of the energy storage system described in the above embodiments.

[0120] Each battery cluster 14 includes at least one battery pack (not shown in the figure), and each battery pack includes one or more cells 141. The cells in the battery pack can be connected in series, in parallel, or by first connecting in series and then in parallel. Figure 7 The following explanation uses the series connection of the 141 battery cells as an example.

[0121] The communication architecture of the energy storage system is used to manage multiple battery clusters14.

[0122] The energy storage system also includes: multiple energy storage converters PCS12, each PCS equipped with a CMU board, and each CMU board having at least two CMUs.

[0123] The DC side of the PCS12 is connected to the battery clusters corresponding to at least two CMUs, and the AC side of the PCS12 is used to connect to the power grid and / or load.

[0124] Energy storage system 10 can be deployed in an energy storage container. Figure 7 Taking an energy storage container consisting of 6 PCS and two CMUs on each CMU board as an example, each PCS is connected to two battery clusters on the DC side.

[0125] The 12 CMUs and BSC are on the same CAN bus, and the BSC and CMUs act as nodes in the CAN bus system to exchange information. Each CMU board has a different CAN ID, and the CAN IDs of CMUs on different CMU boards are also different.

[0126] For details on the specific configuration method of the CMU's CAN ID and the combination of the level of the first group of pins of the CMU, please refer to the relevant descriptions in the above embodiments, which will not be repeated here.

[0127] This energy storage system allows a single PCS to manage multiple battery clusters through multiple CMUs, thereby enhancing the system's energy storage capacity. Furthermore, multiple CMUs corresponding to a single PCS can reside on the same CMU board and have distinct CAN IDs, preventing address duplication.

[0128] CMU and BSC11 can be Application Specific Integrated Circuits (ASICs), Programmable Logic Devices (PLDs), Digital Signal Processors (DSPs), or combinations thereof. The aforementioned PLD can be Complex Programmable Logic Devices (CPLDs), Field-Programmable Gate Arrays (FPGAs), Generic Array Logic (GALs), or any combination thereof; this application does not impose specific limitations on these.

[0129] The CMU and BSC11 can include memory and processor. The memory can be random access memory (RAM), flash memory, read-only memory (ROM), EPROM, non-volatile read-only memory (Electronic Programmable ROM), registers, hard disk, removable disk, etc.

[0130] The memory can store computer instructions, which, when executed by a processor, can be used to perform an identifier setting method. The memory can also store data, such as the mapping rules described in the above embodiments.

[0131] This application also provides a control device, which includes a processor and a memory. The memory is used to store programs, instructions, or code, and the processor is used to execute the programs, instructions, or code in the memory to complete the identification setting method described in the above embodiments.

[0132] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented in software, it can be implemented, in whole or in part, as a computer program product. A computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the flow or function according to the embodiments of this application is generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape) or a semiconductor medium (e.g., solid-state disk (SSD)).

[0133] This application also provides a computer-readable storage medium storing a computer program, which is loaded by a processor to execute the method provided in the above embodiments. The computer-readable storage medium can be random access memory (RAM), flash memory, read-only memory (ROM), EPROM, non-volatile read-only memory (Electronic Programmable ROM), registers, hard disk, removable disk, or any other form of storage medium in the art.

[0134] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. Regarding the methods disclosed in the embodiments, since they correspond to the product embodiments disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to in the description of the product embodiments.

[0135] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A communication architecture for an energy storage system, characterized in that, The BMS architecture includes: Battery System Controller (BSC), multiple Battery Cluster Management Units (CMUs), and multiple CMU boards; Each of the CMUs is used to manage a corresponding battery cluster; The BSC and each of the CMUs communicate via the Controller Area Network (CAN) bus. Each CMU board has at least two CMUs, the at least two CMUs have different controller LAN addresses, the first group of pins of each of the at least two CMUs are connected in a different combination of levels, and the controller LAN address of each CMU is associated with the combination of levels of the first group of pins of the CMU, the first group of pins including at least one pin.

2. The communication architecture according to claim 1, characterized in that, Each CMU is used to receive a controller local area network (CLAN) address setting instruction, determine a controller local area network (CLAN) address setting value based on the initial value of the CLAN address indicated by the CLAN address setting instruction and the combination of the level of the first group of pin connections, and set its own CLAN address based on the CLAN address setting value.

3. The communication architecture according to claim 2, characterized in that, Each CMU board is equipped with M CMUs, where M is an integer greater than 1; The first group of pins includes a pin count i that satisfies 2. i-1 <M≤2 i The i is a positive integer.

4. The communication architecture according to claim 3, characterized in that, Each of the CMU boards includes two CMUs, and the first set of pins includes a first pin; One of the two CMUs is connected to a high level through the first pin, and the other CMU is connected to a low level through the first pin.

5. The communication architecture according to claim 4, characterized in that, For each CMU on the CMU board, specifically when the first pin is read to be connected to the low level, the initial value of the controller LAN address is used as the controller LAN address setting value; when the first pin is read to be connected to the high level, the initial value of the controller LAN address is incremented by one to obtain the controller LAN address setting value.

6. The communication architecture according to claim 4 or 5, characterized in that, The first pin of one of the two CMUs is connected to a voltage source via a first resistor; The first pin of the other CMU of the two CMUs is grounded through a second resistor.

7. A method for setting an identifier, characterized in that, The method is applied to a battery cluster management unit (CMU), where each CMU manages a corresponding battery cluster. Each CMU communicates with the battery system controller (BSC) via a controller area network (CAN) bus. At least two CMUs are mounted on the same CMU board. The controller area network addresses of the at least two CMUs are different, and the combination of voltage levels connected to the first group of pins of each of the at least two CMUs is different. The method includes: Receive a controller local area network address setting instruction, wherein the controller local area network address setting instruction indicates the initial value of the controller local area network address; The controller local area network address setting value is determined based on the initial value of the controller local area network address and the combination of the levels connected to the first group of pins. The first group of pins includes at least one pin. Set its own controller local area network (LAN) address based on the aforementioned LAN address setting value.

8. The identification setting method according to claim 7, characterized in that, Each CMU board is equipped with M CMUs, where M is an integer greater than 1; The first group of pins includes a pin count i that satisfies 2. i-1 <M≤2 i The i is a positive integer.

9. The identification setting method according to claim 7 or 8, characterized in that, Each CMU board includes two CMUs, and the first set of pins includes a first pin; one of the two CMUs is connected to a high level through the first pin, and the other CMU is connected to a low level through the first pin. The determination of the controller local area network (CLAN) address setting value based on the initial value of the CLAN address and the combination of the levels connected to the first set of pins specifically includes: When the first pin is read to be connected to the low level, the initial value of the controller local area network address is used as the set value of the controller local area network address; When the first pin is read to be connected to the high level, the initial value of the controller local area network address is incremented by one to obtain the controller local area network address setting value.

10. An energy storage system, characterized in that, The energy storage system includes multiple battery clusters and a communication architecture for the energy storage system according to any one of claims 1-6; wherein, Each of the battery clusters includes at least one battery pack; Each of the battery packs includes one or more battery cells; The communication architecture of the energy storage system is used to manage the multiple battery clusters.

11. The energy storage system according to claim 10, characterized in that, The energy storage system also includes: multiple energy storage converters (PCS); Each PCS is equipped with a CMU board, and each CMU board is provided with at least two CMUs; The DC side of the PCS is connected to the battery clusters corresponding to the at least two CMUs; The AC side of the PCS is used to connect to the power grid and / or load.

12. A control device, characterized in that, It includes a processor and a memory, the memory being used to store programs, instructions, or code, and the processor being used to execute the programs, instructions, or code in the memory to perform the identification setting method as described in any one of claims 7-9.

13. A computer-readable storage medium, characterized in that, The system contains a computer program that is loaded by a processor to execute the identification setting method as described in any one of 7-9.