A method for manufacturing a laser chip and a laser chip

Abstract

The application provides a preparation method of a laser chip and the laser chip, and relates to the technical field of communication. The method comprises the following steps: sequentially epitaxially growing a first semiconductor layer, an active layer and a third semiconductor layer on a substrate; forming a grating pattern on the third semiconductor layer by using a single-beam holographic interference exposure method; transferring the grating pattern to the surface of the third semiconductor layer to form a grating structure layer; continuously epitaxially growing a covering structure layer on the grating structure layer; arranging a dielectric layer and an electrode window on the surface of the covering structure layer, and depositing an electrode on the electrode window. The method for forming the grating pattern on the third semiconductor layer by using the single-beam holographic interference exposure method comprises the following steps: obtaining the light power values of a first optical power meter, a second optical power meter, a third optical power meter and a fourth optical power meter; and adjusting the angle of a mirror according to the difference of the light power values.

Description

Technical Field

[0001] This application relates to the field of communication technology, and in particular to a method for fabricating a laser chip and the laser chip itself. Background Technology

[0002] With the rapid development of communication technology, optical modules, as the core components of optical fiber communication systems, directly determine the transmission rate and stability of the entire communication network.

[0003] In the fabrication of optical chips, optical fibers, waveguides, and other devices in optical modules, single-beam holographic interferometry is often used to form the required periodic structures. Exposure quality depends not only on the stability of the light source but also on the position of the light spot center and the uniformity of the optical power distribution within the exposure area. If the light spot center shifts relative to the stage center, it may lead to positional deviations in the exposure area, abnormal energy distribution, and structural dimensional errors, thereby affecting chip performance and process consistency. Summary of the Invention

[0004] This application provides a method for fabricating a laser chip and a laser chip, so as to improve the exposure quality and performance of the optical chip.

[0005] To address the aforementioned technical problems, the embodiments of this application disclose the following technical solutions: This application discloses a method for fabricating a laser chip, comprising: epitaxially growing a first semiconductor layer, an active layer, and a third semiconductor layer sequentially on a substrate; A grating pattern is formed on the third semiconductor layer using a single-beam holographic interferometry method; The grating pattern is transferred to the surface of the third semiconductor layer to form a grating structure layer; Continue epitaxial growth of the overlay structure layer on the grating structure layer; A dielectric layer and an electrode window are disposed on the surface of the overlay structure layer, and an electrode is deposited in the electrode window; The method of forming a grating pattern on the third semiconductor layer using a single-beam holographic interferometry exposure method includes: A protective layer is set on the third semiconductor layer to form a sample to be exposed, and the sample to be exposed is fixed on the stage. The light source is activated, and the beam is reflected by the mirror and propagates along the optical path to the Laue mirror assembly. After being split by the Laue mirror assembly, interference fringes are formed on the surface of the sample to be exposed, thus exposing the protective layer. The Laue mirror assembly includes a reflecting plane mirror and a stage. The reflecting plane mirror and the stage are at a certain angle and face the light-emitting side of the reflecting mirror. Obtain the optical power values ​​of the first, second, third, and fourth optical power meters; the first and second optical power meters are symmetrically arranged on both sides of the Laue mirror assembly along the X-axis; the third and fourth optical power meters are symmetrically arranged on both sides of the Laue mirror assembly along the Y-axis; If the difference between the optical power values ​​of the first optical power meter and the second optical power meter exceeds the first preset threshold range, the operation control unit generates a control signal to the first regulator to adjust the deflection of the reflector around the Y-axis. If the difference between the optical power values ​​of the third and fourth optical power meters exceeds the second preset threshold range, the operation control unit generates a control signal to the second regulator to adjust the deflection of the reflector around the X-axis.

[0006] One of the above technical solutions has the following advantages or beneficial effects: The above solution provides a method for fabricating a laser chip, including: epitaxially growing a first semiconductor layer, an active layer, and a third semiconductor layer sequentially on a substrate; forming a grating pattern on the third semiconductor layer using a single-beam holographic interference exposure method; transferring the grating pattern to the surface of the third semiconductor layer to form a grating structure layer; continuing to epitaxially grow a cover structure layer on the grating structure layer; setting a dielectric layer and an electrode window on the surface of the cover structure layer, and depositing electrodes in the electrode windows. The process of forming a grating pattern on the third semiconductor layer using a single-beam holographic interference exposure method includes: setting a protective layer on the third semiconductor layer to form a sample to be exposed; fixing the sample to be exposed on a stage; activating the light source, causing the beam to propagate along the optical path after reflection by a mirror to a Laue mirror assembly; splitting the beam by the Laue mirror assembly to form interference fringes on the surface of the sample to be exposed, thus exposing the protective layer; the Laue mirror assembly includes a reflecting plane mirror and a stage, the reflecting plane mirror and the stage forming a certain angle and facing the light-emitting side of the reflecting mirror. The optical power values ​​of the first, second, third, and fourth optical power meters are obtained; the first and second optical power meters are symmetrically arranged on both sides of the Laue lens assembly along the X-axis; the third and fourth optical power meters are symmetrically arranged on both sides of the Laue lens assembly along the Y-axis; and are used to detect the center position deviation of the exposure spot.

[0007] If the difference in optical power values ​​between the first and second optical power meters exceeds a first preset threshold range, the computational control unit generates a control signal to the first regulator to adjust the deflection of the reflector around the Y-axis. If the difference in optical power values ​​between the third and fourth optical power meters exceeds a second preset threshold range, the computational control unit generates a control signal to the second regulator to adjust the deflection of the reflector around the X-axis. By comparing the power difference between the optical power meters at symmetrical positions, the deflection angle of the reflector is automatically adjusted to correct the center position of the light spot, ensuring that the center of the light spot is aligned with the center of the Laue mirror assembly. This results in accurate positioning of the interference fringes on the surface of the sample to be exposed, uniform optical power distribution, improved exposure quality of the grating pattern, and ultimately improved performance parameters and process yield of the laser chip.

[0008] In some embodiments, the laser chip fabrication method provided includes the following steps: after the light beam is reflected by the mirror, it propagates along the optical path to the Laue mirror assembly. The light beam reflected by the mirror is expanded by the beam expander and then propagates to the stage. Another part of the light beam is reflected by the plane mirror and then propagates to the stage. The X-axis and Y-axis are perpendicular to each other. The X-axis is the direction of the line connecting the center of the stage and the center of the plane mirror, and the Y-axis is the direction perpendicular to the X-axis and parallel to the surface of the stage.

[0009] One of the above technical solutions has the following advantages or beneficial effects: In the laser chip fabrication method, the light beam reflected by the mirror is expanded by the beam expander, and part of it propagates to the stage, while the other part is reflected by the plane mirror and propagates to the stage. The two beams meet and interfere on the surface of the sample to be exposed on the stage, forming stable interference fringes, thus completing the exposure of the protective layer. This optical path only requires a single incident light source, eliminating the need for complex multi-path adjustments. It has a simple structure, convenient grating period adjustment, and the division of the X and Y axes clearly defines the positional correspondence of different optical power meters, facilitating subsequent adjustment of the spot position based on the power difference.

[0010] In some embodiments, in the provided method for fabricating a laser chip, the first regulator and the second regulator are piezoelectric ceramic actuators.

[0011] One of the above technical solutions has the following advantages or beneficial effects: In the laser chip fabrication method, the piezoelectric ceramic driver has the characteristics of fast response speed and high control precision, and can accurately adjust the deflection angle of the reflector to achieve high-precision correction of the center position of the light spot.

[0012] In some embodiments, in the provided method for fabricating a laser chip, the first preset threshold range includes a first upper limit and a first lower limit, and the second preset threshold range includes a second upper limit and a second lower limit; the first upper limit is less than the second upper limit, and the first lower limit is greater than the second lower limit.

[0013] One of the above technical solutions has the following advantages or beneficial effects: In the laser chip fabrication method, by setting different allowable deviation ranges for different axes, it is possible to adapt to the degree of influence of deviations in different directions on exposure quality during the exposure process, improve the rationality of position correction, avoid unnecessary frequent adjustments, and improve adjustment efficiency while ensuring exposure accuracy. The influence of the optical power intensity difference in the X-axis direction is greater than that in the Y-axis direction. This is because the X-axis direction is the line connecting the center of the stage and the center of the reflecting plane mirror. The offset of the spot center along the X-axis will simultaneously change the optical path difference and energy distribution of the two interference beams, which has a greater impact on the period and uniformity of the interference fringes. Therefore, a larger deviation threshold range is set to balance adjustment efficiency and exposure stability.

[0014] In some embodiments, in the laser chip fabrication method, if the difference between the optical power values ​​of the first optical power meter and the second optical power meter exceeds a first preset threshold range, the computational control unit generates a control signal to the first regulator to adjust the deflection of the reflector around the Y-axis, including: if the difference between the optical power values ​​of the first optical power meter and the second optical power meter is greater than a first upper limit, the computational control unit generates a first control signal and sends it to the first regulator to deflect the reflector around the Y-axis by a first preset angle; if the difference between the optical power values ​​of the first optical power meter and the second optical power meter is less than a first lower limit, the computational control unit generates a second control signal and sends it to the first regulator to deflect the reflector in the opposite direction around the Y-axis by a first preset angle.

[0015] One of the above technical solutions has the following advantages or beneficial effects: by adjusting the deflection direction and angle of the reflector according to the direction and magnitude of the power difference, the center offset of the light spot in the X-axis direction can be quickly corrected. The correction process is completed automatically without manual intervention, which improves the automation level and correction accuracy of the exposure process.

[0016] In some embodiments, in the laser chip fabrication method, if the difference between the optical power values ​​of the third optical power meter and the fourth optical power meter exceeds a second preset threshold range, the computational control unit generates a control signal to the second regulator to adjust the deflection of the reflector around the X-axis, including: if the difference between the optical power values ​​of the third optical power meter and the fourth optical power meter is greater than a second upper limit, the computational control unit generates a third control signal and sends it to the second regulator to deflect the reflector around the X-axis by a second preset angle; if the difference between the optical power values ​​of the third optical power meter and the fourth optical power meter is less than a second lower limit, the computational control unit generates a fourth control signal and sends it to the second regulator to deflect the reflector in the opposite direction around the X-axis by a second preset angle.

[0017] One of the above technical solutions has the following advantages or beneficial effects: automatically adjusting the deflection of the reflector around the X-axis according to the power difference on both sides of the Y-axis can quickly correct the spot center offset in the Y-axis direction. Combined with the correction in the X-axis direction, it can achieve automatic alignment of the spot center position in the two-dimensional direction, ensuring the accuracy of the exposure position.

[0018] In some embodiments, a method for fabricating a laser chip is provided. The reflector is provided with a reflector support, a first adjuster and a second adjuster. The reflector support, the first adjuster and the second adjuster are located on the same side of the reflector. The first adjuster is used to drive the reflector to deflect around the Y-axis and the second adjuster is used to drive the reflector to deflect around the X-axis.

[0019] One of the above technical solutions has the following advantages or beneficial effects: by setting the two drive adjusters on the same side of the reflector, there is no need to arrange adjustment components in different positions of the reflector, which simplifies the overall structure of the reflector adjustment mechanism, facilitates assembly and maintenance, and also avoids positional conflicts of adjustment components in different directions, ensuring that the deflection adjustment in the two directions is independent of each other, without causing adjustment interference, and improving adjustment accuracy.

[0020] In some embodiments, a method for fabricating a laser chip is provided, wherein the photosensitive surfaces of the first optical power meter, the second optical power meter, the third optical power meter, and the fourth optical power meter face the light-emitting direction of the reflector.

[0021] One of the above technical solutions has the following advantages or beneficial effects: the photosensitive surface facing the light-emitting direction can ensure that the energy of the emitted light is fully received, the optical power value at the corresponding position is accurately detected, the interference of ambient stray light on the detection results is reduced, the accuracy of power detection is improved, and an accurate data basis is provided for judging the position deviation of the light spot.

[0022] In some embodiments, a method for fabricating a laser chip is provided, wherein the distance between a first optical power meter and the Z-axis is equal to the distance between a second optical power meter and the Z-axis; The distance between the third optical power meter and the Z-axis is equal to the distance between the fourth optical power meter and the Z-axis.

[0023] One of the above technical solutions has the following advantages or beneficial effects: When the center of the light spot coincides with the Z-axis, that is, the center of the Laue mirror assembly, the light energy received by the two symmetrically distributed optical power meters is theoretically equal, and the power difference will fall within the preset threshold range. If the center of the light spot shifts, the optical power meters at the symmetrical positions will generate a significant power difference. This symmetrical and equidistant setting method can directly reflect the shift direction and degree of the light spot center through the power difference, without the need for additional distance compensation calculations, simplifying the calculation process of deviation judgment, improving the response speed of deviation correction, and also improving the accuracy of position judgment.

[0024] This application also discloses a laser chip, which is fabricated using the laser chip fabrication method described in any of the above embodiments. This laser chip exhibits accurate grating pattern positioning, good periodicity, high device performance consistency, and higher process yield, thus better meeting the requirements of high-speed optical fiber communication systems. Attached Figure Description

[0025] To more clearly illustrate the technical solutions in this disclosure, the accompanying drawings used in some embodiments of this disclosure will be briefly described below. Obviously, the drawings described below are only drawings of some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings. In addition, the drawings described below can be regarded as schematic diagrams and are not intended to limit the actual size of the product, the actual flow of the method, the actual timing of the signals, etc. involved in the embodiments of this disclosure.

[0026] Figure 1 This is a partial architecture diagram of an optical communication system according to some embodiments; Figure 2 This is a partial structural diagram of a switch according to some embodiments; Figure 3 This is a structural diagram of an optical module according to some embodiments; Figure 4 An exploded view of an optical module according to some embodiments; Figure 5 This is a structural diagram of a light emitting component according to some embodiments; Figure 6 This is an exploded view of a light emitting component provided according to some embodiments; Figure 7 This is a cross-sectional view of a light emitting component provided according to some embodiments; Figure 8 This is a structural diagram of a laser chip according to some embodiments; Figure 9 This is a schematic cross-sectional view of a laser chip according to some embodiments. Figure 1 ; Figure 10 This is a schematic cross-sectional view of a laser chip according to some embodiments. Figure 2 ; Figure 11 This is a flowchart of a laser chip fabrication method according to some embodiments; Figure 12 This is a schematic diagram of a single-beam holographic interferometry exposure apparatus according to some embodiments; Figure 13 This is a schematic diagram of a Laue mirror assembly according to some embodiments; Figure 14 This is a schematic diagram of a single-beam holographic interferometry exposure method according to some embodiments. Detailed Implementation

[0027] The embodiments of this disclosure will now be described clearly and in detail with reference to the accompanying drawings. However, the described embodiments are merely some, and not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the embodiments provided in this disclosure are within the scope of protection of this disclosure.

[0028] Unless the context otherwise requires, the term "including" is interpreted as open and inclusive, meaning "including, but not limited to"; the terms "first" and "second" should not be construed as indicating or implying relative importance or an upper limit on the number; the term "multiple" means two or more; the term "connection" should be interpreted broadly, for example, "connection" can be a fixed connection, a detachable connection, or an integral part, and can be a direct connection or an indirect connection through an intermediate medium; the use of the terms "applies to" or "is configured to" implies open and inclusive language, which does not exclude the applicability to or configuration of devices to perform additional tasks or steps; descriptions such as "parallel," "perpendicular," "identical," "consistent," and "aligned" are not limited to absolute mathematical theoretical relationships, but also include acceptable error ranges arising in practice, as well as differences based on the same design concept but due to manufacturing reasons.

[0029] In optical communication technology, information is loaded onto light to generate optical signals, which are then used to transmit information between information processing devices. Connections are established between these devices via optical transmission equipment. Optical power loss is minimal during transmission through this equipment, allowing for long-distance transmission with relatively low power loss. Light boasts extremely high transmission speeds, and the cost of optical transmission equipment, such as fiber optic cables, is lower than that of electrical transmission equipment like copper wires. Using optical signals to transmit information offers advantages such as long-distance transmission, high speed, and low cost.

[0030] Information processing equipment typically includes switches, servers, optical network units (ONUs), optical distribution networks (ODNs), optical line terminals (OLTs), gateways, routers, mobile phones, computers, tablets, televisions, etc.; optical transmission equipment typically includes optical fibers and optical waveguides. Information processing equipment can recognize and process electrical signals, while optical transmission equipment can transmit optical signals. Therefore, optical modules are needed between the optical transmission equipment and the information processing equipment to perform the conversion between optical and electrical signals.

[0031] In some embodiments, the optical signal input and / or optical signal output of the optical module are connected to an optical fiber, and the electrical signal input and / or electrical signal output of the optical module are connected to a switch; a first optical signal from the optical fiber is transmitted to the optical module, the optical module converts the first optical signal into a first electrical signal, and transmits the first electrical signal to the switch; a second electrical signal from the switch is transmitted to the optical module, the optical module converts the second electrical signal into a second optical signal, and transmits the second optical signal to the optical fiber.

[0032] Information processing equipment connected to optical modules is also called an optical module switch. In access network transmission scenarios, optical module switches are typically ONUs, ODNs, or OLTs; in data center transmission scenarios, optical module switches are typically switches or servers.

[0033] Figure 1 This is a schematic diagram of the structure of an optical module access switch according to some embodiments. For example... Figure 1 As shown, switch 100 has multiple optical module interfaces. Multiple optical modules are inserted into the switch through these interfaces, establishing electrical signal communication between the optical modules and the switch. Optical fiber 101 is connected to the optical modules, establishing optical signal communication between the optical fiber and the optical modules. One end of optical fiber 101 is connected to the optical module, and the other end of optical fiber 101 (…) Figure 1 (not shown in the image) connects to another optical module ( Figure 1 (Not shown in the image), another optical module accesses the server ( Figure 1 (not shown in the image) or another switch ( Figure 1 (Not shown in the image).

[0034] In some embodiments, the optical fiber 101 and the optical module 200 are detachably connected; in other embodiments, the optical fiber 101 and the optical module 200 are non-detachably connected.

[0035] The switch 100 is configured to provide data electrical signals to the optical module 200, or receive data electrical signals from the optical module 200, or monitor or control the operating status of the optical module 200.

[0036] In some embodiments, the optical module is a tool for converting optical signals to electrical signals. During the conversion process, the information does not change, but the encoding or decoding method of the information changes.

[0037] Figure 2 This is a partial structural diagram of a switch according to some embodiments. To clearly show the connection relationship between the optical module 200 and the switch 100, Figure 2 Only the structure of the switch 100 related to the optical module 200 is shown. (Example) Figure 2 As shown, in some embodiments, the switch 100 further includes a PCB circuit board 102 disposed in the receiving cavity, and a cage 103 disposed on the surface of the PCB circuit board 102; the optical module 200 is inserted into the cage 103 and fixed by the cage 103.

[0038] In some embodiments, a heat sink 104 is provided on the cage 103 to dissipate heat for the optical module; in some embodiments, the heat sink 104 has protruding structures such as fins to increase the heat dissipation area.

[0039] In some embodiments, an electrical connector is provided inside the cage 103, which is configured to access the electrical interface of the optical module 200.

[0040] In some embodiments, the optical module 200 is inserted into the cage 103 of the switch 100, and the cage 103 fixes the optical module 200. The heat generated by the optical module 200 is conducted to the cage 103 and then diffused through the heat sink 104.

[0041] In some embodiments, the optical module 200 is inserted into the cage 103 of the switch 100, and the electrical interface of the optical module 200 is connected to the electrical connector inside the cage 103, thereby establishing an electrical signal connection between the optical module 200 and the switch 100.

[0042] In some embodiments, the optical interface of the optical module 200 is connected to the optical fiber 101, thereby enabling the optical module 200 to establish an optical signal connection with the optical fiber 101.

[0043] Figure 3 This is a structural diagram of an optical module according to some embodiments. Figure 4 This is an exploded view of an optical module according to some embodiments. Figure 3 and Figure 4As shown, in some embodiments, the optical module 200 includes a shell, which comprises an upper shell 201 and a lower shell 202. The upper shell 201 covers the lower shell 202, forming two openings, one of which is an electrical interface 204, and the other is an optical interface 205. In some embodiments, the shell forms a single opening that serves as both the electrical interface 204 and the optical interface 205.

[0044] In some embodiments, the upper housing 201 and the lower housing 202 are made of metal materials, which facilitates electromagnetic shielding and heat dissipation.

[0045] The assembly method of combining the upper housing 201 and the lower housing 202 facilitates the installation of the circuit board 300, the light emitting component 400, the light receiving component 500, etc. into the housing. The upper housing 201 and the lower housing 202 can encapsulate and protect the above-mentioned devices.

[0046] The direction of the line connecting the two openings can be consistent with or inconsistent with the length direction of the optical module 200. For example, the electrical interface 204 is located at the end of the optical module 200. Figure 3 (At the right end), the optical interface 205 is also located at the end of the optical module 200. Figure 3 (The left end). Alternatively, the electrical interface 204 is located at the end of the optical module 200, while the optical interface 205 is located on the side of the optical module 200.

[0047] In some embodiments, the lower housing 202 includes a base plate 2021 and two lower side plates 2022 located on both sides of the base plate 2021 and perpendicular to the base plate 2021; the upper housing 201 includes a cover plate 2011, which covers the two lower side plates 2022 of the lower housing 202 to form the aforementioned housing.

[0048] In some embodiments, the lower housing 202 includes a base plate 2021 and two lower side plates 2022 located on both sides of the base plate 2021 and perpendicular to the base plate 2021; the upper housing 201 includes a cover plate 2011 and two upper side plates located on both sides of the cover plate 2011 and perpendicular to the cover plate 2011. The two upper side plates and the two lower side plates 2022 are combined to realize that the upper housing 201 covers the lower housing 202.

[0049] like Figure 3 and Figure 4As shown, in some embodiments, the optical module includes a circuit board 300 disposed within a housing. The circuit board 300 includes circuit traces, electronic components, and chips, etc. The electronic components and chips are connected according to the circuit design through the circuit traces to realize functions such as power supply, electrical signal transmission, and grounding. Electronic components may include, for example, capacitors, resistors, transistors, and metal-oxide-semiconductor field-effect transistors (MOSFETs). Chips may include microcontroller units (MCUs), laser driver chips, transimpedance amplifiers (TIAs), limiting amplifiers (LAs), clock and data recovery chips (CDRs), power management chips, and digital signal processing (DSP) chips.

[0050] In some embodiments, the circuit board includes a rigid circuit board, which, due to its relatively rigid material, can also serve a load-bearing function, such as being able to stably support the aforementioned electronic components and chips; the rigid circuit board can also be inserted into the electrical connector in the cage 103 of the switch 100.

[0051] In some embodiments, the circuit board further includes a flexible circuit board, which can be used independently or in conjunction with a rigid circuit board.

[0052] In some embodiments, the circuit board further includes gold fingers formed on its end surface, the gold fingers consisting of a plurality of independent pins.

[0053] In some implementations, the gold fingers are located on the surface of one side of the circuit board 300 (e.g., Figure 4 (as shown on the upper surface); In some implementations, the gold fingers are located on the upper and lower surfaces of the circuit board 300 to provide a greater number of pins, thus adapting to applications with high pin count requirements.

[0054] In some implementations, the gold fingers of the circuit board extend from the electrical interface and insert into the electrical connector of the switch 100; the circuit board is inserted into the cage 103, and the gold fingers are connected to the electrical connector inside the cage 103. The gold fingers are configured to establish an electrical connection with the switch, enabling electrical connection functions such as power supply, grounding, two-wire synchronous serial (Inter-Integrated Circuit, I2C) signal transmission, and data signal transmission.

[0055] In some embodiments, the optical module 200 further includes an unlocking component 600 located outside its housing. The unlocking component 600 is configured to establish a fixed connection between the optical module 200 and the switch, or to release the fixed connection between the optical module 200 and the switch.

[0056] For example, the unlocking component 600 is located on the outside of the two lower side plates 2022 of the lower housing 202, and includes a locking component that matches the cage 103 of the switch 100. When the optical module 200 is inserted into the cage 103, the locking component of the unlocking component 600 fixes the optical module 200 in the cage 103; when the unlocking component 600 is pulled, the locking component of the unlocking component 600 moves accordingly, thereby changing the connection relationship between the locking component and the switch, so as to release the fixation between the optical module 200 and the switch, thereby allowing the optical module 200 to be pulled out of the cage 103.

[0057] In some embodiments, the optical module includes a light emitting component 400, such as... Figure 3 and Figure 4 As shown, the optical emitting component 400 is used to convert electrical signals into optical signals and transmit them into an optical fiber.

[0058] In some embodiments, the optical module includes an optical receiving component 500, such as... Figure 3 and Figure 4 As shown, the optical receiving component 500 is used to convert the optical signal received from the optical fiber into an electrical signal and transmit it to the circuit board for processing.

[0059] In some embodiments, the optical module includes an optical transceiver component that integrates the functions of an optical transmitter 400 and an optical receiver 500, and can simultaneously realize bidirectional conversion between electrical signals and optical signals.

[0060] In some embodiments, at least one of the light emitting component 400 or the light receiving component 500 is located on the side of the circuit board 300 away from the gold fingers.

[0061] In some embodiments, the light emitting component 400 and the light receiving component 500 are physically separated from the circuit board 300, and then electrically connected to the circuit board 300 through corresponding flexible circuit boards or electrical connectors.

[0062] In some embodiments, at least one of the light emitting component or the light receiving component may be directly disposed on the circuit board 300. For example, at least one of the light emitting component or the light receiving component may be disposed on the surface of the circuit board 300 or the side of the circuit board 300.

[0063] In some embodiments, at least one of the light emitting component or the light receiving component may be directly disposed on the circuit board 300. For example, at least one of the light emitting component or the light receiving component may be disposed on the surface of the circuit board 300 or on the side of the circuit board 300. Figure 4 As shown, the circuit board 300 may be provided with an insertion port 310. The light emitting component 400 may be placed in the insertion port 310.

[0064] In some embodiments, a DSP chip 320 may be disposed on the upper surface of the circuit board 300. The DSP chip 320 may be connected to the light emitting component 400 so that the light emitting component 400 can receive the electrical signals transmitted by the DSP chip 320 and emit light signals according to the electrical signals. The DSP chip 320 may be connected to the light receiving component 500 so that the DSP chip 320 can receive the electrical signals transmitted by the light receiving component 500 and process the electrical signals.

[0065] Figure 5 This is a structural diagram of a light emitting component according to some embodiments. Figure 6 This is an exploded view of a light emitting component provided according to some embodiments. Figure 7 This is a cross-sectional view of a light-emitting component according to some embodiments. Figure 5 , Figure 6 and Figure 7 As shown, in some embodiments, the light emitting component 400 may include a first housing 420. The first housing 420 may have an opening facing the upper housing 201. A first end of the first housing 420 may be provided with a second socket 421. An optical connector 470 may be inserted into the second socket 421 to connect the optical connector 470 to the first housing 420. A second end of the first housing 420 may be provided with a first socket 422. An electrical connector 430 may be inserted into the first socket 422 to connect the electrical connector 430 to the first housing 420.

[0066] In some embodiments, the light emitting component 400 may include a cover 410. The cover 410 closes to the opening of the first housing 420 to provide a sealed connection between the cover 410 and the first housing 420.

[0067] In some embodiments, a laser array 440 may be disposed within the first housing 420. The laser array 440 may include at least one laser chip 441, which can emit optical signals, so that the laser array 440 can emit at least one optical signal.

[0068] The laser chip 441 can be connected to one end of the electrical connector 430 by wire bonding, and the other end of the electrical connector 430 can be connected to the circuit board 300 by wire bonding, so that the laser chip 441 can receive the electrical signal transmitted by the electrical connector 430 and emit a light signal under the action of the electrical signal.

[0069] In some embodiments, a lens array 450 may be disposed within the first housing 420. The lens array 450 may be located in the light emission direction of the laser array 440 to receive the optical signal emitted by the laser array 440. The lens array 450 may be a collimating lens array so that the lens array 450 can collimate the received optical signal. The lens array 450 may include at least one first lens 451, which may be located in the light emission direction of the laser chip 441.

[0070] In some embodiments, a first optical multiplexer 460 may be disposed within the first housing 420. The first optical multiplexer 460 may be located in the collimation direction of the lens array 450. The first optical multiplexer 460 can combine multiple optical signals of different wavelengths into a single optical signal comprising multiple different wavelengths.

[0071] In some embodiments, one end of the optical connector 470 can be inserted into the second jack 421 to seal the optical connector 470 to the first housing 420. A second lens, which is a converging lens, can be placed in the middle of the optical connector 470. The second lens can be located in the light-emitting direction of the first optical multiplexer 460 to converge the optical signal emitted from the first optical multiplexer 460. The other end of the optical connector 470 can hold an optical fiber ferrule, which can be located in the direction of the second lens to converge the optical signal to the optical fiber ferrule via the second lens.

[0072] Figure 8 This is a structural diagram of a laser chip according to some embodiments. Figure 8 As shown, in some embodiments, the laser chip 441 may include a first semiconductor layer 4411. The material of the first semiconductor layer 4411 may be n-type doped InP (indium phosphide).

[0073] In some embodiments, the laser chip 441 may include an active layer 4412. The active layer 4412 may be located above and in contact with the first semiconductor layer 4411. The active layer 4412 may emit optical signals. The material of the active layer 4412 may be InGaAsP (indium gallium arsenide phosphide) / AlGaInAs (aluminum gallium arsenide phosphide).

[0074] In some embodiments, the laser chip 441 may include a second semiconductor layer 4413. The second semiconductor layer 4413 may be located above and in contact with the active layer 4412. For example, the second semiconductor layer 4413 may be a p-type semiconductor layer. The material of the second semiconductor layer 4413 may be p-type doped InP (indium phosphorus).

[0075] In some embodiments, the laser chip 441 may include a first electrode layer 4414. The first electrode layer 4414 may be located above and in contact with the second semiconductor layer 4413. For example, the first electrode layer 4414 may be a P-type electrode layer.

[0076] In some embodiments, the laser chip 441 may include a second electrode layer 4415. The second electrode layer 4415 may be located below and in contact with the first semiconductor layer 4411. For example, the second electrode layer 4415 may be an N-type electrode layer.

[0077] The second semiconductor layer 4413 forms a PN junction with the first semiconductor layer 4411. By applying a forward bias voltage, electrons are injected into the active layer 4412 from the first electrode layer 4414 through the second semiconductor layer 4413, and holes are injected into the active layer 4412 from the second electrode layer 4415 through the first semiconductor layer 4411. Electrons and holes in the active layer 4412 recombine to generate photons, enabling the laser chip 441 to generate optical signals.

[0078] The first semiconductor layer 4411 is made of n-type doped InP, the active layer 4412 is made of InGaAsP / AlGaInAs, and the second semiconductor layer 4413 is made of p-type doped InP, so that the laser chip 441 is an InP laser chip.

[0079] In some embodiments, the laser chip 441 may further include a confinement layer (not shown in the figure), which may be disposed between the active layer 4412 and the first semiconductor layer 4411, and / or between the active layer 4412 and the second semiconductor layer 4413. The material of the confinement layer may be InP or InGaAsP, used to confine charge carriers within the active layer 4412, improve the recombination efficiency of electrons and holes, thereby improving the photoelectric conversion efficiency of the laser chip 441.

[0080] Figure 9 This is a schematic cross-sectional view of a laser chip according to some embodiments. Figure 1 ; Figure 10 This is a schematic cross-sectional view of a laser chip according to some embodiments. Figure 2 ; Figure 9 and Figure 10The cross-sectional structure of the laser chip 441 is shown from different angles.

[0081] In some embodiments, the second semiconductor layer 4413 may include a grating structure layer 44131 and a cover structure layer 44132. The grating structure layer may be disposed between the active layer 4412 and the cover structure layer 44132 to select a specific wavelength of optical signal and realize single longitudinal mode output.

[0082] Figure 11 This is a flowchart illustrating a laser chip fabrication method according to some embodiments. Figure 11 As shown, the laser chip fabrication method may include: S100: sequentially epitaxially growing a first semiconductor layer, an active layer and a third semiconductor layer on a substrate.

[0083] In some embodiments, the laser chip fabrication method may include providing a substrate, which may be an InP substrate. Then, a first semiconductor layer 4411, an active layer 4412, and a third semiconductor layer are sequentially epitaxially grown on the substrate 10.

[0084] In some embodiments, the first semiconductor layer 4411 may be n-type doped InP, the active layer 4412 may be InGaAsP / AlGaInAs, and the third semiconductor layer may be p-type doped InP.

[0085] In some embodiments, the grating structure layer 44131 in the second semiconductor layer can be formed by the third semiconductor layer through photolithography and etching processes. Specifically, photoresist can be coated on the surface of the third semiconductor layer, and a grating pattern can be formed by holographic exposure or electron beam exposure. The pattern can then be transferred to the third semiconductor layer by dry etching or wet etching to form a periodic concave-convex structure. Subsequently, the remaining photoresist can be removed, and then the cover structure layer 44132 can be epitaxially grown.

[0086] In some embodiments, metal-organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE) techniques can be used for epitaxial growth to control the thickness, composition and doping concentration of each layer, ensuring crystal quality and interface flatness.

[0087] S200: A grating pattern is formed on the third semiconductor layer using a single-beam holographic interference exposure method.

[0088] In some embodiments, a protective layer is formed on the upper surface of the third semiconductor layer, and a grating pattern is defined on the protective layer by holographic exposure or electron beam exposure technology. Then, the grating pattern is transferred to the third semiconductor layer by dry etching or wet etching process to form a grating structure layer with periodic refractive index modulation.

[0089] Figure 12 This is a schematic diagram of a single-beam holographic interference exposure apparatus according to some embodiments. Figure 13 This is a schematic diagram of a Laue mirror assembly according to some embodiments. Figure 12 and Figure 13 As shown, a single-beam holographic interferometry exposure apparatus may include a laser source 910 for providing a beam. The beam emitted by the laser source 910 is a single-wavelength beam.

[0090] In some embodiments, the laser source 910 may be a He-Cd laser or an Ar+ laser, and its output wavelength may be selected according to the grating period requirements, such as 325nm or 488nm.

[0091] A single-beam holographic interferometry exposure device may include a mirror assembly 920 for reflecting the beam emitted by a laser source 910 and changing the direction of beam propagation.

[0092] In some embodiments, the reflector assembly 920 may include a reflector and a reflector holder, the reflector holder being used to fix the reflector and adjust its angle to ensure that the light beam is incident on subsequent optical elements at a preset angle.

[0093] In some embodiments, the reflector bracket and the reflector can be connected by a hinge or a universal joint to achieve multi-degree-of-freedom adjustment of the reflector, so as to precisely control the reflection direction of the light beam.

[0094] The reflector bracket may include a first adjuster and a second adjuster. The first adjuster can be used to adjust the azimuth angle of the reflector, and the second adjuster can be used to adjust the pitch angle of the reflector. The two work together to achieve precise control of the beam direction.

[0095] In some embodiments, the first adjuster causes the reflector to rotate about the Y-axis, and the second adjuster causes the reflector to rotate about the X-axis, thereby achieving two-dimensional angle adjustment of the light beam in space.

[0096] In some embodiments, the first regulator and the second regulator may respectively employ a differential head or a piezoelectric ceramic actuator to achieve submicron-level angle adjustment accuracy, thereby ensuring the stability and uniformity of the interference fringes.

[0097] A single-beam holographic interferometry exposure device may include a beam expander 930 for expanding the reflected beam to increase its diameter and cover a larger exposure area.

[0098] In some embodiments, the beam processed by the beam expander 930 is scattered light.

[0099] A single-beam holographic interferometry exposure device may include a Laue mirror assembly 940 for reflecting a portion of the expanded scattered light onto the surface of the sample to be exposed, interfering with another portion of the directly incident beam to form interference fringes on the surface of the sample to be exposed.

[0100] In some embodiments, the Laue mirror assembly 940 may include a reflecting plane mirror 941 and a stage 942. The reflecting plane mirror 941 and the stage 942 are at a certain angle, which is used to control the angle between the two interference beams, thereby adjusting the period of the interference fringes.

[0101] After being processed by beam expander 930, part of the scattered light directly illuminates the surface of the sample to be exposed, and the other part is reflected by reflector 941 and also illuminates the surface of the sample to be exposed. The two beams interfere on the sample surface, forming alternating bright and dark interference fringes.

[0102] A reflector is placed between the light source and the beam expander to change the direction of light propagation, reducing the length of the light path in the same direction and facilitating device layout. By adjusting the angle of the reflector, the position of the beam in the Laue mirror assembly 940 can be changed, thereby controlling the size and position of the overlap area between the directly incident light and the reflected light, ensuring uniform and stable interference fringes within the exposure area.

[0103] In some embodiments, the reflecting plane mirror 941 and the stage 942 are arranged perpendicularly, and the angle between the two interfering beams is 90°. The period of the interference fringes is determined by the angle between the two interfering beams, and when the angle is 90°, an interference pattern with a specific period can be formed.

[0104] like Figure 13 As shown in the figure, the X-axis direction is the direction of the line connecting the center of the reflecting plane mirror 941 and the center of the stage 942, the Y-axis direction is the direction of the central axis between the center of the reflecting plane mirror 941 and the central axis of the stage 942, and the Z-axis direction is perpendicular to the plane of the paper. In some embodiments, the mirror support can adjust the mirror to rotate around the X-axis or Y-axis to change the incident position and angle of the light beam on the beam expander 930, thereby optimizing the uniformity of the expanded light spot. Rotating the mirror around the X-axis can adjust the incident angle of the light beam in the Y-direction, thus affecting the position of the expanded light spot on the stage in the Y-direction; rotating the mirror around the Y-axis can adjust the incident angle of the light beam in the X-direction, thereby changing the position of the light spot on the stage in the X-direction.

[0105] The intersection of the X and Y axes is the center point of the Laue mirror assembly 940. By adjusting the rotation angle of the mirror around the X and Y axes, the position of the expanded beam spot on the stage 942 can be precisely controlled.

[0106] In some embodiments, a first adjuster can adjust the rotation of the reflector about the Y-axis, and a second adjuster can adjust the rotation of the reflector about the X-axis. Through the coordinated adjustment of the two, the position of the expanded beam spot on the stage can be precisely controlled, ensuring that the interference fringes uniformly cover the area to be exposed, thereby improving exposure consistency and pattern quality.

[0107] The single-beam holographic interferometry exposure apparatus may include an optical power component 950 for monitoring the optical power at the edge of the Laue mirror component 940 to assess beam stability in real time during the exposure process.

[0108] In some embodiments, the optical power component 950 may include a first optical power meter 951 and a second optical power meter 952, which are respectively disposed on the left and right edges of the Laue mirror component 940, for monitoring the changes in scattered light power on both sides of the reflecting plane mirror 941.

[0109] In some embodiments, the center point of the Laue mirror assembly 940 is located at the center of the line connecting the first optical power meter 951 and the second optical power meter 952. By monitoring the real-time difference in optical power between the two sides, it can be determined whether the beam has shifted or fluctuated in power, thereby providing a basis for feedback adjustment.

[0110] The single-beam holographic interferometry exposure device may include a computational control unit 960, which is electrically connected to an optical power component 950 and a reflector support. The computational control unit 960 is used to automatically adjust the rotation angle of the reflector based on the monitoring data of the optical power component 950, so as to adjust the position of the beam on the stage and realize closed-loop control.

[0111] The beam expanded by the beam expander 930 illuminates the surfaces of the first optical power meter 951 and the second optical power meter 952. The first optical power meter 951 converts the received optical signal into an electrical signal and transmits it to the arithmetic control unit 960. Similarly, the second optical power meter 952 converts the received optical signal into an electrical signal and transmits it to the arithmetic control unit 960.

[0112] After receiving two electrical signals, the operation and control unit 960 calculates the power difference between the first optical power meter 951 and the second optical power meter 952 in real time. Based on the power difference, it outputs a control signal to the reflector bracket, driving the reflector to rotate around the Y-axis until the power difference between the two sides is within a first preset range. This achieves automatic and stable positioning of the light beam on the stage. This closed-loop feedback mechanism effectively compensates for position drift caused by environmental disturbances or light source fluctuations, significantly improving the stability and repeatability of the exposure process, and is especially suitable for long-term continuous exposure or high-precision pattern preparation scenarios.

[0113] Based on the power difference between the first optical power meter 951 and the second optical power meter 952, a control signal is output to the reflector bracket to drive the reflector to rotate around the Y-axis until the power difference between the two sides is within a first preset range, including: If the power difference between the first optical power meter 951 and the second optical power meter 952 is within the first preset threshold range, no control signal is output. If the power difference between the first optical power meter 951 and the second optical power meter 952 is greater than the first preset threshold, the arithmetic control unit 960 determines that the beam position has shifted, and generates a corresponding adjustment command based on the magnitude and direction of the difference, controlling the first adjuster to rotate the reflector around the Y-axis.

[0114] When the power value of the first optical power meter 951 is greater than the power value of the second optical power meter 952, and the difference exceeds a first preset threshold range, the operation control unit 960 outputs a first control signal to the first regulator, driving the reflector to rotate along a first direction, causing the light beam to shift towards the second optical power meter 952. Then, the power values ​​of the first and second optical power meters are continuously acquired until the power difference between the two sides is reduced to within the first preset range.

[0115] When the power value of the second optical power meter 952 is greater than the power value of the first optical power meter 951, and the difference exceeds a first preset threshold, the operation control unit 960 outputs a second control signal to the first regulator, driving the reflector to rotate along a second direction, causing the beam to shift towards the first optical power meter 951. Then, the power values ​​of the first and second optical power meters are continuously acquired until the power difference between the two sides returns to the first preset range.

[0116] In some embodiments, the optical power component 950 may include a third optical power meter 953 and a fourth optical power meter 954, which are respectively disposed on the upper and lower edges of the Laue mirror component 940 to monitor the changes in scattered light power on both sides of the reflecting plane mirror 941.

[0117] In some embodiments, the center point of the Laue mirror assembly 940 is located at the center of the line connecting the third optical power meter 953 and the fourth optical power meter 954. By monitoring the real-time difference in optical power on both sides, it can be determined whether the beam has shifted or fluctuated in power, thereby providing a basis for feedback adjustment.

[0118] The beam expanded by the beam expander 930 illuminates the surfaces of the third optical power meter 953 and the fourth optical power meter 954. The third optical power meter 953 converts the received optical signal into an electrical signal and transmits it to the arithmetic control unit 960. Similarly, the fourth optical power meter 954 converts the received optical signal into an electrical signal and transmits it to the arithmetic control unit 960.

[0119] After receiving two electrical signals from the third optical power meter 953 and the fourth optical power meter 954, the operation control unit 960 calculates the power difference between them. Based on this power difference, it outputs a control signal to the second adjuster on the reflector bracket, driving the reflector to rotate around the X-axis until the power difference between the two sides falls within a second preset range. This achieves automatic and stable positioning of the beam on the stage. This closed-loop feedback mechanism effectively compensates for position drift caused by environmental disturbances or light source fluctuations, significantly improving the stability and repeatability of the exposure process, and is particularly suitable for long-term continuous exposure or high-precision pattern preparation scenarios.

[0120] Based on the power difference between the third optical power meter 953 and the fourth optical power meter 954, a control signal is output to the reflector bracket to drive the reflector to rotate around the X-axis until the power difference between the two sides is within a second preset range, including: If the power difference between the third optical power meter 953 and the fourth optical power meter 954 is within the range of the second preset threshold, no control signal is output. If the power difference between the third optical power meter 953 and the fourth optical power meter 954 is greater than the second preset threshold, the operation control unit 960 determines that the beam position has shifted, and generates a corresponding adjustment command based on the magnitude and direction of the difference, controlling the second adjuster to rotate the reflector around the X-axis.

[0121] When the power value of the third optical power meter 953 is greater than the power value of the fourth optical power meter 954, and the difference exceeds the second preset threshold range, the operation control unit 960 outputs a third control signal to drive the reflector to rotate in a third direction, causing the beam to shift towards the fourth optical power meter 954. Then, the power values ​​of the third and fourth optical power meters are continuously acquired until the power difference between the two sides is reduced to the second preset range.

[0122] When the power value of the fourth optical power meter 954 is greater than the power value of the third optical power meter 953, and the difference exceeds the second preset threshold, the operation control unit 960 outputs a fourth control signal to drive the reflector to rotate along the fourth direction, causing the beam to shift towards the third optical power meter 953. Then, the power values ​​of the third and fourth optical power meters are continuously acquired until the power difference between the two sides returns to the second preset range.

[0123] In some embodiments, the first preset threshold range may be the same as the second preset threshold range, or it may be set separately according to actual accuracy requirements.

[0124] In some embodiments, the first preset threshold range may be greater than the second preset threshold range, and the first preset threshold range may also be greater than the second preset threshold range.

[0125] In some embodiments, the first preset threshold range may include a first lower limit and a first upper limit, and the second preset threshold range may include a second lower limit and a second upper limit. The first lower limit may be the same as or different from the second lower limit. The first upper limit may be the same as or different from the second upper limit.

[0126] The absolute values ​​of the first upper limit and the first lower limit are equal, meaning the first preset threshold range is symmetrical about zero. Similarly, the absolute values ​​of the second upper limit and the second lower limit can also be equal, meaning the second preset threshold range is also symmetrical about zero. By setting symmetrical threshold ranges, the offset correction logic for the beam in the X and Y axes can be kept consistent, simplifying the complexity of the control algorithm.

[0127] The distance between the center point of the first optical power meter and the center point of the Laue mirror assembly 940 is equal to the distance between the center point of the second optical power meter and the center point of the Laue mirror assembly 940, so as to ensure that the optical power meters are symmetrically distributed on both sides of the beam path and improve the detection accuracy.

[0128] The distance between the center point of the third optical power meter 953 and the center point of the Laue mirror assembly 940 is equal to the distance between the center point of the fourth optical power meter 9542 and the Laue mirror assembly 940, thus maintaining a symmetrical distribution.

[0129] If the difference between the optical power values ​​of the first optical power meter and the second optical power meter is greater than the first upper limit, the operation and control unit generates a first control signal and sends it to the first regulator to cause the reflector to deflect around the Y-axis by a first preset angle. If the difference between the optical power values ​​of the first optical power meter and the second optical power meter is less than the first lower limit, the operation and control unit generates a second control signal and sends it to the first regulator, causing the reflector to deflect in the opposite direction around the Y-axis by a first preset angle.

[0130] If the difference between the optical power values ​​of the third optical power meter and the fourth optical power meter is greater than the second upper limit, the operation and control unit generates a third control signal and sends it to the second regulator to make the reflector deflect around the X-axis by a second preset angle. If the difference between the optical power values ​​of the third and fourth optical power meters is less than the second lower limit, the operation and control unit generates a fourth control signal and sends it to the second regulator, causing the reflector to deflect in the opposite direction around the X-axis by a second preset angle.

[0131] In some embodiments, the first preset angle and the second preset angle can be the same. By gradually adjusting the deflection angle of the reflector, the beam position can be gradually corrected, avoiding over-adjustment caused by excessive adjustment at one time, and further improving the stability and accuracy of positioning control. The first preset angle and the second preset angle can also be set separately according to the offset sensitivity in different directions. A smaller adjustment step size can be set for directions that are more prone to drift, thereby improving the correction accuracy.

[0132] In some embodiments, the distance between the first optical power meter and the center point of the Laue mirror assembly 940 can be the same as the distance between the third optical power meter 953 and the center point of the Laue mirror assembly 940, or it can be differentiated according to the actual installation space and detection requirements. For example, when the system has high sensitivity requirements for lateral beam offset, the distance between the first optical power meter and the center point of the Laue mirror assembly can be appropriately reduced to improve the response speed; if higher accuracy is required for longitudinal offset detection, the distance between the third optical power meter and the center point can be appropriately increased to enhance the resolution capability for longitudinal offset.

[0133] Figure 14 This is a schematic diagram of a single-beam holographic interferometry exposure method according to some embodiments, such as... Figure 14 As shown, the method includes the following steps: Step T01: Set a protective layer on the third semiconductor layer to form the sample to be exposed, and fix the sample to be exposed on the stage.

[0134] In some embodiments, the protective layer may be made of materials such as photoresist or silicon dioxide to prevent the third semiconductor layer from being contaminated or damaged in subsequent processes.

[0135] Fix the sample to be exposed on the stage and adjust the position of the stage so that the sample is located within the preset exposure area of ​​the beam path.

[0136] Step T02: Start the light source. The light beam emitted by the light source propagates along the optical path to the Laue mirror assembly. After being split by the Laue mirror assembly, interference fringes are formed on the surface of the sample to be exposed, thus exposing the protective layer.

[0137] Step T03: Obtain the optical power values ​​of the first optical power meter, the second optical power meter, the third optical power meter, and the fourth optical power meter, and record them as P1, P2, P3, and P4, respectively.

[0138] The first and second optical power meters are symmetrically arranged on the left and right sides of the beam path along the X-axis, while the third and fourth optical power meters are symmetrically arranged on the upper and lower sides of the beam path along the Y-axis.

[0139] In some embodiments, the distance between the center point of the Laue mirror assembly 940 and the first optical power meter is equal to the distance between the center point of the Laue mirror assembly 940 and the second optical power meter, to ensure the symmetry of lateral detection.

[0140] In some embodiments, the order in which the optical power values ​​of the first, second, third, and fourth optical power meters are acquired can be flexibly adjusted according to actual detection needs. For example, four optical power values ​​can be acquired simultaneously to improve real-time performance, or they can be acquired sequentially to reduce the instantaneous load on the system.

[0141] The distance between the center point of the Laue mirror assembly 940 and the third optical power meter is equal to the distance between the center point of the Laue mirror assembly 940 and the fourth optical power meter, to ensure the symmetry of longitudinal detection. This symmetrical layout effectively eliminates systematic errors introduced by optical power meter position deviations, improving the accuracy and reliability of beam offset detection.

[0142] In some embodiments, the vertical distance from the first optical power meter to the Z-axis is equal to the vertical distance from the second optical power meter to the Z-axis to ensure symmetry of lateral detection.

[0143] The vertical distance from the third optical power meter to the Z-axis is equal to the vertical distance from the fourth optical power meter to the Z-axis, to ensure the symmetry of the longitudinal detection.

[0144] Step T04: If the difference between the optical power values ​​of the first optical power meter and the second optical power meter exceeds the first preset threshold range, the operation controller generates a control signal and sends it to the first regulator to adjust the deflection of the reflector around the Y-axis.

[0145] In some embodiments, when the difference between P1 and P2 is greater than the upper limit of the first preset threshold, a first control signal is output to the first regulator to make the reflector deflect in the positive direction around the Y-axis; when the difference between P1 and P2 is less than the lower limit of the first preset threshold, a second control signal is output to the first regulator to make the reflector deflect in the negative direction around the Y-axis.

[0146] In some embodiments, when the difference between P1 and P2 is within a first preset threshold range, the current state of the first regulator remains unchanged and no adjustment operation is performed.

[0147] Step T05: If the difference between the optical power values ​​of the third optical power meter and the fourth optical power meter exceeds the second preset threshold range, the operation controller generates a control signal and sends it to the second regulator to adjust the deflection of the reflector around the X-axis.

[0148] In some embodiments, when the difference between P3 and P4 is within the range of a second preset threshold, the current state of the second regulator remains unchanged and no adjustment operation is performed.

[0149] In this system, the light emitted by the Laue mirror assembly 940 is reflected by a mirror and then expanded by a beam expander to form divergent light. A portion of this light is reflected by the plane mirror of the Laue mirror assembly 940 to form a reference light, while the other portion directly illuminates the surface of the sample to be exposed to form an object light. The reference light and the object light undergo holographic interference on the sample surface, forming a uniform interference fringe exposure area, thus completing the fabrication of the grating structure of the laser chip.

[0150] During the exposure process, the computational control unit continuously acquires power data from four optical power meters according to a preset cycle, and cyclically performs offset corrections in the X and Y axes, maintaining stable beam positioning throughout the process without manual intervention. This solves the beam offset problem caused by environmental vibration, temperature drift, or mechanical creep during long-term exposures, achieving fully automatic closed-loop feedback control and significantly improving the consistency of exposure quality and process repeatability.

[0151] In some embodiments, the above steps can be used to form a periodic grating pattern on the surface of the second semiconductor layer.

[0152] S300: The grating pattern is transferred to the surface of the third semiconductor layer to form a grating structure layer.

[0153] In some embodiments, the grating pattern on the photoresist is transferred to a third semiconductor layer by a dry etching or wet etching process to form a grating layer with a periodic undulating structure.

[0154] S400: Continue epitaxial growth of the overlay structure layer on the grating structure layer.

[0155] In some embodiments, the cover structure layer may include a P-type InP layer and a P-type InGaAs contact layer, wherein the P-type InP layer serves as a grating cover layer to protect the grating structure and enable carrier injection, while the P-type InGaAs contact layer is used to reduce electrode contact resistance.

[0156] In some embodiments, the growth thickness of the P-type InP layer can be from 0.5 μm to 1.5 μm. S500: A dielectric layer and an electrode window are provided on the surface of the cover structure layer, and an electrode is deposited in the electrode window.

[0157] In some embodiments, a deposited dielectric layer is exposed by creating a window on the top of the mesa using a photolithography process to expose a P-type InGaAs contact layer, and a P-type electrode metal is deposited to form a P-type electrode layer.

[0158] A dielectric layer is deposited on the upper surface of the cover structure layer, and openings are formed on the dielectric layer through photolithography and etching processes to expose the electrode region on the surface of the cover structure layer.

[0159] A dielectric layer, which may be a SiO2 layer with a thickness of approximately 200-500 nm, is deposited on the surface of the overlay structure layer for surface passivation and current limiting.

[0160] In some embodiments, plasma-enhanced chemical vapor deposition (PECVD) or inductively coupled plasma chemical vapor deposition (ICP-CVD) techniques can be used to deposit the dielectric layer to make the film layer dense and uniform.

[0161] In some embodiments, forming a dielectric layer and an electrode window on the surface of the overlay structure layer, and depositing an electrode on the electrode window, may include: forming a photoresist layer on the dielectric layer and forming a patterned area through exposure and development. The patterned area exposes the window area to be etched.

[0162] A photoresist layer is deposited on the surface of the dielectric layer, and the photoresist layer has a patterned area corresponding to the electrode window. After exposure and development, the dielectric layer corresponding to the patterned area is exposed outside the photoresist layer, while the remaining area is covered by photoresist.

[0163] For ease of explanation, the exposed area of ​​the dielectric layer corresponding to the pattern area will be referred to as the window area. This area is used for subsequent etching to form the electrode contact area.

[0164] A photoresist layer is spin-coated onto the surface of the dielectric layer, and the electrode window pattern is defined using photolithography. After exposure and development, the dielectric layer corresponding to the patterned area is exposed outside the photoresist layer, while the remaining areas are covered by photoresist.

[0165] In some embodiments, providing a dielectric layer and an electrode window on the surface of the overlay structure layer and depositing an electrode in the electrode window may include: dry etching the window region of the dielectric layer using a first combined gas to leave a predetermined thickness of the dielectric layer in the window region.

[0166] Dry etching of the exposed dielectric layer is performed using a first combination of gases, which may include fluorocarbons and oxygen.

[0167] In some embodiments, the fluorocarbon compound may be one or more combinations of CF4, CHF3, or C4F8.

[0168] In some embodiments, the volume ratio of fluorocarbon compound to oxygen in the first combined gas is 1:(0.05~0.2). This stage utilizes oxygen to remove fluorocarbon polymers and release high-density fluorine radicals, thereby achieving high anisotropy and high etching rate.

[0169] By controlling the etching time and gas flow rate, the dielectric layer beneath the patterned area retains a predetermined thickness, approximately 50-200 nm, serving as a barrier layer for subsequent etching. In this way, the dielectric layer is not completely etched through, preventing direct damage to the underlying semiconductor layer.

[0170] The remaining dielectric layer can serve as a buffer layer to block oxygen contamination. If the remaining thickness of the dielectric layer is less than 50 nm, the semiconductor layer may be exposed due to excessive etching, affecting the contact quality of subsequent electrodes. If the remaining thickness is greater than 200 nm, the dielectric layer may be too thick, making it impossible to effectively remove the material during the second dry etching process, affecting the electrical connection between the electrode and the semiconductor layer, or affecting the stability of the photoresist layer due to the excessive time of the second etching process.

[0171] In some embodiments, forming a dielectric layer and an electrode window on the surface of the overlay structure layer and depositing an electrode in the electrode window may include: dry etching the remaining dielectric layer using a second combined gas to expose the surface of the overlay structure layer.

[0172] The second combination of gases differs from the first combination of gases; the second combination of gases includes fluorocarbons and argon.

[0173] In some embodiments, the fluorocarbon compound may be one or more combinations of CF4, CHF3, or C4F8. The volume ratio of the fluorocarbon compound to argon in the second combined gas can be controlled at 1:(3~8).

[0174] For example, when the fluorocarbon compound is CF4, the volume ratio of CF4 to Ar2 can be 1:(3~8) to achieve good anisotropic etching while ensuring the etching rate. Argon, as a physical bombardment gas, can effectively remove residual dielectric layers while avoiding excessive physical damage to the overlay structure layer.

[0175] When the fluorocarbon compound in the second gas combination is CHF3, the volume ratio of CHF3 to Ar2 can be 1:(3~8). The reduction effect of hydrogen in CHF3 on oxygen is used to further remove residual oxygen pollution, while maintaining selective etching of the dielectric layer.

[0176] When the fluorocarbon compound in the second gas combination is C4F8, the volume ratio of C4F8 to Ar2 can be 1:(3~8). Taking advantage of the high polymerizability of C4F8, a thin polymer layer can be formed during the etching process to protect the sidewalls, avoid excessive lateral etching, and thus ensure the verticality and morphological accuracy of the sidewalls after etching.

[0177] In some embodiments, the fluorocarbons in the second gas combination may be the same as or different from those in the first gas combination, depending on the etching selectivity and process requirements.

[0178] In some embodiments, the fluorocarbon content ratio of the fluorocarbon compounds in the second combined gas is the same as that in the first combined gas.

[0179] The second etching process utilizes argon gas to physically bombard the dielectric layer, combined with a chemical reaction provided by fluorocarbon compounds. This achieves etching with low polymer residue and high selectivity, precisely removing the remaining dielectric layer and exposing the surface of the overlay structure layer. If the argon gas ratio is too high, the physical bombardment is too strong, potentially damaging the surface of the overlay structure layer, leading to increased defects and leakage current. If the argon gas ratio is too low, chemical etching becomes dominant, resulting in increased polymer residue, a decreased etching rate, difficulty in precisely controlling the uniformity of dielectric layer removal, and even incomplete removal of the dielectric layer, affecting the reliable contact between the subsequent electrodes and the overlay structure layer.

[0180] In some embodiments, the second combined gas etching time can be controlled within 10-60 seconds, depending on the remaining thickness of the dielectric layer and the etching rate. This step forms a flat and clean overlay structure layer surface beneath the patterned area, providing favorable interface conditions for subsequent electrode deposition. Prolonged high-energy ion bombardment can lead to photoresist mask carbonization, deep amorphous damage and lattice defects on the InGaAs surface layer, and residual damage layers may remain after cleaning, affecting device leakage and reliability. Therefore, the second combined gas etching must minimize etching time while ensuring complete removal of the dielectric layer to reduce damage to the overlay structure layer surface.

[0181] In some embodiments, the first and second combined gases may employ different types or ratios of fluorocarbon compounds to suit the needs of different etching stages. For example, the first etching stage, which focuses on anisotropy and morphology control, may use a combination of CHF3 and O2, while the second etching stage, which focuses on low damage and high selectivity, may use a combination of CF4 and Ar2. This stepwise etching strategy, by optimizing gas ratios and process parameters, effectively reduces physical damage and chemical contamination to the overlying structural layer while ensuring etching accuracy.

[0182] The etching process using the first gas combination is primarily oxygen-based free radical chemical etching. It relies mainly on the chemical reaction between fluorine free radicals and the SiO2 dielectric layer to generate volatile products for etching. The presence of oxygen promptly decomposes the fluorocarbon polymers generated during etching, preventing polymer accumulation on the etched surface and sidewalls, thus maintaining a stable etching rate. Simultaneously, the oxidizing etching properties brought by oxygen further enhance the anisotropy of the etching, ensuring the vertical and regular morphology of the window sidewalls and meeting the precision requirements of subsequent processes. This stage does not aim to completely remove the dielectric layer; by controlling the etching depth, a predetermined thickness of dielectric layer is retained. This not only utilizes the incompletely etched dielectric layer to isolate the underlying overlay structure layer from oxidation contamination by oxygen plasma during etching, but also avoids direct damage to the overlay structure layer caused by prolonged etching, providing a good buffer for subsequent secondary etching.

[0183] After the first etching is completed, the remaining dielectric layer of the preset thickness forms an effective isolation layer on the surface of the cover structure layer, preventing oxygen plasma from directly contacting the cover structure layer and thus avoiding oxidation damage.

[0184] The second etching process switches to a second gas combination, primarily employing oxygen-free inert ion physical sputtering. Argon ions physically bombard and remove the remaining dielectric layer, avoiding oxidative damage to the overlay structure surface caused by oxygen plasma. Simultaneously, the physical bombardment of argon ions effectively removes any residual fluoropolymers that may have remained from the first etching stage, further purifying the surface. Due to the short etching time and low ion energy of the second gas combination, the damaged layer on the overlay structure is extremely thin, allowing for effective removal through subsequent wet cleaning, thus restoring high-quality interface properties.

[0185] If the first etching is too deep, the remaining thickness of the dielectric layer will be insufficient, and oxygen plasma may penetrate the isolation layer, causing oxidation damage to the overlay structure layer. If the first etching is too shallow, the remaining dielectric layer will be too thick, and the second etching time will be prolonged. The prolonged bombardment of argon ions will also increase the risk of damage to the overlay structure layer.

[0186] In some embodiments, the etching power of the first etching stage is greater than that of the second etching stage. For example, the first etching stage may use a higher radio frequency power (e.g., 200-400W) to enhance the ion bombardment energy and ensure rapid, anisotropic etching of the dielectric layer; while the second etching stage reduces the radio frequency power, such as to less than or equal to 60W, to reduce the damage of ion bombardment to the overlay structure layer.

[0187] In some embodiments, the first etching stage and the second etching stage are carried out in the same etching chamber. By switching the gas composition and adjusting the radio frequency power, a continuous process can be achieved without breaking the vacuum to transfer the product, thereby reducing process steps, shortening the production cycle, and reducing the risk of pollution introduced by exposure to the atmospheric environment.

[0188] In some embodiments, the ambient temperature during the etching stage is 20~34°C, and the humidity is 40~65%. Within this temperature and humidity range, the etching reaction rate is stable, and the deposition and volatilization of polymer byproducts reach a dynamic equilibrium, which helps to maintain the consistency of the etched morphology and the smoothness of the sidewalls.

[0189] In some embodiments, providing a dielectric layer and an electrode window on the surface of the overlay structure layer and depositing an electrode in the electrode window may include: wet-treating the surface of the overlay structure layer with an etchant to remove a thin layer of polymer or oxide remaining from the etching process.

[0190] This wet treatment can use corrosive liquids including sulfuric acid and hydrogen peroxide. The volume ratio of H₂SO₄:H₂O₂:H₂O can be from 1:1:10 to 1:8:500. By controlling the ratio of the corrosive liquid and the treatment time, a damaged layer of approximately 5-10 nm thickness can be removed while preserving the structural integrity of the overlay layer. After wet treatment, a clean, low-defect interface is obtained on the surface of the overlay layer, providing a high-quality process foundation for subsequent epitaxial growth or electrode fabrication.

[0191] In some embodiments, the volume ratio of H2SO4:H2O2:H2O can be 1:(1~8):(50~500), and the specific ratio needs to be optimized according to the degree of surface damage after etching and the characteristics of semiconductor materials.

[0192] In some embodiments, the wet processing time can be controlled within 5 to 20 seconds, and the temperature within 20 to 30°C. This wet processing can effectively remove etching residues while avoiding excessive etching of the semiconductor layer. The etchant used in this application selectively etches the semiconductor layer interface without corroding the dielectric layer. The etching rate of the solution on InGaAs is approximately 2-3 nm / s, and the etching rate on the oxidized damaged layer is approximately 16-20 nm / s. With a preset etching time of 10 seconds, InGaAs is essentially etched by 20-30 nm, ensuring complete removal of the damaged layer.

[0193] In some embodiments, after wet treatment, deionized water rinsing and nitrogen drying can be performed to ensure the surface is clean and residue-free. Through the above steps, a high-quality, low-defect contact interface is finally formed on the surface of the overlay structure layer, laying the foundation for reliable electrode deposition and good ohmic contact.

[0194] The laser chip fabrication method provided in this application utilizes a synergistic approach of step-by-step etching and wet processing. First, a first combination of gases rapidly etches most of the dielectric layer, leaving a predetermined thickness. Then, in situ, a second combination of gases is used to physically bombard the remaining thin silicon oxide layer. The first gas etching stage achieves a high etching rate, while the second gas etching stage causes minimal damage to the overlay structure layer, thus achieving a good balance between etching efficiency and interface quality. Simultaneously, the wet processing further removes etching residues, ensuring the cleanliness and low defect density of the contact interface. This combined dry and wet process route guarantees both etching rate and significantly improves interface quality, providing a reliable technical solution for the fabrication of high-performance laser chips.

[0195] In some embodiments, providing a dielectric layer and an electrode window on the surface of the cover structure layer and depositing an electrode in the electrode window may include: depositing electrode material on the exposed surface of the cover structure layer to form an electrode layer in ohmic contact with the cover structure layer.

[0196] In some embodiments, the electrode layer is any one or more of Ti, Pt, Au, Ni, Ge, and Pd. The electrode layer can also be a stacked structure formed by any of the above metals. By adjusting the thickness of the electrode layer and the composition ratio of each layer, the doping characteristics of different overlay structures can be adapted, further optimizing the ohmic contact performance, reducing the series resistance of the device, and improving the photoelectric conversion efficiency and output power stability of the laser chip.

[0197] Electrode materials can be selected from combinations of metals such as Ti, Pt, and Au, and deposited using electron beam evaporation or sputtering processes. After electrode deposition, rapid thermal annealing is performed, with the annealing temperature controlled at 300–400°C and the annealing time at 30–60 seconds, to promote interdiffusion between the electrode material and the overlay structure layer, forming a stable ohmic contact. During annealing, the electrode material undergoes an alloying reaction with the semiconductor, effectively reducing contact resistance. An inert gas such as nitrogen or argon is typically used in the annealing atmosphere to avoid interface oxidation. Through the above electrode fabrication process, a low-resistance, high-reliability ohmic contact is ultimately formed, ensuring the electrical performance and long-term stability of the laser chip.

[0198] In some embodiments, the electrode layer material can be a metal system such as Ti / Pt / Au, Ni / Ge / Au, or Pd / Ge / Au. The specific material of the electrode layer can be selected according to the material of the semiconductor layer connected to the electrode layer. For example, for a P-type doped InGaAs contact layer, the Pd / Ge / Au system can form a lower contact resistance, while for an N-type doped InP contact layer, the Ni / Ge / Au system is more likely to achieve a stable ohmic contact. By matching the electrode material system with the semiconductor layer doping type, the contact resistance can be further reduced, and the device operating efficiency and output power can be improved.

[0199] Since the above embodiments are all described in conjunction with other methods, and different embodiments have the same parts, the same or similar parts between the various embodiments in this specification can be referred to mutually. They will not be described in detail here.

[0200] Other embodiments of this application will readily conceive of by those skilled in the art upon consideration of the specification and practice of the disclosure herein. This application is intended to cover any variations, uses, or adaptations of this application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The specification and embodiments are to be considered exemplary only, and the true scope and spirit of this application are indicated by the content of the claims.

[0201] The embodiments described above do not constitute a limitation on the scope of protection of this application.

Claims

1. A method for fabricating a laser chip, characterized in that, include: A first semiconductor layer, an active layer, and a third semiconductor layer are epitaxially grown sequentially on a substrate; A grating pattern is formed on the third semiconductor layer using a single-beam holographic interferometry method. The grating pattern is transferred to the surface of the third semiconductor layer to form a grating structure layer; A cover structure layer is further epitaxially grown on the grating structure layer; A dielectric layer and an electrode window are disposed on the surface of the overlay structure layer, and an electrode is deposited in the electrode window; The method of forming a grating pattern on the third semiconductor layer using a single-beam holographic interferometry exposure method includes: A protective layer is set on the third semiconductor layer to form a sample to be exposed, and the sample to be exposed is fixed on the stage. The light source is activated, and the light beam emitted by the light source is reflected by the reflector, expanded by the beam expander, and then propagates to the stage. The other part is reflected by the reflector and propagates to the stage. After being split by the Laue mirror assembly, interference fringes are formed on the surface of the sample to be exposed, thus exposing the protective layer. The Laue mirror assembly includes a reflector and a stage. The reflector and the stage are at a certain angle and face the light-emitting side of the reflector. The optical power values ​​of the first optical power meter, the second optical power meter, the third optical power meter, and the fourth optical power meter are obtained; the first optical power meter and the second optical power meter are symmetrically arranged on the left and right sides of the Laue mirror assembly; the third optical power meter and the fourth optical power meter are symmetrically arranged on the top and bottom sides of the Laue mirror assembly. If the difference between the optical power values ​​of the first optical power meter and the second optical power meter exceeds the first preset threshold range, the operation control unit generates a control signal to the first regulator to adjust the deflection of the reflector around the Y-axis. If the difference between the optical power values ​​of the third optical power meter and the fourth optical power meter exceeds the second preset threshold range, the operation control unit generates a control signal to the second regulator to adjust the deflection of the reflector around the X-axis; the X-axis is the direction of the line connecting the center of the stage and the center of the reflecting plane mirror, and the Y-axis is the direction perpendicular to the X-axis and parallel to the surface of the stage.

2. The method for fabricating a laser chip according to claim 1, characterized in that, The first regulator and the second regulator are piezoelectric ceramic actuators.

3. The method for fabricating a laser chip according to claim 1, characterized in that, The first preset threshold range includes a first upper limit and a first lower limit, and the second preset threshold range includes a second upper limit and a second lower limit; the first upper limit is less than the second upper limit, and the first lower limit is greater than the second lower limit.

4. The method for fabricating a laser chip according to claim 3, characterized in that, If the difference between the optical power values ​​of the first optical power meter and the second optical power meter exceeds a first preset threshold range, the operation and control unit generates a control signal to the first regulator to adjust the deflection of the reflector around the Y-axis; including: If the difference between the optical power values ​​of the first optical power meter and the second optical power meter is greater than the first upper limit, the operation and control unit generates a first control signal and sends it to the first regulator to cause the reflector to deflect around the Y-axis by a first preset angle. If the difference between the optical power values ​​of the first optical power meter and the second optical power meter is less than the first lower limit, the operation and control unit generates a second control signal and sends it to the first regulator, causing the reflector to deflect in the opposite direction around the Y-axis by a first preset angle.

5. The method for fabricating a laser chip according to claim 3, characterized in that, If the difference between the optical power values ​​of the third and fourth optical power meters exceeds a second preset threshold range, the operation and control unit generates a control signal to the second regulator to adjust the deflection of the reflector around the X-axis; including: If the difference between the optical power values ​​of the third optical power meter and the fourth optical power meter is greater than the second upper limit, the operation and control unit generates a third control signal and sends it to the second regulator to make the reflector deflect around the X-axis by a second preset angle. If the difference between the optical power values ​​of the third and fourth optical power meters is less than the second lower limit, the operation and control unit generates a fourth control signal and sends it to the second regulator, causing the reflector to deflect in the opposite direction around the X-axis by a second preset angle.

6. The method for fabricating a laser chip according to claim 1, characterized in that, The reflector is provided with a reflector bracket, a first adjuster and a second adjuster. The reflector bracket, the first adjuster and the second adjuster are located on the same side of the reflector. The first adjuster is used to drive the reflector to deflect around the Y-axis and the second adjuster is used to drive the reflector to deflect around the X-axis.

7. The method for fabricating a laser chip according to claim 1, characterized in that, The photosensitive surfaces of the first optical power meter, the second optical power meter, the third optical power meter, and the fourth optical power meter face the light emission direction of the reflector.

8. The method for fabricating a laser chip according to claim 1, characterized in that, The distance between the first optical power meter and the Z-axis is equal to the distance between the second optical power meter and the Z-axis; The distance between the third optical power meter and the Z-axis is equal to the distance between the fourth optical power meter and the Z-axis; The Z-axis is perpendicular to the plane formed by the X-axis and the Y-axis.

9. A laser chip, characterized in that, It is prepared by the method of any one of claims 1-8.

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