A direct current circuit breaker arcless breaking method, device, equipment and storage medium

Abstract

The application provides a direct-current circuit breaker arcless breaking method, device, equipment and storage medium. The method is used for a direct-current circuit breaker system with a current limiting function. First, a voltage differential criterion is used to detect a fault of the direct-current circuit breaker system and generate a fault signal; then, a power electronic switch of a current limiting device is controlled to be chopped, a fault current is adjusted to a sawtooth waveform, and a periodic zero-crossing point is generated; meanwhile, an electromagnetic mechanism of a mechanical switch is controlled to be excited by negative pressure, and a breaking enabling signal is generated; finally, the mechanical switch is controlled to break at the zero-crossing point according to the two, and arcless breaking is realized. The method connects the current limiting device and the mechanical switch in series, actively limits the current to avoid the peak value of the fault current, reduces the requirement for the mechanical switch, realizes fast, low-loss and reliable arcless breaking, can distinguish fault types, restores the system for transient faults, reliably isolates permanent faults, and avoids unnecessary power failure and reclosing impact.

Description

Technical Field

[0001] This application belongs to the field of circuit breaker replacement, and in particular relates to a method, apparatus, equipment and storage medium for arc-free interruption of a DC circuit breaker. Background Technology

[0002] Current limiters and DC circuit breakers are used to limit or interrupt fault currents in DC circuit breaker systems, and are designed to protect the stability of DC power grid equipment and systems.

[0003] Existing technologies specifically include two types of equipment. The first type is fault current limiters, primarily used to limit peak short-circuit currents, including superconducting current limiters and solid-state current limiters. Superconducting current limiters exhibit zero impedance during normal operation, but become high-impedance during faults due to quenching to limit current, although they are costly. Solid-state current limiters control impedance access through power electronic devices. For example, a resonant-based current limiter makes the LC resonant circuit impedance zero during normal operation, and bypasses the reactor or capacitor to connect the impedance during faults; a bypass-type current limiter bypasses a large impedance during normal operation, and blocks the switch to connect the large impedance to the system during faults. The second type is DC circuit breakers, used to completely isolate faults, mainly including three types. Mechanical DC circuit breakers achieve arc breaking by creating an artificial current zero-crossing point, offering the advantage of low conduction losses, but have long breaking times and are prone to arc re-breakdown. All-solid-state DC circuit breakers use power semiconductor devices (such as GTOs and IGBTs) as the main switch, achieving microsecond-level fast breaking without arcs, but suffer from high conduction losses, poor overload capacity, and high cost. Hybrid DC circuit breakers combine mechanical switches and solid-state switches in parallel, including normal current-carrying branches, fault-breaking branches, and energy-absorbing branches. They attempt to combine the low loss of mechanical switches with the fast speed of solid-state switches. During normal operation, the current flows through the mechanical switch, and during a fault, the current is first diverted to the solid-state switch branch before being turned off.

[0004] As a mainstream hybrid DC circuit breaker, in the process of "parallel connecting mechanical switches and solid-state switches, and relying on solid-state switches for final current interruption," the breaking speed is still limited by the operating time of the mechanical switch from receiving the breaking command to the contact separation to generate sufficient insulation distance (usually a few milliseconds). During the operation of the mechanical switch, the short-circuit current will continue to rise and may reach a very high peak value, causing a huge impact on the system. At the same time, the load commutation switch (solid-state switch) used for forced commutation needs to bear the fault current for a long time in medium and high voltage fields, resulting in serious conduction losses and extremely high overall manufacturing costs.

[0005] In addition, DC circuit breakers are usually unable to distinguish between transient and permanent faults, and once they trip, they will cause a power outage, reducing the continuity of power supply. Summary of the Invention

[0006] The purpose of this application is to overcome the defects in the prior art and provide a method, apparatus, device and storage medium for arc-free interruption of a DC circuit breaker.

[0007] This application provides an arc-free interruption method for a DC circuit breaker, applied to a DC circuit breaker system with current limiting function. The DC circuit breaker system with current limiting function includes a current limiting device and a mechanical switch. The current limiting device includes a power electronic switch, and the mechanical switch includes an electromagnetic mechanism. The method includes:

[0008] Based on the voltage differential criterion, faults in the DC circuit breaker system are detected and fault signals are generated.

[0009] Based on the fault signal, the power electronic switch of the current limiting device is controlled to perform chopping control to adjust the fault current into a sawtooth waveform, thereby generating periodic zero crossings.

[0010] Based on the fault signal, the electromagnetic mechanism of the mechanical switch is controlled to perform negative voltage excitation control to generate a disconnection enable signal;

[0011] Based on the periodic zero-crossing point and the disconnection enable signal, the mechanical switch is controlled to perform a disconnection operation at the periodic zero-crossing point to achieve arc-free disconnection.

[0012] Optionally, based on the voltage differential criterion, a fault in the DC circuit breaker system is detected, and a fault signal is generated, including:

[0013] Based on the voltage differential criterion, the differential values ​​of the bus-side current and the load-side current of the DC circuit breaker system are obtained;

[0014] Based on the offsetting relationship between the differential value of the bus-side current and the differential value of the load-side current, the faulty line is identified;

[0015] Based on the identification results of the faulty line, a selective fault signal is generated to control the operation of the current limiting device.

[0016] Optionally, based on the voltage differential criterion, a fault in the DC circuit breaker system is detected, and a fault signal is generated, including:

[0017] Based on the voltage differential criterion, monitor the rate of change of the output voltage of the DC circuit breaker system;

[0018] Based on the undervoltage criterion, when the output voltage is lower than the rated voltage ratio, the fault type can be determined.

[0019] Based on the fault type determination result, a G signal is output, where a G signal value of 1 indicates a fault, 0 indicates no fault, and -1 indicates a permanent fault.

[0020] Optionally, based on the periodic zero-crossing point and the breaking enable signal, the mechanical switch is controlled to perform a breaking operation at the periodic zero-crossing point to achieve arc-free breaking, including:

[0021] After the disconnection operation, monitor the DC circuit breaker system output voltage to return to the normal range;

[0022] When the output voltage recovers, the control ultra-fast mechanical switch closes and the power electronic switch is turned off, allowing the current to shift from the current-limiting branch back to the main current-carrying branch, thus achieving system self-recovery.

[0023] Optionally, based on the fault signal, the electromagnetic mechanism of the mechanical switch is controlled to perform negative voltage excitation control to generate a disconnection enable signal, including:

[0024] Based on the fault signal, the reverse excitation operation of the electromagnetic mechanism coil is triggered;

[0025] The reverse excitation operation cancels out the residual magnetism in the magnetic circuit;

[0026] Based on the residual magnetism cancellation result, the opening speed of the moving iron core is accelerated, and a disconnection enable signal is generated.

[0027] Optionally, based on the fault signal, controlling the power electronic switch of the current limiting device to perform chopping control to adjust the fault current into a sawtooth waveform, thereby generating periodic zero-crossing points, includes:

[0028] Based on the fault signal, the peak current limiting branch is first activated to limit the initial peak value of the fault current; then the power electronic switch is controlled to perform chopping to adjust the current waveform.

[0029] A stable sawtooth waveform is generated through the synergy between the peak current limiting branch and the main current limiting branch.

[0030] Optionally, the electromagnetic mechanism controlling the mechanical switch performs negative voltage excitation control, including applying a magnetic flux closed-loop start-up strategy during the closing phase:

[0031] During the closing process, the flux linkage size of the electromagnetic mechanism is adjusted through closed-loop flux linkage control.

[0032] Optimize the attraction and reaction force based on magnetic flux adjustment to suppress contact bounce.

[0033] This application also provides an arc-free breaking device for a DC circuit breaker, applied to a DC circuit breaker system with current limiting function. The DC circuit breaker system with current limiting function includes a current limiting device and a mechanical switch. The current limiting device includes a power electronic switch, and the mechanical switch includes an electromagnetic mechanism. The device includes:

[0034] The fault module, based on the voltage differential criterion, detects faults in the DC circuit breaker system and generates fault signals.

[0035] The control module, based on the fault signal, controls the power electronic switch of the current limiting device to perform chopping control, so as to adjust the fault current into a sawtooth waveform, thereby generating periodic zero crossings;

[0036] The signal module controls the electromagnetic mechanism of the mechanical switch to perform negative pressure excitation control based on the fault signal, so as to generate a disconnection enable signal;

[0037] The execution module controls the mechanical switch to perform a breaking operation at the periodic zero-crossing point based on the periodic zero-crossing point and the breaking enable signal, thereby achieving arc-free breaking.

[0038] This application also provides an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the method described above.

[0039] This application also provides a computer-readable storage medium having a computer program stored thereon, which, when executed in a computer, causes the computer to perform the above-described method.

[0040] The beneficial effects of this application are:

[0041] This application provides an arc-free interruption method for a DC circuit breaker, applied to a DC circuit breaker system with current limiting function. The DC circuit breaker system with current limiting function includes a current limiting device and a mechanical switch. The current limiting device includes a power electronic switch, and the mechanical switch includes an electromagnetic mechanism. The method includes: detecting a fault in the DC circuit breaker system based on a voltage differential criterion and generating a fault signal; controlling the power electronic switch of the current limiting device to perform chopping control according to the fault signal to adjust the fault current into a sawtooth waveform, thereby generating a periodic zero-crossing point; controlling the electromagnetic mechanism of the mechanical switch to perform negative voltage excitation control according to the fault signal to generate a breaking enable signal; and controlling the mechanical switch to perform a breaking operation at the periodic zero-crossing point according to the periodic zero-crossing point and the breaking enable signal, thereby achieving arc-free interruption. This application connects a current-limiting device in series with a mechanical switch. When a fault is detected in the DC circuit breaker system, the current-limiting device first actively performs chopping control to limit the fault current within a safe range and generate periodic zero-crossing points. Simultaneously, it controls the electromagnetic mechanism of the mechanical switch to prepare for disconnection. Finally, it controls the mechanical switch to perform the disconnection operation at the current zero-crossing point, achieving fast, low-loss, and reliable arc-free breaking. This method overcomes the shortcomings of existing hybrid circuit breakers, such as the breaking speed being limited by the mechanical switch's operation, large short-circuit current surges during breaking, and high losses in the converter branch. By actively limiting the current, it avoids the fault current reaching its peak value, reduces the requirements on the absolute breaking speed and capacity of the mechanical switch, and enables the mechanical switch to operate at zero current point to achieve arc-free breaking. Furthermore, through active adjustment and monitoring of the fault current, it can distinguish fault types. For transient faults, the system can self-recover without triggering the circuit breaker, while for permanent faults, it can reliably isolate the fault, avoiding unnecessary power outages and reclosing impacts. Attached Figure Description

[0042] Figure 1 This is a schematic diagram of the arc-free breaking process of the DC circuit breaker in this application;

[0043] Figure 2 This is a schematic diagram of the arc-free breaking device for a DC circuit breaker in this application;

[0044] Figure 3 This is a schematic diagram of the topology of the current limiting device in this application;

[0045] Figure 4 This is a schematic diagram of the current path at each stage in this application;

[0046] Figure 5 This is a schematic diagram of the equivalent circuit for the current transfer stage in this application;

[0047] Figure 6 This is a schematic diagram of the mechanical switch system in this application;

[0048] Figure 7This is a schematic diagram of the current limiting device system in this application;

[0049] Figure 8 This is a schematic diagram illustrating the fault type discrimination in this application;

[0050] Figure 9 This is a logic diagram of the control waveform in this application;

[0051] Figure 10 This is a schematic diagram of the direction of DC fault current in this application;

[0052] Figure 11 This is a schematic diagram of an inter-pole fault occurring in the system in this application;

[0053] Figure 12 This is a schematic diagram of the reclosing timing of the DC circuit breaker in this application;

[0054] Figure 13 This is a schematic diagram illustrating the entire process of the coordinated operation of the current limiting device and the DC circuit breaker in this application;

[0055] Figure 14 This is a schematic diagram of the operating timing of the current limiting device and the mechanical switch in this application. Detailed Implementation

[0056] Exemplary embodiments of the present disclosure will now be provided in more detail with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it is to be understood that various forms of implementation of the present disclosure are intended and should not be limited to the embodiments set forth herein. Rather, the embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

[0057] Please refer to Figure 1 As shown, this application provides an arc-free interruption method for DC circuit breakers, applied in the field of medium and low voltage DC power distribution. It addresses issues such as the inability of DC circuit breakers to self-extinguish arcs, the immaturity of relay protection functions, and the need to handle converter station blockages in the event of DC circuit breaker system faults. This method is implemented through the following steps:

[0058] S101. Based on the voltage differential criterion, detect faults in the DC circuit breaker system and generate fault signals.

[0059] The voltage differential criterion refers to detecting the occurrence of faults by monitoring the rate of change of the output voltage of a DC circuit breaker system.

[0060] like Figure 3 , Figure 7As shown, the activation of the current limiting device is based on the micro-voltage protection of the converter station's output current, while the fault type is determined by voltage differential protection and undervoltage protection of the output voltage. When a fault occurs in the DC circuit breaker system, the fault current increases rapidly, and the output voltage drops sharply. This change can be quickly captured by voltage differential protection.

[0061] For example, if the rate of change of the output voltage exceeds a set threshold at the instant a fault occurs, fault detection is triggered. Simultaneously, based on the offsetting relationship between the differential values ​​of the bus-side current and the differential values ​​of the load-side current, the faulty line can be identified.

[0062] The specific principle is as follows: when an inter-pole short circuit fault occurs in the line, the bus side current differential detection is positive, and the load side current differential detection is also positive or negative. The fault area is determined based on the difference in current direction.

[0063] For example, when a fault occurs on line 1, the differential current on the bus side is positive and the differential current on the load side is positive, while the differential current on the bus side of line 2 is positive and the differential current on the load side is negative. This determines that the fault occurred on line 1, generates a selective fault signal, and controls the current limiting device to operate.

[0064] In addition, fault detection also includes monitoring output voltage changes and using undervoltage criteria to determine the fault type.

[0065] like Figure 8 As shown, after the fault occurs, the current limiting device is instantaneously activated and connected to the system based on the voltage differential criterion, at t a If the output signal G remains at 1 for a given period, it indicates a system fault has occurred, but the type cannot be determined at this time. Where t... a A time window of 50 milliseconds is typically used to determine the fault diagnosis time.

[0066] In t a During this period, the output voltage is used as a criterion for whether the fault has disappeared. If the output voltage returns to its normal value, the output signal G becomes 0, indicating that there is no fault or the fault has disappeared; if the output voltage is still lower than 0.9 times the rated voltage value u out If so, the output signal G will still be 1.

[0067] Among them, u out The rated output voltage value represents the standard voltage during normal system operation.

[0068] t a After a certain time, if the output voltage is still lower than 0.9 times u out If the output voltage is *, it is determined to be a permanent fault, and the output signal G becomes -1; if the output voltage recovers, G becomes 0.

[0069] This discrimination logic ensures the accuracy of fault detection and provides a basis for subsequent control.

[0070] The hardware and software architecture of the current limiting device includes a hardware component consisting mainly of an ultra-fast mechanical switch, an IGBT and its drive control circuit, diodes, coupling reactors, and energy-consuming resistors. The subsystems communicate with each other via a data bus and share the system power bus.

[0071] like Figure 9 As shown above, when a transient fault occurs in the system, G is 1, and the current limiting device performs chopping; when the fault disappears or there is no fault, G is 0, and the current limiting device does not operate; when a permanent fault occurs in the system, G is -1, the current limiting device turns off after chopping for time ta, and simultaneously sends a trip signal to the circuit breaker, and the fault is cleared by the circuit breaker. When a short-circuit fault occurs on the DC side, the direction of the fault current on the DC side of any converter is as follows: Figure 10 As shown.

[0072] Whether it's a single-pole grounding fault or an inter-pole short-circuit fault, the direction of the fault current has the following characteristics: if the positive pole is the fault pole, the fault current flows from the busbar to the line; if the negative pole is the fault pole, the fault current flows from the line to the busbar. Therefore, this principle can be used to locate the fault.

[0073] like Figure 11 As shown, after an inter-pole short-circuit fault occurs in line 1, in order to prevent the current limiting device in line 2 from malfunctioning, a line current differential directional protection is set up to identify the fault location. The fault location is identified by the principle of the current differential offset between the bus side and the load side at the moment of the fault. Specifically, when an inter-pole short-circuit fault occurs in line 1, the fault current on the bus side of line 1 surges, and the current differential detection is positive. Since the current on the load side is in the opposite direction to that on the bus side, the current decreases in the reverse direction, and the current differential detection is also positive. Similarly, the current differential detection on the bus side of line 2 is positive, and the current differential detection on the load side is negative. Therefore, it is determined that the fault occurs in line 1. At this time, the flexible current limiting device in line 1 is activated, while the current limiting device in line 2 does not activate.

[0074] S102. Based on the fault signal, control the power electronic switch of the current limiting device to perform chopping control to adjust the fault current into a sawtooth waveform, thereby generating periodic zero crossings.

[0075] Chopper control refers to limiting fault current within a safe range and generating periodic zero-crossing points by controlling the on and off of power electronic switches.

[0076] The current limiting device includes a main current-carrying branch, a main current-limiting branch, and a peak current-limiting branch. The main current-carrying branch consists of an ultra-fast mechanical switch, and the main current-limiting branch consists of a power electronic switch S1, a freewheeling diode D6, and a power-dissipating resistor R. hIt consists of an inductor L1 and a peak current limiting branch with a bridge structure, which is composed of a power supply E, a resistor R1, an inductor L3 and its reverse diode D5 and a power dissipation resistor R2.

[0077] After a fault occurs, the peak current limiting branch is activated first to limit the initial peak value of the fault current, and then the power electronic switch S1 is controlled to perform a chopping operation.

[0078] Specifically, during the current transfer phase, the fault current is transferred from the main current-carrying branch to the main current-limiting branch, and then enters the main current-limiting phase, where S1 is controlled to chop within a set time t4.

[0079] When S1 is turned on, the current flows through S1 and the coupling inductor L1 to the fault point, and the fault current increases.

[0080] When S1 is turned off, the fault current flows through the freewheeling diode D6 and the energy-consuming resistor R. h The current flows from inductor L1 to the fault point, reducing the fault current.

[0081] By adjusting the chopping frequency and duty cycle, the fault current is controlled into a sawtooth waveform fluctuating around the normal value, thereby generating periodic zero-crossing points. Here, t4 represents the chopping end time, a preset time point. The normal value refers to the steady-state operating current of the DC circuit breaker line, determined by the system load, when no fault occurs.

[0082] Peak current control strategy by adjusting R s The frequency and duty cycle of the trigger are controlled to prevent significant fluctuations in the DC-side voltage. This coordinated operation ensures stable limiting of the fault current, creating conditions for mechanical switching to interrupt the circuit.

[0083] The operation of a current limiting device includes four phases: normal operation, fault detection, current transfer, main current limiting, and system recovery. The current paths in each phase are as follows: Figure 4 As shown, where Figure 4 (a) Figure 4 (b) Figure 4 (c) Figure 4 (d) Figure 4 (e) Figure 4 (f) correspond to times t0~t1, t1~t2, t2~t3, t3~t4, t4~t5, and t5~t6, respectively.

[0084] During normal operation, the UFD is on and S1 is off, and the coupling reactor has no mutual inductance. During the fault detection phase, assuming a fault occurs at time t1, the fault current increases rapidly. The change in fault current during this phase is determined by system parameters.

[0085] During the current transfer phase, a system fault is detected at time t2, triggering the UFD to turn off and S1 to turn on. The turn-on time of a typical semiconductor solid-state auxiliary switch is a few microseconds, and the opening time of a fast vacuum switch is a few milliseconds. Since the UFD cannot achieve instantaneous turn-off, under the action of the coupling reactor, the fault current transfers from the main current-carrying branch to the main current-limiting branch. The current flow direction is as follows: Figure 5 As shown.

[0086] During the main current limiting phase, the UFD is completely turned off at time t3, and the fault current is transferred to the main current limiting branch. The FCL controls S1 to chop within a set time t4 through the peak current control strategy to control the fault current.

[0087] Due to the presence of FCL, the converter station will not be blocked during the fault. Considering the role of the converter station, the system has two states during this stage: when S1 is on, the current flows through S1, the coupling inductor L1, and the line impedance to the fault point, and the converter station and capacitor discharge to the fault point at the same time, increasing the fault current;

[0088] When S1 is turned off, on the converter station side, the converter station charges the capacitor; on the fault side, such as Figure 4 As shown in (e), the fault current flows through the freewheeling diode D6 and the energy-consuming resistor R. h The current flows from the coupling inductor L1 and the line impedance to the fault point. This stage is the RL discharge circuit, and the fault current continuously decreases during this process.

[0089] On the DC side, the initial value of the fault current is much larger than the set value, so the duty cycle of S1 is small in the early stage of operation. When the fault current is limited to below the set value, the duty cycle increases. This is achieved by adjusting R in the peak current control. s The frequency and duty cycle of the trigger can control the fault current to a sawtooth wave current that fluctuates around the normal current value, thereby preventing significant fluctuations in the DC side voltage.

[0090] Repeat the above two states. If a transient fault occurs in the system, chopping will stop and the system will enter the recovery state. If a permanent fault occurs in the system, control S1 will be turned off and a turn-off signal will be sent to the DC circuit breaker to isolate the fault area.

[0091] During system recovery, the fault disappears at time t4, such as... Figure 4 As shown in (f), the sudden connection of the load increases the system resistance. Since FCL does not receive the signal that the fault has disappeared, the switch S1 is still in the peak current control state. Since the inter-electrode voltage has almost no significant fluctuations during the entire fault process, the fault current drops sharply after the fault disappears, causing the peak current control to lose its effect, and S1 is in the continuous conduction state.

[0092] After the FCL detects that the fault has disappeared, it controls the UFD to close, the system current begins to increase and is then controlled by the converter station to return to its normal value. Once the current has completely transferred to the main current-carrying branch, control S1 is turned off, and the system returns to normal operation.

[0093] The topology of the current limiting device is as follows Figure 3 As shown, it includes a main current-carrying branch, a main current-limiting branch, and a peak current suppression branch (PCSB). The main current-carrying branch uses an ultra-fast mechanical disconnector (UFD) to interrupt the current. The main current-limiting branch consists of a power electronic switch S1, a freewheeling diode D6, and a power-dissipating resistor R. h It consists of an inductor L1.

[0094] The PCSB is a bridge structure, with the middle bridge arm consisting of a power supply E, a resistor R1, an inductor L3, its reverse diode D5, and a power-dissipating resistor R2.

[0095] A DC circuit breaker (DCCB) is installed on the right side of the fault current limiter (FCL) to interrupt the fault current.

[0096] S103. Based on the fault signal, control the electromagnetic mechanism of the mechanical switch to perform negative pressure excitation control to generate a disconnection enable signal.

[0097] Negative voltage excitation control refers to applying a reverse voltage to the electromagnetic mechanism coil to quickly weaken residual magnetism and accelerate the opening operation. The electromagnetic mechanism of the mechanical switch adopts a fast reverse voltage excitation scheme, which triggers the reverse excitation operation of the electromagnetic mechanism coil after receiving a fault signal.

[0098] Specifically, reverse excitation cancels the residual magnetism in the magnetic circuit, thereby reducing the delay effect of residual magnetic attraction on the tripping, significantly accelerating the tripping speed of the moving iron core, and generating a tripping enable signal. Furthermore, a closed-loop flux linkage start-up strategy is applied during the closing phase. This strategy adjusts the flux linkage of the electromagnetic mechanism through closed-loop flux linkage control, optimizing the attraction and reaction force, and suppressing contact bounce.

[0099] For example, during the closing process, the magnetic flux closed-loop strategy can effectively reduce closing bounce and improve switch life. The negative voltage excitation control also integrates anti-voltage drop technology, automatically switching to backup power when the power supply voltage fluctuates to maintain the closed state and prevent accidental tripping. This control strategy ensures the rapid and reliable operation of the mechanical switch, providing a foundation for arc-free interruption.

[0100] like Figure 6As shown, the hardware of the mechanical switch subsystem mainly consists of the mechanical switch body and its drive control circuit, the line fault diagnosis subsystem, and the supercapacitor energy storage subsystem. The subsystems communicate with each other through a data bus and share the system power bus. The energy storage subsystem is directly connected to the system power bus and charges and discharges autonomously according to the power status to maintain the stability of the system power.

[0101] The mechanical switch submodule is a high-performance, fast-acting mechanical switch. Its core objective is to achieve a breaking time of less than 10 milliseconds while ensuring reliable rated current breaking capacity. This module focuses on optimizing the dynamic characteristics of the switch's closing and opening, striving to achieve smooth closing with minimal bounce, energy-efficient holding state, and rapid and decisive opening action. Features include remote closing and opening functionality, a magnetic flux closed-loop start strategy to suppress closing bounce, a current closed-loop control strategy with noise suppression to eliminate holding stage noise, a fast reverse-voltage excitation scheme to accelerate opening, and voltage dip protection technology.

[0102] The implementation steps include establishing a finite element co-simulation model, optimizing switching parameters, building a control strategy simulation model, hardware circuit design, and experimental testing.

[0103] The core task of the fault detection submodule is to accurately identify line anomalies. It continuously tracks voltage and current changes in the line through advanced fault identification algorithms to determine the operating status of the DC wiring circuit.

[0104] Develop efficient line fault detection algorithms to capture characteristics such as rapid current rises and voltage drops during DC power distribution system faults. Implementation steps include evaluating the fault detection algorithm, designing test and verification schemes, and completing the data interface circuit design. The core task of the capacitor energy storage submodule is to build a reliable backup power system, ensuring that mechanical switches can remain closed or reclose when the main circuit voltage drops. This includes capacitor status detection and communication interfaces, charging and discharging management circuits using bidirectional DC / DC converters and supercapacitor banks.

[0105] In terms of implementation, we selected a combination of supercapacitors based on existing solutions, and designed charge and discharge management logic and integrated detection circuits.

[0106] S104. Based on the periodic zero-crossing point and the disconnection enable signal, control the mechanical switch to perform a disconnection operation at the periodic zero-crossing point to achieve arc-free disconnection.

[0107] Disconnection operation refers to using the periodic zero-crossing points generated by chopper control, combined with the disconnection enable signal, to control the mechanical switch to disconnect when the current crosses zero, thus avoiding the generation of electric arcs.

[0108] Specifically, when a permanent system failure occurs, the current limiting device will, after t aAfter time-chopping, the circuit breaker is turned off and a trip signal is sent to the mechanical switch. Upon receiving the signal, the mechanical switch performs an interruption operation at periodic zero-crossing points to achieve rapid isolation. After the interruption operation, the system enters a recovery state, monitoring whether the DC circuit breaker system output voltage has returned to the normal range.

[0109] If the output voltage recovers, it indicates that the fault has disappeared. Then, the ultra-fast mechanical switch is closed and the power electronic switch is turned off, so that the current flows back from the current-limiting branch to the main current-carrying branch, thus realizing the system self-recovery.

[0110] For example, after the fault disappears at time t4, a load is suddenly connected, the system resistance increases, the fault current drops sharply, and S1 remains continuously conducting. Once the current has completely transferred, S1 is turned off, and the system returns to normal. This strategy ensures the speed and reliability of fault isolation while avoiding unnecessary circuit breaker operation.

[0111] Furthermore, the coordinated operation protection strategy of the current limiting device and the DC circuit breaker includes reclosing timing and the entire process of coordinated action. Traditional mechanical DC circuit breakers consist of a current-carrying branch, a converter branch, and an energy-dissipating branch. Their breaking speed and capacity are limited by their own structural mechanical properties, and each breaking operation generates an arc, requiring the L in the converter branch... C The oscillation extinguished the arc, but L C The oscillation is affected by the oscillation frequency, and there are problems such as instability and difficulty in extinguishing the arc with small current.

[0112] Since the proposed current limiting device can provide a zero-crossing point for the circuit breaker during a fault, it only needs to be used in conjunction with a mechanical disconnecting switch to isolate the fault. In order to improve the fault isolation speed, an ultra-fast mechanical switch is selected to replace the mechanical disconnecting switch as the breaking element in the DC circuit breaker. At the same time, a joint operation strategy of current limiting device and DC circuit breaker reclosing is set.

[0113] like Figure 12 As shown. The reclosing timing diagram of a DC circuit breaker. In practical engineering applications, the opening time of a DC circuit breaker is 6ms, and the reclosing time is 300ms. o When the DC circuit breaker detects a fault, it begins to trip. At time t1, the circuit breaker is completely disconnected. After 300ms, at time t2, the circuit breaker recloses. If the fault disappears at this time, it is defined as a momentary fault, the circuit breaker closes, and the system returns to normal operation. If the fault still exists, the circuit breaker begins to trip, and after 6ms, at time t3, the circuit breaker opens.

[0114] After 300ms, at time t4, the circuit breaker recloses again. If the fault has disappeared, the circuit breaker closes; if the fault still exists, it is considered a permanent fault. s Once the circuit breaker opens, it will not close again.

[0115] like Figure 13 As shown, the zero-crossing point of the circuit breaker is provided by utilizing the characteristic that the current flowing through the switching tube during the operation of the current limiting device is the chopping current.

[0116] from Figure 13 It can be seen that within 1-3ms after a system fault, the current limiting device starts by using the voltage differential criterion to determine the fault type (unipolar / interpolar fault). The fault current begins to transfer to the main current limiting branch. After 1ms, the fault current is completely transferred to the main current limiting branch, causing the fault-side IGBT to perform chopping. a After 300ms, a permanent fault is determined. If the output voltage returns to normal during this period, it is determined to be a transient fault. The IGBT turns on, the circuit breaker does not operate, a closing signal is sent to the contactor, the current is transferred to the main circuit, and the system returns to normal operation. If it is determined to be a permanent fault, a tripping signal is sent to the mechanical switch. The mechanical switch turns off after 6ms. During this process, the chopping current flowing through the IGBT provides a zero-crossing point for the circuit breaker, thereby achieving rapid fault isolation.

[0117] like Figure 14 As shown, the timing diagram of the operation of the current limiting device and the mechanical switch describes the timing relationship of the entire coordinated process. This strategy suppresses the current during a fault within an acceptable range for the system and eliminates the impact on power supply reliability caused by the frequent operation of traditional DC circuit breakers after a transient fault in the system.

[0118] This application, through the synergy of the aforementioned steps, achieves arc-free breaking of DC circuit breakers, improving the stability and reliability of DC circuit breaker systems. Furthermore, a key aspect of this application is the proposal of an innovative hybrid DC circuit breaker topology and control method with current-limiting functionality for medium and low voltage systems. By combining a current-limiting device in series with a mechanical switch, effective limitation and rapid isolation of fault current in the DC circuit breaker system are achieved. The core of this scheme lies in the current-limiting device's ability to actively limit current during a fault, controlling the fault current within a safe range and preventing it from reaching the expected peak value, thus creating favorable conditions for the mechanical switch to open. Unlike traditional hybrid circuit breakers, this application's scheme is not severely constrained by the operating speed of the mechanical switch, enabling early interruption of short-circuit current and significantly improving the operational stability and reliability of the DC circuit breaker system. In addition, this application possesses intelligent fault type identification capabilities. For transient faults, the system can self-recover without triggering circuit breaker operation; for permanent faults, it can reliably isolate the fault, avoiding secondary impacts from reclosing and effectively ensuring the continuity of power supply in non-faulty areas. The pre-protection point includes the specific topology of the current limiting device, the control strategy, the fault area location method, and the optimized control algorithm of the mechanical switch. These contents together constitute the complete technical solution of this application.

[0119] Please refer to Figure 2 As shown, this application also provides an arc-free breaking device for a DC circuit breaker, applied to a DC circuit breaker system with current limiting function. The DC circuit breaker system with current limiting function includes a current limiting device and a mechanical switch. The current limiting device includes a power electronic switch, and the mechanical switch includes an electromagnetic mechanism. The device includes:

[0120] Fault module 201 detects faults in the DC circuit breaker system based on voltage differential criteria and generates fault signals.

[0121] The control module 202 controls the power electronic switch of the current limiting device to perform chopping control according to the fault signal, so as to adjust the fault current into a sawtooth waveform, thereby generating periodic zero crossings.

[0122] The signal module 203 controls the electromagnetic mechanism of the mechanical switch to perform negative voltage excitation control based on the fault signal, so as to generate a disconnection enable signal;

[0123] The execution module 204 controls the mechanical switch to perform a breaking operation at the periodic zero-crossing point based on the periodic zero-crossing point and the breaking enable signal, thereby achieving arc-free breaking.

[0124] This application also provides an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the method described above.

[0125] This application also provides a computer-readable storage medium having a computer program stored thereon, which, when executed in a computer, causes the computer to perform the above-described method.

[0126] The above embodiments are provided to enable those skilled in the art to understand and apply this application. Those skilled in the art will readily make various modifications to the above embodiments and apply the general principles described herein to other embodiments without inventive effort. Therefore, this application is not limited to the above embodiments, and any improvements and modifications made to this application based on the disclosure thereof should be within the scope of protection of this application.

Claims

1. A method for arc-free interruption of a DC circuit breaker, characterized in that, An application is made to a DC circuit breaker system with current limiting function, the DC circuit breaker system with current limiting function including a current limiting device and a mechanical switch, the current limiting device including a power electronic switch, the mechanical switch including an electromagnetic mechanism, the method including: Based on the voltage differential criterion, faults in the DC circuit breaker system are detected and fault signals are generated. Based on the fault signal, the power electronic switch of the current limiting device is controlled to perform chopping control to adjust the fault current into a sawtooth waveform, thereby generating periodic zero crossings. Based on the fault signal, the electromagnetic mechanism of the mechanical switch is controlled to perform negative voltage excitation control to generate a disconnection enable signal; Based on the periodic zero-crossing point and the disconnection enable signal, the mechanical switch is controlled to perform a disconnection operation at the periodic zero-crossing point to achieve arc-free disconnection.

2. The method according to claim 1, characterized in that, Based on the voltage differential criterion, faults in a DC circuit breaker system are detected, and fault signals are generated, including: Based on the voltage differential criterion, the differential values ​​of the bus-side current and the load-side current of the DC circuit breaker system are obtained; Based on the offsetting relationship between the differential value of the bus-side current and the differential value of the load-side current, the faulty line is identified; Based on the identification results of the faulty line, a selective fault signal is generated to control the operation of the current limiting device.

3. The method according to claim 1, characterized in that, Based on the voltage differential criterion, faults in a DC circuit breaker system are detected, and fault signals are generated, including: Based on the voltage differential criterion, monitor the rate of change of the output voltage of the DC circuit breaker system; Based on the undervoltage criterion, when the output voltage is lower than the rated voltage ratio, the fault type can be determined. Based on the fault type determination result, a G signal is output, where a G signal value of 1 indicates a fault, 0 indicates no fault, and -1 indicates a permanent fault.

4. The method according to claim 1, characterized in that, Based on the periodic zero-crossing point and the breaking enable signal, the mechanical switch is controlled to perform a breaking operation at the periodic zero-crossing point to achieve arc-free breaking, including: After the disconnection operation, monitor the DC circuit breaker system output voltage to return to the normal range; When the output voltage recovers, the control ultra-fast mechanical switch closes and the power electronic switch is turned off, allowing the current to shift from the current-limiting branch back to the main current-carrying branch, thus achieving system self-recovery.

5. The method according to claim 1, characterized in that, Based on the fault signal, the electromagnetic mechanism of the mechanical switch is controlled to perform negative voltage excitation control to generate a disconnection enable signal, including: Based on the fault signal, the reverse excitation operation of the electromagnetic mechanism coil is triggered; The reverse excitation operation cancels out the residual magnetism in the magnetic circuit; Based on the residual magnetism cancellation result, the opening speed of the moving iron core is accelerated, and a disconnection enable signal is generated.

6. The method according to claim 1, characterized in that, Based on the fault signal, the power electronic switch of the current limiting device is controlled to perform chopping control to adjust the fault current into a sawtooth waveform, thereby generating periodic zero-crossing points, including: Based on the fault signal, the peak current limiting branch is first activated to limit the initial peak value of the fault current; then the power electronic switch is controlled to perform chopping to adjust the current waveform. A stable sawtooth waveform is generated through the synergy between the peak current limiting branch and the main current limiting branch.

7. The method according to claim 1, characterized in that, The electromagnetic mechanism controlling the mechanical switch performs negative voltage excitation control, including applying a magnetic flux closed-loop start-up strategy during the closing phase: During the closing process, the flux linkage size of the electromagnetic mechanism is adjusted through closed-loop flux linkage control. Optimize the attraction and reaction force based on magnetic flux adjustment to suppress contact bounce.

8. An arc-free breaking device for a DC circuit breaker, characterized in that, An application is made in a DC circuit breaker system with current limiting function. The DC circuit breaker system with current limiting function includes a current limiting device and a mechanical switch. The current limiting device includes a power electronic switch, and the mechanical switch includes an electromagnetic mechanism. The device includes: The fault module, based on the voltage differential criterion, detects faults in the DC circuit breaker system and generates fault signals. The control module, based on the fault signal, controls the power electronic switch of the current limiting device to perform chopping control, so as to adjust the fault current into a sawtooth waveform, thereby generating periodic zero crossings; The signal module controls the electromagnetic mechanism of the mechanical switch to perform negative pressure excitation control based on the fault signal, so as to generate a disconnection enable signal; The execution module controls the mechanical switch to perform a breaking operation at the periodic zero-crossing point based on the periodic zero-crossing point and the breaking enable signal, thereby achieving arc-free breaking.

9. An electronic device, characterized in that, The method includes a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the method as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, It stores a computer program that, when executed in a computer, causes the computer to perform the method described in any one of claims 1 to 7.

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